1 /* 2 * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_CodeStubs.hpp" 27 #include "c1/c1_InstructionPrinter.hpp" 28 #include "c1/c1_LIR.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_ValueStack.hpp" 31 #include "ci/ciInstance.hpp" 32 #include "runtime/safepointMechanism.inline.hpp" 33 #include "runtime/sharedRuntime.hpp" 34 #include "runtime/vm_version.hpp" 35 36 Register LIR_Opr::as_register() const { 37 return FrameMap::cpu_rnr2reg(cpu_regnr()); 38 } 39 40 Register LIR_Opr::as_register_lo() const { 41 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 42 } 43 44 Register LIR_Opr::as_register_hi() const { 45 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 46 } 47 48 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 49 LIR_Opr LIR_OprFact::nullOpr = LIR_Opr(); 50 51 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 52 ValueTag tag = type->tag(); 53 switch (tag) { 54 case metaDataTag : { 55 ClassConstant* c = type->as_ClassConstant(); 56 if (c != NULL && !c->value()->is_loaded()) { 57 return LIR_OprFact::metadataConst(NULL); 58 } else if (c != NULL) { 59 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); 60 } else { 61 MethodConstant* m = type->as_MethodConstant(); 62 assert (m != NULL, "not a class or a method?"); 63 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); 64 } 65 } 66 case objectTag : { 67 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 68 } 69 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 70 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 71 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 72 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 73 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 74 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 75 } 76 } 77 78 79 //--------------------------------------------------- 80 81 82 LIR_Address::Scale LIR_Address::scale(BasicType type) { 83 int elem_size = type2aelembytes(type); 84 switch (elem_size) { 85 case 1: return LIR_Address::times_1; 86 case 2: return LIR_Address::times_2; 87 case 4: return LIR_Address::times_4; 88 case 8: return LIR_Address::times_8; 89 } 90 ShouldNotReachHere(); 91 return LIR_Address::times_1; 92 } 93 94 //--------------------------------------------------- 95 96 char LIR_Opr::type_char(BasicType t) { 97 switch (t) { 98 case T_ARRAY: 99 t = T_OBJECT; 100 case T_BOOLEAN: 101 case T_CHAR: 102 case T_FLOAT: 103 case T_DOUBLE: 104 case T_BYTE: 105 case T_SHORT: 106 case T_INT: 107 case T_LONG: 108 case T_OBJECT: 109 case T_ADDRESS: 110 case T_VOID: 111 return ::type2char(t); 112 case T_METADATA: 113 return 'M'; 114 case T_ILLEGAL: 115 return '?'; 116 117 default: 118 ShouldNotReachHere(); 119 return '?'; 120 } 121 } 122 123 #ifndef PRODUCT 124 void LIR_Opr::validate_type() const { 125 126 #ifdef ASSERT 127 if (!is_pointer() && !is_illegal()) { 128 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 129 switch (as_BasicType(type_field())) { 130 case T_LONG: 131 assert((kindfield == cpu_register || kindfield == stack_value) && 132 size_field() == double_size, "must match"); 133 break; 134 case T_FLOAT: 135 // FP return values can be also in CPU registers on ARM (softfp ABI) 136 assert((kindfield == fpu_register || kindfield == stack_value 137 ARM_ONLY(|| kindfield == cpu_register) ) && 138 size_field() == single_size, "must match"); 139 break; 140 case T_DOUBLE: 141 // FP return values can be also in CPU registers on ARM (softfp ABI) 142 assert((kindfield == fpu_register || kindfield == stack_value 143 ARM_ONLY(|| kindfield == cpu_register) ) && 144 size_field() == double_size, "must match"); 145 break; 146 case T_BOOLEAN: 147 case T_CHAR: 148 case T_BYTE: 149 case T_SHORT: 150 case T_INT: 151 case T_ADDRESS: 152 case T_OBJECT: 153 case T_METADATA: 154 case T_ARRAY: 155 assert((kindfield == cpu_register || kindfield == stack_value) && 156 size_field() == single_size, "must match"); 157 break; 158 159 case T_ILLEGAL: 160 // XXX TKR also means unknown right now 161 // assert(is_illegal(), "must match"); 162 break; 163 164 default: 165 ShouldNotReachHere(); 166 } 167 } 168 #endif 169 170 } 171 #endif // PRODUCT 172 173 174 bool LIR_Opr::is_oop() const { 175 if (is_pointer()) { 176 return pointer()->is_oop_pointer(); 177 } else { 178 OprType t= type_field(); 179 assert(t != unknown_type, "not set"); 180 return t == object_type; 181 } 182 } 183 184 185 186 void LIR_Op2::verify() const { 187 #ifdef ASSERT 188 switch (code()) { 189 case lir_xchg: 190 break; 191 192 default: 193 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 194 "can't produce oops from arith"); 195 } 196 197 if (TwoOperandLIRForm) { 198 199 #ifdef ASSERT 200 bool threeOperandForm = false; 201 #ifdef S390 202 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()). 203 threeOperandForm = 204 code() == lir_shl || 205 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT)); 206 #endif 207 #endif 208 209 switch (code()) { 210 case lir_add: 211 case lir_sub: 212 case lir_mul: 213 case lir_div: 214 case lir_rem: 215 case lir_logic_and: 216 case lir_logic_or: 217 case lir_logic_xor: 218 case lir_shl: 219 case lir_shr: 220 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match"); 221 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 222 break; 223 224 // special handling for lir_ushr because of write barriers 225 case lir_ushr: 226 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant"); 227 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 228 break; 229 230 default: 231 break; 232 } 233 } 234 #endif 235 } 236 237 238 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block) 239 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 240 , _label(block->label()) 241 , _block(block) 242 , _ublock(NULL) 243 , _stub(NULL) { 244 } 245 246 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) : 247 LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 248 , _label(stub->entry()) 249 , _block(NULL) 250 , _ublock(NULL) 251 , _stub(stub) { 252 } 253 254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock) 255 : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 256 , _label(block->label()) 257 , _block(block) 258 , _ublock(ublock) 259 , _stub(NULL) 260 { 261 } 262 263 void LIR_OpBranch::change_block(BlockBegin* b) { 264 assert(_block != NULL, "must have old block"); 265 assert(_block->label() == label(), "must be equal"); 266 267 _block = b; 268 _label = b->label(); 269 } 270 271 void LIR_OpBranch::change_ublock(BlockBegin* b) { 272 assert(_ublock != NULL, "must have old block"); 273 _ublock = b; 274 } 275 276 void LIR_OpBranch::negate_cond() { 277 switch (cond()) { 278 case lir_cond_equal: set_cond(lir_cond_notEqual); break; 279 case lir_cond_notEqual: set_cond(lir_cond_equal); break; 280 case lir_cond_less: set_cond(lir_cond_greaterEqual); break; 281 case lir_cond_lessEqual: set_cond(lir_cond_greater); break; 282 case lir_cond_greaterEqual: set_cond(lir_cond_less); break; 283 case lir_cond_greater: set_cond(lir_cond_lessEqual); break; 284 default: ShouldNotReachHere(); 285 } 286 } 287 288 289 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 290 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 291 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 292 CodeStub* stub) 293 294 : LIR_Op(code, result, NULL) 295 , _object(object) 296 , _array(LIR_OprFact::illegalOpr) 297 , _klass(klass) 298 , _tmp1(tmp1) 299 , _tmp2(tmp2) 300 , _tmp3(tmp3) 301 , _fast_check(fast_check) 302 , _info_for_patch(info_for_patch) 303 , _info_for_exception(info_for_exception) 304 , _stub(stub) 305 , _profiled_method(NULL) 306 , _profiled_bci(-1) 307 , _should_profile(false) 308 { 309 if (code == lir_checkcast) { 310 assert(info_for_exception != NULL, "checkcast throws exceptions"); 311 } else if (code == lir_instanceof) { 312 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 313 } else { 314 ShouldNotReachHere(); 315 } 316 } 317 318 319 320 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 321 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 322 , _object(object) 323 , _array(array) 324 , _klass(NULL) 325 , _tmp1(tmp1) 326 , _tmp2(tmp2) 327 , _tmp3(tmp3) 328 , _fast_check(false) 329 , _info_for_patch(NULL) 330 , _info_for_exception(info_for_exception) 331 , _stub(NULL) 332 , _profiled_method(NULL) 333 , _profiled_bci(-1) 334 , _should_profile(false) 335 { 336 if (code == lir_store_check) { 337 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 338 assert(info_for_exception != NULL, "store_check throws exceptions"); 339 } else { 340 ShouldNotReachHere(); 341 } 342 } 343 344 345 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 346 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 347 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 348 , _src(src) 349 , _src_pos(src_pos) 350 , _dst(dst) 351 , _dst_pos(dst_pos) 352 , _length(length) 353 , _tmp(tmp) 354 , _expected_type(expected_type) 355 , _flags(flags) { 356 _stub = new ArrayCopyStub(this); 357 } 358 359 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) 360 : LIR_Op(lir_updatecrc32, res, NULL) 361 , _crc(crc) 362 , _val(val) { 363 } 364 365 //-------------------verify-------------------------- 366 367 void LIR_Op1::verify() const { 368 switch(code()) { 369 case lir_move: 370 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 371 break; 372 case lir_null_check: 373 assert(in_opr()->is_register(), "must be"); 374 break; 375 case lir_return: 376 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 377 break; 378 default: 379 break; 380 } 381 } 382 383 void LIR_OpRTCall::verify() const { 384 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 385 } 386 387 //-------------------visits-------------------------- 388 389 // complete rework of LIR instruction visitor. 390 // The virtual call for each instruction type is replaced by a big 391 // switch that adds the operands for each instruction 392 393 void LIR_OpVisitState::visit(LIR_Op* op) { 394 // copy information from the LIR_Op 395 reset(); 396 set_op(op); 397 398 switch (op->code()) { 399 400 // LIR_Op0 401 case lir_fpop_raw: // result and info always invalid 402 case lir_breakpoint: // result and info always invalid 403 case lir_membar: // result and info always invalid 404 case lir_membar_acquire: // result and info always invalid 405 case lir_membar_release: // result and info always invalid 406 case lir_membar_loadload: // result and info always invalid 407 case lir_membar_storestore: // result and info always invalid 408 case lir_membar_loadstore: // result and info always invalid 409 case lir_membar_storeload: // result and info always invalid 410 case lir_on_spin_wait: 411 { 412 assert(op->as_Op0() != NULL, "must be"); 413 assert(op->_info == NULL, "info not used by this instruction"); 414 assert(op->_result->is_illegal(), "not used"); 415 break; 416 } 417 418 case lir_nop: // may have info, result always invalid 419 case lir_std_entry: // may have result, info always invalid 420 case lir_osr_entry: // may have result, info always invalid 421 case lir_get_thread: // may have result, info always invalid 422 { 423 assert(op->as_Op0() != NULL, "must be"); 424 if (op->_info != NULL) do_info(op->_info); 425 if (op->_result->is_valid()) do_output(op->_result); 426 break; 427 } 428 429 430 // LIR_OpLabel 431 case lir_label: // result and info always invalid 432 { 433 assert(op->as_OpLabel() != NULL, "must be"); 434 assert(op->_info == NULL, "info not used by this instruction"); 435 assert(op->_result->is_illegal(), "not used"); 436 break; 437 } 438 439 440 // LIR_Op1 441 case lir_fxch: // input always valid, result and info always invalid 442 case lir_fld: // input always valid, result and info always invalid 443 case lir_push: // input always valid, result and info always invalid 444 case lir_pop: // input always valid, result and info always invalid 445 case lir_leal: // input and result always valid, info always invalid 446 case lir_monaddr: // input and result always valid, info always invalid 447 case lir_null_check: // input and info always valid, result always invalid 448 case lir_move: // input and result always valid, may have info 449 { 450 assert(op->as_Op1() != NULL, "must be"); 451 LIR_Op1* op1 = (LIR_Op1*)op; 452 453 if (op1->_info) do_info(op1->_info); 454 if (op1->_opr->is_valid()) do_input(op1->_opr); 455 if (op1->_result->is_valid()) do_output(op1->_result); 456 457 break; 458 } 459 460 case lir_return: 461 { 462 assert(op->as_OpReturn() != NULL, "must be"); 463 LIR_OpReturn* op_ret = (LIR_OpReturn*)op; 464 465 if (op_ret->_info) do_info(op_ret->_info); 466 if (op_ret->_opr->is_valid()) do_input(op_ret->_opr); 467 if (op_ret->_result->is_valid()) do_output(op_ret->_result); 468 if (op_ret->stub() != NULL) do_stub(op_ret->stub()); 469 470 break; 471 } 472 473 case lir_safepoint: 474 { 475 assert(op->as_Op1() != NULL, "must be"); 476 LIR_Op1* op1 = (LIR_Op1*)op; 477 478 assert(op1->_info != NULL, ""); do_info(op1->_info); 479 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 480 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 481 482 break; 483 } 484 485 // LIR_OpConvert; 486 case lir_convert: // input and result always valid, info always invalid 487 { 488 assert(op->as_OpConvert() != NULL, "must be"); 489 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 490 491 assert(opConvert->_info == NULL, "must be"); 492 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 493 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 494 do_stub(opConvert->_stub); 495 496 break; 497 } 498 499 // LIR_OpBranch; 500 case lir_branch: // may have info, input and result register always invalid 501 case lir_cond_float_branch: // may have info, input and result register always invalid 502 { 503 assert(op->as_OpBranch() != NULL, "must be"); 504 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 505 506 assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() && 507 opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() && 508 opBranch->_tmp5->is_illegal(), "not used"); 509 510 if (opBranch->_opr1->is_valid()) do_input(opBranch->_opr1); 511 if (opBranch->_opr2->is_valid()) do_input(opBranch->_opr2); 512 513 if (opBranch->_info != NULL) do_info(opBranch->_info); 514 assert(opBranch->_result->is_illegal(), "not used"); 515 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 516 517 break; 518 } 519 520 521 // LIR_OpAllocObj 522 case lir_alloc_object: 523 { 524 assert(op->as_OpAllocObj() != NULL, "must be"); 525 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 526 527 if (opAllocObj->_info) do_info(opAllocObj->_info); 528 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 529 do_temp(opAllocObj->_opr); 530 } 531 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 532 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 533 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 534 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 535 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 536 do_stub(opAllocObj->_stub); 537 break; 538 } 539 540 541 // LIR_OpRoundFP; 542 case lir_roundfp: { 543 assert(op->as_OpRoundFP() != NULL, "must be"); 544 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 545 546 assert(op->_info == NULL, "info not used by this instruction"); 547 assert(opRoundFP->_tmp->is_illegal(), "not used"); 548 do_input(opRoundFP->_opr); 549 do_output(opRoundFP->_result); 550 551 break; 552 } 553 554 555 // LIR_Op2 556 case lir_cmp: 557 case lir_cmp_l2i: 558 case lir_ucmp_fd2i: 559 case lir_cmp_fd2i: 560 case lir_add: 561 case lir_sub: 562 case lir_rem: 563 case lir_sqrt: 564 case lir_abs: 565 case lir_neg: 566 case lir_logic_and: 567 case lir_logic_or: 568 case lir_logic_xor: 569 case lir_shl: 570 case lir_shr: 571 case lir_ushr: 572 case lir_xadd: 573 case lir_xchg: 574 case lir_assert: 575 { 576 assert(op->as_Op2() != NULL, "must be"); 577 LIR_Op2* op2 = (LIR_Op2*)op; 578 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 579 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 580 581 if (op2->_info) do_info(op2->_info); 582 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 583 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 584 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 585 if (op2->_result->is_valid()) do_output(op2->_result); 586 if (op->code() == lir_xchg || op->code() == lir_xadd) { 587 // on ARM and PPC, return value is loaded first so could 588 // destroy inputs. On other platforms that implement those 589 // (x86, sparc), the extra constrainsts are harmless. 590 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 591 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 592 } 593 594 break; 595 } 596 597 // special handling for cmove: right input operand must not be equal 598 // to the result operand, otherwise the backend fails 599 case lir_cmove: 600 { 601 assert(op->as_Op4() != NULL, "must be"); 602 LIR_Op4* op4 = (LIR_Op4*)op; 603 604 assert(op4->_info == NULL && op4->_tmp1->is_illegal() && op4->_tmp2->is_illegal() && 605 op4->_tmp3->is_illegal() && op4->_tmp4->is_illegal() && op4->_tmp5->is_illegal(), "not used"); 606 assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && op4->_result->is_valid(), "used"); 607 608 do_input(op4->_opr1); 609 do_input(op4->_opr2); 610 if (op4->_opr3->is_valid()) do_input(op4->_opr3); 611 if (op4->_opr4->is_valid()) do_input(op4->_opr4); 612 do_temp(op4->_opr2); 613 do_output(op4->_result); 614 615 break; 616 } 617 618 // vspecial handling for strict operations: register input operands 619 // as temp to guarantee that they do not overlap with other 620 // registers 621 case lir_mul: 622 case lir_div: 623 { 624 assert(op->as_Op2() != NULL, "must be"); 625 LIR_Op2* op2 = (LIR_Op2*)op; 626 627 assert(op2->_info == NULL, "not used"); 628 assert(op2->_opr1->is_valid(), "used"); 629 assert(op2->_opr2->is_valid(), "used"); 630 assert(op2->_result->is_valid(), "used"); 631 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 632 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 633 634 do_input(op2->_opr1); do_temp(op2->_opr1); 635 do_input(op2->_opr2); do_temp(op2->_opr2); 636 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 637 do_output(op2->_result); 638 639 break; 640 } 641 642 case lir_throw: { 643 assert(op->as_Op2() != NULL, "must be"); 644 LIR_Op2* op2 = (LIR_Op2*)op; 645 646 if (op2->_info) do_info(op2->_info); 647 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 648 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 649 assert(op2->_result->is_illegal(), "no result"); 650 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 651 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 652 653 break; 654 } 655 656 case lir_unwind: { 657 assert(op->as_Op1() != NULL, "must be"); 658 LIR_Op1* op1 = (LIR_Op1*)op; 659 660 assert(op1->_info == NULL, "no info"); 661 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 662 assert(op1->_result->is_illegal(), "no result"); 663 664 break; 665 } 666 667 // LIR_Op3 668 case lir_idiv: 669 case lir_irem: { 670 assert(op->as_Op3() != NULL, "must be"); 671 LIR_Op3* op3= (LIR_Op3*)op; 672 673 if (op3->_info) do_info(op3->_info); 674 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 675 676 // second operand is input and temp, so ensure that second operand 677 // and third operand get not the same register 678 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 679 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 680 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 681 682 if (op3->_result->is_valid()) do_output(op3->_result); 683 684 break; 685 } 686 687 case lir_fmad: 688 case lir_fmaf: { 689 assert(op->as_Op3() != NULL, "must be"); 690 LIR_Op3* op3= (LIR_Op3*)op; 691 assert(op3->_info == NULL, "no info"); 692 do_input(op3->_opr1); 693 do_input(op3->_opr2); 694 do_input(op3->_opr3); 695 do_output(op3->_result); 696 break; 697 } 698 699 // LIR_OpJavaCall 700 case lir_static_call: 701 case lir_optvirtual_call: 702 case lir_icvirtual_call: 703 case lir_dynamic_call: { 704 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 705 assert(opJavaCall != NULL, "must be"); 706 707 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 708 709 // only visit register parameters 710 int n = opJavaCall->_arguments->length(); 711 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { 712 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 713 do_input(*opJavaCall->_arguments->adr_at(i)); 714 } 715 } 716 717 if (opJavaCall->_info) do_info(opJavaCall->_info); 718 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && 719 opJavaCall->is_method_handle_invoke()) { 720 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 721 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 722 } 723 do_call(); 724 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 725 726 break; 727 } 728 729 730 // LIR_OpRTCall 731 case lir_rtcall: { 732 assert(op->as_OpRTCall() != NULL, "must be"); 733 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 734 735 // only visit register parameters 736 int n = opRTCall->_arguments->length(); 737 for (int i = 0; i < n; i++) { 738 if (!opRTCall->_arguments->at(i)->is_pointer()) { 739 do_input(*opRTCall->_arguments->adr_at(i)); 740 } 741 } 742 if (opRTCall->_info) do_info(opRTCall->_info); 743 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 744 do_call(); 745 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 746 747 break; 748 } 749 750 751 // LIR_OpArrayCopy 752 case lir_arraycopy: { 753 assert(op->as_OpArrayCopy() != NULL, "must be"); 754 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 755 756 assert(opArrayCopy->_result->is_illegal(), "unused"); 757 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 758 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 759 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 760 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 761 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 762 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 763 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 764 765 // the implementation of arraycopy always has a call into the runtime 766 do_call(); 767 768 break; 769 } 770 771 772 // LIR_OpUpdateCRC32 773 case lir_updatecrc32: { 774 assert(op->as_OpUpdateCRC32() != NULL, "must be"); 775 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; 776 777 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); 778 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); 779 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); 780 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); 781 782 break; 783 } 784 785 786 // LIR_OpLock 787 case lir_lock: 788 case lir_unlock: { 789 assert(op->as_OpLock() != NULL, "must be"); 790 LIR_OpLock* opLock = (LIR_OpLock*)op; 791 792 if (opLock->_info) do_info(opLock->_info); 793 794 // TODO: check if these operands really have to be temp 795 // (or if input is sufficient). This may have influence on the oop map! 796 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 797 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 798 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 799 800 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 801 assert(opLock->_result->is_illegal(), "unused"); 802 803 do_stub(opLock->_stub); 804 805 break; 806 } 807 808 809 // LIR_OpDelay 810 case lir_delay_slot: { 811 assert(op->as_OpDelay() != NULL, "must be"); 812 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 813 814 visit(opDelay->delay_op()); 815 break; 816 } 817 818 // LIR_OpTypeCheck 819 case lir_instanceof: 820 case lir_checkcast: 821 case lir_store_check: { 822 assert(op->as_OpTypeCheck() != NULL, "must be"); 823 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 824 825 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 826 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 827 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 828 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { 829 do_temp(opTypeCheck->_object); 830 } 831 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 832 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 833 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 834 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 835 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 836 do_stub(opTypeCheck->_stub); 837 break; 838 } 839 840 // LIR_OpCompareAndSwap 841 case lir_cas_long: 842 case lir_cas_obj: 843 case lir_cas_int: { 844 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 845 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 846 847 assert(opCompareAndSwap->_addr->is_valid(), "used"); 848 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 849 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 850 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 851 do_input(opCompareAndSwap->_addr); 852 do_temp(opCompareAndSwap->_addr); 853 do_input(opCompareAndSwap->_cmp_value); 854 do_temp(opCompareAndSwap->_cmp_value); 855 do_input(opCompareAndSwap->_new_value); 856 do_temp(opCompareAndSwap->_new_value); 857 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 858 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 859 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 860 861 break; 862 } 863 864 865 // LIR_OpAllocArray; 866 case lir_alloc_array: { 867 assert(op->as_OpAllocArray() != NULL, "must be"); 868 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 869 870 if (opAllocArray->_info) do_info(opAllocArray->_info); 871 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 872 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 873 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 874 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 875 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 876 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 877 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 878 do_stub(opAllocArray->_stub); 879 break; 880 } 881 882 // LIR_OpLoadKlass 883 case lir_load_klass: 884 { 885 LIR_OpLoadKlass* opLoadKlass = op->as_OpLoadKlass(); 886 assert(opLoadKlass != NULL, "must be"); 887 888 do_input(opLoadKlass->_obj); 889 do_output(opLoadKlass->_result); 890 if (opLoadKlass->_info) do_info(opLoadKlass->_info); 891 break; 892 } 893 894 895 // LIR_OpProfileCall: 896 case lir_profile_call: { 897 assert(op->as_OpProfileCall() != NULL, "must be"); 898 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 899 900 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 901 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 902 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 903 break; 904 } 905 906 // LIR_OpProfileType: 907 case lir_profile_type: { 908 assert(op->as_OpProfileType() != NULL, "must be"); 909 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; 910 911 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); 912 do_input(opProfileType->_obj); 913 do_temp(opProfileType->_tmp); 914 break; 915 } 916 default: 917 op->visit(this); 918 } 919 } 920 921 void LIR_Op::visit(LIR_OpVisitState* state) { 922 ShouldNotReachHere(); 923 } 924 925 void LIR_OpVisitState::do_stub(CodeStub* stub) { 926 if (stub != NULL) { 927 stub->visit(this); 928 } 929 } 930 931 XHandlers* LIR_OpVisitState::all_xhandler() { 932 XHandlers* result = NULL; 933 934 int i; 935 for (i = 0; i < info_count(); i++) { 936 if (info_at(i)->exception_handlers() != NULL) { 937 result = info_at(i)->exception_handlers(); 938 break; 939 } 940 } 941 942 #ifdef ASSERT 943 for (i = 0; i < info_count(); i++) { 944 assert(info_at(i)->exception_handlers() == NULL || 945 info_at(i)->exception_handlers() == result, 946 "only one xhandler list allowed per LIR-operation"); 947 } 948 #endif 949 950 if (result != NULL) { 951 return result; 952 } else { 953 return new XHandlers(); 954 } 955 956 return result; 957 } 958 959 960 #ifdef ASSERT 961 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 962 visit(op); 963 964 return opr_count(inputMode) == 0 && 965 opr_count(outputMode) == 0 && 966 opr_count(tempMode) == 0 && 967 info_count() == 0 && 968 !has_call() && 969 !has_slow_case(); 970 } 971 #endif 972 973 // LIR_OpReturn 974 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) : 975 LIR_Op1(lir_return, opr, (CodeEmitInfo*)NULL /* info */), 976 _stub(NULL) { 977 if (VM_Version::supports_stack_watermark_barrier()) { 978 _stub = new C1SafepointPollStub(); 979 } 980 } 981 982 //--------------------------------------------------- 983 984 985 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 986 masm->emit_call(this); 987 } 988 989 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 990 masm->emit_rtcall(this); 991 } 992 993 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 994 masm->emit_opLabel(this); 995 } 996 997 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 998 masm->emit_arraycopy(this); 999 masm->append_code_stub(stub()); 1000 } 1001 1002 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { 1003 masm->emit_updatecrc32(this); 1004 } 1005 1006 void LIR_Op0::emit_code(LIR_Assembler* masm) { 1007 masm->emit_op0(this); 1008 } 1009 1010 void LIR_Op1::emit_code(LIR_Assembler* masm) { 1011 masm->emit_op1(this); 1012 } 1013 1014 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 1015 masm->emit_alloc_obj(this); 1016 masm->append_code_stub(stub()); 1017 } 1018 1019 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 1020 masm->emit_opBranch(this); 1021 if (stub()) { 1022 masm->append_code_stub(stub()); 1023 } 1024 } 1025 1026 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1027 masm->emit_opConvert(this); 1028 if (stub() != NULL) { 1029 masm->append_code_stub(stub()); 1030 } 1031 } 1032 1033 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1034 masm->emit_op2(this); 1035 } 1036 1037 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1038 masm->emit_alloc_array(this); 1039 masm->append_code_stub(stub()); 1040 } 1041 1042 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1043 masm->emit_opTypeCheck(this); 1044 if (stub()) { 1045 masm->append_code_stub(stub()); 1046 } 1047 } 1048 1049 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1050 masm->emit_compare_and_swap(this); 1051 } 1052 1053 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1054 masm->emit_op3(this); 1055 } 1056 1057 void LIR_Op4::emit_code(LIR_Assembler* masm) { 1058 masm->emit_op4(this); 1059 } 1060 1061 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1062 masm->emit_lock(this); 1063 if (stub()) { 1064 masm->append_code_stub(stub()); 1065 } 1066 } 1067 1068 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) { 1069 masm->emit_load_klass(this); 1070 } 1071 1072 #ifdef ASSERT 1073 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { 1074 masm->emit_assert(this); 1075 } 1076 #endif 1077 1078 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1079 masm->emit_delay(this); 1080 } 1081 1082 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1083 masm->emit_profile_call(this); 1084 } 1085 1086 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { 1087 masm->emit_profile_type(this); 1088 } 1089 1090 // LIR_List 1091 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1092 : _operations(8) 1093 , _compilation(compilation) 1094 #ifndef PRODUCT 1095 , _block(block) 1096 #endif 1097 #ifdef ASSERT 1098 , _file(NULL) 1099 , _line(0) 1100 #endif 1101 #ifdef RISCV 1102 , _cmp_opr1(LIR_OprFact::illegalOpr) 1103 , _cmp_opr2(LIR_OprFact::illegalOpr) 1104 #endif 1105 { } 1106 1107 1108 #ifdef ASSERT 1109 void LIR_List::set_file_and_line(const char * file, int line) { 1110 const char * f = strrchr(file, '/'); 1111 if (f == NULL) f = strrchr(file, '\\'); 1112 if (f == NULL) { 1113 f = file; 1114 } else { 1115 f++; 1116 } 1117 _file = f; 1118 _line = line; 1119 } 1120 #endif 1121 1122 #ifdef RISCV 1123 void LIR_List::set_cmp_oprs(LIR_Op* op) { 1124 switch (op->code()) { 1125 case lir_cmp: 1126 _cmp_opr1 = op->as_Op2()->in_opr1(); 1127 _cmp_opr2 = op->as_Op2()->in_opr2(); 1128 break; 1129 case lir_branch: // fall through 1130 case lir_cond_float_branch: 1131 assert(op->as_OpBranch()->cond() == lir_cond_always || 1132 (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr), 1133 "conditional branches must have legal operands"); 1134 if (op->as_OpBranch()->cond() != lir_cond_always) { 1135 op->as_Op2()->set_in_opr1(_cmp_opr1); 1136 op->as_Op2()->set_in_opr2(_cmp_opr2); 1137 } 1138 break; 1139 case lir_cmove: 1140 op->as_Op4()->set_in_opr3(_cmp_opr1); 1141 op->as_Op4()->set_in_opr4(_cmp_opr2); 1142 break; 1143 #if INCLUDE_ZGC 1144 case lir_zloadbarrier_test: 1145 _cmp_opr1 = FrameMap::as_opr(t1); 1146 _cmp_opr2 = LIR_OprFact::intConst(0); 1147 break; 1148 #endif 1149 default: 1150 break; 1151 } 1152 } 1153 #endif 1154 1155 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1156 assert(this == buffer->lir_list(), "wrong lir list"); 1157 const int n = _operations.length(); 1158 1159 if (buffer->number_of_ops() > 0) { 1160 // increase size of instructions list 1161 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1162 // insert ops from buffer into instructions list 1163 int op_index = buffer->number_of_ops() - 1; 1164 int ip_index = buffer->number_of_insertion_points() - 1; 1165 int from_index = n - 1; 1166 int to_index = _operations.length() - 1; 1167 for (; ip_index >= 0; ip_index --) { 1168 int index = buffer->index_at(ip_index); 1169 // make room after insertion point 1170 while (index < from_index) { 1171 _operations.at_put(to_index --, _operations.at(from_index --)); 1172 } 1173 // insert ops from buffer 1174 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1175 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1176 } 1177 } 1178 } 1179 1180 buffer->finish(); 1181 } 1182 1183 1184 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1185 assert(reg->type() == T_OBJECT, "bad reg"); 1186 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1187 } 1188 1189 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { 1190 assert(reg->type() == T_METADATA, "bad reg"); 1191 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); 1192 } 1193 1194 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1195 append(new LIR_Op1( 1196 lir_move, 1197 LIR_OprFact::address(addr), 1198 src, 1199 addr->type(), 1200 patch_code, 1201 info)); 1202 } 1203 1204 1205 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1206 append(new LIR_Op1( 1207 lir_move, 1208 LIR_OprFact::address(address), 1209 dst, 1210 address->type(), 1211 patch_code, 1212 info, lir_move_volatile)); 1213 } 1214 1215 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1216 append(new LIR_Op1( 1217 lir_move, 1218 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1219 dst, 1220 type, 1221 patch_code, 1222 info, lir_move_volatile)); 1223 } 1224 1225 1226 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1227 append(new LIR_Op1( 1228 lir_move, 1229 LIR_OprFact::intConst(v), 1230 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1231 type, 1232 patch_code, 1233 info)); 1234 } 1235 1236 1237 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1238 append(new LIR_Op1( 1239 lir_move, 1240 LIR_OprFact::oopConst(o), 1241 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1242 type, 1243 patch_code, 1244 info)); 1245 } 1246 1247 1248 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1249 append(new LIR_Op1( 1250 lir_move, 1251 src, 1252 LIR_OprFact::address(addr), 1253 addr->type(), 1254 patch_code, 1255 info)); 1256 } 1257 1258 1259 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1260 append(new LIR_Op1( 1261 lir_move, 1262 src, 1263 LIR_OprFact::address(addr), 1264 addr->type(), 1265 patch_code, 1266 info, 1267 lir_move_volatile)); 1268 } 1269 1270 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1271 append(new LIR_Op1( 1272 lir_move, 1273 src, 1274 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1275 type, 1276 patch_code, 1277 info, lir_move_volatile)); 1278 } 1279 1280 1281 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1282 append(new LIR_Op3( 1283 lir_idiv, 1284 left, 1285 right, 1286 tmp, 1287 res, 1288 info)); 1289 } 1290 1291 1292 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1293 append(new LIR_Op3( 1294 lir_idiv, 1295 left, 1296 LIR_OprFact::intConst(right), 1297 tmp, 1298 res, 1299 info)); 1300 } 1301 1302 1303 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1304 append(new LIR_Op3( 1305 lir_irem, 1306 left, 1307 right, 1308 tmp, 1309 res, 1310 info)); 1311 } 1312 1313 1314 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1315 append(new LIR_Op3( 1316 lir_irem, 1317 left, 1318 LIR_OprFact::intConst(right), 1319 tmp, 1320 res, 1321 info)); 1322 } 1323 1324 1325 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1326 append(new LIR_Op2( 1327 lir_cmp, 1328 condition, 1329 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1330 LIR_OprFact::intConst(c), 1331 info)); 1332 } 1333 1334 1335 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1336 append(new LIR_Op2( 1337 lir_cmp, 1338 condition, 1339 reg, 1340 LIR_OprFact::address(addr), 1341 info)); 1342 } 1343 1344 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1345 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1346 append(new LIR_OpAllocObj( 1347 klass, 1348 dst, 1349 t1, 1350 t2, 1351 t3, 1352 t4, 1353 header_size, 1354 object_size, 1355 init_check, 1356 stub)); 1357 } 1358 1359 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1360 append(new LIR_OpAllocArray( 1361 klass, 1362 len, 1363 dst, 1364 t1, 1365 t2, 1366 t3, 1367 t4, 1368 type, 1369 stub)); 1370 } 1371 1372 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1373 append(new LIR_Op2( 1374 lir_shl, 1375 value, 1376 count, 1377 dst, 1378 tmp)); 1379 } 1380 1381 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1382 append(new LIR_Op2( 1383 lir_shr, 1384 value, 1385 count, 1386 dst, 1387 tmp)); 1388 } 1389 1390 1391 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1392 append(new LIR_Op2( 1393 lir_ushr, 1394 value, 1395 count, 1396 dst, 1397 tmp)); 1398 } 1399 1400 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1401 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1402 left, 1403 right, 1404 dst)); 1405 } 1406 1407 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1408 append(new LIR_OpLock( 1409 lir_lock, 1410 hdr, 1411 obj, 1412 lock, 1413 scratch, 1414 stub, 1415 info)); 1416 } 1417 1418 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1419 append(new LIR_OpLock( 1420 lir_unlock, 1421 hdr, 1422 obj, 1423 lock, 1424 scratch, 1425 stub, 1426 NULL)); 1427 } 1428 1429 1430 void check_LIR() { 1431 // cannot do the proper checking as PRODUCT and other modes return different results 1432 // guarantee(sizeof(LIR_Opr) == wordSize, "may not have a v-table"); 1433 } 1434 1435 1436 1437 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1438 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1439 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1440 ciMethod* profiled_method, int profiled_bci) { 1441 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1442 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); 1443 if (profiled_method != NULL) { 1444 c->set_profiled_method(profiled_method); 1445 c->set_profiled_bci(profiled_bci); 1446 c->set_should_profile(true); 1447 } 1448 append(c); 1449 } 1450 1451 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1452 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1453 if (profiled_method != NULL) { 1454 c->set_profiled_method(profiled_method); 1455 c->set_profiled_bci(profiled_bci); 1456 c->set_should_profile(true); 1457 } 1458 append(c); 1459 } 1460 1461 1462 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1463 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1464 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1465 if (profiled_method != NULL) { 1466 c->set_profiled_method(profiled_method); 1467 c->set_profiled_bci(profiled_bci); 1468 c->set_should_profile(true); 1469 } 1470 append(c); 1471 } 1472 1473 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 1474 if (deoptimize_on_null) { 1475 // Emit an explicit null check and deoptimize if opr is null 1476 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); 1477 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 1478 branch(lir_cond_equal, deopt); 1479 } else { 1480 // Emit an implicit null check 1481 append(new LIR_Op1(lir_null_check, opr, info)); 1482 } 1483 } 1484 1485 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1486 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1487 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1488 } 1489 1490 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1491 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1492 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1493 } 1494 1495 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1496 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1497 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1498 } 1499 1500 1501 #ifdef PRODUCT 1502 1503 void print_LIR(BlockList* blocks) { 1504 } 1505 1506 #else 1507 // LIR_Opr 1508 void LIR_Opr::print() const { 1509 print(tty); 1510 } 1511 1512 void LIR_Opr::print(outputStream* out) const { 1513 if (is_illegal()) { 1514 return; 1515 } 1516 1517 out->print("["); 1518 if (is_pointer()) { 1519 pointer()->print_value_on(out); 1520 } else if (is_single_stack()) { 1521 out->print("stack:%d", single_stack_ix()); 1522 } else if (is_double_stack()) { 1523 out->print("dbl_stack:%d",double_stack_ix()); 1524 } else if (is_virtual()) { 1525 out->print("R%d", vreg_number()); 1526 } else if (is_single_cpu()) { 1527 out->print("%s", as_register()->name()); 1528 } else if (is_double_cpu()) { 1529 out->print("%s", as_register_hi()->name()); 1530 out->print("%s", as_register_lo()->name()); 1531 #if defined(X86) 1532 } else if (is_single_xmm()) { 1533 out->print("%s", as_xmm_float_reg()->name()); 1534 } else if (is_double_xmm()) { 1535 out->print("%s", as_xmm_double_reg()->name()); 1536 } else if (is_single_fpu()) { 1537 out->print("fpu%d", fpu_regnr()); 1538 } else if (is_double_fpu()) { 1539 out->print("fpu%d", fpu_regnrLo()); 1540 #elif defined(AARCH64) 1541 } else if (is_single_fpu()) { 1542 out->print("fpu%d", fpu_regnr()); 1543 } else if (is_double_fpu()) { 1544 out->print("fpu%d", fpu_regnrLo()); 1545 #elif defined(ARM) 1546 } else if (is_single_fpu()) { 1547 out->print("s%d", fpu_regnr()); 1548 } else if (is_double_fpu()) { 1549 out->print("d%d", fpu_regnrLo() >> 1); 1550 #else 1551 } else if (is_single_fpu()) { 1552 out->print("%s", as_float_reg()->name()); 1553 } else if (is_double_fpu()) { 1554 out->print("%s", as_double_reg()->name()); 1555 #endif 1556 1557 } else if (is_illegal()) { 1558 out->print("-"); 1559 } else { 1560 out->print("Unknown Operand"); 1561 } 1562 if (!is_illegal()) { 1563 out->print("|%c", type_char()); 1564 } 1565 if (is_register() && is_last_use()) { 1566 out->print("(last_use)"); 1567 } 1568 out->print("]"); 1569 } 1570 1571 1572 // LIR_Address 1573 void LIR_Const::print_value_on(outputStream* out) const { 1574 switch (type()) { 1575 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1576 case T_INT: out->print("int:%d", as_jint()); break; 1577 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; 1578 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1579 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1580 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; 1581 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; 1582 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; 1583 } 1584 } 1585 1586 // LIR_Address 1587 void LIR_Address::print_value_on(outputStream* out) const { 1588 out->print("Base:"); _base->print(out); 1589 if (!_index->is_illegal()) { 1590 out->print(" Index:"); _index->print(out); 1591 switch (scale()) { 1592 case times_1: break; 1593 case times_2: out->print(" * 2"); break; 1594 case times_4: out->print(" * 4"); break; 1595 case times_8: out->print(" * 8"); break; 1596 } 1597 } 1598 out->print(" Disp: " INTX_FORMAT, _disp); 1599 } 1600 1601 // debug output of block header without InstructionPrinter 1602 // (because phi functions are not necessary for LIR) 1603 static void print_block(BlockBegin* x) { 1604 // print block id 1605 BlockEnd* end = x->end(); 1606 tty->print("B%d ", x->block_id()); 1607 1608 // print flags 1609 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1610 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1611 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1612 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1613 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1614 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1615 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1616 1617 // print block bci range 1618 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1619 1620 // print predecessors and successors 1621 if (x->number_of_preds() > 0) { 1622 tty->print("preds: "); 1623 for (int i = 0; i < x->number_of_preds(); i ++) { 1624 tty->print("B%d ", x->pred_at(i)->block_id()); 1625 } 1626 } 1627 1628 if (end != NULL && x->number_of_sux() > 0) { 1629 tty->print("sux: "); 1630 for (int i = 0; i < x->number_of_sux(); i ++) { 1631 tty->print("B%d ", x->sux_at(i)->block_id()); 1632 } 1633 } 1634 1635 // print exception handlers 1636 if (x->number_of_exception_handlers() > 0) { 1637 tty->print("xhandler: "); 1638 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1639 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1640 } 1641 } 1642 1643 tty->cr(); 1644 } 1645 1646 void print_LIR(BlockList* blocks) { 1647 tty->print_cr("LIR:"); 1648 int i; 1649 for (i = 0; i < blocks->length(); i++) { 1650 BlockBegin* bb = blocks->at(i); 1651 print_block(bb); 1652 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1653 bb->lir()->print_instructions(); 1654 } 1655 } 1656 1657 void LIR_List::print_instructions() { 1658 for (int i = 0; i < _operations.length(); i++) { 1659 _operations.at(i)->print(); tty->cr(); 1660 } 1661 tty->cr(); 1662 } 1663 1664 // LIR_Ops printing routines 1665 // LIR_Op 1666 void LIR_Op::print_on(outputStream* out) const { 1667 if (id() != -1 || PrintCFGToFile) { 1668 out->print("%4d ", id()); 1669 } else { 1670 out->print(" "); 1671 } 1672 out->print("%s ", name()); 1673 print_instr(out); 1674 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1675 #ifdef ASSERT 1676 if (Verbose && _file != NULL) { 1677 out->print(" (%s:%d)", _file, _line); 1678 } 1679 #endif 1680 } 1681 1682 const char * LIR_Op::name() const { 1683 const char* s = NULL; 1684 switch(code()) { 1685 // LIR_Op0 1686 case lir_membar: s = "membar"; break; 1687 case lir_membar_acquire: s = "membar_acquire"; break; 1688 case lir_membar_release: s = "membar_release"; break; 1689 case lir_membar_loadload: s = "membar_loadload"; break; 1690 case lir_membar_storestore: s = "membar_storestore"; break; 1691 case lir_membar_loadstore: s = "membar_loadstore"; break; 1692 case lir_membar_storeload: s = "membar_storeload"; break; 1693 case lir_label: s = "label"; break; 1694 case lir_nop: s = "nop"; break; 1695 case lir_on_spin_wait: s = "on_spin_wait"; break; 1696 case lir_std_entry: s = "std_entry"; break; 1697 case lir_osr_entry: s = "osr_entry"; break; 1698 case lir_fpop_raw: s = "fpop_raw"; break; 1699 case lir_breakpoint: s = "breakpoint"; break; 1700 case lir_get_thread: s = "get_thread"; break; 1701 // LIR_Op1 1702 case lir_fxch: s = "fxch"; break; 1703 case lir_fld: s = "fld"; break; 1704 case lir_push: s = "push"; break; 1705 case lir_pop: s = "pop"; break; 1706 case lir_null_check: s = "null_check"; break; 1707 case lir_return: s = "return"; break; 1708 case lir_safepoint: s = "safepoint"; break; 1709 case lir_leal: s = "leal"; break; 1710 case lir_branch: s = "branch"; break; 1711 case lir_cond_float_branch: s = "flt_cond_br"; break; 1712 case lir_move: s = "move"; break; 1713 case lir_roundfp: s = "roundfp"; break; 1714 case lir_rtcall: s = "rtcall"; break; 1715 case lir_throw: s = "throw"; break; 1716 case lir_unwind: s = "unwind"; break; 1717 case lir_convert: s = "convert"; break; 1718 case lir_alloc_object: s = "alloc_obj"; break; 1719 case lir_monaddr: s = "mon_addr"; break; 1720 // LIR_Op2 1721 case lir_cmp: s = "cmp"; break; 1722 case lir_cmp_l2i: s = "cmp_l2i"; break; 1723 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1724 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1725 case lir_add: s = "add"; break; 1726 case lir_sub: s = "sub"; break; 1727 case lir_mul: s = "mul"; break; 1728 case lir_div: s = "div"; break; 1729 case lir_rem: s = "rem"; break; 1730 case lir_abs: s = "abs"; break; 1731 case lir_neg: s = "neg"; break; 1732 case lir_sqrt: s = "sqrt"; break; 1733 case lir_logic_and: s = "logic_and"; break; 1734 case lir_logic_or: s = "logic_or"; break; 1735 case lir_logic_xor: s = "logic_xor"; break; 1736 case lir_shl: s = "shift_left"; break; 1737 case lir_shr: s = "shift_right"; break; 1738 case lir_ushr: s = "ushift_right"; break; 1739 case lir_alloc_array: s = "alloc_array"; break; 1740 case lir_xadd: s = "xadd"; break; 1741 case lir_xchg: s = "xchg"; break; 1742 // LIR_Op3 1743 case lir_idiv: s = "idiv"; break; 1744 case lir_irem: s = "irem"; break; 1745 case lir_fmad: s = "fmad"; break; 1746 case lir_fmaf: s = "fmaf"; break; 1747 // LIR_Op4 1748 case lir_cmove: s = "cmove"; break; 1749 // LIR_OpJavaCall 1750 case lir_static_call: s = "static"; break; 1751 case lir_optvirtual_call: s = "optvirtual"; break; 1752 case lir_icvirtual_call: s = "icvirtual"; break; 1753 case lir_dynamic_call: s = "dynamic"; break; 1754 // LIR_OpArrayCopy 1755 case lir_arraycopy: s = "arraycopy"; break; 1756 // LIR_OpUpdateCRC32 1757 case lir_updatecrc32: s = "updatecrc32"; break; 1758 // LIR_OpLock 1759 case lir_lock: s = "lock"; break; 1760 case lir_unlock: s = "unlock"; break; 1761 // LIR_OpDelay 1762 case lir_delay_slot: s = "delay"; break; 1763 // LIR_OpTypeCheck 1764 case lir_instanceof: s = "instanceof"; break; 1765 case lir_checkcast: s = "checkcast"; break; 1766 case lir_store_check: s = "store_check"; break; 1767 // LIR_OpCompareAndSwap 1768 case lir_cas_long: s = "cas_long"; break; 1769 case lir_cas_obj: s = "cas_obj"; break; 1770 case lir_cas_int: s = "cas_int"; break; 1771 // LIR_OpProfileCall 1772 case lir_profile_call: s = "profile_call"; break; 1773 // LIR_OpProfileType 1774 case lir_profile_type: s = "profile_type"; break; 1775 // LIR_OpAssert 1776 #ifdef ASSERT 1777 case lir_assert: s = "assert"; break; 1778 #endif 1779 case lir_none: ShouldNotReachHere();break; 1780 default: s = "illegal_op"; break; 1781 } 1782 return s; 1783 } 1784 1785 // LIR_OpJavaCall 1786 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1787 out->print("call: "); 1788 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); 1789 if (receiver()->is_valid()) { 1790 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1791 } 1792 if (result_opr()->is_valid()) { 1793 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1794 } 1795 } 1796 1797 // LIR_OpLabel 1798 void LIR_OpLabel::print_instr(outputStream* out) const { 1799 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); 1800 } 1801 1802 // LIR_OpArrayCopy 1803 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1804 src()->print(out); out->print(" "); 1805 src_pos()->print(out); out->print(" "); 1806 dst()->print(out); out->print(" "); 1807 dst_pos()->print(out); out->print(" "); 1808 length()->print(out); out->print(" "); 1809 tmp()->print(out); out->print(" "); 1810 } 1811 1812 // LIR_OpUpdateCRC32 1813 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { 1814 crc()->print(out); out->print(" "); 1815 val()->print(out); out->print(" "); 1816 result_opr()->print(out); out->print(" "); 1817 } 1818 1819 // LIR_OpCompareAndSwap 1820 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1821 addr()->print(out); out->print(" "); 1822 cmp_value()->print(out); out->print(" "); 1823 new_value()->print(out); out->print(" "); 1824 tmp1()->print(out); out->print(" "); 1825 tmp2()->print(out); out->print(" "); 1826 1827 } 1828 1829 // LIR_Op0 1830 void LIR_Op0::print_instr(outputStream* out) const { 1831 result_opr()->print(out); 1832 } 1833 1834 // LIR_Op1 1835 const char * LIR_Op1::name() const { 1836 if (code() == lir_move) { 1837 switch (move_kind()) { 1838 case lir_move_normal: 1839 return "move"; 1840 case lir_move_volatile: 1841 return "volatile_move"; 1842 case lir_move_wide: 1843 return "wide_move"; 1844 default: 1845 ShouldNotReachHere(); 1846 return "illegal_op"; 1847 } 1848 } else { 1849 return LIR_Op::name(); 1850 } 1851 } 1852 1853 1854 void LIR_Op1::print_instr(outputStream* out) const { 1855 _opr->print(out); out->print(" "); 1856 result_opr()->print(out); out->print(" "); 1857 print_patch_code(out, patch_code()); 1858 } 1859 1860 1861 // LIR_Op1 1862 void LIR_OpRTCall::print_instr(outputStream* out) const { 1863 intx a = (intx)addr(); 1864 out->print("%s", Runtime1::name_for_address(addr())); 1865 out->print(" "); 1866 tmp()->print(out); 1867 } 1868 1869 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1870 switch(code) { 1871 case lir_patch_none: break; 1872 case lir_patch_low: out->print("[patch_low]"); break; 1873 case lir_patch_high: out->print("[patch_high]"); break; 1874 case lir_patch_normal: out->print("[patch_normal]"); break; 1875 default: ShouldNotReachHere(); 1876 } 1877 } 1878 1879 // LIR_OpBranch 1880 void LIR_OpBranch::print_instr(outputStream* out) const { 1881 print_condition(out, cond()); out->print(" "); 1882 in_opr1()->print(out); out->print(" "); 1883 in_opr2()->print(out); out->print(" "); 1884 if (block() != NULL) { 1885 out->print("[B%d] ", block()->block_id()); 1886 } else if (stub() != NULL) { 1887 out->print("["); 1888 stub()->print_name(out); 1889 out->print(": " INTPTR_FORMAT "]", p2i(stub())); 1890 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1891 } else { 1892 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); 1893 } 1894 if (ublock() != NULL) { 1895 out->print("unordered: [B%d] ", ublock()->block_id()); 1896 } 1897 } 1898 1899 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1900 switch(cond) { 1901 case lir_cond_equal: out->print("[EQ]"); break; 1902 case lir_cond_notEqual: out->print("[NE]"); break; 1903 case lir_cond_less: out->print("[LT]"); break; 1904 case lir_cond_lessEqual: out->print("[LE]"); break; 1905 case lir_cond_greaterEqual: out->print("[GE]"); break; 1906 case lir_cond_greater: out->print("[GT]"); break; 1907 case lir_cond_belowEqual: out->print("[BE]"); break; 1908 case lir_cond_aboveEqual: out->print("[AE]"); break; 1909 case lir_cond_always: out->print("[AL]"); break; 1910 default: out->print("[%d]",cond); break; 1911 } 1912 } 1913 1914 // LIR_OpConvert 1915 void LIR_OpConvert::print_instr(outputStream* out) const { 1916 print_bytecode(out, bytecode()); 1917 in_opr()->print(out); out->print(" "); 1918 result_opr()->print(out); out->print(" "); 1919 } 1920 1921 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1922 switch(code) { 1923 case Bytecodes::_d2f: out->print("[d2f] "); break; 1924 case Bytecodes::_d2i: out->print("[d2i] "); break; 1925 case Bytecodes::_d2l: out->print("[d2l] "); break; 1926 case Bytecodes::_f2d: out->print("[f2d] "); break; 1927 case Bytecodes::_f2i: out->print("[f2i] "); break; 1928 case Bytecodes::_f2l: out->print("[f2l] "); break; 1929 case Bytecodes::_i2b: out->print("[i2b] "); break; 1930 case Bytecodes::_i2c: out->print("[i2c] "); break; 1931 case Bytecodes::_i2d: out->print("[i2d] "); break; 1932 case Bytecodes::_i2f: out->print("[i2f] "); break; 1933 case Bytecodes::_i2l: out->print("[i2l] "); break; 1934 case Bytecodes::_i2s: out->print("[i2s] "); break; 1935 case Bytecodes::_l2i: out->print("[l2i] "); break; 1936 case Bytecodes::_l2f: out->print("[l2f] "); break; 1937 case Bytecodes::_l2d: out->print("[l2d] "); break; 1938 default: 1939 out->print("[?%d]",code); 1940 break; 1941 } 1942 } 1943 1944 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1945 klass()->print(out); out->print(" "); 1946 obj()->print(out); out->print(" "); 1947 tmp1()->print(out); out->print(" "); 1948 tmp2()->print(out); out->print(" "); 1949 tmp3()->print(out); out->print(" "); 1950 tmp4()->print(out); out->print(" "); 1951 out->print("[hdr:%d]", header_size()); out->print(" "); 1952 out->print("[obj:%d]", object_size()); out->print(" "); 1953 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1954 } 1955 1956 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1957 _opr->print(out); out->print(" "); 1958 tmp()->print(out); out->print(" "); 1959 result_opr()->print(out); out->print(" "); 1960 } 1961 1962 // LIR_Op2 1963 void LIR_Op2::print_instr(outputStream* out) const { 1964 if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) { 1965 print_condition(out, condition()); out->print(" "); 1966 } 1967 in_opr1()->print(out); out->print(" "); 1968 in_opr2()->print(out); out->print(" "); 1969 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } 1970 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } 1971 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } 1972 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } 1973 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } 1974 result_opr()->print(out); 1975 } 1976 1977 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1978 klass()->print(out); out->print(" "); 1979 len()->print(out); out->print(" "); 1980 obj()->print(out); out->print(" "); 1981 tmp1()->print(out); out->print(" "); 1982 tmp2()->print(out); out->print(" "); 1983 tmp3()->print(out); out->print(" "); 1984 tmp4()->print(out); out->print(" "); 1985 out->print("[type:0x%x]", type()); out->print(" "); 1986 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1987 } 1988 1989 1990 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1991 object()->print(out); out->print(" "); 1992 if (code() == lir_store_check) { 1993 array()->print(out); out->print(" "); 1994 } 1995 if (code() != lir_store_check) { 1996 klass()->print_name_on(out); out->print(" "); 1997 if (fast_check()) out->print("fast_check "); 1998 } 1999 tmp1()->print(out); out->print(" "); 2000 tmp2()->print(out); out->print(" "); 2001 tmp3()->print(out); out->print(" "); 2002 result_opr()->print(out); out->print(" "); 2003 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 2004 } 2005 2006 2007 // LIR_Op3 2008 void LIR_Op3::print_instr(outputStream* out) const { 2009 in_opr1()->print(out); out->print(" "); 2010 in_opr2()->print(out); out->print(" "); 2011 in_opr3()->print(out); out->print(" "); 2012 result_opr()->print(out); 2013 } 2014 2015 // LIR_Op4 2016 void LIR_Op4::print_instr(outputStream* out) const { 2017 print_condition(out, condition()); out->print(" "); 2018 in_opr1()->print(out); out->print(" "); 2019 in_opr2()->print(out); out->print(" "); 2020 in_opr3()->print(out); out->print(" "); 2021 in_opr4()->print(out); out->print(" "); 2022 result_opr()->print(out); 2023 } 2024 2025 void LIR_OpLock::print_instr(outputStream* out) const { 2026 hdr_opr()->print(out); out->print(" "); 2027 obj_opr()->print(out); out->print(" "); 2028 lock_opr()->print(out); out->print(" "); 2029 if (_scratch->is_valid()) { 2030 _scratch->print(out); out->print(" "); 2031 } 2032 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 2033 } 2034 2035 void LIR_OpLoadKlass::print_instr(outputStream* out) const { 2036 obj()->print(out); out->print(" "); 2037 result_opr()->print(out); out->print(" "); 2038 } 2039 2040 #ifdef ASSERT 2041 void LIR_OpAssert::print_instr(outputStream* out) const { 2042 print_condition(out, condition()); out->print(" "); 2043 in_opr1()->print(out); out->print(" "); 2044 in_opr2()->print(out); out->print(", \""); 2045 out->print("%s", msg()); out->print("\""); 2046 } 2047 #endif 2048 2049 2050 void LIR_OpDelay::print_instr(outputStream* out) const { 2051 _op->print_on(out); 2052 } 2053 2054 2055 // LIR_OpProfileCall 2056 void LIR_OpProfileCall::print_instr(outputStream* out) const { 2057 profiled_method()->name()->print_symbol_on(out); 2058 out->print("."); 2059 profiled_method()->holder()->name()->print_symbol_on(out); 2060 out->print(" @ %d ", profiled_bci()); 2061 mdo()->print(out); out->print(" "); 2062 recv()->print(out); out->print(" "); 2063 tmp1()->print(out); out->print(" "); 2064 } 2065 2066 // LIR_OpProfileType 2067 void LIR_OpProfileType::print_instr(outputStream* out) const { 2068 out->print("exact = "); 2069 if (exact_klass() == NULL) { 2070 out->print("unknown"); 2071 } else { 2072 exact_klass()->print_name_on(out); 2073 } 2074 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass()); 2075 out->print(" "); 2076 mdp()->print(out); out->print(" "); 2077 obj()->print(out); out->print(" "); 2078 tmp()->print(out); out->print(" "); 2079 } 2080 2081 #endif // PRODUCT 2082 2083 // Implementation of LIR_InsertionBuffer 2084 2085 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 2086 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 2087 2088 int i = number_of_insertion_points() - 1; 2089 if (i < 0 || index_at(i) < index) { 2090 append_new(index, 1); 2091 } else { 2092 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 2093 assert(count_at(i) > 0, "check"); 2094 set_count_at(i, count_at(i) + 1); 2095 } 2096 _ops.push(op); 2097 2098 DEBUG_ONLY(verify()); 2099 } 2100 2101 #ifdef ASSERT 2102 void LIR_InsertionBuffer::verify() { 2103 int sum = 0; 2104 int prev_idx = -1; 2105 2106 for (int i = 0; i < number_of_insertion_points(); i++) { 2107 assert(prev_idx < index_at(i), "index must be ordered ascending"); 2108 sum += count_at(i); 2109 } 2110 assert(sum == number_of_ops(), "wrong total sum"); 2111 } 2112 #endif