1 /*
2 * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_C1_C1_LIR_HPP
26 #define SHARE_C1_C1_LIR_HPP
27
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_ValueType.hpp"
30 #include "oops/method.hpp"
31 #include "utilities/globalDefinitions.hpp"
32
33 class BlockBegin;
34 class BlockList;
35 class LIR_Assembler;
36 class CodeEmitInfo;
37 class CodeStub;
38 class CodeStubList;
39 class C1SafepointPollStub;
40 class ArrayCopyStub;
41 class LIR_Op;
42 class ciType;
43 class ValueType;
44 class LIR_OpVisitState;
45 class FpuStackSim;
46
47 //---------------------------------------------------------------------
48 // LIR Operands
49 // LIR_OprPtr
50 // LIR_Const
51 // LIR_Address
52 //---------------------------------------------------------------------
53 class LIR_OprPtr;
54 class LIR_Const;
55 class LIR_Address;
56 class LIR_OprVisitor;
57 class LIR_Opr;
58
59 typedef int RegNr;
60
61 typedef GrowableArray<LIR_Opr> LIR_OprList;
62 typedef GrowableArray<LIR_Op*> LIR_OpArray;
63 typedef GrowableArray<LIR_Op*> LIR_OpList;
64
65 // define LIR_OprPtr early so LIR_Opr can refer to it
66 class LIR_OprPtr: public CompilationResourceObj {
67 public:
68 bool is_oop_pointer() const { return (type() == T_OBJECT); }
69 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
70
71 virtual LIR_Const* as_constant() { return NULL; }
72 virtual LIR_Address* as_address() { return NULL; }
73 virtual BasicType type() const = 0;
74 virtual void print_value_on(outputStream* out) const = 0;
75 };
76
77
78
79 // LIR constants
80 class LIR_Const: public LIR_OprPtr {
81 private:
82 JavaValue _value;
83
84 void type_check(BasicType t) const { assert(type() == t, "type check"); }
85 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
86 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
87
88 public:
89 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
90 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
91 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
92 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
93 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
94 LIR_Const(void* p) {
95 #ifdef _LP64
96 assert(sizeof(jlong) >= sizeof(p), "too small");;
97 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
98 #else
99 assert(sizeof(jint) >= sizeof(p), "too small");;
100 _value.set_type(T_INT); _value.set_jint((jint)p);
101 #endif
102 }
103 LIR_Const(Metadata* m) {
104 _value.set_type(T_METADATA);
105 #ifdef _LP64
106 _value.set_jlong((jlong)m);
107 #else
108 _value.set_jint((jint)m);
109 #endif // _LP64
110 }
111
112 virtual BasicType type() const { return _value.get_type(); }
113 virtual LIR_Const* as_constant() { return this; }
114
115 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
116 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
117 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
118 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
119 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
120 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
121 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
122
123 #ifdef _LP64
124 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
125 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
126 #else
127 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
128 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
129 #endif
130
131
132 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
133 jint as_jint_lo_bits() const {
134 if (type() == T_DOUBLE) {
135 return low(jlong_cast(_value.get_jdouble()));
136 } else {
137 return as_jint_lo();
138 }
139 }
140 jint as_jint_hi_bits() const {
141 if (type() == T_DOUBLE) {
142 return high(jlong_cast(_value.get_jdouble()));
143 } else {
144 return as_jint_hi();
145 }
146 }
147 jlong as_jlong_bits() const {
148 if (type() == T_DOUBLE) {
149 return jlong_cast(_value.get_jdouble());
150 } else {
151 return as_jlong();
152 }
153 }
154
155 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
156
157
158 bool is_zero_float() {
159 jfloat f = as_jfloat();
160 jfloat ok = 0.0f;
161 return jint_cast(f) == jint_cast(ok);
162 }
163
164 bool is_one_float() {
165 jfloat f = as_jfloat();
166 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
167 }
168
169 bool is_zero_double() {
170 jdouble d = as_jdouble();
171 jdouble ok = 0.0;
172 return jlong_cast(d) == jlong_cast(ok);
173 }
174
175 bool is_one_double() {
176 jdouble d = as_jdouble();
177 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
178 }
179 };
180
181
182 //---------------------LIR Operand descriptor------------------------------------
183 //
184 // The class LIR_Opr represents a LIR instruction operand;
185 // it can be a register (ALU/FPU), stack location or a constant;
186 // Constants and addresses are represented as resource area allocated
187 // structures (see above), and pointers are stored in the _value field (cast to
188 // an intptr_t).
189 // Registers and stack locations are represented inline as integers.
190 // (see value function).
191
192 // Previously, this class was derived from CompilationResourceObj.
193 // However, deriving from any of the "Obj" types in allocation.hpp seems
194 // detrimental, since in some build modes it would add a vtable to this class,
195 // which make it no longer be a 1-word trivially-copyable wrapper object,
196 // which is the entire point of it.
197
198 class LIR_Opr {
199 public:
200 // value structure:
201 // data other-non-data opr-type opr-kind
202 // +-------------------+--------------+-------+-----+
203 // [max...............................|6 5 4 3|2 1 0]
204 // ^
205 // is_pointer bit
206 //
207 // lowest bit cleared, means it is a structure pointer
208 // we need 4 bits to represent types
209
210 private:
211 friend class LIR_OprFact;
212
213 intptr_t _value;
214 // Conversion
215 intptr_t value() const { return _value; }
216
217 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
218 return (value() & mask) == masked_value;
219 }
220
221 enum OprKind {
222 pointer_value = 0
223 , stack_value = 1
224 , cpu_register = 3
225 , fpu_register = 5
226 , illegal_value = 7
227 };
228
229 enum OprBits {
230 pointer_bits = 1
231 , kind_bits = 3
232 , type_bits = 4
233 , size_bits = 2
234 , destroys_bits = 1
235 , virtual_bits = 1
236 , is_xmm_bits = 1
237 , last_use_bits = 1
238 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
239 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + virtual_bits
240 + is_xmm_bits + last_use_bits + is_fpu_stack_offset_bits
241 , data_bits = BitsPerInt - non_data_bits
242 , reg_bits = data_bits / 2 // for two registers in one value encoding
243 };
244
245 enum OprShift : uintptr_t {
246 kind_shift = 0
247 , type_shift = kind_shift + kind_bits
248 , size_shift = type_shift + type_bits
249 , destroys_shift = size_shift + size_bits
250 , last_use_shift = destroys_shift + destroys_bits
251 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
252 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
253 , is_xmm_shift = virtual_shift + virtual_bits
254 , data_shift = is_xmm_shift + is_xmm_bits
255 , reg1_shift = data_shift
256 , reg2_shift = data_shift + reg_bits
257
258 };
259
260 enum OprSize {
261 single_size = 0 << size_shift
262 , double_size = 1 << size_shift
263 };
264
265 enum OprMask {
266 kind_mask = right_n_bits(kind_bits)
267 , type_mask = right_n_bits(type_bits) << type_shift
268 , size_mask = right_n_bits(size_bits) << size_shift
269 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
270 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
271 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
272 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
273 , pointer_mask = right_n_bits(pointer_bits)
274 , lower_reg_mask = right_n_bits(reg_bits)
275 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
276 };
277
278 uint32_t data() const { return (uint32_t)value() >> data_shift; }
279 int lo_reg_half() const { return data() & lower_reg_mask; }
280 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
281 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
282 OprSize size_field() const { return (OprSize)(value() & size_mask); }
283
284 static char type_char(BasicType t);
285
286 public:
287 LIR_Opr() : _value(0) {}
288 LIR_Opr(intptr_t val) : _value(val) {}
289 LIR_Opr(LIR_OprPtr *val) : _value(reinterpret_cast<intptr_t>(val)) {}
290 bool operator==(const LIR_Opr &other) const { return _value == other._value; }
291 bool operator!=(const LIR_Opr &other) const { return _value != other._value; }
292 explicit operator bool() const { return _value != 0; }
293
294 // UGLY HACK: make this value object look like a pointer (to itself). This
295 // operator overload should be removed, and all callers updated from
296 // `opr->fn()` to `opr.fn()`.
297 const LIR_Opr* operator->() const { return this; }
298 LIR_Opr* operator->() { return this; }
299
300 enum {
301 vreg_base = ConcreteRegisterImpl::number_of_registers,
302 data_max = (1 << data_bits) - 1, // max unsigned value for data bit field
303 vreg_limit = 10000, // choose a reasonable limit,
304 vreg_max = MIN2(vreg_limit, data_max) // and make sure if fits in the bit field
305 };
306
307 static inline LIR_Opr illegalOpr();
308 static inline LIR_Opr nullOpr();
309
310 enum OprType {
311 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
312 , int_type = 1 << type_shift
313 , long_type = 2 << type_shift
314 , object_type = 3 << type_shift
315 , address_type = 4 << type_shift
316 , float_type = 5 << type_shift
317 , double_type = 6 << type_shift
318 , metadata_type = 7 << type_shift
319 };
320 friend OprType as_OprType(BasicType t);
321 friend BasicType as_BasicType(OprType t);
322
323 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
324 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
325
326 static OprSize size_for(BasicType t) {
327 switch (t) {
328 case T_LONG:
329 case T_DOUBLE:
330 return double_size;
331 break;
332
333 case T_FLOAT:
334 case T_BOOLEAN:
335 case T_CHAR:
336 case T_BYTE:
337 case T_SHORT:
338 case T_INT:
339 case T_ADDRESS:
340 case T_OBJECT:
341 case T_ARRAY:
342 case T_METADATA:
343 return single_size;
344 break;
345
346 default:
347 ShouldNotReachHere();
348 return single_size;
349 }
350 }
351
352
353 void validate_type() const PRODUCT_RETURN;
354
355 BasicType type() const {
356 if (is_pointer()) {
357 return pointer()->type();
358 }
359 return as_BasicType(type_field());
360 }
361
362
363 ValueType* value_type() const { return as_ValueType(type()); }
364
365 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
366
367 bool is_equal(LIR_Opr opr) const { return *this == opr; }
368 // checks whether types are same
369 bool is_same_type(LIR_Opr opr) const {
370 assert(type_field() != unknown_type &&
371 opr->type_field() != unknown_type, "shouldn't see unknown_type");
372 return type_field() == opr->type_field();
373 }
374 bool is_same_register(LIR_Opr opr) {
375 return (is_register() && opr->is_register() &&
376 kind_field() == opr->kind_field() &&
377 (value() & no_type_mask) == (opr->value() & no_type_mask));
378 }
379
380 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
381 bool is_illegal() const { return kind_field() == illegal_value; }
382 bool is_valid() const { return kind_field() != illegal_value; }
383
384 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
385 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
386
387 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
388 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
389
390 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
391 bool is_oop() const;
392
393 // semantic for fpu- and xmm-registers:
394 // * is_float and is_double return true for xmm_registers
395 // (so is_single_fpu and is_single_xmm are true)
396 // * So you must always check for is_???_xmm prior to is_???_fpu to
397 // distinguish between fpu- and xmm-registers
398
399 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
400 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
401 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
402
403 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
404 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
405 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
406 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
407 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
408
409 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
410 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
411 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
412 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
413 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
414
415 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
416 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
417 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
418
419 // fast accessor functions for special bits that do not work for pointers
420 // (in this functions, the check for is_pointer() is omitted)
421 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
422 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
423 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
424 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
425 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
426
427 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
428 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
429 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
430 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
431
432
433 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
434 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
435 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
436 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
437 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
438 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
439 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
440 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
441 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
442 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
443 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
444 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
445
446 LIR_OprPtr* pointer() const { assert(_value != 0 && is_pointer(), "nullness and type check"); return (LIR_OprPtr*)_value; }
447 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
448 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
449
450 Register as_register() const;
451 Register as_register_lo() const;
452 Register as_register_hi() const;
453
454 Register as_pointer_register() {
455 #ifdef _LP64
456 if (is_double_cpu()) {
457 assert(as_register_lo() == as_register_hi(), "should be a single register");
458 return as_register_lo();
459 }
460 #endif
461 return as_register();
462 }
463
464 FloatRegister as_float_reg () const;
465 FloatRegister as_double_reg () const;
466 #ifdef X86
467 XMMRegister as_xmm_float_reg () const;
468 XMMRegister as_xmm_double_reg() const;
469 // for compatibility with RInfo
470 int fpu() const { return lo_reg_half(); }
471 #endif
472
473 jint as_jint() const { return as_constant_ptr()->as_jint(); }
474 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
475 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
476 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
477 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
478
479 void print() const PRODUCT_RETURN;
480 void print(outputStream* out) const PRODUCT_RETURN;
481 };
482
483 inline LIR_Opr::OprType as_OprType(BasicType type) {
484 switch (type) {
485 case T_INT: return LIR_Opr::int_type;
486 case T_LONG: return LIR_Opr::long_type;
487 case T_FLOAT: return LIR_Opr::float_type;
488 case T_DOUBLE: return LIR_Opr::double_type;
489 case T_OBJECT:
490 case T_ARRAY: return LIR_Opr::object_type;
491 case T_ADDRESS: return LIR_Opr::address_type;
492 case T_METADATA: return LIR_Opr::metadata_type;
493 case T_ILLEGAL: // fall through
494 default: ShouldNotReachHere(); return LIR_Opr::unknown_type;
495 }
496 }
497
498 inline BasicType as_BasicType(LIR_Opr::OprType t) {
499 switch (t) {
500 case LIR_Opr::int_type: return T_INT;
501 case LIR_Opr::long_type: return T_LONG;
502 case LIR_Opr::float_type: return T_FLOAT;
503 case LIR_Opr::double_type: return T_DOUBLE;
504 case LIR_Opr::object_type: return T_OBJECT;
505 case LIR_Opr::address_type: return T_ADDRESS;
506 case LIR_Opr::metadata_type:return T_METADATA;
507 case LIR_Opr::unknown_type: // fall through
508 default: ShouldNotReachHere(); return T_ILLEGAL;
509 }
510 }
511
512
513 // LIR_Address
514 class LIR_Address: public LIR_OprPtr {
515 friend class LIR_OpVisitState;
516
517 public:
518 // NOTE: currently these must be the log2 of the scale factor (and
519 // must also be equivalent to the ScaleFactor enum in
520 // assembler_i486.hpp)
521 enum Scale {
522 times_1 = 0,
523 times_2 = 1,
524 times_4 = 2,
525 times_8 = 3
526 };
527
528 private:
529 LIR_Opr _base;
530 LIR_Opr _index;
531 Scale _scale;
532 intx _disp;
533 BasicType _type;
534
535 public:
536 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
537 _base(base)
538 , _index(index)
539 , _scale(times_1)
540 , _disp(0)
541 , _type(type) { verify(); }
542
543 LIR_Address(LIR_Opr base, intx disp, BasicType type):
544 _base(base)
545 , _index(LIR_Opr::illegalOpr())
546 , _scale(times_1)
547 , _disp(disp)
548 , _type(type) { verify(); }
549
550 LIR_Address(LIR_Opr base, BasicType type):
551 _base(base)
552 , _index(LIR_Opr::illegalOpr())
553 , _scale(times_1)
554 , _disp(0)
555 , _type(type) { verify(); }
556
557 LIR_Address(LIR_Opr base, LIR_Opr index, intx disp, BasicType type):
558 _base(base)
559 , _index(index)
560 , _scale(times_1)
561 , _disp(disp)
562 , _type(type) { verify(); }
563
564 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
565 _base(base)
566 , _index(index)
567 , _scale(scale)
568 , _disp(disp)
569 , _type(type) { verify(); }
570
571 LIR_Opr base() const { return _base; }
572 LIR_Opr index() const { return _index; }
573 Scale scale() const { return _scale; }
574 intx disp() const { return _disp; }
575
576 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
577
578 virtual LIR_Address* as_address() { return this; }
579 virtual BasicType type() const { return _type; }
580 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
581
582 void verify() const PRODUCT_RETURN;
583
584 static Scale scale(BasicType type);
585 };
586
587
588 // operand factory
589 class LIR_OprFact: public AllStatic {
590 public:
591
592 static LIR_Opr illegalOpr;
593 static LIR_Opr nullOpr;
594
595 static LIR_Opr single_cpu(int reg) {
596 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
597 LIR_Opr::int_type |
598 LIR_Opr::cpu_register |
599 LIR_Opr::single_size);
600 }
601 static LIR_Opr single_cpu_oop(int reg) {
602 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
603 LIR_Opr::object_type |
604 LIR_Opr::cpu_register |
605 LIR_Opr::single_size);
606 }
607 static LIR_Opr single_cpu_address(int reg) {
608 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
609 LIR_Opr::address_type |
610 LIR_Opr::cpu_register |
611 LIR_Opr::single_size);
612 }
613 static LIR_Opr single_cpu_metadata(int reg) {
614 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
615 LIR_Opr::metadata_type |
616 LIR_Opr::cpu_register |
617 LIR_Opr::single_size);
618 }
619 static LIR_Opr double_cpu(int reg1, int reg2) {
620 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
621 return (LIR_Opr)(intptr_t)((reg1 << LIR_Opr::reg1_shift) |
622 (reg2 << LIR_Opr::reg2_shift) |
623 LIR_Opr::long_type |
624 LIR_Opr::cpu_register |
625 LIR_Opr::double_size);
626 }
627
628 static LIR_Opr single_fpu(int reg) {
629 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
630 LIR_Opr::float_type |
631 LIR_Opr::fpu_register |
632 LIR_Opr::single_size);
633 }
634
635 // Platform dependent.
636 static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/);
637
638 #ifdef ARM32
639 static LIR_Opr single_softfp(int reg) {
640 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
641 LIR_Opr::float_type |
642 LIR_Opr::cpu_register |
643 LIR_Opr::single_size);
644 }
645 static LIR_Opr double_softfp(int reg1, int reg2) {
646 return (LIR_Opr)(intptr_t)((reg1 << LIR_Opr::reg1_shift) |
647 (reg2 << LIR_Opr::reg2_shift) |
648 LIR_Opr::double_type |
649 LIR_Opr::cpu_register |
650 LIR_Opr::double_size);
651 }
652 #endif // ARM32
653
654 #if defined(X86)
655 static LIR_Opr single_xmm(int reg) {
656 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
657 LIR_Opr::float_type |
658 LIR_Opr::fpu_register |
659 LIR_Opr::single_size |
660 LIR_Opr::is_xmm_mask);
661 }
662 static LIR_Opr double_xmm(int reg) {
663 return (LIR_Opr)(intptr_t)((reg << LIR_Opr::reg1_shift) |
664 (reg << LIR_Opr::reg2_shift) |
665 LIR_Opr::double_type |
666 LIR_Opr::fpu_register |
667 LIR_Opr::double_size |
668 LIR_Opr::is_xmm_mask);
669 }
670 #endif // X86
671
672 static LIR_Opr virtual_register(int index, BasicType type) {
673 if (index > LIR_Opr::vreg_max) {
674 // Running out of virtual registers. Caller should bailout.
675 return illegalOpr;
676 }
677
678 LIR_Opr res;
679 switch (type) {
680 case T_OBJECT: // fall through
681 case T_ARRAY:
682 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
683 LIR_Opr::object_type |
684 LIR_Opr::cpu_register |
685 LIR_Opr::single_size |
686 LIR_Opr::virtual_mask);
687 break;
688
689 case T_METADATA:
690 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
691 LIR_Opr::metadata_type|
692 LIR_Opr::cpu_register |
693 LIR_Opr::single_size |
694 LIR_Opr::virtual_mask);
695 break;
696
697 case T_INT:
698 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
699 LIR_Opr::int_type |
700 LIR_Opr::cpu_register |
701 LIR_Opr::single_size |
702 LIR_Opr::virtual_mask);
703 break;
704
705 case T_ADDRESS:
706 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
707 LIR_Opr::address_type |
708 LIR_Opr::cpu_register |
709 LIR_Opr::single_size |
710 LIR_Opr::virtual_mask);
711 break;
712
713 case T_LONG:
714 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
715 LIR_Opr::long_type |
716 LIR_Opr::cpu_register |
717 LIR_Opr::double_size |
718 LIR_Opr::virtual_mask);
719 break;
720
721 #ifdef __SOFTFP__
722 case T_FLOAT:
723 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
724 LIR_Opr::float_type |
725 LIR_Opr::cpu_register |
726 LIR_Opr::single_size |
727 LIR_Opr::virtual_mask);
728 break;
729 case T_DOUBLE:
730 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
731 LIR_Opr::double_type |
732 LIR_Opr::cpu_register |
733 LIR_Opr::double_size |
734 LIR_Opr::virtual_mask);
735 break;
736 #else // __SOFTFP__
737 case T_FLOAT:
738 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
739 LIR_Opr::float_type |
740 LIR_Opr::fpu_register |
741 LIR_Opr::single_size |
742 LIR_Opr::virtual_mask);
743 break;
744
745 case
746 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
747 LIR_Opr::double_type |
748 LIR_Opr::fpu_register |
749 LIR_Opr::double_size |
750 LIR_Opr::virtual_mask);
751 break;
752 #endif // __SOFTFP__
753 default: ShouldNotReachHere(); res = illegalOpr;
754 }
755
756 #ifdef ASSERT
757 res->validate_type();
758 assert(res->vreg_number() == index, "conversion check");
759 assert(index >= LIR_Opr::vreg_base, "must start at vreg_base");
760
761 // old-style calculation; check if old and new method are equal
762 LIR_Opr::OprType t = as_OprType(type);
763 #ifdef __SOFTFP__
764 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
765 t |
766 LIR_Opr::cpu_register |
767 LIR_Opr::size_for(type) | LIR_Opr::virtual_mask);
768 #else // __SOFTFP__
769 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) | t |
770 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_Opr::fpu_register : LIR_Opr::cpu_register) |
771 LIR_Opr::size_for(type) | LIR_Opr::virtual_mask);
772 assert(res == old_res, "old and new method not equal");
773 #endif // __SOFTFP__
774 #endif // ASSERT
775
776 return res;
777 }
778
779 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
780 // the index is platform independent; a double stack using indices 2 and 3 has always
781 // index 2.
782 static LIR_Opr stack(int index, BasicType type) {
783 LIR_Opr res;
784 switch (type) {
785 case T_OBJECT: // fall through
786 case T_ARRAY:
787 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
788 LIR_Opr::object_type |
789 LIR_Opr::stack_value |
790 LIR_Opr::single_size);
791 break;
792
793 case T_METADATA:
794 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
795 LIR_Opr::metadata_type |
796 LIR_Opr::stack_value |
797 LIR_Opr::single_size);
798 break;
799 case T_INT:
800 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
801 LIR_Opr::int_type |
802 LIR_Opr::stack_value |
803 LIR_Opr::single_size);
804 break;
805
806 case T_ADDRESS:
807 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
808 LIR_Opr::address_type |
809 LIR_Opr::stack_value |
810 LIR_Opr::single_size);
811 break;
812
813 case T_LONG:
814 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
815 LIR_Opr::long_type |
816 LIR_Opr::stack_value |
817 LIR_Opr::double_size);
818 break;
819
820 case T_FLOAT:
821 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
822 LIR_Opr::float_type |
823 LIR_Opr::stack_value |
824 LIR_Opr::single_size);
825 break;
826 case T_DOUBLE:
827 res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
828 LIR_Opr::double_type |
829 LIR_Opr::stack_value |
830 LIR_Opr::double_size);
831 break;
832
833 default: ShouldNotReachHere(); res = illegalOpr;
834 }
835
836 #ifdef ASSERT
837 assert(index >= 0, "index must be positive");
838 assert(index == (int)res->data(), "conversion check");
839
840 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_Opr::data_shift) |
841 LIR_Opr::stack_value |
842 as_OprType(type) |
843 LIR_Opr::size_for(type));
844 assert(res == old_res, "old and new method not equal");
845 #endif
846
847 return res;
848 }
849
850 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
851 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
852 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
853 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
854 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
855 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
856 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
857 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
858 static LIR_Opr illegal() { return (LIR_Opr)-1; }
859 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
860 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
861
862 static LIR_Opr value_type(ValueType* type);
863 };
864
865
866 //-------------------------------------------------------------------------------
867 // LIR Instructions
868 //-------------------------------------------------------------------------------
869 //
870 // Note:
871 // - every instruction has a result operand
872 // - every instruction has an CodeEmitInfo operand (can be revisited later)
873 // - every instruction has a LIR_OpCode operand
874 // - LIR_OpN, means an instruction that has N input operands
875 //
876 // class hierarchy:
877 //
878 class LIR_Op;
879 class LIR_Op0;
880 class LIR_OpLabel;
881 class LIR_Op1;
882 class LIR_OpBranch;
883 class LIR_OpConvert;
884 class LIR_OpAllocObj;
885 class LIR_OpReturn;
886 class LIR_OpRoundFP;
887 class LIR_Op2;
888 class LIR_OpDelay;
889 class LIR_Op3;
890 class LIR_OpAllocArray;
891 class LIR_Op4;
892 class LIR_OpCall;
893 class LIR_OpJavaCall;
894 class LIR_OpRTCall;
895 class LIR_OpArrayCopy;
896 class LIR_OpUpdateCRC32;
897 class LIR_OpLock;
898 class LIR_OpTypeCheck;
899 class LIR_OpCompareAndSwap;
900 class LIR_OpLoadKlass;
901 class LIR_OpProfileCall;
902 class LIR_OpProfileType;
903 #ifdef ASSERT
904 class LIR_OpAssert;
905 #endif
906
907 // LIR operation codes
908 enum LIR_Code {
909 lir_none
910 , begin_op0
911 , lir_label
912 , lir_nop
913 , lir_std_entry
914 , lir_osr_entry
915 , lir_fpop_raw
916 , lir_breakpoint
917 , lir_rtcall
918 , lir_membar
919 , lir_membar_acquire
920 , lir_membar_release
921 , lir_membar_loadload
922 , lir_membar_storestore
923 , lir_membar_loadstore
924 , lir_membar_storeload
925 , lir_get_thread
926 , lir_on_spin_wait
927 , end_op0
928 , begin_op1
929 , lir_fxch
930 , lir_fld
931 , lir_push
932 , lir_pop
933 , lir_null_check
934 , lir_return
935 , lir_leal
936 , lir_move
937 , lir_convert
938 , lir_alloc_object
939 , lir_monaddr
940 , lir_roundfp
941 , lir_safepoint
942 , lir_unwind
943 , lir_load_klass
944 , end_op1
945 , begin_op2
946 , lir_branch
947 , lir_cond_float_branch
948 , lir_cmp
949 , lir_cmp_l2i
950 , lir_ucmp_fd2i
951 , lir_cmp_fd2i
952 , lir_add
953 , lir_sub
954 , lir_mul
955 , lir_div
956 , lir_rem
957 , lir_sqrt
958 , lir_abs
959 , lir_neg
960 , lir_tan
961 , lir_log10
962 , lir_logic_and
963 , lir_logic_or
964 , lir_logic_xor
965 , lir_shl
966 , lir_shr
967 , lir_ushr
968 , lir_alloc_array
969 , lir_throw
970 , lir_xadd
971 , lir_xchg
972 , end_op2
973 , begin_op3
974 , lir_idiv
975 , lir_irem
976 , lir_fmad
977 , lir_fmaf
978 , end_op3
979 , begin_op4
980 , lir_cmove
981 , end_op4
982 , begin_opJavaCall
983 , lir_static_call
984 , lir_optvirtual_call
985 , lir_icvirtual_call
986 , lir_dynamic_call
987 , end_opJavaCall
988 , begin_opArrayCopy
989 , lir_arraycopy
990 , end_opArrayCopy
991 , begin_opUpdateCRC32
992 , lir_updatecrc32
993 , end_opUpdateCRC32
994 , begin_opLock
995 , lir_lock
996 , lir_unlock
997 , end_opLock
998 , begin_delay_slot
999 , lir_delay_slot
1000 , end_delay_slot
1001 , begin_opTypeCheck
1002 , lir_instanceof
1003 , lir_checkcast
1004 , lir_store_check
1005 , end_opTypeCheck
1006 , begin_opCompareAndSwap
1007 , lir_cas_long
1008 , lir_cas_obj
1009 , lir_cas_int
1010 , end_opCompareAndSwap
1011 , begin_opMDOProfile
1012 , lir_profile_call
1013 , lir_profile_type
1014 , end_opMDOProfile
1015 , begin_opAssert
1016 , lir_assert
1017 , end_opAssert
1018 #ifdef INCLUDE_ZGC
1019 , begin_opZLoadBarrierTest
1020 , lir_zloadbarrier_test
1021 , end_opZLoadBarrierTest
1022 #endif
1023 };
1024
1025
1026 enum LIR_Condition {
1027 lir_cond_equal
1028 , lir_cond_notEqual
1029 , lir_cond_less
1030 , lir_cond_lessEqual
1031 , lir_cond_greaterEqual
1032 , lir_cond_greater
1033 , lir_cond_belowEqual
1034 , lir_cond_aboveEqual
1035 , lir_cond_always
1036 , lir_cond_unknown = -1
1037 };
1038
1039
1040 enum LIR_PatchCode {
1041 lir_patch_none,
1042 lir_patch_low,
1043 lir_patch_high,
1044 lir_patch_normal
1045 };
1046
1047
1048 enum LIR_MoveKind {
1049 lir_move_normal,
1050 lir_move_volatile,
1051 lir_move_wide,
1052 lir_move_max_flag
1053 };
1054
1055
1056 // --------------------------------------------------
1057 // LIR_Op
1058 // --------------------------------------------------
1059 class LIR_Op: public CompilationResourceObj {
1060 friend class LIR_OpVisitState;
1061
1062 #ifdef ASSERT
1063 private:
1064 const char * _file;
1065 int _line;
1066 #endif
1067
1068 protected:
1069 LIR_Opr _result;
1070 unsigned short _code;
1071 unsigned short _flags;
1072 CodeEmitInfo* _info;
1073 int _id; // value id for register allocation
1074 int _fpu_pop_count;
1075 Instruction* _source; // for debugging
1076
1077 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1078
1079 protected:
1080 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1081
1082 public:
1083 LIR_Op()
1084 :
1085 #ifdef ASSERT
1086 _file(NULL)
1087 , _line(0),
1088 #endif
1089 _result(LIR_OprFact::illegalOpr)
1090 , _code(lir_none)
1091 , _flags(0)
1092 , _info(NULL)
1093 , _id(-1)
1094 , _fpu_pop_count(0)
1095 , _source(NULL) {}
1096
1097 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1098 :
1099 #ifdef ASSERT
1100 _file(NULL)
1101 , _line(0),
1102 #endif
1103 _result(result)
1104 , _code(code)
1105 , _flags(0)
1106 , _info(info)
1107 , _id(-1)
1108 , _fpu_pop_count(0)
1109 , _source(NULL) {}
1110
1111 CodeEmitInfo* info() const { return _info; }
1112 LIR_Code code() const { return (LIR_Code)_code; }
1113 LIR_Opr result_opr() const { return _result; }
1114 void set_result_opr(LIR_Opr opr) { _result = opr; }
1115
1116 #ifdef ASSERT
1117 void set_file_and_line(const char * file, int line) {
1118 _file = file;
1119 _line = line;
1120 }
1121 #endif
1122
1123 virtual const char * name() const PRODUCT_RETURN0;
1124 virtual void visit(LIR_OpVisitState* state);
1125
1126 int id() const { return _id; }
1127 void set_id(int id) { _id = id; }
1128
1129 // FPU stack simulation helpers -- only used on Intel
1130 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1131 int fpu_pop_count() const { return _fpu_pop_count; }
1132 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1133
1134 Instruction* source() const { return _source; }
1135 void set_source(Instruction* ins) { _source = ins; }
1136
1137 virtual void emit_code(LIR_Assembler* masm) = 0;
1138 virtual void print_instr(outputStream* out) const = 0;
1139 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1140
1141 virtual bool is_patching() { return false; }
1142 virtual LIR_OpCall* as_OpCall() { return NULL; }
1143 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1144 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1145 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1146 virtual LIR_OpLock* as_OpLock() { return NULL; }
1147 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1148 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1149 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1150 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1151 virtual LIR_OpReturn* as_OpReturn() { return NULL; }
1152 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1153 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1154 virtual LIR_Op0* as_Op0() { return NULL; }
1155 virtual LIR_Op1* as_Op1() { return NULL; }
1156 virtual LIR_Op2* as_Op2() { return NULL; }
1157 virtual LIR_Op3* as_Op3() { return NULL; }
1158 virtual LIR_Op4* as_Op4() { return NULL; }
1159 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1160 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1161 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1162 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1163 virtual LIR_OpLoadKlass* as_OpLoadKlass() { return NULL; }
1164 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1165 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1166 #ifdef ASSERT
1167 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1168 #endif
1169
1170 virtual void verify() const {}
1171 };
1172
1173 // for calls
1174 class LIR_OpCall: public LIR_Op {
1175 friend class LIR_OpVisitState;
1176
1177 protected:
1178 address _addr;
1179 LIR_OprList* _arguments;
1180 protected:
1181 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1182 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1183 : LIR_Op(code, result, info)
1184 , _addr(addr)
1185 , _arguments(arguments) {}
1186
1187 public:
1188 address addr() const { return _addr; }
1189 const LIR_OprList* arguments() const { return _arguments; }
1190 virtual LIR_OpCall* as_OpCall() { return this; }
1191 };
1192
1193
1194 // --------------------------------------------------
1195 // LIR_OpJavaCall
1196 // --------------------------------------------------
1197 class LIR_OpJavaCall: public LIR_OpCall {
1198 friend class LIR_OpVisitState;
1199
1200 private:
1201 ciMethod* _method;
1202 LIR_Opr _receiver;
1203 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1204
1205 public:
1206 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1207 LIR_Opr receiver, LIR_Opr result,
1208 address addr, LIR_OprList* arguments,
1209 CodeEmitInfo* info)
1210 : LIR_OpCall(code, addr, result, arguments, info)
1211 , _method(method)
1212 , _receiver(receiver)
1213 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1214 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1215
1216 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1217 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1218 LIR_OprList* arguments, CodeEmitInfo* info)
1219 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1220 , _method(method)
1221 , _receiver(receiver)
1222 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1223 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1224
1225 LIR_Opr receiver() const { return _receiver; }
1226 ciMethod* method() const { return _method; }
1227
1228 // JSR 292 support.
1229 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1230 bool is_method_handle_invoke() const {
1231 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1232 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1233 }
1234
1235 virtual void emit_code(LIR_Assembler* masm);
1236 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1237 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1238 };
1239
1240 // --------------------------------------------------
1241 // LIR_OpLabel
1242 // --------------------------------------------------
1243 // Location where a branch can continue
1244 class LIR_OpLabel: public LIR_Op {
1245 friend class LIR_OpVisitState;
1246
1247 private:
1248 Label* _label;
1249 public:
1250 LIR_OpLabel(Label* lbl)
1251 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1252 , _label(lbl) {}
1253 Label* label() const { return _label; }
1254
1255 virtual void emit_code(LIR_Assembler* masm);
1256 virtual LIR_OpLabel* as_OpLabel() { return this; }
1257 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1258 };
1259
1260 // LIR_OpArrayCopy
1261 class LIR_OpArrayCopy: public LIR_Op {
1262 friend class LIR_OpVisitState;
1263
1264 private:
1265 ArrayCopyStub* _stub;
1266 LIR_Opr _src;
1267 LIR_Opr _src_pos;
1268 LIR_Opr _dst;
1269 LIR_Opr _dst_pos;
1270 LIR_Opr _length;
1271 LIR_Opr _tmp;
1272 ciArrayKlass* _expected_type;
1273 int _flags;
1274
1275 public:
1276 enum Flags {
1277 src_null_check = 1 << 0,
1278 dst_null_check = 1 << 1,
1279 src_pos_positive_check = 1 << 2,
1280 dst_pos_positive_check = 1 << 3,
1281 length_positive_check = 1 << 4,
1282 src_range_check = 1 << 5,
1283 dst_range_check = 1 << 6,
1284 type_check = 1 << 7,
1285 overlapping = 1 << 8,
1286 unaligned = 1 << 9,
1287 src_objarray = 1 << 10,
1288 dst_objarray = 1 << 11,
1289 all_flags = (1 << 12) - 1
1290 };
1291
1292 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1293 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1294
1295 LIR_Opr src() const { return _src; }
1296 LIR_Opr src_pos() const { return _src_pos; }
1297 LIR_Opr dst() const { return _dst; }
1298 LIR_Opr dst_pos() const { return _dst_pos; }
1299 LIR_Opr length() const { return _length; }
1300 LIR_Opr tmp() const { return _tmp; }
1301 int flags() const { return _flags; }
1302 ciArrayKlass* expected_type() const { return _expected_type; }
1303 ArrayCopyStub* stub() const { return _stub; }
1304
1305 virtual void emit_code(LIR_Assembler* masm);
1306 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1307 void print_instr(outputStream* out) const PRODUCT_RETURN;
1308 };
1309
1310 // LIR_OpUpdateCRC32
1311 class LIR_OpUpdateCRC32: public LIR_Op {
1312 friend class LIR_OpVisitState;
1313
1314 private:
1315 LIR_Opr _crc;
1316 LIR_Opr _val;
1317
1318 public:
1319
1320 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1321
1322 LIR_Opr crc() const { return _crc; }
1323 LIR_Opr val() const { return _val; }
1324
1325 virtual void emit_code(LIR_Assembler* masm);
1326 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1327 void print_instr(outputStream* out) const PRODUCT_RETURN;
1328 };
1329
1330 // --------------------------------------------------
1331 // LIR_Op0
1332 // --------------------------------------------------
1333 class LIR_Op0: public LIR_Op {
1334 friend class LIR_OpVisitState;
1335
1336 public:
1337 LIR_Op0(LIR_Code code)
1338 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1339 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1340 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1341
1342 virtual void emit_code(LIR_Assembler* masm);
1343 virtual LIR_Op0* as_Op0() { return this; }
1344 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1345 };
1346
1347
1348 // --------------------------------------------------
1349 // LIR_Op1
1350 // --------------------------------------------------
1351
1352 class LIR_Op1: public LIR_Op {
1353 friend class LIR_OpVisitState;
1354
1355 protected:
1356 LIR_Opr _opr; // input operand
1357 BasicType _type; // Operand types
1358 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1359
1360 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1361
1362 void set_kind(LIR_MoveKind kind) {
1363 assert(code() == lir_move, "must be");
1364 _flags = kind;
1365 }
1366
1367 public:
1368 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1369 : LIR_Op(code, result, info)
1370 , _opr(opr)
1371 , _type(type)
1372 , _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1373
1374 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1375 : LIR_Op(code, result, info)
1376 , _opr(opr)
1377 , _type(type)
1378 , _patch(patch) {
1379 assert(code == lir_move, "must be");
1380 set_kind(kind);
1381 }
1382
1383 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1384 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1385 , _opr(opr)
1386 , _type(T_ILLEGAL)
1387 , _patch(lir_patch_none) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1388
1389 LIR_Opr in_opr() const { return _opr; }
1390 LIR_PatchCode patch_code() const { return _patch; }
1391 BasicType type() const { return _type; }
1392
1393 LIR_MoveKind move_kind() const {
1394 assert(code() == lir_move, "must be");
1395 return (LIR_MoveKind)_flags;
1396 }
1397
1398 virtual bool is_patching() { return _patch != lir_patch_none; }
1399 virtual void emit_code(LIR_Assembler* masm);
1400 virtual LIR_Op1* as_Op1() { return this; }
1401 virtual const char * name() const PRODUCT_RETURN0;
1402
1403 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1404
1405 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1406 virtual void verify() const;
1407 };
1408
1409
1410 // for runtime calls
1411 class LIR_OpRTCall: public LIR_OpCall {
1412 friend class LIR_OpVisitState;
1413
1414 private:
1415 LIR_Opr _tmp;
1416 public:
1417 LIR_OpRTCall(address addr, LIR_Opr tmp,
1418 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1419 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1420 , _tmp(tmp) {}
1421
1422 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1423 virtual void emit_code(LIR_Assembler* masm);
1424 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1425
1426 LIR_Opr tmp() const { return _tmp; }
1427
1428 virtual void verify() const;
1429 };
1430
1431
1432
1433 class LIR_OpReturn: public LIR_Op1 {
1434 friend class LIR_OpVisitState;
1435
1436 private:
1437 C1SafepointPollStub* _stub;
1438
1439 public:
1440 LIR_OpReturn(LIR_Opr opr);
1441
1442 C1SafepointPollStub* stub() const { return _stub; }
1443 virtual LIR_OpReturn* as_OpReturn() { return this; }
1444 };
1445
1446 class ConversionStub;
1447
1448 class LIR_OpConvert: public LIR_Op1 {
1449 friend class LIR_OpVisitState;
1450
1451 private:
1452 Bytecodes::Code _bytecode;
1453 ConversionStub* _stub;
1454
1455 public:
1456 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1457 : LIR_Op1(lir_convert, opr, result)
1458 , _bytecode(code)
1459 , _stub(stub) {}
1460
1461 Bytecodes::Code bytecode() const { return _bytecode; }
1462 ConversionStub* stub() const { return _stub; }
1463
1464 virtual void emit_code(LIR_Assembler* masm);
1465 virtual LIR_OpConvert* as_OpConvert() { return this; }
1466 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1467
1468 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1469 };
1470
1471
1472 // LIR_OpAllocObj
1473 class LIR_OpAllocObj : public LIR_Op1 {
1474 friend class LIR_OpVisitState;
1475
1476 private:
1477 LIR_Opr _tmp1;
1478 LIR_Opr _tmp2;
1479 LIR_Opr _tmp3;
1480 LIR_Opr _tmp4;
1481 int _hdr_size;
1482 int _obj_size;
1483 CodeStub* _stub;
1484 bool _init_check;
1485
1486 public:
1487 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1488 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1489 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1490 : LIR_Op1(lir_alloc_object, klass, result)
1491 , _tmp1(t1)
1492 , _tmp2(t2)
1493 , _tmp3(t3)
1494 , _tmp4(t4)
1495 , _hdr_size(hdr_size)
1496 , _obj_size(obj_size)
1497 , _stub(stub)
1498 , _init_check(init_check) { }
1499
1500 LIR_Opr klass() const { return in_opr(); }
1501 LIR_Opr obj() const { return result_opr(); }
1502 LIR_Opr tmp1() const { return _tmp1; }
1503 LIR_Opr tmp2() const { return _tmp2; }
1504 LIR_Opr tmp3() const { return _tmp3; }
1505 LIR_Opr tmp4() const { return _tmp4; }
1506 int header_size() const { return _hdr_size; }
1507 int object_size() const { return _obj_size; }
1508 bool init_check() const { return _init_check; }
1509 CodeStub* stub() const { return _stub; }
1510
1511 virtual void emit_code(LIR_Assembler* masm);
1512 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1513 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1514 };
1515
1516
1517 // LIR_OpRoundFP
1518 class LIR_OpRoundFP : public LIR_Op1 {
1519 friend class LIR_OpVisitState;
1520
1521 private:
1522 LIR_Opr _tmp;
1523
1524 public:
1525 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1526 : LIR_Op1(lir_roundfp, reg, result)
1527 , _tmp(stack_loc_temp) {}
1528
1529 LIR_Opr tmp() const { return _tmp; }
1530 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1531 void print_instr(outputStream* out) const PRODUCT_RETURN;
1532 };
1533
1534 // LIR_OpTypeCheck
1535 class LIR_OpTypeCheck: public LIR_Op {
1536 friend class LIR_OpVisitState;
1537
1538 private:
1539 LIR_Opr _object;
1540 LIR_Opr _array;
1541 ciKlass* _klass;
1542 LIR_Opr _tmp1;
1543 LIR_Opr _tmp2;
1544 LIR_Opr _tmp3;
1545 bool _fast_check;
1546 CodeEmitInfo* _info_for_patch;
1547 CodeEmitInfo* _info_for_exception;
1548 CodeStub* _stub;
1549 ciMethod* _profiled_method;
1550 int _profiled_bci;
1551 bool _should_profile;
1552
1553 public:
1554 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1555 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1556 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1557 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1558 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1559
1560 LIR_Opr object() const { return _object; }
1561 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1562 LIR_Opr tmp1() const { return _tmp1; }
1563 LIR_Opr tmp2() const { return _tmp2; }
1564 LIR_Opr tmp3() const { return _tmp3; }
1565 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1566 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1567 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1568 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1569 CodeStub* stub() const { return _stub; }
1570
1571 // MethodData* profiling
1572 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1573 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1574 void set_should_profile(bool b) { _should_profile = b; }
1575 ciMethod* profiled_method() const { return _profiled_method; }
1576 int profiled_bci() const { return _profiled_bci; }
1577 bool should_profile() const { return _should_profile; }
1578
1579 virtual bool is_patching() { return _info_for_patch != NULL; }
1580 virtual void emit_code(LIR_Assembler* masm);
1581 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1582 void print_instr(outputStream* out) const PRODUCT_RETURN;
1583 };
1584
1585 // LIR_Op2
1586 class LIR_Op2: public LIR_Op {
1587 friend class LIR_OpVisitState;
1588
1589 int _fpu_stack_size; // for sin/cos implementation on Intel
1590
1591 protected:
1592 LIR_Opr _opr1;
1593 LIR_Opr _opr2;
1594 BasicType _type;
1595 LIR_Opr _tmp1;
1596 LIR_Opr _tmp2;
1597 LIR_Opr _tmp3;
1598 LIR_Opr _tmp4;
1599 LIR_Opr _tmp5;
1600 LIR_Condition _condition;
1601
1602 void verify() const;
1603
1604 public:
1605 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1606 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1607 , _fpu_stack_size(0)
1608 , _opr1(opr1)
1609 , _opr2(opr2)
1610 , _type(type)
1611 , _tmp1(LIR_OprFact::illegalOpr)
1612 , _tmp2(LIR_OprFact::illegalOpr)
1613 , _tmp3(LIR_OprFact::illegalOpr)
1614 , _tmp4(LIR_OprFact::illegalOpr)
1615 , _tmp5(LIR_OprFact::illegalOpr)
1616 , _condition(condition) {
1617 assert(code == lir_cmp || code == lir_branch || code == lir_cond_float_branch || code == lir_assert, "code check");
1618 }
1619
1620 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1621 : LIR_Op(code, result, NULL)
1622 , _fpu_stack_size(0)
1623 , _opr1(opr1)
1624 , _opr2(opr2)
1625 , _type(type)
1626 , _tmp1(LIR_OprFact::illegalOpr)
1627 , _tmp2(LIR_OprFact::illegalOpr)
1628 , _tmp3(LIR_OprFact::illegalOpr)
1629 , _tmp4(LIR_OprFact::illegalOpr)
1630 , _tmp5(LIR_OprFact::illegalOpr)
1631 , _condition(condition) {
1632 assert(code == lir_cmove, "code check");
1633 assert(type != T_ILLEGAL, "cmove should have type");
1634 }
1635
1636 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1637 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1638 : LIR_Op(code, result, info)
1639 , _fpu_stack_size(0)
1640 , _opr1(opr1)
1641 , _opr2(opr2)
1642 , _type(type)
1643 , _tmp1(LIR_OprFact::illegalOpr)
1644 , _tmp2(LIR_OprFact::illegalOpr)
1645 , _tmp3(LIR_OprFact::illegalOpr)
1646 , _tmp4(LIR_OprFact::illegalOpr)
1647 , _tmp5(LIR_OprFact::illegalOpr)
1648 , _condition(lir_cond_unknown) {
1649 assert(code != lir_cmp && code != lir_branch && code != lir_cond_float_branch && is_in_range(code, begin_op2, end_op2), "code check");
1650 }
1651
1652 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1653 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1654 : LIR_Op(code, result, NULL)
1655 , _fpu_stack_size(0)
1656 , _opr1(opr1)
1657 , _opr2(opr2)
1658 , _type(T_ILLEGAL)
1659 , _tmp1(tmp1)
1660 , _tmp2(tmp2)
1661 , _tmp3(tmp3)
1662 , _tmp4(tmp4)
1663 , _tmp5(tmp5)
1664 , _condition(lir_cond_unknown) {
1665 assert(code != lir_cmp && code != lir_branch && code != lir_cond_float_branch && is_in_range(code, begin_op2, end_op2), "code check");
1666 }
1667
1668 LIR_Opr in_opr1() const { return _opr1; }
1669 LIR_Opr in_opr2() const { return _opr2; }
1670 BasicType type() const { return _type; }
1671 LIR_Opr tmp1_opr() const { return _tmp1; }
1672 LIR_Opr tmp2_opr() const { return _tmp2; }
1673 LIR_Opr tmp3_opr() const { return _tmp3; }
1674 LIR_Opr tmp4_opr() const { return _tmp4; }
1675 LIR_Opr tmp5_opr() const { return _tmp5; }
1676 LIR_Condition condition() const {
1677 assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch || code() == lir_assert, "only valid for branch and assert"); return _condition;
1678 }
1679 void set_condition(LIR_Condition condition) {
1680 assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch, "only valid for branch"); _condition = condition;
1681 }
1682
1683 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1684 int fpu_stack_size() const { return _fpu_stack_size; }
1685
1686 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1687 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1688
1689 virtual void emit_code(LIR_Assembler* masm);
1690 virtual LIR_Op2* as_Op2() { return this; }
1691 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1692 };
1693
1694 class LIR_OpBranch: public LIR_Op2 {
1695 friend class LIR_OpVisitState;
1696
1697 private:
1698 Label* _label;
1699 BlockBegin* _block; // if this is a branch to a block, this is the block
1700 BlockBegin* _ublock; // if this is a float-branch, this is the unordered block
1701 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1702
1703 public:
1704 LIR_OpBranch(LIR_Condition cond, Label* lbl)
1705 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1706 , _label(lbl)
1707 , _block(NULL)
1708 , _ublock(NULL)
1709 , _stub(NULL) { }
1710
1711 LIR_OpBranch(LIR_Condition cond, BlockBegin* block);
1712 LIR_OpBranch(LIR_Condition cond, CodeStub* stub);
1713
1714 // for unordered comparisons
1715 LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock);
1716
1717 LIR_Condition cond() const {
1718 return condition();
1719 }
1720
1721 void set_cond(LIR_Condition cond) {
1722 set_condition(cond);
1723 }
1724
1725 Label* label() const { return _label; }
1726 BlockBegin* block() const { return _block; }
1727 BlockBegin* ublock() const { return _ublock; }
1728 CodeStub* stub() const { return _stub; }
1729
1730 void change_block(BlockBegin* b);
1731 void change_ublock(BlockBegin* b);
1732 void negate_cond();
1733
1734 virtual void emit_code(LIR_Assembler* masm);
1735 virtual LIR_OpBranch* as_OpBranch() { return this; }
1736 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1737 };
1738
1739 class LIR_OpAllocArray : public LIR_Op {
1740 friend class LIR_OpVisitState;
1741
1742 private:
1743 LIR_Opr _klass;
1744 LIR_Opr _len;
1745 LIR_Opr _tmp1;
1746 LIR_Opr _tmp2;
1747 LIR_Opr _tmp3;
1748 LIR_Opr _tmp4;
1749 BasicType _type;
1750 CodeStub* _stub;
1751
1752 public:
1753 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1754 : LIR_Op(lir_alloc_array, result, NULL)
1755 , _klass(klass)
1756 , _len(len)
1757 , _tmp1(t1)
1758 , _tmp2(t2)
1759 , _tmp3(t3)
1760 , _tmp4(t4)
1761 , _type(type)
1762 , _stub(stub) {}
1763
1764 LIR_Opr klass() const { return _klass; }
1765 LIR_Opr len() const { return _len; }
1766 LIR_Opr obj() const { return result_opr(); }
1767 LIR_Opr tmp1() const { return _tmp1; }
1768 LIR_Opr tmp2() const { return _tmp2; }
1769 LIR_Opr tmp3() const { return _tmp3; }
1770 LIR_Opr tmp4() const { return _tmp4; }
1771 BasicType type() const { return _type; }
1772 CodeStub* stub() const { return _stub; }
1773
1774 virtual void emit_code(LIR_Assembler* masm);
1775 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1776 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1777 };
1778
1779
1780 class LIR_Op3: public LIR_Op {
1781 friend class LIR_OpVisitState;
1782
1783 private:
1784 LIR_Opr _opr1;
1785 LIR_Opr _opr2;
1786 LIR_Opr _opr3;
1787 public:
1788 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1789 : LIR_Op(code, result, info)
1790 , _opr1(opr1)
1791 , _opr2(opr2)
1792 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1793 LIR_Opr in_opr1() const { return _opr1; }
1794 LIR_Opr in_opr2() const { return _opr2; }
1795 LIR_Opr in_opr3() const { return _opr3; }
1796
1797 virtual void emit_code(LIR_Assembler* masm);
1798 virtual LIR_Op3* as_Op3() { return this; }
1799 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1800 };
1801
1802 class LIR_Op4: public LIR_Op {
1803 friend class LIR_OpVisitState;
1804 protected:
1805 LIR_Opr _opr1;
1806 LIR_Opr _opr2;
1807 LIR_Opr _opr3;
1808 LIR_Opr _opr4;
1809 BasicType _type;
1810 LIR_Opr _tmp1;
1811 LIR_Opr _tmp2;
1812 LIR_Opr _tmp3;
1813 LIR_Opr _tmp4;
1814 LIR_Opr _tmp5;
1815 LIR_Condition _condition;
1816
1817 public:
1818 LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4,
1819 LIR_Opr result, BasicType type)
1820 : LIR_Op(code, result, NULL)
1821 , _opr1(opr1)
1822 , _opr2(opr2)
1823 , _opr3(opr3)
1824 , _opr4(opr4)
1825 , _type(type)
1826 , _tmp1(LIR_OprFact::illegalOpr)
1827 , _tmp2(LIR_OprFact::illegalOpr)
1828 , _tmp3(LIR_OprFact::illegalOpr)
1829 , _tmp4(LIR_OprFact::illegalOpr)
1830 , _tmp5(LIR_OprFact::illegalOpr)
1831 , _condition(condition) {
1832 assert(code == lir_cmove, "code check");
1833 assert(type != T_ILLEGAL, "cmove should have type");
1834 }
1835
1836 LIR_Opr in_opr1() const { return _opr1; }
1837 LIR_Opr in_opr2() const { return _opr2; }
1838 LIR_Opr in_opr3() const { return _opr3; }
1839 LIR_Opr in_opr4() const { return _opr4; }
1840 BasicType type() const { return _type; }
1841 LIR_Opr tmp1_opr() const { return _tmp1; }
1842 LIR_Opr tmp2_opr() const { return _tmp2; }
1843 LIR_Opr tmp3_opr() const { return _tmp3; }
1844 LIR_Opr tmp4_opr() const { return _tmp4; }
1845 LIR_Opr tmp5_opr() const { return _tmp5; }
1846
1847 LIR_Condition condition() const { return _condition; }
1848 void set_condition(LIR_Condition condition) { _condition = condition; }
1849
1850 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1851 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1852 void set_in_opr3(LIR_Opr opr) { _opr3 = opr; }
1853 void set_in_opr4(LIR_Opr opr) { _opr4 = opr; }
1854 virtual void emit_code(LIR_Assembler* masm);
1855 virtual LIR_Op4* as_Op4() { return this; }
1856
1857 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1858 };
1859
1860 //--------------------------------
1861 class LabelObj: public CompilationResourceObj {
1862 private:
1863 Label _label;
1864 public:
1865 LabelObj() {}
1866 Label* label() { return &_label; }
1867 };
1868
1869
1870 class LIR_OpLock: public LIR_Op {
1871 friend class LIR_OpVisitState;
1872
1873 private:
1874 LIR_Opr _hdr;
1875 LIR_Opr _obj;
1876 LIR_Opr _lock;
1877 LIR_Opr _scratch;
1878 CodeStub* _stub;
1879 public:
1880 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1881 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1882 , _hdr(hdr)
1883 , _obj(obj)
1884 , _lock(lock)
1885 , _scratch(scratch)
1886 , _stub(stub) {}
1887
1888 LIR_Opr hdr_opr() const { return _hdr; }
1889 LIR_Opr obj_opr() const { return _obj; }
1890 LIR_Opr lock_opr() const { return _lock; }
1891 LIR_Opr scratch_opr() const { return _scratch; }
1892 CodeStub* stub() const { return _stub; }
1893
1894 virtual void emit_code(LIR_Assembler* masm);
1895 virtual LIR_OpLock* as_OpLock() { return this; }
1896 void print_instr(outputStream* out) const PRODUCT_RETURN;
1897 };
1898
1899 class LIR_OpLoadKlass: public LIR_Op {
1900 friend class LIR_OpVisitState;
1901
1902 private:
1903 LIR_Opr _obj;
1904 CodeStub* _stub;
1905 public:
1906 LIR_OpLoadKlass(LIR_Opr obj, LIR_Opr result, CodeEmitInfo* info, CodeStub* stub)
1907 : LIR_Op(lir_load_klass, result, info)
1908 , _obj(obj)
1909 , _stub(stub) {}
1910
1911 LIR_Opr obj() const { return _obj; }
1912 CodeStub* stub() const { return _stub; }
1913
1914 virtual LIR_OpLoadKlass* as_OpLoadKlass() { return this; }
1915 virtual void emit_code(LIR_Assembler* masm);
1916 void print_instr(outputStream* out) const PRODUCT_RETURN;
1917 };
1918
1919 class LIR_OpDelay: public LIR_Op {
1920 friend class LIR_OpVisitState;
1921
1922 private:
1923 LIR_Op* _op;
1924
1925 public:
1926 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1927 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1928 _op(op) {
1929 assert(op->code() == lir_nop, "should be filling with nops");
1930 }
1931 virtual void emit_code(LIR_Assembler* masm);
1932 virtual LIR_OpDelay* as_OpDelay() { return this; }
1933 void print_instr(outputStream* out) const PRODUCT_RETURN;
1934 LIR_Op* delay_op() const { return _op; }
1935 CodeEmitInfo* call_info() const { return info(); }
1936 };
1937
1938 #ifdef ASSERT
1939 // LIR_OpAssert
1940 class LIR_OpAssert : public LIR_Op2 {
1941 friend class LIR_OpVisitState;
1942
1943 private:
1944 const char* _msg;
1945 bool _halt;
1946
1947 public:
1948 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1949 : LIR_Op2(lir_assert, condition, opr1, opr2)
1950 , _msg(msg)
1951 , _halt(halt) {
1952 }
1953
1954 const char* msg() const { return _msg; }
1955 bool halt() const { return _halt; }
1956
1957 virtual void emit_code(LIR_Assembler* masm);
1958 virtual LIR_OpAssert* as_OpAssert() { return this; }
1959 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1960 };
1961 #endif
1962
1963 // LIR_OpCompareAndSwap
1964 class LIR_OpCompareAndSwap : public LIR_Op {
1965 friend class LIR_OpVisitState;
1966
1967 private:
1968 LIR_Opr _addr;
1969 LIR_Opr _cmp_value;
1970 LIR_Opr _new_value;
1971 LIR_Opr _tmp1;
1972 LIR_Opr _tmp2;
1973
1974 public:
1975 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1976 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1977 : LIR_Op(code, result, NULL) // no result, no info
1978 , _addr(addr)
1979 , _cmp_value(cmp_value)
1980 , _new_value(new_value)
1981 , _tmp1(t1)
1982 , _tmp2(t2) { }
1983
1984 LIR_Opr addr() const { return _addr; }
1985 LIR_Opr cmp_value() const { return _cmp_value; }
1986 LIR_Opr new_value() const { return _new_value; }
1987 LIR_Opr tmp1() const { return _tmp1; }
1988 LIR_Opr tmp2() const { return _tmp2; }
1989
1990 virtual void emit_code(LIR_Assembler* masm);
1991 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1992 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1993 };
1994
1995 // LIR_OpProfileCall
1996 class LIR_OpProfileCall : public LIR_Op {
1997 friend class LIR_OpVisitState;
1998
1999 private:
2000 ciMethod* _profiled_method;
2001 int _profiled_bci;
2002 ciMethod* _profiled_callee;
2003 LIR_Opr _mdo;
2004 LIR_Opr _recv;
2005 LIR_Opr _tmp1;
2006 ciKlass* _known_holder;
2007
2008 public:
2009 // Destroys recv
2010 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
2011 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
2012 , _profiled_method(profiled_method)
2013 , _profiled_bci(profiled_bci)
2014 , _profiled_callee(profiled_callee)
2015 , _mdo(mdo)
2016 , _recv(recv)
2017 , _tmp1(t1)
2018 , _known_holder(known_holder) { }
2019
2020 ciMethod* profiled_method() const { return _profiled_method; }
2021 int profiled_bci() const { return _profiled_bci; }
2022 ciMethod* profiled_callee() const { return _profiled_callee; }
2023 LIR_Opr mdo() const { return _mdo; }
2024 LIR_Opr recv() const { return _recv; }
2025 LIR_Opr tmp1() const { return _tmp1; }
2026 ciKlass* known_holder() const { return _known_holder; }
2027
2028 virtual void emit_code(LIR_Assembler* masm);
2029 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
2030 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2031 bool should_profile_receiver_type() const {
2032 bool callee_is_static = _profiled_callee->is_loaded() && _profiled_callee->is_static();
2033 Bytecodes::Code bc = _profiled_method->java_code_at_bci(_profiled_bci);
2034 bool call_is_virtual = (bc == Bytecodes::_invokevirtual && !_profiled_callee->can_be_statically_bound()) || bc == Bytecodes::_invokeinterface;
2035 return C1ProfileVirtualCalls && call_is_virtual && !callee_is_static;
2036 }
2037 };
2038
2039 // LIR_OpProfileType
2040 class LIR_OpProfileType : public LIR_Op {
2041 friend class LIR_OpVisitState;
2042
2043 private:
2044 LIR_Opr _mdp;
2045 LIR_Opr _obj;
2046 LIR_Opr _tmp;
2047 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
2048 intptr_t _current_klass; // what the profiling currently reports
2049 bool _not_null; // true if we know statically that _obj cannot be null
2050 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
2051 // _exact_klass it the only possible type for this parameter in any context.
2052
2053 public:
2054 // Destroys recv
2055 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
2056 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
2057 , _mdp(mdp)
2058 , _obj(obj)
2059 , _tmp(tmp)
2060 , _exact_klass(exact_klass)
2061 , _current_klass(current_klass)
2062 , _not_null(not_null)
2063 , _no_conflict(no_conflict) { }
2064
2065 LIR_Opr mdp() const { return _mdp; }
2066 LIR_Opr obj() const { return _obj; }
2067 LIR_Opr tmp() const { return _tmp; }
2068 ciKlass* exact_klass() const { return _exact_klass; }
2069 intptr_t current_klass() const { return _current_klass; }
2070 bool not_null() const { return _not_null; }
2071 bool no_conflict() const { return _no_conflict; }
2072
2073 virtual void emit_code(LIR_Assembler* masm);
2074 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2075 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2076 };
2077
2078 class LIR_InsertionBuffer;
2079
2080 //--------------------------------LIR_List---------------------------------------------------
2081 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2082 // The LIR instructions are appended by the LIR_List class itself;
2083 //
2084 // Notes:
2085 // - all offsets are(should be) in bytes
2086 // - local positions are specified with an offset, with offset 0 being local 0
2087
2088 class LIR_List: public CompilationResourceObj {
2089 private:
2090 LIR_OpList _operations;
2091
2092 Compilation* _compilation;
2093 #ifndef PRODUCT
2094 BlockBegin* _block;
2095 #endif
2096 #ifdef ASSERT
2097 const char * _file;
2098 int _line;
2099 #endif
2100 #ifdef RISCV
2101 LIR_Opr _cmp_opr1;
2102 LIR_Opr _cmp_opr2;
2103 #endif
2104
2105 public:
2106 void append(LIR_Op* op) {
2107 if (op->source() == NULL)
2108 op->set_source(_compilation->current_instruction());
2109 #ifndef PRODUCT
2110 if (PrintIRWithLIR) {
2111 _compilation->maybe_print_current_instruction();
2112 op->print(); tty->cr();
2113 }
2114 #endif // PRODUCT
2115
2116 #ifdef RISCV
2117 set_cmp_oprs(op);
2118 // lir_cmp set cmp oprs only on riscv
2119 if (op->code() == lir_cmp) return;
2120 #endif
2121
2122 _operations.append(op);
2123
2124 #ifdef ASSERT
2125 op->verify();
2126 op->set_file_and_line(_file, _line);
2127 _file = NULL;
2128 _line = 0;
2129 #endif
2130 }
2131
2132 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2133
2134 #ifdef ASSERT
2135 void set_file_and_line(const char * file, int line);
2136 #endif
2137
2138 #ifdef RISCV
2139 void set_cmp_oprs(LIR_Op* op);
2140 #endif
2141
2142 //---------- accessors ---------------
2143 LIR_OpList* instructions_list() { return &_operations; }
2144 int length() const { return _operations.length(); }
2145 LIR_Op* at(int i) const { return _operations.at(i); }
2146
2147 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2148
2149 // insert LIR_Ops in buffer to right places in LIR_List
2150 void append(LIR_InsertionBuffer* buffer);
2151
2152 //---------- mutators ---------------
2153 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2154 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2155 void remove_at(int i) { _operations.remove_at(i); }
2156
2157 //---------- printing -------------
2158 void print_instructions() PRODUCT_RETURN;
2159
2160
2161 //---------- instructions -------------
2162 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2163 address dest, LIR_OprList* arguments,
2164 CodeEmitInfo* info) {
2165 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2166 }
2167 void call_static(ciMethod* method, LIR_Opr result,
2168 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2169 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2170 }
2171 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2172 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2173 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2174 }
2175 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2176 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2177 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2178 }
2179
2180 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2181 void membar() { append(new LIR_Op0(lir_membar)); }
2182 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2183 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2184 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2185 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2186 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2187 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2188
2189 void nop() { append(new LIR_Op0(lir_nop)); }
2190
2191 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2192 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2193
2194 void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); }
2195
2196 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2197
2198 void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); }
2199
2200 // result is a stack location for old backend and vreg for UseLinearScan
2201 // stack_loc_temp is an illegal register for old backend
2202 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2203 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2204 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2205 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2206 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2207 if (UseCompressedOops) {
2208 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2209 } else {
2210 move(src, dst, info);
2211 }
2212 }
2213 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2214 if (UseCompressedOops) {
2215 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2216 } else {
2217 move(src, dst, info);
2218 }
2219 }
2220 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2221
2222 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2223 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2224
2225 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2226 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2227
2228 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2229 void return_op(LIR_Opr result) { append(new LIR_OpReturn(result)); }
2230
2231 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2232
2233 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2234 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2235 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2236
2237 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2238 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2239 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2240 }
2241 void unwind_exception(LIR_Opr exceptionOop) {
2242 append(new LIR_Op1(lir_unwind, exceptionOop));
2243 }
2244
2245 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2246 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2247
2248 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2249 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2250 }
2251 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2252 cmp(condition, left, LIR_OprFact::intConst(right), info);
2253 }
2254
2255 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2256 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2257
2258 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type,
2259 LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr) {
2260 append(new LIR_Op4(lir_cmove, condition, src1, src2, cmp_opr1, cmp_opr2, dst, type));
2261 }
2262
2263 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2264 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2265 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2266 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2267 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2268 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2269
2270 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2271 void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }
2272 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2273 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
2274 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2275 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2276 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2277
2278 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2279 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2280 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2281 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul, left, right, res, tmp)); }
2282 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2283 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div, left, right, res, tmp)); }
2284 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2285
2286 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2287 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2288
2289 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2290
2291 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2292 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2293 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2294 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2295 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2296
2297 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2298 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2299 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2300 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2301
2302 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2303 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2304
2305 // jump is an unconditional branch
2306 void jump(BlockBegin* block) {
2307 append(new LIR_OpBranch(lir_cond_always, block));
2308 }
2309 void jump(CodeStub* stub) {
2310 append(new LIR_OpBranch(lir_cond_always, stub));
2311 }
2312 void branch(LIR_Condition cond, Label* lbl) {
2313 append(new LIR_OpBranch(cond, lbl));
2314 }
2315 // Should not be used for fp comparisons
2316 void branch(LIR_Condition cond, BlockBegin* block) {
2317 append(new LIR_OpBranch(cond, block));
2318 }
2319 // Should not be used for fp comparisons
2320 void branch(LIR_Condition cond, CodeStub* stub) {
2321 append(new LIR_OpBranch(cond, stub));
2322 }
2323 // Should only be used for fp comparisons
2324 void branch(LIR_Condition cond, BlockBegin* block, BlockBegin* unordered) {
2325 append(new LIR_OpBranch(cond, block, unordered));
2326 }
2327
2328 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2329 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2330 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2331
2332 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2333 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2334 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2335
2336 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2337 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2338
2339 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2340 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2341 }
2342
2343 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2344 LIR_OprList* arguments, CodeEmitInfo* info) {
2345 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2346 }
2347
2348 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2349 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2350 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2351
2352 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2353
2354 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2355
2356 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2357
2358 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2359 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2360
2361 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2362 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2363 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2364 ciMethod* profiled_method, int profiled_bci);
2365 // MethodData* profiling
2366 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2367 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2368 }
2369 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2370 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2371 }
2372
2373 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2374 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2375
2376 void load_klass(LIR_Opr obj, LIR_Opr result, CodeEmitInfo* info, CodeStub* stub) { append(new LIR_OpLoadKlass(obj, result, info, stub)); }
2377
2378 #ifdef ASSERT
2379 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2380 #endif
2381 };
2382
2383 void print_LIR(BlockList* blocks);
2384
2385 class LIR_InsertionBuffer : public CompilationResourceObj {
2386 private:
2387 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2388
2389 // list of insertion points. index and count are stored alternately:
2390 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2391 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2392 intStack _index_and_count;
2393
2394 // the LIR_Ops to be inserted
2395 LIR_OpList _ops;
2396
2397 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2398 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2399 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2400
2401 #ifdef ASSERT
2402 void verify();
2403 #endif
2404 public:
2405 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2406
2407 // must be called before using the insertion buffer
2408 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2409 bool initialized() const { return _lir != NULL; }
2410 // called automatically when the buffer is appended to the LIR_List
2411 void finish() { _lir = NULL; }
2412
2413 // accessors
2414 LIR_List* lir_list() const { return _lir; }
2415 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2416 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2417 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2418
2419 int number_of_ops() const { return _ops.length(); }
2420 LIR_Op* op_at(int i) const { return _ops.at(i); }
2421
2422 // append an instruction to the buffer
2423 void append(int index, LIR_Op* op);
2424
2425 // instruction
2426 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2427 };
2428
2429
2430 //
2431 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2432 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2433 // information about the input, output and temporaries used by the
2434 // op to be recorded. It also records whether the op has call semantics
2435 // and also records all the CodeEmitInfos used by this op.
2436 //
2437
2438
2439 class LIR_OpVisitState: public StackObj {
2440 public:
2441 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2442
2443 enum {
2444 maxNumberOfOperands = 21,
2445 maxNumberOfInfos = 4
2446 };
2447
2448 private:
2449 LIR_Op* _op;
2450
2451 // optimization: the operands and infos are not stored in a variable-length
2452 // list, but in a fixed-size array to save time of size checks and resizing
2453 int _oprs_len[numModes];
2454 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2455 int _info_len;
2456 CodeEmitInfo* _info_new[maxNumberOfInfos];
2457
2458 bool _has_call;
2459 bool _has_slow_case;
2460
2461
2462 // only include register operands
2463 // addresses are decomposed to the base and index registers
2464 // constants and stack operands are ignored
2465 void append(LIR_Opr& opr, OprMode mode) {
2466 assert(opr->is_valid(), "should not call this otherwise");
2467 assert(mode >= 0 && mode < numModes, "bad mode");
2468
2469 if (opr->is_register()) {
2470 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2471 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2472
2473 } else if (opr->is_pointer()) {
2474 LIR_Address* address = opr->as_address_ptr();
2475 if (address != NULL) {
2476 // special handling for addresses: add base and index register of the address
2477 // both are always input operands or temp if we want to extend
2478 // their liveness!
2479 if (mode == outputMode) {
2480 mode = inputMode;
2481 }
2482 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2483 if (address->_base->is_valid()) {
2484 assert(address->_base->is_register(), "must be");
2485 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2486 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2487 }
2488 if (address->_index->is_valid()) {
2489 assert(address->_index->is_register(), "must be");
2490 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2491 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2492 }
2493
2494 } else {
2495 assert(opr->is_constant(), "constant operands are not processed");
2496 }
2497 } else {
2498 assert(opr->is_stack(), "stack operands are not processed");
2499 }
2500 }
2501
2502 void append(CodeEmitInfo* info) {
2503 assert(info != NULL, "should not call this otherwise");
2504 assert(_info_len < maxNumberOfInfos, "array overflow");
2505 _info_new[_info_len++] = info;
2506 }
2507
2508 public:
2509 LIR_OpVisitState() { reset(); }
2510
2511 LIR_Op* op() const { return _op; }
2512 void set_op(LIR_Op* op) { reset(); _op = op; }
2513
2514 bool has_call() const { return _has_call; }
2515 bool has_slow_case() const { return _has_slow_case; }
2516
2517 void reset() {
2518 _op = NULL;
2519 _has_call = false;
2520 _has_slow_case = false;
2521
2522 _oprs_len[inputMode] = 0;
2523 _oprs_len[tempMode] = 0;
2524 _oprs_len[outputMode] = 0;
2525 _info_len = 0;
2526 }
2527
2528
2529 int opr_count(OprMode mode) const {
2530 assert(mode >= 0 && mode < numModes, "bad mode");
2531 return _oprs_len[mode];
2532 }
2533
2534 LIR_Opr opr_at(OprMode mode, int index) const {
2535 assert(mode >= 0 && mode < numModes, "bad mode");
2536 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2537 return *_oprs_new[mode][index];
2538 }
2539
2540 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2541 assert(mode >= 0 && mode < numModes, "bad mode");
2542 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2543 *_oprs_new[mode][index] = opr;
2544 }
2545
2546 int info_count() const {
2547 return _info_len;
2548 }
2549
2550 CodeEmitInfo* info_at(int index) const {
2551 assert(index < _info_len, "index out of bounds");
2552 return _info_new[index];
2553 }
2554
2555 XHandlers* all_xhandler();
2556
2557 // collects all register operands of the instruction
2558 void visit(LIR_Op* op);
2559
2560 #ifdef ASSERT
2561 // check that an operation has no operands
2562 bool no_operands(LIR_Op* op);
2563 #endif
2564
2565 // LIR_Op visitor functions use these to fill in the state
2566 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2567 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2568 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2569 void do_info(CodeEmitInfo* info) { append(info); }
2570
2571 void do_stub(CodeStub* stub);
2572 void do_call() { _has_call = true; }
2573 void do_slow_case() { _has_slow_case = true; }
2574 void do_slow_case(CodeEmitInfo* info) {
2575 _has_slow_case = true;
2576 append(info);
2577 }
2578 };
2579
2580
2581 inline LIR_Opr LIR_Opr::illegalOpr() { return LIR_OprFact::illegalOpr; };
2582
2583 inline LIR_Opr LIR_Opr::nullOpr() { return LIR_OprFact::nullOpr; };
2584
2585 #endif // SHARE_C1_C1_LIR_HPP