1 /*
  2  * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "gc/shared/barrierSet.hpp"
 27 #include "gc/shared/c2/barrierSetC2.hpp"
 28 #include "gc/shared/collectedHeap.hpp"
 29 #include "memory/universe.hpp"
 30 #include "oops/compressedOops.hpp"
 31 #include "opto/machnode.hpp"
 32 #include "opto/output.hpp"
 33 #include "opto/regalloc.hpp"
 34 #include "utilities/vmError.hpp"
 35 
 36 //=============================================================================
 37 // Return the value requested
 38 // result register lookup, corresponding to int_format
 39 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {
 40   return (int)ra_->get_encode(node);
 41 }
 42 // input register lookup, corresponding to ext_format
 43 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 44   return (int)(ra_->get_encode(node->in(idx)));
 45 }
 46 intptr_t  MachOper::constant() const { return 0x00; }
 47 relocInfo::relocType MachOper::constant_reloc() const { return relocInfo::none; }
 48 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }
 49 jfloat  MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }
 50 jlong   MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }
 51 TypeOopPtr *MachOper::oop() const { return nullptr; }
 52 int MachOper::ccode() const { return 0x00; }
 53 // A zero, default, indicates this value is not needed.
 54 // May need to lookup the base register, as done in int_ and ext_format
 55 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
 56 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
 57 int MachOper::scale()  const { return 0x00; }
 58 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
 59 int MachOper::constant_disp()  const { return 0; }
 60 int MachOper::base_position()  const { return -1; }  // no base input
 61 int MachOper::index_position() const { return -1; }  // no index input
 62 // Check for PC-Relative displacement
 63 relocInfo::relocType MachOper::disp_reloc() const { return relocInfo::none; }
 64 // Return the label
 65 Label*   MachOper::label()  const { ShouldNotReachHere(); return 0; }
 66 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }
 67 
 68 
 69 //------------------------------negate-----------------------------------------
 70 // Negate conditional branches.  Error for non-branch operands
 71 void MachOper::negate() {
 72   ShouldNotCallThis();
 73 }
 74 
 75 //-----------------------------type--------------------------------------------
 76 const Type *MachOper::type() const {
 77   return Type::BOTTOM;
 78 }
 79 
 80 //------------------------------in_RegMask-------------------------------------
 81 const RegMask *MachOper::in_RegMask(int index) const {
 82   ShouldNotReachHere();
 83   return nullptr;
 84 }
 85 
 86 //------------------------------dump_spec--------------------------------------
 87 // Print any per-operand special info
 88 #ifndef PRODUCT
 89 void MachOper::dump_spec(outputStream *st) const { }
 90 #endif
 91 
 92 //------------------------------hash-------------------------------------------
 93 // Print any per-operand special info
 94 uint MachOper::hash() const {
 95   ShouldNotCallThis();
 96   return 5;
 97 }
 98 
 99 //------------------------------cmp--------------------------------------------
100 // Print any per-operand special info
101 bool MachOper::cmp( const MachOper &oper ) const {
102   ShouldNotCallThis();
103   return opcode() == oper.opcode();
104 }
105 
106 //------------------------------hash-------------------------------------------
107 // Print any per-operand special info
108 uint labelOper::hash() const {
109   return _block_num;
110 }
111 
112 //------------------------------cmp--------------------------------------------
113 // Print any per-operand special info
114 bool labelOper::cmp( const MachOper &oper ) const {
115   return (opcode() == oper.opcode()) && (_label == oper.label());
116 }
117 
118 //------------------------------hash-------------------------------------------
119 // Print any per-operand special info
120 uint methodOper::hash() const {
121   return (uint)_method;
122 }
123 
124 //------------------------------cmp--------------------------------------------
125 // Print any per-operand special info
126 bool methodOper::cmp( const MachOper &oper ) const {
127   return (opcode() == oper.opcode()) && (_method == oper.method());
128 }
129 
130 
131 //=============================================================================
132 //------------------------------MachNode---------------------------------------
133 
134 //------------------------------emit-------------------------------------------
135 void MachNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
136   #ifdef ASSERT
137   tty->print("missing MachNode emit function: ");
138   dump();
139   #endif
140   ShouldNotCallThis();
141 }
142 
143 //---------------------------postalloc_expand----------------------------------
144 // Expand node after register allocation.
145 void MachNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {}
146 
147 //------------------------------size-------------------------------------------
148 // Size of instruction in bytes
149 uint MachNode::size(PhaseRegAlloc *ra_) const {
150   // If a virtual was not defined for this specific instruction,
151   // Call the helper which finds the size by emitting the bits.
152   return MachNode::emit_size(ra_);
153 }
154 
155 //------------------------------size-------------------------------------------
156 // Helper function that computes size by emitting code
157 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {
158   // Emit into a trash buffer and count bytes emitted.
159   assert(ra_ == ra_->C->regalloc(), "sanity");
160   return ra_->C->output()->scratch_emit_size(this);
161 }
162 
163 
164 
165 //------------------------------hash-------------------------------------------
166 uint MachNode::hash() const {
167   uint no = num_opnds();
168   uint sum = rule();
169   for( uint i=0; i<no; i++ )
170     sum += _opnds[i]->hash();
171   return sum+Node::hash();
172 }
173 
174 //-----------------------------cmp---------------------------------------------
175 bool MachNode::cmp( const Node &node ) const {
176   MachNode& n = *((Node&)node).as_Mach();
177   uint no = num_opnds();
178   if( no != n.num_opnds() ) return false;
179   if( rule() != n.rule() ) return false;
180   for( uint i=0; i<no; i++ )    // All operands must match
181     if( !_opnds[i]->cmp( *n._opnds[i] ) )
182       return false;             // mis-matched operands
183   return true;                  // match
184 }
185 
186 void MachNode::fill_new_machnode(MachNode* node) const {
187   // New node must use same node index
188   node->set_idx(_idx);
189   // Copy machine-independent inputs
190   for (uint j = 0; j < req(); j++) {
191     node->add_req(in(j));
192   }
193   // Copy my operands, except for cisc position
194   int nopnds = num_opnds();
195   assert(node->num_opnds() == (uint)nopnds, "Must have same number of operands");
196   MachOper** to = node->_opnds;
197   for (int i = 0; i < nopnds; i++) {
198     if (i != cisc_operand()) {
199       to[i] = _opnds[i]->clone();
200     }
201   }
202   // Do not increment node index counter, since node reuses my index
203   Compile* C = Compile::current();
204   C->set_unique(C->unique() - 1);
205 }
206 
207 // Return an equivalent instruction using memory for cisc_operand position
208 MachNode *MachNode::cisc_version(int offset) {
209   ShouldNotCallThis();
210   return nullptr;
211 }
212 
213 void MachNode::use_cisc_RegMask() {
214   ShouldNotReachHere();
215 }
216 
217 
218 //-----------------------------in_RegMask--------------------------------------
219 const RegMask &MachNode::in_RegMask( uint idx ) const {
220   uint numopnds = num_opnds();        // Virtual call for number of operands
221   uint skipped   = oper_input_base(); // Sum of leaves skipped so far
222   if( idx < skipped ) {
223     assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );
224     assert( idx == 1, "expected base ptr here" );
225     // debug info can be anywhere
226     return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];
227   }
228   uint opcnt     = 1;                 // First operand
229   uint num_edges = _opnds[1]->num_edges(); // leaves for first operand
230   while( idx >= skipped+num_edges ) {
231     skipped += num_edges;
232     opcnt++;                          // Bump operand count
233     assert( opcnt < numopnds, "Accessing non-existent operand" );
234     num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand
235   }
236 
237   const RegMask *rm = cisc_RegMask();
238   if( rm == nullptr || (int)opcnt != cisc_operand() ) {
239     rm = _opnds[opcnt]->in_RegMask(idx-skipped);
240   }
241   return *rm;
242 }
243 
244 //-----------------------------memory_inputs--------------------------------
245 const MachOper*  MachNode::memory_inputs(Node* &base, Node* &index) const {
246   const MachOper* oper = memory_operand();
247 
248   if (oper == (MachOper*)-1) {
249     base = NodeSentinel;
250     index = NodeSentinel;
251   } else {
252     base = nullptr;
253     index = nullptr;
254     if (oper != nullptr) {
255       // It has a unique memory operand.  Find its index.
256       int oper_idx = num_opnds();
257       while (--oper_idx >= 0) {
258         if (_opnds[oper_idx] == oper)  break;
259       }
260       int oper_pos = operand_index(oper_idx);
261       int base_pos = oper->base_position();
262       if (base_pos >= 0) {
263         base = _in[oper_pos+base_pos];
264       }
265       int index_pos = oper->index_position();
266       if (index_pos >= 0) {
267         index = _in[oper_pos+index_pos];
268       }
269     }
270   }
271 
272   return oper;
273 }
274 
275 //-----------------------------get_base_and_disp----------------------------
276 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {
277 
278   // Find the memory inputs using our helper function
279   Node* base;
280   Node* index;
281   const MachOper* oper = memory_inputs(base, index);
282 
283   if (oper == nullptr) {
284     // Base has been set to null
285     offset = 0;
286   } else if (oper == (MachOper*)-1) {
287     // Base has been set to NodeSentinel
288     // There is not a unique memory use here.  We will fall to AliasIdxBot.
289     offset = Type::OffsetBot;
290   } else {
291     // Base may be null, even if offset turns out to be != 0
292 
293     intptr_t disp = oper->constant_disp();
294     int scale = oper->scale();
295     // Now we have collected every part of the ADLC MEMORY_INTER.
296     // See if it adds up to a base + offset.
297     if (index != nullptr) {
298       const Type* t_index = index->bottom_type();
299       if (t_index->isa_narrowoop() || t_index->isa_narrowklass()) { // EncodeN, LoadN, LoadConN, LoadNKlass,
300                                                                     // EncodeNKlass, LoadConNklass.
301         // Memory references through narrow oops have a
302         // funny base so grab the type from the index:
303         // [R12 + narrow_oop_reg<<3 + offset]
304         assert(base == nullptr, "Memory references through narrow oops have no base");
305         offset = disp;
306         adr_type = t_index->make_ptr()->add_offset(offset);
307         return nullptr;
308       } else if (!index->is_Con()) {
309         disp = Type::OffsetBot;
310       } else if (disp != Type::OffsetBot) {
311         const TypeX* ti = t_index->isa_intptr_t();
312         if (ti == nullptr) {
313           disp = Type::OffsetBot;  // a random constant??
314         } else {
315           disp += ti->get_con() << scale;
316         }
317       }
318     }
319     offset = disp;
320 
321     // In x86_32.ad, indOffset32X uses base==RegI and disp==RegP,
322     // this will prevent alias analysis without the following support:
323     // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,
324     // Add the offset determined by the "base", or use Type::OffsetBot.
325     if( adr_type == TYPE_PTR_SENTINAL ) {
326       const TypePtr *t_disp = oper->disp_as_type();  // only not null for indOffset32X
327       if (t_disp != nullptr) {
328         offset = Type::OffsetBot;
329         const Type* t_base = base->bottom_type();
330         if (t_base->isa_intptr_t()) {
331           const TypeX *t_offset = t_base->is_intptr_t();
332           if( t_offset->is_con() ) {
333             offset = t_offset->get_con();
334           }
335         }
336         adr_type = t_disp->add_offset(offset);
337       } else if( base == nullptr && offset != 0 && offset != Type::OffsetBot ) {
338         // Use ideal type if it is oop ptr.
339         const TypePtr *tp = oper->type()->isa_ptr();
340         if( tp != nullptr) {
341           adr_type = tp;
342         }
343       }
344     }
345 
346   }
347   return base;
348 }
349 
350 
351 //---------------------------------adr_type---------------------------------
352 const class TypePtr *MachNode::adr_type() const {
353   intptr_t offset = 0;
354   const TypePtr *adr_type = TYPE_PTR_SENTINAL;  // attempt computing adr_type
355   const Node *base = get_base_and_disp(offset, adr_type);
356   if( adr_type != TYPE_PTR_SENTINAL ) {
357     return adr_type;      // get_base_and_disp has the answer
358   }
359 
360 #ifdef ASSERT
361   if (base != nullptr && base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_VerifyVectorAlignment) {
362     // For VerifyVectorAlignment we just pass the type through
363     return base->bottom_type()->is_ptr();
364   }
365 #endif
366 
367   // Direct addressing modes have no base node, simply an indirect
368   // offset, which is always to raw memory.
369   // %%%%% Someday we'd like to allow constant oop offsets which
370   // would let Intel load from static globals in 1 instruction.
371   // Currently Intel requires 2 instructions and a register temp.
372   if (base == nullptr) {
373     // null base, zero offset means no memory at all (a null pointer!)
374     if (offset == 0) {
375       return nullptr;
376     }
377     // null base, any offset means any pointer whatever
378     if (offset == Type::OffsetBot) {
379       return TypePtr::BOTTOM;
380     }
381     // %%% make offset be intptr_t
382     assert(!Universe::heap()->is_in(cast_to_oop(offset)), "must be a raw ptr");
383     return TypeRawPtr::BOTTOM;
384   }
385 
386   // base of -1 with no particular offset means all of memory
387   if (base == NodeSentinel)  return TypePtr::BOTTOM;
388 
389   const Type* t = base->bottom_type();
390   if (t->isa_narrowoop() && CompressedOops::shift() == 0) {
391     // 32-bit unscaled narrow oop can be the base of any address expression
392     t = t->make_ptr();
393   }
394   if (t->isa_narrowklass() && CompressedKlassPointers::shift() == 0) {
395     // 32-bit unscaled narrow oop can be the base of any address expression
396     t = t->make_ptr();
397   }
398   if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
399     // We cannot assert that the offset does not look oop-ish here.
400     // Depending on the heap layout the cardmark base could land
401     // inside some oopish region.  It definitely does for Win2K.
402     // The sum of cardmark-base plus shift-by-9-oop lands outside
403     // the oop-ish area but we can't assert for that statically.
404     return TypeRawPtr::BOTTOM;
405   }
406 
407   const TypePtr *tp = t->isa_ptr();
408 
409   // be conservative if we do not recognize the type
410   if (tp == nullptr) {
411     assert(false, "this path may produce not optimal code");
412     return TypePtr::BOTTOM;
413   }
414   assert(tp->base() != Type::AnyPtr, "not a bare pointer");
415 
416   return tp->add_offset(offset);
417 }
418 
419 
420 //-----------------------------operand_index---------------------------------
421 int MachNode::operand_index(uint operand) const {
422   if (operand < 1)  return -1;
423   assert(operand < num_opnds(), "oob");
424   if (_opnds[operand]->num_edges() == 0)  return -1;
425 
426   uint skipped   = oper_input_base(); // Sum of leaves skipped so far
427   for (uint opcnt = 1; opcnt < operand; opcnt++) {
428     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
429     skipped += num_edges;
430   }
431   return skipped;
432 }
433 
434 int MachNode::operand_index(const MachOper *oper) const {
435   uint skipped = oper_input_base(); // Sum of leaves skipped so far
436   uint opcnt;
437   for (opcnt = 1; opcnt < num_opnds(); opcnt++) {
438     if (_opnds[opcnt] == oper) break;
439     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
440     skipped += num_edges;
441   }
442   if (_opnds[opcnt] != oper) return -1;
443   return skipped;
444 }
445 
446 int MachNode::operand_index(Node* def) const {
447   uint skipped = oper_input_base(); // Sum of leaves skipped so far
448   for (uint opcnt = 1; opcnt < num_opnds(); opcnt++) {
449     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
450     for (uint i = 0; i < num_edges; i++) {
451       if (in(skipped + i) == def) {
452         return opcnt;
453       }
454     }
455     skipped += num_edges;
456   }
457   return -1;
458 }
459 
460 //------------------------------peephole---------------------------------------
461 // Apply peephole rule(s) to this instruction
462 int MachNode::peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_) {
463   return -1;
464 }
465 
466 //------------------------------add_case_label---------------------------------
467 // Adds the label for the case
468 void MachNode::add_case_label( int index_num, Label* blockLabel) {
469   ShouldNotCallThis();
470 }
471 
472 //------------------------------method_set-------------------------------------
473 // Set the absolute address of a method
474 void MachNode::method_set( intptr_t addr ) {
475   ShouldNotCallThis();
476 }
477 
478 //------------------------------rematerialize----------------------------------
479 bool MachNode::rematerialize() const {
480   // Temps are always rematerializable
481   if (is_MachTemp()) return true;
482 
483   uint r = rule();              // Match rule
484   if (r <  Matcher::_begin_rematerialize ||
485       r >= Matcher::_end_rematerialize) {
486     return false;
487   }
488 
489   // For 2-address instructions, the input live range is also the output
490   // live range. Remateralizing does not make progress on the that live range.
491   if (two_adr()) return false;
492 
493   // Check for rematerializing float constants, or not
494   if (!Matcher::rematerialize_float_constants) {
495     int op = ideal_Opcode();
496     if (op == Op_ConF || op == Op_ConD) {
497       return false;
498     }
499   }
500 
501   // Defining flags - can't spill these! Must remateralize.
502   if (ideal_reg() == Op_RegFlags) {
503     return true;
504   }
505 
506   // Stretching lots of inputs - don't do it.
507   // A MachContant has the last input being the constant base
508   if (req() > (is_MachConstant() ? 3U : 2U)) {
509     return false;
510   }
511 
512   if (req() >= 2 && in(1) && in(1)->ideal_reg() == Op_RegFlags) {
513     // In(1) will be rematerialized, too.
514     // Stretching lots of inputs - don't do it.
515     if (in(1)->req() > (in(1)->is_MachConstant() ? 3U : 2U)) {
516       return false;
517     }
518   }
519 
520   // Don't remateralize somebody with bound inputs - it stretches a
521   // fixed register lifetime.
522   uint idx = oper_input_base();
523   if (req() > idx) {
524     const RegMask &rm = in_RegMask(idx);
525     if (rm.is_NotEmpty() && rm.is_bound(ideal_reg())) {
526       return false;
527     }
528   }
529 
530   return true;
531 }
532 
533 #ifndef PRODUCT
534 //------------------------------dump_spec--------------------------------------
535 // Print any per-operand special info
536 void MachNode::dump_spec(outputStream *st) const {
537   uint cnt = num_opnds();
538   for( uint i=0; i<cnt; i++ ) {
539     if (_opnds[i] != nullptr) {
540       _opnds[i]->dump_spec(st);
541     } else {
542       st->print(" _");
543     }
544   }
545   const TypePtr *t = adr_type();
546   if( t ) {
547     Compile* C = Compile::current();
548     if( C->alias_type(t)->is_volatile() )
549       st->print(" Volatile!");
550   }
551   if (barrier_data() != 0) {
552     st->print(" barrier(");
553     BarrierSet::barrier_set()->barrier_set_c2()->dump_barrier_data(this, st);
554     st->print(") ");
555   }
556 }
557 
558 //------------------------------dump_format------------------------------------
559 // access to virtual
560 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {
561   format(ra, st); // access to virtual
562 }
563 #endif
564 
565 //=============================================================================
566 #ifndef PRODUCT
567 void MachTypeNode::dump_spec(outputStream *st) const {
568   MachNode::dump_spec(st);
569   if (_bottom_type != nullptr) {
570     _bottom_type->dump_on(st);
571   } else {
572     st->print(" null");
573   }
574 }
575 #endif
576 
577 
578 //=============================================================================
579 int MachConstantNode::constant_offset() {
580   // Bind the offset lazily.
581   if (_constant.offset() == -1) {
582     ConstantTable& constant_table = Compile::current()->output()->constant_table();
583     int offset = constant_table.find_offset(_constant);
584     // If called from Compile::scratch_emit_size return the
585     // pre-calculated offset.
586     // NOTE: If the AD file does some table base offset optimizations
587     // later the AD file needs to take care of this fact.
588     if (Compile::current()->output()->in_scratch_emit_size()) {
589       return constant_table.calculate_table_base_offset() + offset;
590     }
591     _constant.set_offset(constant_table.table_base_offset() + offset);
592   }
593   return _constant.offset();
594 }
595 
596 int MachConstantNode::constant_offset_unchecked() const {
597   return _constant.offset();
598 }
599 
600 //=============================================================================
601 #ifndef PRODUCT
602 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
603   int reg = ra_->get_reg_first(in(1)->in(_vidx));
604   st->print("%s %s", Name(), Matcher::regName[reg]);
605 }
606 #endif
607 
608 void MachNullCheckNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
609   // only emits entries in the null-pointer exception handler table
610 }
611 void MachNullCheckNode::label_set(Label* label, uint block_num) {
612   // Nothing to emit
613 }
614 void MachNullCheckNode::save_label( Label** label, uint* block_num ) {
615   // Nothing to emit
616 }
617 
618 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {
619   if( idx == 0 ) return RegMask::Empty;
620   else return in(1)->as_Mach()->out_RegMask();
621 }
622 
623 //=============================================================================
624 const Type *MachProjNode::bottom_type() const {
625   if( _ideal_reg == fat_proj ) return Type::BOTTOM;
626   // Try the normal mechanism first
627   const Type *t = in(0)->bottom_type();
628   if( t->base() == Type::Tuple ) {
629     const TypeTuple *tt = t->is_tuple();
630     if (_con < tt->cnt())
631       return tt->field_at(_con);
632   }
633   // Else use generic type from ideal register set
634   assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");
635   return Type::mreg2type[_ideal_reg];
636 }
637 
638 const TypePtr *MachProjNode::adr_type() const {
639   if (bottom_type() == Type::MEMORY) {
640     // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM
641     Node* ctrl = in(0);
642     if (ctrl == nullptr)  return nullptr; // node is dead
643     const TypePtr* adr_type = ctrl->adr_type();
644     #ifdef ASSERT
645     if (!VMError::is_error_reported() && !Node::in_dump())
646       assert(adr_type != nullptr, "source must have adr_type");
647     #endif
648     return adr_type;
649   }
650   assert(bottom_type()->base() != Type::Memory, "no other memories?");
651   return nullptr;
652 }
653 
654 #ifndef PRODUCT
655 void MachProjNode::dump_spec(outputStream *st) const {
656   ProjNode::dump_spec(st);
657   switch (_ideal_reg) {
658   case unmatched_proj:  st->print("/unmatched");                           break;
659   case fat_proj:        st->print("/fat"); if (WizardMode) _rout.dump(st); break;
660   }
661 }
662 #endif
663 
664 //=============================================================================
665 #ifndef PRODUCT
666 void MachIfNode::dump_spec(outputStream *st) const {
667   st->print("P=%f, C=%f",_prob, _fcnt);
668 }
669 #endif
670 
671 //=============================================================================
672 uint MachReturnNode::size_of() const { return sizeof(*this); }
673 
674 //------------------------------Registers--------------------------------------
675 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {
676   return _in_rms[idx];
677 }
678 
679 const TypePtr *MachReturnNode::adr_type() const {
680   // most returns and calls are assumed to consume & modify all of memory
681   // the matcher will copy non-wide adr_types from ideal originals
682   return _adr_type;
683 }
684 
685 //=============================================================================
686 const Type *MachSafePointNode::bottom_type() const {  return TypeTuple::MEMBAR; }
687 
688 //------------------------------Registers--------------------------------------
689 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {
690   // Values in the domain use the users calling convention, embodied in the
691   // _in_rms array of RegMasks.
692   if( idx < TypeFunc::Parms ) return _in_rms[idx];
693 
694   if (idx == TypeFunc::Parms &&
695       ideal_Opcode() == Op_SafePoint) {
696     return MachNode::in_RegMask(idx);
697   }
698 
699   // Values outside the domain represent debug info
700   assert(in(idx)->ideal_reg() != Op_RegFlags, "flags register is not spillable");
701   return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
702 }
703 
704 
705 //=============================================================================
706 
707 bool MachCallNode::cmp( const Node &n ) const
708 { return _tf == ((MachCallNode&)n)._tf; }
709 const Type *MachCallNode::bottom_type() const { return tf()->range(); }
710 const Type* MachCallNode::Value(PhaseGVN* phase) const { return tf()->range(); }
711 
712 #ifndef PRODUCT
713 void MachCallNode::dump_spec(outputStream *st) const {
714   st->print("# ");
715   if (tf() != nullptr)  tf()->dump_on(st);
716   if (_cnt != COUNT_UNKNOWN)  st->print(" C=%f",_cnt);
717   if (jvms() != nullptr)  jvms()->dump_spec(st);
718 }
719 #endif
720 
721 #ifndef _LP64
722 bool MachCallNode::return_value_is_used() const {
723   if (tf()->range()->cnt() == TypeFunc::Parms) {
724     // void return
725     return false;
726   }
727 
728   // find the projection corresponding to the return value
729   for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
730     Node *use = fast_out(i);
731     if (!use->is_Proj()) continue;
732     if (use->as_Proj()->_con == TypeFunc::Parms) {
733       return true;
734     }
735   }
736   return false;
737 }
738 #endif
739 
740 // Similar to cousin class CallNode::returns_pointer
741 // Because this is used in deoptimization, we want the type info, not the data
742 // flow info; the interpreter will "use" things that are dead to the optimizer.
743 bool MachCallNode::returns_pointer() const {
744   const TypeTuple *r = tf()->range();
745   return (r->cnt() > TypeFunc::Parms &&
746           r->field_at(TypeFunc::Parms)->isa_ptr());
747 }
748 
749 //------------------------------Registers--------------------------------------
750 const RegMask &MachCallNode::in_RegMask(uint idx) const {
751   // Values in the domain use the users calling convention, embodied in the
752   // _in_rms array of RegMasks.
753   if (idx < tf()->domain()->cnt()) {
754     return _in_rms[idx];
755   }
756   if (idx == mach_constant_base_node_input()) {
757     return MachConstantBaseNode::static_out_RegMask();
758   }
759   // Values outside the domain represent debug info
760   return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];
761 }
762 
763 //=============================================================================
764 uint MachCallJavaNode::size_of() const { return sizeof(*this); }
765 bool MachCallJavaNode::cmp( const Node &n ) const {
766   MachCallJavaNode &call = (MachCallJavaNode&)n;
767   return MachCallNode::cmp(call) && _method->equals(call._method) &&
768          _override_symbolic_info == call._override_symbolic_info;
769 }
770 #ifndef PRODUCT
771 void MachCallJavaNode::dump_spec(outputStream *st) const {
772   if (_method_handle_invoke)
773     st->print("MethodHandle ");
774   if (_method) {
775     _method->print_short_name(st);
776     st->print(" ");
777   }
778   MachCallNode::dump_spec(st);
779 }
780 #endif
781 
782 //------------------------------Registers--------------------------------------
783 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const {
784   // Values in the domain use the users calling convention, embodied in the
785   // _in_rms array of RegMasks.
786   if (idx < tf()->domain()->cnt()) {
787     return _in_rms[idx];
788   }
789   if (idx == mach_constant_base_node_input()) {
790     return MachConstantBaseNode::static_out_RegMask();
791   }
792   // Values outside the domain represent debug info
793   Matcher* m = Compile::current()->matcher();
794   // If this call is a MethodHandle invoke we have to use a different
795   // debugmask which does not include the register we use to save the
796   // SP over MH invokes.
797   RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask;
798   return *debugmask[in(idx)->ideal_reg()];
799 }
800 
801 //=============================================================================
802 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }
803 bool MachCallStaticJavaNode::cmp( const Node &n ) const {
804   MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;
805   return MachCallJavaNode::cmp(call) && _name == call._name;
806 }
807 
808 //----------------------------uncommon_trap_request----------------------------
809 // If this is an uncommon trap, return the request code, else zero.
810 int MachCallStaticJavaNode::uncommon_trap_request() const {
811   if (_name != nullptr && !strcmp(_name, "uncommon_trap")) {
812     return CallStaticJavaNode::extract_uncommon_trap_request(this);
813   }
814   return 0;
815 }
816 
817 #ifndef PRODUCT
818 // Helper for summarizing uncommon_trap arguments.
819 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {
820   int trap_req = uncommon_trap_request();
821   if (trap_req != 0) {
822     char buf[100];
823     st->print("(%s)",
824                Deoptimization::format_trap_request(buf, sizeof(buf),
825                                                    trap_req));
826   }
827 }
828 
829 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {
830   st->print("Static ");
831   if (_name != nullptr) {
832     st->print("wrapper for: %s", _name );
833     dump_trap_args(st);
834     st->print(" ");
835   }
836   MachCallJavaNode::dump_spec(st);
837 }
838 #endif
839 
840 //=============================================================================
841 #ifndef PRODUCT
842 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {
843   st->print("Dynamic ");
844   MachCallJavaNode::dump_spec(st);
845 }
846 #endif
847 //=============================================================================
848 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }
849 bool MachCallRuntimeNode::cmp( const Node &n ) const {
850   MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;
851   return MachCallNode::cmp(call) && !strcmp(_name,call._name);
852 }
853 #ifndef PRODUCT
854 void MachCallRuntimeNode::dump_spec(outputStream *st) const {
855   st->print("%s ",_name);
856   MachCallNode::dump_spec(st);
857 }
858 #endif
859 //=============================================================================
860 // A shared JVMState for all HaltNodes.  Indicates the start of debug info
861 // is at TypeFunc::Parms.  Only required for SOE register spill handling -
862 // to indicate where the stack-slot-only debug info inputs begin.
863 // There is no other JVM state needed here.
864 JVMState jvms_for_throw(0);
865 JVMState *MachHaltNode::jvms() const {
866   return &jvms_for_throw;
867 }
868 
869 uint MachMemBarNode::size_of() const { return sizeof(*this); }
870 
871 const TypePtr *MachMemBarNode::adr_type() const {
872   return _adr_type;
873 }
874 
875 
876 //=============================================================================
877 #ifndef PRODUCT
878 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
879   st->print("B%d", _block_num);
880 }
881 #endif // PRODUCT
882 
883 //=============================================================================
884 #ifndef PRODUCT
885 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
886   st->print(INTPTR_FORMAT, _method);
887 }
888 #endif // PRODUCT