< prev index next > test/hotspot/jtreg/compiler/loopopts/superword/TestSplitPacks.java
Print this page
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Load and store are already split
//
// 0 1 - - 4 5 6 7
b[i+4] = b4;
b[i+5] = b5;
b[i+6] = b6;
b[i+7] = b7;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.ADD_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.MUL_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.ADD_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.MUL_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Adjacent Load and Store, but split by Add/Mul
static Object[] test1a(int[] a, int[] b, int mask) {
for (int i = 0; i < RANGE; i+=8) {
b[i+2] = a[i+2] + mask;
b[i+3] = a[i+3] + mask;
b[i+4] = a[i+4] * mask; // Mul
b[i+5] = a[i+5] * mask;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.ADD_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.MUL_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.ADD_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.MUL_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Adjacent Load and Store, but split by Add/Mul
static Object[] test1b(int[] a, int[] b, int mask) {
for (int i = 0; i < RANGE; i+=8) {
b[i+2] = a[i+2] * mask;
b[i+3] = a[i+3] * mask;
b[i+4] = a[i+4] + mask; // Add
b[i+5] = a[i+5] + mask;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.ADD_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.MUL_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"avx2", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.ADD_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.MUL_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"avx2", "true", "asimd", "true"})
// Adjacent Load and Store, but split by Add/Mul
static Object[] test1c(int[] a, int[] b, int mask) {
for (int i = 0; i < RANGE; i+=8) {
b[i+2] = a[i+2] * mask; // Mul
b[i+3] = a[i+3] * mask;
b[i+4] = a[i+4] * mask;
b[i+5] = a[i+5] * mask;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.ADD_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.MUL_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"avx2", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.ADD_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.MUL_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"avx2", "true", "asimd", "true"})
// Adjacent Load and Store, but split by Add/Mul
static Object[] test1d(int[] a, int[] b, int mask) {
for (int i = 0; i < RANGE; i+=8) {
b[i+2] = a[i+2] + mask; // Add
b[i+3] = a[i+3] + mask;
b[i+4] = a[i+4] + mask;
b[i+5] = a[i+5] + mask;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Split the load
//
// 0 1 2 3 4 5 - -
b[i+4] = b2;
b[i+5] = b3;
b[i+6] = b4;
b[i+7] = b5;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Split the load
//
// 0 1 2 3 4 5 - -
b[i+2] = b2;
b[i+3] = b3;
b[i+6] = b4;
b[i+7] = b5;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Split the load
//
// 0 1 - - 4 5 6 7
b[i+1] = b1;
b[i+2] = b4;
b[i+3] = b5;
b[i+4] = b6;
b[i+5] = b7;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_2, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Split the load
//
// 0 1 2 3 - - 6 7
b[i+1] = b1;
b[i+2] = b2;
b[i+3] = b3;
b[i+4] = b6;
b[i+5] = b7;
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_S, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_S, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.STORE_VECTOR, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// 0 1 2 3 4 5 6 7 -
// | | | | | | | |
// | + + + | | | |
b[i+5] = a5;
b[i+6] = a6;
b[i+7] = a7;
b[i+8] = val; // adjacent to 4-pack but needs to be split off
-
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 8 + 32*i -> always adr = base + 12 + 8 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b, new int[]{ sum } };
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.MUL_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
IRNode.ADD_VI, IRNode.VECTOR_SIZE_4, "> 0", // reduction moved out of loop
IRNode.ADD_REDUCTION_V, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "AlignVector", "false"},
- applyIfPlatform = {"64-bit", "true"},
- applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
- @IR(counts = {IRNode.LOAD_VECTOR_I, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.MUL_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.AND_VI, IRNode.VECTOR_SIZE_4, "> 0",
- IRNode.ADD_VI, IRNode.VECTOR_SIZE_4, "> 0", // reduction moved out of loop
- IRNode.ADD_REDUCTION_V, "> 0"},
- applyIfAnd = {"MaxVectorSize", ">=32", "UseCompactObjectHeaders", "false"},
+ applyIf = {"MaxVectorSize", ">=32"},
applyIfPlatform = {"64-bit", "true"},
applyIfCPUFeatureOr = {"sse4.1", "true", "asimd", "true"})
// Split packs including reductions
static Object[] test6a(int[] a, int[] b) {
int s = 0;
s += a[i+4] & b[i+4];
s += a[i+5] & b[i+5];
s += a[i+6] & b[i+6];
s += a[i+7] & b[i+7];
- // With AlignVector, we need 8-byte alignment of vector loads/stores.
- // UseCompactObjectHeaders=false UseCompactObjectHeaders=true
- // adr = base + 16 + 32*i -> always adr = base + 12 + 32*i -> never
- // -> vectorize -> no vectorization
}
return new Object[]{ a, b, new int[]{ s } };
}
@Test
< prev index next >