1 /*
  2  * Copyright (c) 2018, 2021, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "code/codeCache.hpp"
 27 #include "code/nativeInst.hpp"
 28 #include "gc/shared/barrierSetNMethod.hpp"
 29 #include "logging/log.hpp"
 30 #include "memory/resourceArea.hpp"
 31 #include "runtime/frame.inline.hpp"
 32 #include "runtime/sharedRuntime.hpp"
 33 #include "runtime/registerMap.hpp"
 34 #include "runtime/thread.hpp"
 35 #include "utilities/align.hpp"
 36 #include "utilities/debug.hpp"
 37 
 38 class NativeNMethodBarrier: public NativeInstruction {
 39   address instruction_address() const { return addr_at(0); }
 40 
 41   int *guard_addr() {
 42     return reinterpret_cast<int*>(instruction_address() + 10 * 4);
 43   }
 44 
 45 public:
 46   int get_value() {
 47     return Atomic::load_acquire(guard_addr());
 48   }
 49 
 50   void set_value(int value) {
 51     Atomic::release_store(guard_addr(), value);
 52   }
 53 
 54   void verify() const;
 55 };
 56 
 57 // Store the instruction bitmask, bits and name for checking the barrier.
 58 struct CheckInsn {
 59   uint32_t mask;
 60   uint32_t bits;
 61   const char *name;
 62 };
 63 
 64 static const struct CheckInsn barrierInsn[] = {
 65   { 0xff000000, 0x18000000, "ldr (literal)" },
 66   { 0xfffff0ff, 0xd50330bf, "dmb" },
 67   { 0xffc00000, 0xb9400000, "ldr"},
 68   { 0x7f20001f, 0x6b00001f, "cmp"},
 69   { 0xff00001f, 0x54000000, "b.eq"},
 70   { 0xff800000, 0xd2800000, "mov"},
 71   { 0xff800000, 0xf2800000, "movk"},
 72   { 0xff800000, 0xf2800000, "movk"},
 73   { 0xfffffc1f, 0xd63f0000, "blr"},
 74   { 0xfc000000, 0x14000000, "b"}
 75 };
 76 
 77 // The encodings must match the instructions emitted by
 78 // BarrierSetAssembler::nmethod_entry_barrier. The matching ignores the specific
 79 // register numbers and immediate values in the encoding.
 80 void NativeNMethodBarrier::verify() const {
 81   intptr_t addr = (intptr_t) instruction_address();
 82   for(unsigned int i = 0; i < sizeof(barrierInsn)/sizeof(struct CheckInsn); i++ ) {
 83     uint32_t inst = *((uint32_t*) addr);
 84     if ((inst & barrierInsn[i].mask) != barrierInsn[i].bits) {
 85       tty->print_cr("Addr: " INTPTR_FORMAT " Code: 0x%x", addr, inst);
 86       fatal("not an %s instruction.", barrierInsn[i].name);
 87     }
 88     addr +=4;
 89   }
 90 }
 91 
 92 
 93 /* We're called from an nmethod when we need to deoptimize it. We do
 94    this by throwing away the nmethod's frame and jumping to the
 95    ic_miss stub. This looks like there has been an IC miss at the
 96    entry of the nmethod, so we resolve the call, which will fall back
 97    to the interpreter if the nmethod has been unloaded. */
 98 void BarrierSetNMethod::deoptimize(nmethod* nm, address* return_address_ptr) {
 99 
100   typedef struct {
101     intptr_t *sp; intptr_t *fp; address lr; address pc;
102   } frame_pointers_t;
103 
104   frame_pointers_t *new_frame = (frame_pointers_t *)(return_address_ptr - 5);
105 
106   JavaThread *thread = JavaThread::current();
107   RegisterMap reg_map(thread, false);
108   frame frame = thread->last_frame();
109 
110   assert(frame.is_compiled_frame() || frame.is_native_frame(), "must be");
111   assert(frame.cb() == nm, "must be");
112   frame = frame.sender(&reg_map);
113 
114   LogTarget(Trace, nmethod, barrier) out;
115   if (out.is_enabled()) {
116     ResourceMark mark;
117     log_trace(nmethod, barrier)("deoptimize(nmethod: %s(%p), return_addr: %p, osr: %d, thread: %p(%s), making rsp: %p) -> %p",
118                                 nm->method()->name_and_sig_as_C_string(),
119                                 nm, *(address *) return_address_ptr, nm->is_osr_method(), thread,
120                                 thread->name(), frame.sp(), nm->verified_entry_point());
121   }
122 
123   new_frame->sp = frame.sp();
124   new_frame->fp = frame.fp();
125   new_frame->lr = frame.pc();
126   new_frame->pc = SharedRuntime::get_handle_wrong_method_stub();
127 }
128 
129 // This is the offset of the entry barrier from where the frame is completed.
130 // If any code changes between the end of the verified entry where the entry
131 // barrier resides, and the completion of the frame, then
132 // NativeNMethodCmpBarrier::verify() will immediately complain when it does
133 // not find the expected native instruction at this offset, which needs updating.
134 // Note that this offset is invariant of PreserveFramePointer.
135 
136 static const int entry_barrier_offset = -4 * 11;
137 
138 static NativeNMethodBarrier* native_nmethod_barrier(nmethod* nm) {
139   address barrier_address = nm->code_begin() + nm->frame_complete_offset() + entry_barrier_offset;
140   NativeNMethodBarrier* barrier = reinterpret_cast<NativeNMethodBarrier*>(barrier_address);
141   debug_only(barrier->verify());
142   return barrier;
143 }
144 
145 void BarrierSetNMethod::disarm(nmethod* nm) {
146   if (!supports_entry_barrier(nm)) {
147     return;
148   }
149 
150   // Disarms the nmethod guard emitted by BarrierSetAssembler::nmethod_entry_barrier.
151   // Symmetric "LDR; DMB ISHLD" is in the nmethod barrier.
152   NativeNMethodBarrier* barrier = native_nmethod_barrier(nm);
153 
154   barrier->set_value(disarmed_value());
155 }
156 
157 void BarrierSetNMethod::arm(nmethod* nm, int arm_value) {
158   if (!supports_entry_barrier(nm)) {
159     return;
160   }
161 
162   NativeNMethodBarrier* barrier = native_nmethod_barrier(nm);
163   barrier->set_value(arm_value);
164 }
165 
166 bool BarrierSetNMethod::is_armed(nmethod* nm) {
167   if (!supports_entry_barrier(nm)) {
168     return false;
169   }
170 
171   NativeNMethodBarrier* barrier = native_nmethod_barrier(nm);
172   return barrier->get_value() != disarmed_value();
173 }
--- EOF ---