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src/hotspot/cpu/aarch64/nativeInst_aarch64.hpp

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@@ -69,11 +69,11 @@
    bool is_adr_aligned() const {
      // adr Xn, <label>, where label is aligned to 4 bytes (address of instruction).
      return (encoding() & 0xff000000) == 0x10000000;
    }
  
-   inline bool is_nop();
+   inline bool is_nop() const;
    bool is_jump();
    bool is_general_jump();
    inline bool is_jump_or_nop();
    inline bool is_cond_jump();
    bool is_safepoint_poll();

@@ -541,11 +541,11 @@
  // Simple test vs memory
  class NativeTstRegMem: public NativeInstruction {
  public:
  };
  
- inline bool NativeInstruction::is_nop() {
+ inline bool NativeInstruction::is_nop() const{
    uint32_t insn = *(uint32_t*)addr_at(0);
    return insn == 0xd503201f;
  }
  
  inline bool NativeInstruction::is_jump() {

@@ -664,6 +664,50 @@
  inline NativeLdSt* NativeLdSt_at(address addr) {
    assert(nativeInstruction_at(addr)->is_Imm_LdSt(), "no immediate load/store found");
    return (NativeLdSt*)addr;
  }
  
+ class NativePostCallNop: public NativeInstruction {
+ public:
+   bool check() const { return is_nop(); }
+   int displacement() const { return 0; }
+   void patch(jint diff);
+   void make_deopt();
+ };
+ 
+ inline NativePostCallNop* nativePostCallNop_at(address address) {
+   NativePostCallNop* nop = (NativePostCallNop*) address;
+   if (nop->check()) {
+     return nop;
+   }
+   return NULL;
+ }
+ 
+ inline NativePostCallNop* nativePostCallNop_unsafe_at(address address) {
+   NativePostCallNop* nop = (NativePostCallNop*) address;
+   assert (nop->check(), "");
+   return nop;
+ }
+ 
+ class NativeDeoptInstruction: public NativeInstruction {
+  public:
+   enum {
+     instruction_size            =    4,
+     instruction_offset          =    0,
+   };
+ 
+   address instruction_address() const       { return addr_at(instruction_offset); }
+   address next_instruction_address() const  { return addr_at(instruction_size); }
+ 
+   void  verify();
+ 
+   static bool is_deopt_at(address instr) {
+     assert (instr != NULL, "");
+     uint32_t value = *(uint32_t *) instr;
+     return value == 0xd4ade001;
+   }
+ 
+   // MT-safe patching
+   static void insert(address code_pos);
+ };
+ 
  #endif // CPU_AARCH64_NATIVEINST_AARCH64_HPP
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