1 /*
   2  * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #include "precompiled.hpp"
  28 #include "asm/macroAssembler.hpp"
  29 #include "asm/macroAssembler.inline.hpp"
  30 #include "code/codeCache.hpp"
  31 #include "code/compiledIC.hpp"
  32 #include "code/debugInfoRec.hpp"
  33 #include "code/vtableStubs.hpp"
  34 #include "compiler/oopMap.hpp"
  35 #include "gc/shared/barrierSetAssembler.hpp"
  36 #include "interpreter/interpreter.hpp"
  37 #include "interpreter/interp_masm.hpp"
  38 #include "logging/log.hpp"
  39 #include "memory/resourceArea.hpp"
  40 #include "nativeInst_aarch64.hpp"
  41 #include "oops/klass.inline.hpp"
  42 #include "oops/method.inline.hpp"
  43 #include "prims/methodHandles.hpp"
  44 #include "runtime/continuation.hpp"
  45 #include "runtime/continuationEntry.inline.hpp"
  46 #include "runtime/globals.hpp"
  47 #include "runtime/jniHandles.hpp"
  48 #include "runtime/safepointMechanism.hpp"
  49 #include "runtime/sharedRuntime.hpp"
  50 #include "runtime/signature.hpp"
  51 #include "runtime/stubRoutines.hpp"
  52 #include "runtime/vframeArray.hpp"
  53 #include "utilities/align.hpp"
  54 #include "utilities/formatBuffer.hpp"
  55 #include "vmreg_aarch64.inline.hpp"
  56 #ifdef COMPILER1
  57 #include "c1/c1_Runtime1.hpp"
  58 #endif
  59 #ifdef COMPILER2
  60 #include "adfiles/ad_aarch64.hpp"
  61 #include "opto/runtime.hpp"
  62 #endif
  63 #if INCLUDE_JVMCI
  64 #include "jvmci/jvmciJavaClasses.hpp"
  65 #endif
  66 
  67 #define __ masm->
  68 
  69 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  70 
  71 class SimpleRuntimeFrame {
  72 
  73   public:
  74 
  75   // Most of the runtime stubs have this simple frame layout.
  76   // This class exists to make the layout shared in one place.
  77   // Offsets are for compiler stack slots, which are jints.
  78   enum layout {
  79     // The frame sender code expects that rbp will be in the "natural" place and
  80     // will override any oopMap setting for it. We must therefore force the layout
  81     // so that it agrees with the frame sender code.
  82     // we don't expect any arg reg save area so aarch64 asserts that
  83     // frame::arg_reg_save_area_bytes == 0
  84     rfp_off = 0,
  85     rfp_off2,
  86     return_off, return_off2,
  87     framesize
  88   };
  89 };
  90 
  91 // FIXME -- this is used by C1
  92 class RegisterSaver {
  93   const bool _save_vectors;
  94  public:
  95   RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
  96 
  97   OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
  98   void restore_live_registers(MacroAssembler* masm);
  99 
 100   // Offsets into the register save area
 101   // Used by deoptimization when it is managing result register
 102   // values on its own
 103 
 104   int reg_offset_in_bytes(Register r);
 105   int r0_offset_in_bytes()    { return reg_offset_in_bytes(r0); }
 106   int rscratch1_offset_in_bytes()    { return reg_offset_in_bytes(rscratch1); }
 107   int v0_offset_in_bytes();
 108 
 109   // Total stack size in bytes for saving sve predicate registers.
 110   int total_sve_predicate_in_bytes();
 111 
 112   // Capture info about frame layout
 113   // Note this is only correct when not saving full vectors.
 114   enum layout {
 115                 fpu_state_off = 0,
 116                 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
 117                 // The frame sender code expects that rfp will be in
 118                 // the "natural" place and will override any oopMap
 119                 // setting for it. We must therefore force the layout
 120                 // so that it agrees with the frame sender code.
 121                 r0_off = fpu_state_off + FPUStateSizeInWords,
 122                 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
 123                 return_off = rfp_off + Register::max_slots_per_register,      // slot for return address
 124                 reg_save_size = return_off + Register::max_slots_per_register};
 125 
 126 };
 127 
 128 int RegisterSaver::reg_offset_in_bytes(Register r) {
 129   // The integer registers are located above the floating point
 130   // registers in the stack frame pushed by save_live_registers() so the
 131   // offset depends on whether we are saving full vectors, and whether
 132   // those vectors are NEON or SVE.
 133 
 134   int slots_per_vect = FloatRegister::save_slots_per_register;
 135 
 136 #if COMPILER2_OR_JVMCI
 137   if (_save_vectors) {
 138     slots_per_vect = FloatRegister::slots_per_neon_register;
 139 
 140 #ifdef COMPILER2
 141     if (Matcher::supports_scalable_vector()) {
 142       slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
 143     }
 144 #endif
 145   }
 146 #endif
 147 
 148   int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
 149   return r0_offset + r->encoding() * wordSize;
 150 }
 151 
 152 int RegisterSaver::v0_offset_in_bytes() {
 153   // The floating point registers are located above the predicate registers if
 154   // they are present in the stack frame pushed by save_live_registers(). So the
 155   // offset depends on the saved total predicate vectors in the stack frame.
 156   return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
 157 }
 158 
 159 int RegisterSaver::total_sve_predicate_in_bytes() {
 160 #ifdef COMPILER2
 161   if (_save_vectors && Matcher::supports_scalable_vector()) {
 162     return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) *
 163            PRegister::number_of_registers;
 164   }
 165 #endif
 166   return 0;
 167 }
 168 
 169 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
 170   bool use_sve = false;
 171   int sve_vector_size_in_bytes = 0;
 172   int sve_vector_size_in_slots = 0;
 173   int sve_predicate_size_in_slots = 0;
 174   int total_predicate_in_bytes = total_sve_predicate_in_bytes();
 175   int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
 176 
 177 #ifdef COMPILER2
 178   use_sve = Matcher::supports_scalable_vector();
 179   if (use_sve) {
 180     sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
 181     sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
 182     sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
 183   }
 184 #endif
 185 
 186 #if COMPILER2_OR_JVMCI
 187   if (_save_vectors) {
 188     int extra_save_slots_per_register = 0;
 189     // Save upper half of vector registers
 190     if (use_sve) {
 191       extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
 192     } else {
 193       extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
 194     }
 195     int extra_vector_bytes = extra_save_slots_per_register *
 196                              VMRegImpl::stack_slot_size *
 197                              FloatRegister::number_of_registers;
 198     additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
 199   }
 200 #else
 201   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 202 #endif
 203 
 204   int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
 205                                      reg_save_size * BytesPerInt, 16);
 206   // OopMap frame size is in compiler stack slots (jint's) not bytes or words
 207   int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
 208   // The caller will allocate additional_frame_words
 209   int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
 210   // CodeBlob frame size is in words.
 211   int frame_size_in_words = frame_size_in_bytes / wordSize;
 212   *total_frame_words = frame_size_in_words;
 213 
 214   // Save Integer and Float registers.
 215   __ enter();
 216   __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
 217 
 218   // Set an oopmap for the call site.  This oopmap will map all
 219   // oop-registers and debug-info registers as callee-saved.  This
 220   // will allow deoptimization at this safepoint to find all possible
 221   // debug-info recordings, as well as let GC find all oops.
 222 
 223   OopMapSet *oop_maps = new OopMapSet();
 224   OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
 225 
 226   for (int i = 0; i < Register::number_of_registers; i++) {
 227     Register r = as_Register(i);
 228     if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
 229       // SP offsets are in 4-byte words.
 230       // Register slots are 8 bytes wide, 32 floating-point registers.
 231       int sp_offset = Register::max_slots_per_register * i +
 232                       FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
 233       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
 234     }
 235   }
 236 
 237   for (int i = 0; i < FloatRegister::number_of_registers; i++) {
 238     FloatRegister r = as_FloatRegister(i);
 239     int sp_offset = 0;
 240     if (_save_vectors) {
 241       sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
 242                             (FloatRegister::slots_per_neon_register * i);
 243     } else {
 244       sp_offset = FloatRegister::save_slots_per_register * i;
 245     }
 246     oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
 247   }
 248 
 249   return oop_map;
 250 }
 251 
 252 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
 253 #ifdef COMPILER2
 254   __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
 255                    Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
 256 #else
 257 #if !INCLUDE_JVMCI
 258   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 259 #endif
 260   __ pop_CPU_state(_save_vectors);
 261 #endif
 262   __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
 263   __ authenticate_return_address();
 264 }
 265 
 266 // Is vector's size (in bytes) bigger than a size saved by default?
 267 // 8 bytes vector registers are saved by default on AArch64.
 268 // The SVE supported min vector size is 8 bytes and we need to save
 269 // predicate registers when the vector size is 8 bytes as well.
 270 bool SharedRuntime::is_wide_vector(int size) {
 271   return size > 8 || (UseSVE > 0 && size >= 8);
 272 }
 273 
 274 // ---------------------------------------------------------------------------
 275 // Read the array of BasicTypes from a signature, and compute where the
 276 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 277 // quantities.  Values less than VMRegImpl::stack0 are registers, those above
 278 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 279 // as framesizes are fixed.
 280 // VMRegImpl::stack0 refers to the first slot 0(sp).
 281 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
 282 // Register up to Register::number_of_registers are the 64-bit
 283 // integer registers.
 284 
 285 // Note: the INPUTS in sig_bt are in units of Java argument words,
 286 // which are 64-bit.  The OUTPUTS are in 32-bit units.
 287 
 288 // The Java calling convention is a "shifted" version of the C ABI.
 289 // By skipping the first C ABI register we can call non-static jni
 290 // methods with small numbers of arguments without having to shuffle
 291 // the arguments at all. Since we control the java ABI we ought to at
 292 // least get some advantage out of it.
 293 
 294 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 295                                            VMRegPair *regs,
 296                                            int total_args_passed) {
 297 
 298   // Create the mapping between argument positions and
 299   // registers.
 300   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 301     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
 302   };
 303   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 304     j_farg0, j_farg1, j_farg2, j_farg3,
 305     j_farg4, j_farg5, j_farg6, j_farg7
 306   };
 307 
 308 
 309   uint int_args = 0;
 310   uint fp_args = 0;
 311   uint stk_args = 0;
 312 
 313   for (int i = 0; i < total_args_passed; i++) {
 314     switch (sig_bt[i]) {
 315     case T_BOOLEAN:
 316     case T_CHAR:
 317     case T_BYTE:
 318     case T_SHORT:
 319     case T_INT:
 320       if (int_args < Argument::n_int_register_parameters_j) {
 321         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 322       } else {
 323         stk_args = align_up(stk_args, 2);
 324         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 325         stk_args += 1;
 326       }
 327       break;
 328     case T_VOID:
 329       // halves of T_LONG or T_DOUBLE
 330       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 331       regs[i].set_bad();
 332       break;
 333     case T_LONG:
 334       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 335       // fall through
 336     case T_OBJECT:
 337     case T_ARRAY:
 338     case T_ADDRESS:
 339       if (int_args < Argument::n_int_register_parameters_j) {
 340         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 341       } else {
 342         stk_args = align_up(stk_args, 2);
 343         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 344         stk_args += 2;
 345       }
 346       break;
 347     case T_FLOAT:
 348       if (fp_args < Argument::n_float_register_parameters_j) {
 349         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 350       } else {
 351         stk_args = align_up(stk_args, 2);
 352         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 353         stk_args += 1;
 354       }
 355       break;
 356     case T_DOUBLE:
 357       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 358       if (fp_args < Argument::n_float_register_parameters_j) {
 359         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 360       } else {
 361         stk_args = align_up(stk_args, 2);
 362         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 363         stk_args += 2;
 364       }
 365       break;
 366     default:
 367       ShouldNotReachHere();
 368       break;
 369     }
 370   }
 371 
 372   return stk_args;
 373 }
 374 
 375 // Patch the callers callsite with entry to compiled code if it exists.
 376 static void patch_callers_callsite(MacroAssembler *masm) {
 377   Label L;
 378   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 379   __ cbz(rscratch1, L);
 380 
 381   __ enter();
 382   __ push_CPU_state();
 383 
 384   // VM needs caller's callsite
 385   // VM needs target method
 386   // This needs to be a long call since we will relocate this adapter to
 387   // the codeBuffer and it may not reach
 388 
 389 #ifndef PRODUCT
 390   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
 391 #endif
 392 
 393   __ mov(c_rarg0, rmethod);
 394   __ mov(c_rarg1, lr);
 395   __ authenticate_return_address(c_rarg1);
 396   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 397   __ blr(rscratch1);
 398 
 399   // Explicit isb required because fixup_callers_callsite may change the code
 400   // stream.
 401   __ safepoint_isb();
 402 
 403   __ pop_CPU_state();
 404   // restore sp
 405   __ leave();
 406   __ bind(L);
 407 }
 408 
 409 static void gen_c2i_adapter(MacroAssembler *masm,
 410                             int total_args_passed,
 411                             int comp_args_on_stack,
 412                             const BasicType *sig_bt,
 413                             const VMRegPair *regs,
 414                             Label& skip_fixup) {
 415   // Before we get into the guts of the C2I adapter, see if we should be here
 416   // at all.  We've come from compiled code and are attempting to jump to the
 417   // interpreter, which means the caller made a static call to get here
 418   // (vcalls always get a compiled target if there is one).  Check for a
 419   // compiled target.  If there is one, we need to patch the caller's call.
 420   patch_callers_callsite(masm);
 421 
 422   __ bind(skip_fixup);
 423 
 424   int words_pushed = 0;
 425 
 426   // Since all args are passed on the stack, total_args_passed *
 427   // Interpreter::stackElementSize is the space we need.
 428 
 429   int extraspace = total_args_passed * Interpreter::stackElementSize;
 430 
 431   __ mov(r19_sender_sp, sp);
 432 
 433   // stack is aligned, keep it that way
 434   extraspace = align_up(extraspace, 2*wordSize);
 435 
 436   if (extraspace)
 437     __ sub(sp, sp, extraspace);
 438 
 439   // Now write the args into the outgoing interpreter space
 440   for (int i = 0; i < total_args_passed; i++) {
 441     if (sig_bt[i] == T_VOID) {
 442       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 443       continue;
 444     }
 445 
 446     // offset to start parameters
 447     int st_off   = (total_args_passed - i - 1) * Interpreter::stackElementSize;
 448     int next_off = st_off - Interpreter::stackElementSize;
 449 
 450     // Say 4 args:
 451     // i   st_off
 452     // 0   32 T_LONG
 453     // 1   24 T_VOID
 454     // 2   16 T_OBJECT
 455     // 3    8 T_BOOL
 456     // -    0 return address
 457     //
 458     // However to make thing extra confusing. Because we can fit a Java long/double in
 459     // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
 460     // leaves one slot empty and only stores to a single slot. In this case the
 461     // slot that is occupied is the T_VOID slot. See I said it was confusing.
 462 
 463     VMReg r_1 = regs[i].first();
 464     VMReg r_2 = regs[i].second();
 465     if (!r_1->is_valid()) {
 466       assert(!r_2->is_valid(), "");
 467       continue;
 468     }
 469     if (r_1->is_stack()) {
 470       // memory to memory use rscratch1
 471       int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size
 472                     + extraspace
 473                     + words_pushed * wordSize);
 474       if (!r_2->is_valid()) {
 475         // sign extend??
 476         __ ldrw(rscratch1, Address(sp, ld_off));
 477         __ str(rscratch1, Address(sp, st_off));
 478 
 479       } else {
 480 
 481         __ ldr(rscratch1, Address(sp, ld_off));
 482 
 483         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 484         // T_DOUBLE and T_LONG use two slots in the interpreter
 485         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 486           // ld_off == LSW, ld_off+wordSize == MSW
 487           // st_off == MSW, next_off == LSW
 488           __ str(rscratch1, Address(sp, next_off));
 489 #ifdef ASSERT
 490           // Overwrite the unused slot with known junk
 491           __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaaaull);
 492           __ str(rscratch1, Address(sp, st_off));
 493 #endif /* ASSERT */
 494         } else {
 495           __ str(rscratch1, Address(sp, st_off));
 496         }
 497       }
 498     } else if (r_1->is_Register()) {
 499       Register r = r_1->as_Register();
 500       if (!r_2->is_valid()) {
 501         // must be only an int (or less ) so move only 32bits to slot
 502         // why not sign extend??
 503         __ str(r, Address(sp, st_off));
 504       } else {
 505         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 506         // T_DOUBLE and T_LONG use two slots in the interpreter
 507         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 508           // jlong/double in gpr
 509 #ifdef ASSERT
 510           // Overwrite the unused slot with known junk
 511           __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaabull);
 512           __ str(rscratch1, Address(sp, st_off));
 513 #endif /* ASSERT */
 514           __ str(r, Address(sp, next_off));
 515         } else {
 516           __ str(r, Address(sp, st_off));
 517         }
 518       }
 519     } else {
 520       assert(r_1->is_FloatRegister(), "");
 521       if (!r_2->is_valid()) {
 522         // only a float use just part of the slot
 523         __ strs(r_1->as_FloatRegister(), Address(sp, st_off));
 524       } else {
 525 #ifdef ASSERT
 526         // Overwrite the unused slot with known junk
 527         __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaacull);
 528         __ str(rscratch1, Address(sp, st_off));
 529 #endif /* ASSERT */
 530         __ strd(r_1->as_FloatRegister(), Address(sp, next_off));
 531       }
 532     }
 533   }
 534 
 535   __ mov(esp, sp); // Interp expects args on caller's expression stack
 536 
 537   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
 538   __ br(rscratch1);
 539 }
 540 
 541 
 542 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 543                                     int total_args_passed,
 544                                     int comp_args_on_stack,
 545                                     const BasicType *sig_bt,
 546                                     const VMRegPair *regs) {
 547 
 548   // Note: r19_sender_sp contains the senderSP on entry. We must
 549   // preserve it since we may do a i2c -> c2i transition if we lose a
 550   // race where compiled code goes non-entrant while we get args
 551   // ready.
 552 
 553   // Adapters are frameless.
 554 
 555   // An i2c adapter is frameless because the *caller* frame, which is
 556   // interpreted, routinely repairs its own esp (from
 557   // interpreter_frame_last_sp), even if a callee has modified the
 558   // stack pointer.  It also recalculates and aligns sp.
 559 
 560   // A c2i adapter is frameless because the *callee* frame, which is
 561   // interpreted, routinely repairs its caller's sp (from sender_sp,
 562   // which is set up via the senderSP register).
 563 
 564   // In other words, if *either* the caller or callee is interpreted, we can
 565   // get the stack pointer repaired after a call.
 566 
 567   // This is why c2i and i2c adapters cannot be indefinitely composed.
 568   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 569   // both caller and callee would be compiled methods, and neither would
 570   // clean up the stack pointer changes performed by the two adapters.
 571   // If this happens, control eventually transfers back to the compiled
 572   // caller, but with an uncorrected stack, causing delayed havoc.
 573 
 574   if (VerifyAdapterCalls &&
 575       (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) {
 576 #if 0
 577     // So, let's test for cascading c2i/i2c adapters right now.
 578     //  assert(Interpreter::contains($return_addr) ||
 579     //         StubRoutines::contains($return_addr),
 580     //         "i2c adapter must return to an interpreter frame");
 581     __ block_comment("verify_i2c { ");
 582     Label L_ok;
 583     if (Interpreter::code() != nullptr) {
 584       range_check(masm, rax, r11,
 585                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 586                   L_ok);
 587     }
 588     if (StubRoutines::initial_stubs_code() != nullptr) {
 589       range_check(masm, rax, r11,
 590                   StubRoutines::initial_stubs_code()->code_begin(),
 591                   StubRoutines::initial_stubs_code()->code_end(),
 592                   L_ok);
 593     }
 594     if (StubRoutines::final_stubs_code() != nullptr) {
 595       range_check(masm, rax, r11,
 596                   StubRoutines::final_stubs_code()->code_begin(),
 597                   StubRoutines::final_stubs_code()->code_end(),
 598                   L_ok);
 599     }
 600     const char* msg = "i2c adapter must return to an interpreter frame";
 601     __ block_comment(msg);
 602     __ stop(msg);
 603     __ bind(L_ok);
 604     __ block_comment("} verify_i2ce ");
 605 #endif
 606   }
 607 
 608   // Cut-out for having no stack args.
 609   int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
 610   if (comp_args_on_stack) {
 611     __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
 612     __ andr(sp, rscratch1, -16);
 613   }
 614 
 615   // Will jump to the compiled code just as if compiled code was doing it.
 616   // Pre-load the register-jump target early, to schedule it better.
 617   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset())));
 618 
 619 #if INCLUDE_JVMCI
 620   if (EnableJVMCI) {
 621     // check if this call should be routed towards a specific entry point
 622     __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 623     Label no_alternative_target;
 624     __ cbz(rscratch2, no_alternative_target);
 625     __ mov(rscratch1, rscratch2);
 626     __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 627     __ bind(no_alternative_target);
 628   }
 629 #endif // INCLUDE_JVMCI
 630 
 631   // Now generate the shuffle code.
 632   for (int i = 0; i < total_args_passed; i++) {
 633     if (sig_bt[i] == T_VOID) {
 634       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 635       continue;
 636     }
 637 
 638     // Pick up 0, 1 or 2 words from SP+offset.
 639 
 640     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 641             "scrambled load targets?");
 642     // Load in argument order going down.
 643     int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize;
 644     // Point to interpreter value (vs. tag)
 645     int next_off = ld_off - Interpreter::stackElementSize;
 646     //
 647     //
 648     //
 649     VMReg r_1 = regs[i].first();
 650     VMReg r_2 = regs[i].second();
 651     if (!r_1->is_valid()) {
 652       assert(!r_2->is_valid(), "");
 653       continue;
 654     }
 655     if (r_1->is_stack()) {
 656       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 657       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size;
 658       if (!r_2->is_valid()) {
 659         // sign extend???
 660         __ ldrsw(rscratch2, Address(esp, ld_off));
 661         __ str(rscratch2, Address(sp, st_off));
 662       } else {
 663         //
 664         // We are using two optoregs. This can be either T_OBJECT,
 665         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 666         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 667         // So we must adjust where to pick up the data to match the
 668         // interpreter.
 669         //
 670         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 671         // are accessed as negative so LSW is at LOW address
 672 
 673         // ld_off is MSW so get LSW
 674         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 675                            next_off : ld_off;
 676         __ ldr(rscratch2, Address(esp, offset));
 677         // st_off is LSW (i.e. reg.first())
 678         __ str(rscratch2, Address(sp, st_off));
 679       }
 680     } else if (r_1->is_Register()) {  // Register argument
 681       Register r = r_1->as_Register();
 682       if (r_2->is_valid()) {
 683         //
 684         // We are using two VMRegs. This can be either T_OBJECT,
 685         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 686         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 687         // So we must adjust where to pick up the data to match the
 688         // interpreter.
 689 
 690         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 691                            next_off : ld_off;
 692 
 693         // this can be a misaligned move
 694         __ ldr(r, Address(esp, offset));
 695       } else {
 696         // sign extend and use a full word?
 697         __ ldrw(r, Address(esp, ld_off));
 698       }
 699     } else {
 700       if (!r_2->is_valid()) {
 701         __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
 702       } else {
 703         __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
 704       }
 705     }
 706   }
 707 
 708   __ mov(rscratch2, rscratch1);
 709   __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
 710   __ mov(rscratch1, rscratch2);
 711 
 712   // 6243940 We might end up in handle_wrong_method if
 713   // the callee is deoptimized as we race thru here. If that
 714   // happens we don't want to take a safepoint because the
 715   // caller frame will look interpreted and arguments are now
 716   // "compiled" so it is much better to make this transition
 717   // invisible to the stack walking code. Unfortunately if
 718   // we try and find the callee by normal means a safepoint
 719   // is possible. So we stash the desired callee in the thread
 720   // and the vm will find there should this case occur.
 721 
 722   __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
 723 
 724   __ br(rscratch1);
 725 }
 726 
 727 // ---------------------------------------------------------------
 728 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 729                                                             int total_args_passed,
 730                                                             int comp_args_on_stack,
 731                                                             const BasicType *sig_bt,
 732                                                             const VMRegPair *regs,
 733                                                             AdapterFingerPrint* fingerprint) {
 734   address i2c_entry = __ pc();
 735 
 736   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 737 
 738   address c2i_unverified_entry = __ pc();
 739   Label skip_fixup;
 740 
 741   Register data = rscratch2;
 742   Register receiver = j_rarg0;
 743   Register tmp = r10;  // A call-clobbered register not used for arg passing
 744 
 745   // -------------------------------------------------------------------------
 746   // Generate a C2I adapter.  On entry we know rmethod holds the Method* during calls
 747   // to the interpreter.  The args start out packed in the compiled layout.  They
 748   // need to be unpacked into the interpreter layout.  This will almost always
 749   // require some stack space.  We grow the current (compiled) stack, then repack
 750   // the args.  We  finally end in a jump to the generic interpreter entry point.
 751   // On exit from the interpreter, the interpreter will restore our SP (lest the
 752   // compiled code, which relies solely on SP and not FP, get sick).
 753 
 754   {
 755     __ block_comment("c2i_unverified_entry {");
 756     // Method might have been compiled since the call site was patched to
 757     // interpreted; if that is the case treat it as a miss so we can get
 758     // the call site corrected.
 759     __ ic_check(1 /* end_alignment */);
 760     __ ldr(rmethod, Address(data, CompiledICData::speculated_method_offset()));
 761 
 762     __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 763     __ cbz(rscratch1, skip_fixup);
 764     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 765     __ block_comment("} c2i_unverified_entry");
 766   }
 767 
 768   address c2i_entry = __ pc();
 769 
 770   // Class initialization barrier for static methods
 771   address c2i_no_clinit_check_entry = nullptr;
 772   if (VM_Version::supports_fast_class_init_checks()) {
 773     Label L_skip_barrier;
 774 
 775     { // Bypass the barrier for non-static methods
 776       __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset()));
 777       __ andsw(zr, rscratch1, JVM_ACC_STATIC);
 778       __ br(Assembler::EQ, L_skip_barrier); // non-static
 779     }
 780 
 781     __ load_method_holder(rscratch2, rmethod);
 782     __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
 783     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 784 
 785     __ bind(L_skip_barrier);
 786     c2i_no_clinit_check_entry = __ pc();
 787   }
 788 
 789   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 790   bs->c2i_entry_barrier(masm);
 791 
 792   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 793 
 794   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
 795 }
 796 
 797 static int c_calling_convention_priv(const BasicType *sig_bt,
 798                                          VMRegPair *regs,
 799                                          int total_args_passed) {
 800 
 801 // We return the amount of VMRegImpl stack slots we need to reserve for all
 802 // the arguments NOT counting out_preserve_stack_slots.
 803 
 804     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 805       c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5,  c_rarg6,  c_rarg7
 806     };
 807     static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 808       c_farg0, c_farg1, c_farg2, c_farg3,
 809       c_farg4, c_farg5, c_farg6, c_farg7
 810     };
 811 
 812     uint int_args = 0;
 813     uint fp_args = 0;
 814     uint stk_args = 0; // inc by 2 each time
 815 
 816     for (int i = 0; i < total_args_passed; i++) {
 817       switch (sig_bt[i]) {
 818       case T_BOOLEAN:
 819       case T_CHAR:
 820       case T_BYTE:
 821       case T_SHORT:
 822       case T_INT:
 823         if (int_args < Argument::n_int_register_parameters_c) {
 824           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 825         } else {
 826 #ifdef __APPLE__
 827           // Less-than word types are stored one after another.
 828           // The code is unable to handle this so bailout.
 829           return -1;
 830 #endif
 831           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 832           stk_args += 2;
 833         }
 834         break;
 835       case T_LONG:
 836         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 837         // fall through
 838       case T_OBJECT:
 839       case T_ARRAY:
 840       case T_ADDRESS:
 841       case T_METADATA:
 842         if (int_args < Argument::n_int_register_parameters_c) {
 843           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 844         } else {
 845           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 846           stk_args += 2;
 847         }
 848         break;
 849       case T_FLOAT:
 850         if (fp_args < Argument::n_float_register_parameters_c) {
 851           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 852         } else {
 853 #ifdef __APPLE__
 854           // Less-than word types are stored one after another.
 855           // The code is unable to handle this so bailout.
 856           return -1;
 857 #endif
 858           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 859           stk_args += 2;
 860         }
 861         break;
 862       case T_DOUBLE:
 863         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 864         if (fp_args < Argument::n_float_register_parameters_c) {
 865           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 866         } else {
 867           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 868           stk_args += 2;
 869         }
 870         break;
 871       case T_VOID: // Halves of longs and doubles
 872         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 873         regs[i].set_bad();
 874         break;
 875       default:
 876         ShouldNotReachHere();
 877         break;
 878       }
 879     }
 880 
 881   return stk_args;
 882 }
 883 
 884 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
 885                                              uint num_bits,
 886                                              uint total_args_passed) {
 887   Unimplemented();
 888   return 0;
 889 }
 890 
 891 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 892                                          VMRegPair *regs,
 893                                          int total_args_passed)
 894 {
 895   int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
 896   guarantee(result >= 0, "Unsupported arguments configuration");
 897   return result;
 898 }
 899 
 900 
 901 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
 902   // We always ignore the frame_slots arg and just use the space just below frame pointer
 903   // which by this time is free to use
 904   switch (ret_type) {
 905   case T_FLOAT:
 906     __ strs(v0, Address(rfp, -wordSize));
 907     break;
 908   case T_DOUBLE:
 909     __ strd(v0, Address(rfp, -wordSize));
 910     break;
 911   case T_VOID:  break;
 912   default: {
 913     __ str(r0, Address(rfp, -wordSize));
 914     }
 915   }
 916 }
 917 
 918 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
 919   // We always ignore the frame_slots arg and just use the space just below frame pointer
 920   // which by this time is free to use
 921   switch (ret_type) {
 922   case T_FLOAT:
 923     __ ldrs(v0, Address(rfp, -wordSize));
 924     break;
 925   case T_DOUBLE:
 926     __ ldrd(v0, Address(rfp, -wordSize));
 927     break;
 928   case T_VOID:  break;
 929   default: {
 930     __ ldr(r0, Address(rfp, -wordSize));
 931     }
 932   }
 933 }
 934 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
 935   RegSet x;
 936   for ( int i = first_arg ; i < arg_count ; i++ ) {
 937     if (args[i].first()->is_Register()) {
 938       x = x + args[i].first()->as_Register();
 939     } else if (args[i].first()->is_FloatRegister()) {
 940       __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
 941     }
 942   }
 943   __ push(x, sp);
 944 }
 945 
 946 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
 947   RegSet x;
 948   for ( int i = first_arg ; i < arg_count ; i++ ) {
 949     if (args[i].first()->is_Register()) {
 950       x = x + args[i].first()->as_Register();
 951     } else {
 952       ;
 953     }
 954   }
 955   __ pop(x, sp);
 956   for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
 957     if (args[i].first()->is_Register()) {
 958       ;
 959     } else if (args[i].first()->is_FloatRegister()) {
 960       __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
 961     }
 962   }
 963 }
 964 
 965 static void verify_oop_args(MacroAssembler* masm,
 966                             const methodHandle& method,
 967                             const BasicType* sig_bt,
 968                             const VMRegPair* regs) {
 969   Register temp_reg = r19;  // not part of any compiled calling seq
 970   if (VerifyOops) {
 971     for (int i = 0; i < method->size_of_parameters(); i++) {
 972       if (sig_bt[i] == T_OBJECT ||
 973           sig_bt[i] == T_ARRAY) {
 974         VMReg r = regs[i].first();
 975         assert(r->is_valid(), "bad oop arg");
 976         if (r->is_stack()) {
 977           __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
 978           __ verify_oop(temp_reg);
 979         } else {
 980           __ verify_oop(r->as_Register());
 981         }
 982       }
 983     }
 984   }
 985 }
 986 
 987 // on exit, sp points to the ContinuationEntry
 988 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
 989   assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
 990   assert(in_bytes(ContinuationEntry::cont_offset())  % VMRegImpl::stack_slot_size == 0, "");
 991   assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
 992 
 993   stack_slots += (int)ContinuationEntry::size()/wordSize;
 994   __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
 995 
 996   OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
 997 
 998   __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
 999   __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset()));
1000   __ mov(rscratch1, sp); // we can't use sp as the source in str
1001   __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1002 
1003   return map;
1004 }
1005 
1006 // on entry c_rarg1 points to the continuation
1007 //          sp points to ContinuationEntry
1008 //          c_rarg3 -- isVirtualThread
1009 static void fill_continuation_entry(MacroAssembler* masm) {
1010 #ifdef ASSERT
1011   __ movw(rscratch1, ContinuationEntry::cookie_value());
1012   __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset()));
1013 #endif
1014 
1015   __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
1016   __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
1017   __ str (zr,      Address(sp, ContinuationEntry::chunk_offset()));
1018   __ strw(zr,      Address(sp, ContinuationEntry::argsize_offset()));
1019   __ strw(zr,      Address(sp, ContinuationEntry::pin_count_offset()));
1020 
1021   __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1022   __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1023   __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1024   __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1025 
1026   __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
1027   __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset()));
1028 }
1029 
1030 // on entry, sp points to the ContinuationEntry
1031 // on exit, rfp points to the spilled rfp in the entry frame
1032 static void continuation_enter_cleanup(MacroAssembler* masm) {
1033 #ifndef PRODUCT
1034   Label OK;
1035   __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1036   __ cmp(sp, rscratch1);
1037   __ br(Assembler::EQ, OK);
1038   __ stop("incorrect sp1");
1039   __ bind(OK);
1040 #endif
1041 
1042   __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1043   __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1044   __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1045   __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1046 
1047   __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
1048   __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
1049   __ add(rfp, sp, (int)ContinuationEntry::size());
1050 }
1051 
1052 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1053 // On entry: c_rarg1 -- the continuation object
1054 //           c_rarg2 -- isContinue
1055 //           c_rarg3 -- isVirtualThread
1056 static void gen_continuation_enter(MacroAssembler* masm,
1057                                  const methodHandle& method,
1058                                  const BasicType* sig_bt,
1059                                  const VMRegPair* regs,
1060                                  int& exception_offset,
1061                                  OopMapSet*oop_maps,
1062                                  int& frame_complete,
1063                                  int& stack_slots,
1064                                  int& interpreted_entry_offset,
1065                                  int& compiled_entry_offset) {
1066   //verify_oop_args(masm, method, sig_bt, regs);
1067   Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1068 
1069   address start = __ pc();
1070 
1071   Label call_thaw, exit;
1072 
1073   // i2i entry used at interp_only_mode only
1074   interpreted_entry_offset = __ pc() - start;
1075   {
1076 
1077 #ifdef ASSERT
1078     Label is_interp_only;
1079     __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1080     __ cbnzw(rscratch1, is_interp_only);
1081     __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1082     __ bind(is_interp_only);
1083 #endif
1084 
1085     // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1086     __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1087     __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1088     __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1089     __ push_cont_fastpath(rthread);
1090 
1091     __ enter();
1092     stack_slots = 2; // will be adjusted in setup
1093     OopMap* map = continuation_enter_setup(masm, stack_slots);
1094     // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1095     // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1096 
1097     fill_continuation_entry(masm);
1098 
1099     __ cbnz(c_rarg2, call_thaw);
1100 
1101     const address tr_call = __ trampoline_call(resolve);
1102     if (tr_call == nullptr) {
1103       fatal("CodeCache is full at gen_continuation_enter");
1104     }
1105 
1106     oop_maps->add_gc_map(__ pc() - start, map);
1107     __ post_call_nop();
1108 
1109     __ b(exit);
1110 
1111     address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1112     if (stub == nullptr) {
1113       fatal("CodeCache is full at gen_continuation_enter");
1114     }
1115   }
1116 
1117   // compiled entry
1118   __ align(CodeEntryAlignment);
1119   compiled_entry_offset = __ pc() - start;
1120 
1121   __ enter();
1122   stack_slots = 2; // will be adjusted in setup
1123   OopMap* map = continuation_enter_setup(masm, stack_slots);
1124   frame_complete = __ pc() - start;
1125 
1126   fill_continuation_entry(masm);
1127 
1128   __ cbnz(c_rarg2, call_thaw);
1129 
1130   const address tr_call = __ trampoline_call(resolve);
1131   if (tr_call == nullptr) {
1132     fatal("CodeCache is full at gen_continuation_enter");
1133   }
1134 
1135   oop_maps->add_gc_map(__ pc() - start, map);
1136   __ post_call_nop();
1137 
1138   __ b(exit);
1139 
1140   __ bind(call_thaw);
1141 
1142   ContinuationEntry::_thaw_call_pc_offset = __ pc() - start;
1143   __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1144   oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1145   ContinuationEntry::_return_pc_offset = __ pc() - start;
1146   __ post_call_nop();
1147 
1148   __ bind(exit);
1149   continuation_enter_cleanup(masm);
1150   __ leave();
1151   __ ret(lr);
1152 
1153   /// exception handling
1154 
1155   exception_offset = __ pc() - start;
1156   {
1157       __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1158 
1159       continuation_enter_cleanup(masm);
1160 
1161       __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1162       __ authenticate_return_address(c_rarg1);
1163       __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1164 
1165       // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1166 
1167       __ mov(r1, r0); // the exception handler
1168       __ mov(r0, r19); // restore return value contaning the exception oop
1169       __ verify_oop(r0);
1170 
1171       __ leave();
1172       __ mov(r3, lr);
1173       __ br(r1); // the exception handler
1174   }
1175 
1176   address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1177   if (stub == nullptr) {
1178     fatal("CodeCache is full at gen_continuation_enter");
1179   }
1180 }
1181 
1182 static void gen_continuation_yield(MacroAssembler* masm,
1183                                    const methodHandle& method,
1184                                    const BasicType* sig_bt,
1185                                    const VMRegPair* regs,
1186                                    OopMapSet* oop_maps,
1187                                    int& frame_complete,
1188                                    int& stack_slots,
1189                                    int& compiled_entry_offset) {
1190     enum layout {
1191       rfp_off1,
1192       rfp_off2,
1193       lr_off,
1194       lr_off2,
1195       framesize // inclusive of return address
1196     };
1197     // assert(is_even(framesize/2), "sp not 16-byte aligned");
1198     stack_slots = framesize /  VMRegImpl::slots_per_word;
1199     assert(stack_slots == 2, "recheck layout");
1200 
1201     address start = __ pc();
1202 
1203     compiled_entry_offset = __ pc() - start;
1204     __ enter();
1205 
1206     __ mov(c_rarg1, sp);
1207 
1208     frame_complete = __ pc() - start;
1209     address the_pc = __ pc();
1210 
1211     __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1212 
1213     __ mov(c_rarg0, rthread);
1214     __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1215     __ call_VM_leaf(Continuation::freeze_entry(), 2);
1216     __ reset_last_Java_frame(true);
1217 
1218     Label pinned;
1219 
1220     __ cbnz(r0, pinned);
1221 
1222     // We've succeeded, set sp to the ContinuationEntry
1223     __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1224     __ mov(sp, rscratch1);
1225     continuation_enter_cleanup(masm);
1226 
1227     __ bind(pinned); // pinned -- return to caller
1228 
1229     // handle pending exception thrown by freeze
1230     __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1231     Label ok;
1232     __ cbz(rscratch1, ok);
1233     __ leave();
1234     __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry()));
1235     __ br(rscratch1);
1236     __ bind(ok);
1237 
1238     __ leave();
1239     __ ret(lr);
1240 
1241     OopMap* map = new OopMap(framesize, 1);
1242     oop_maps->add_gc_map(the_pc - start, map);
1243 }
1244 
1245 void SharedRuntime::continuation_enter_cleanup(MacroAssembler* masm) {
1246   ::continuation_enter_cleanup(masm);
1247 }
1248 
1249 static void gen_special_dispatch(MacroAssembler* masm,
1250                                  const methodHandle& method,
1251                                  const BasicType* sig_bt,
1252                                  const VMRegPair* regs) {
1253   verify_oop_args(masm, method, sig_bt, regs);
1254   vmIntrinsics::ID iid = method->intrinsic_id();
1255 
1256   // Now write the args into the outgoing interpreter space
1257   bool     has_receiver   = false;
1258   Register receiver_reg   = noreg;
1259   int      member_arg_pos = -1;
1260   Register member_reg     = noreg;
1261   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1262   if (ref_kind != 0) {
1263     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1264     member_reg = r19;  // known to be free at this point
1265     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1266   } else if (iid == vmIntrinsics::_invokeBasic) {
1267     has_receiver = true;
1268   } else if (iid == vmIntrinsics::_linkToNative) {
1269     member_arg_pos = method->size_of_parameters() - 1;  // trailing NativeEntryPoint argument
1270     member_reg = r19;  // known to be free at this point
1271   } else {
1272     fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1273   }
1274 
1275   if (member_reg != noreg) {
1276     // Load the member_arg into register, if necessary.
1277     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1278     VMReg r = regs[member_arg_pos].first();
1279     if (r->is_stack()) {
1280       __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1281     } else {
1282       // no data motion is needed
1283       member_reg = r->as_Register();
1284     }
1285   }
1286 
1287   if (has_receiver) {
1288     // Make sure the receiver is loaded into a register.
1289     assert(method->size_of_parameters() > 0, "oob");
1290     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1291     VMReg r = regs[0].first();
1292     assert(r->is_valid(), "bad receiver arg");
1293     if (r->is_stack()) {
1294       // Porting note:  This assumes that compiled calling conventions always
1295       // pass the receiver oop in a register.  If this is not true on some
1296       // platform, pick a temp and load the receiver from stack.
1297       fatal("receiver always in a register");
1298       receiver_reg = r2;  // known to be free at this point
1299       __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1300     } else {
1301       // no data motion is needed
1302       receiver_reg = r->as_Register();
1303     }
1304   }
1305 
1306   // Figure out which address we are really jumping to:
1307   MethodHandles::generate_method_handle_dispatch(masm, iid,
1308                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1309 }
1310 
1311 // ---------------------------------------------------------------------------
1312 // Generate a native wrapper for a given method.  The method takes arguments
1313 // in the Java compiled code convention, marshals them to the native
1314 // convention (handlizes oops, etc), transitions to native, makes the call,
1315 // returns to java state (possibly blocking), unhandlizes any result and
1316 // returns.
1317 //
1318 // Critical native functions are a shorthand for the use of
1319 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1320 // functions.  The wrapper is expected to unpack the arguments before
1321 // passing them to the callee. Critical native functions leave the state _in_Java,
1322 // since they block out GC.
1323 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1324 // block and the check for pending exceptions it's impossible for them
1325 // to be thrown.
1326 //
1327 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1328                                                 const methodHandle& method,
1329                                                 int compile_id,
1330                                                 BasicType* in_sig_bt,
1331                                                 VMRegPair* in_regs,
1332                                                 BasicType ret_type) {
1333   if (method->is_continuation_native_intrinsic()) {
1334     int exception_offset = -1;
1335     OopMapSet* oop_maps = new OopMapSet();
1336     int frame_complete = -1;
1337     int stack_slots = -1;
1338     int interpreted_entry_offset = -1;
1339     int vep_offset = -1;
1340     if (method->is_continuation_enter_intrinsic()) {
1341       gen_continuation_enter(masm,
1342                              method,
1343                              in_sig_bt,
1344                              in_regs,
1345                              exception_offset,
1346                              oop_maps,
1347                              frame_complete,
1348                              stack_slots,
1349                              interpreted_entry_offset,
1350                              vep_offset);
1351     } else if (method->is_continuation_yield_intrinsic()) {
1352       gen_continuation_yield(masm,
1353                              method,
1354                              in_sig_bt,
1355                              in_regs,
1356                              oop_maps,
1357                              frame_complete,
1358                              stack_slots,
1359                              vep_offset);
1360     } else {
1361       guarantee(false, "Unknown Continuation native intrinsic");
1362     }
1363 
1364 #ifdef ASSERT
1365     if (method->is_continuation_enter_intrinsic()) {
1366       assert(interpreted_entry_offset != -1, "Must be set");
1367       assert(exception_offset != -1,         "Must be set");
1368     } else {
1369       assert(interpreted_entry_offset == -1, "Must be unset");
1370       assert(exception_offset == -1,         "Must be unset");
1371     }
1372     assert(frame_complete != -1,    "Must be set");
1373     assert(stack_slots != -1,       "Must be set");
1374     assert(vep_offset != -1,        "Must be set");
1375 #endif
1376 
1377     __ flush();
1378     nmethod* nm = nmethod::new_native_nmethod(method,
1379                                               compile_id,
1380                                               masm->code(),
1381                                               vep_offset,
1382                                               frame_complete,
1383                                               stack_slots,
1384                                               in_ByteSize(-1),
1385                                               in_ByteSize(-1),
1386                                               oop_maps,
1387                                               exception_offset);
1388     if (nm == nullptr) return nm;
1389     if (method->is_continuation_enter_intrinsic()) {
1390       ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1391     } else if (method->is_continuation_yield_intrinsic()) {
1392       _cont_doYield_stub = nm;
1393     } else {
1394       guarantee(false, "Unknown Continuation native intrinsic");
1395     }
1396     return nm;
1397   }
1398 
1399   if (method->is_method_handle_intrinsic()) {
1400     vmIntrinsics::ID iid = method->intrinsic_id();
1401     intptr_t start = (intptr_t)__ pc();
1402     int vep_offset = ((intptr_t)__ pc()) - start;
1403 
1404     // First instruction must be a nop as it may need to be patched on deoptimisation
1405     __ nop();
1406     gen_special_dispatch(masm,
1407                          method,
1408                          in_sig_bt,
1409                          in_regs);
1410     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1411     __ flush();
1412     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1413     return nmethod::new_native_nmethod(method,
1414                                        compile_id,
1415                                        masm->code(),
1416                                        vep_offset,
1417                                        frame_complete,
1418                                        stack_slots / VMRegImpl::slots_per_word,
1419                                        in_ByteSize(-1),
1420                                        in_ByteSize(-1),
1421                                        nullptr);
1422   }
1423   address native_func = method->native_function();
1424   assert(native_func != nullptr, "must have function");
1425 
1426   // An OopMap for lock (and class if static)
1427   OopMapSet *oop_maps = new OopMapSet();
1428   intptr_t start = (intptr_t)__ pc();
1429 
1430   // We have received a description of where all the java arg are located
1431   // on entry to the wrapper. We need to convert these args to where
1432   // the jni function will expect them. To figure out where they go
1433   // we convert the java signature to a C signature by inserting
1434   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1435 
1436   const int total_in_args = method->size_of_parameters();
1437   int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1438 
1439   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1440   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1441   BasicType* in_elem_bt = nullptr;
1442 
1443   int argc = 0;
1444   out_sig_bt[argc++] = T_ADDRESS;
1445   if (method->is_static()) {
1446     out_sig_bt[argc++] = T_OBJECT;
1447   }
1448 
1449   for (int i = 0; i < total_in_args ; i++ ) {
1450     out_sig_bt[argc++] = in_sig_bt[i];
1451   }
1452 
1453   // Now figure out where the args must be stored and how much stack space
1454   // they require.
1455   int out_arg_slots;
1456   out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
1457 
1458   if (out_arg_slots < 0) {
1459     return nullptr;
1460   }
1461 
1462   // Compute framesize for the wrapper.  We need to handlize all oops in
1463   // incoming registers
1464 
1465   // Calculate the total number of stack slots we will need.
1466 
1467   // First count the abi requirement plus all of the outgoing args
1468   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1469 
1470   // Now the space for the inbound oop handle area
1471   int total_save_slots = 8 * VMRegImpl::slots_per_word;  // 8 arguments passed in registers
1472 
1473   int oop_handle_offset = stack_slots;
1474   stack_slots += total_save_slots;
1475 
1476   // Now any space we need for handlizing a klass if static method
1477 
1478   int klass_slot_offset = 0;
1479   int klass_offset = -1;
1480   int lock_slot_offset = 0;
1481   bool is_static = false;
1482 
1483   if (method->is_static()) {
1484     klass_slot_offset = stack_slots;
1485     stack_slots += VMRegImpl::slots_per_word;
1486     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1487     is_static = true;
1488   }
1489 
1490   // Plus a lock if needed
1491 
1492   if (method->is_synchronized()) {
1493     lock_slot_offset = stack_slots;
1494     stack_slots += VMRegImpl::slots_per_word;
1495   }
1496 
1497   // Now a place (+2) to save return values or temp during shuffling
1498   // + 4 for return address (which we own) and saved rfp
1499   stack_slots += 6;
1500 
1501   // Ok The space we have allocated will look like:
1502   //
1503   //
1504   // FP-> |                     |
1505   //      |---------------------|
1506   //      | 2 slots for moves   |
1507   //      |---------------------|
1508   //      | lock box (if sync)  |
1509   //      |---------------------| <- lock_slot_offset
1510   //      | klass (if static)   |
1511   //      |---------------------| <- klass_slot_offset
1512   //      | oopHandle area      |
1513   //      |---------------------| <- oop_handle_offset (8 java arg registers)
1514   //      | outbound memory     |
1515   //      | based arguments     |
1516   //      |                     |
1517   //      |---------------------|
1518   //      |                     |
1519   // SP-> | out_preserved_slots |
1520   //
1521   //
1522 
1523 
1524   // Now compute actual number of stack words we need rounding to make
1525   // stack properly aligned.
1526   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1527 
1528   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1529 
1530   // First thing make an ic check to see if we should even be here
1531 
1532   // We are free to use all registers as temps without saving them and
1533   // restoring them except rfp. rfp is the only callee save register
1534   // as far as the interpreter and the compiler(s) are concerned.
1535 
1536   const Register receiver = j_rarg0;
1537 
1538   Label exception_pending;
1539 
1540   assert_different_registers(receiver, rscratch1);
1541   __ verify_oop(receiver);
1542   __ ic_check(8 /* end_alignment */);
1543 
1544   // Verified entry point must be aligned
1545   int vep_offset = ((intptr_t)__ pc()) - start;
1546 
1547   // If we have to make this method not-entrant we'll overwrite its
1548   // first instruction with a jump.  For this action to be legal we
1549   // must ensure that this first instruction is a B, BL, NOP, BKPT,
1550   // SVC, HVC, or SMC.  Make it a NOP.
1551   __ nop();
1552 
1553   if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1554     Label L_skip_barrier;
1555     __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1556     __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1557     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1558 
1559     __ bind(L_skip_barrier);
1560   }
1561 
1562   // Generate stack overflow check
1563   __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1564 
1565   // Generate a new frame for the wrapper.
1566   __ enter();
1567   // -2 because return address is already present and so is saved rfp
1568   __ sub(sp, sp, stack_size - 2*wordSize);
1569 
1570   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1571   bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1572 
1573   // Frame is now completed as far as size and linkage.
1574   int frame_complete = ((intptr_t)__ pc()) - start;
1575 
1576   // We use r20 as the oop handle for the receiver/klass
1577   // It is callee save so it survives the call to native
1578 
1579   const Register oop_handle_reg = r20;
1580 
1581   //
1582   // We immediately shuffle the arguments so that any vm call we have to
1583   // make from here on out (sync slow path, jvmti, etc.) we will have
1584   // captured the oops from our caller and have a valid oopMap for
1585   // them.
1586 
1587   // -----------------
1588   // The Grand Shuffle
1589 
1590   // The Java calling convention is either equal (linux) or denser (win64) than the
1591   // c calling convention. However the because of the jni_env argument the c calling
1592   // convention always has at least one more (and two for static) arguments than Java.
1593   // Therefore if we move the args from java -> c backwards then we will never have
1594   // a register->register conflict and we don't have to build a dependency graph
1595   // and figure out how to break any cycles.
1596   //
1597 
1598   // Record esp-based slot for receiver on stack for non-static methods
1599   int receiver_offset = -1;
1600 
1601   // This is a trick. We double the stack slots so we can claim
1602   // the oops in the caller's frame. Since we are sure to have
1603   // more args than the caller doubling is enough to make
1604   // sure we can capture all the incoming oop args from the
1605   // caller.
1606   //
1607   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1608 
1609   // Mark location of rfp (someday)
1610   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1611 
1612 
1613   int float_args = 0;
1614   int int_args = 0;
1615 
1616 #ifdef ASSERT
1617   bool reg_destroyed[Register::number_of_registers];
1618   bool freg_destroyed[FloatRegister::number_of_registers];
1619   for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1620     reg_destroyed[r] = false;
1621   }
1622   for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1623     freg_destroyed[f] = false;
1624   }
1625 
1626 #endif /* ASSERT */
1627 
1628   // For JNI natives the incoming and outgoing registers are offset upwards.
1629   GrowableArray<int> arg_order(2 * total_in_args);
1630   VMRegPair tmp_vmreg;
1631   tmp_vmreg.set2(r19->as_VMReg());
1632 
1633   for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1634     arg_order.push(i);
1635     arg_order.push(c_arg);
1636   }
1637 
1638   int temploc = -1;
1639   for (int ai = 0; ai < arg_order.length(); ai += 2) {
1640     int i = arg_order.at(ai);
1641     int c_arg = arg_order.at(ai + 1);
1642     __ block_comment(err_msg("move %d -> %d", i, c_arg));
1643     assert(c_arg != -1 && i != -1, "wrong order");
1644 #ifdef ASSERT
1645     if (in_regs[i].first()->is_Register()) {
1646       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1647     } else if (in_regs[i].first()->is_FloatRegister()) {
1648       assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1649     }
1650     if (out_regs[c_arg].first()->is_Register()) {
1651       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1652     } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1653       freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1654     }
1655 #endif /* ASSERT */
1656     switch (in_sig_bt[i]) {
1657       case T_ARRAY:
1658       case T_OBJECT:
1659         __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1660                        ((i == 0) && (!is_static)),
1661                        &receiver_offset);
1662         int_args++;
1663         break;
1664       case T_VOID:
1665         break;
1666 
1667       case T_FLOAT:
1668         __ float_move(in_regs[i], out_regs[c_arg]);
1669         float_args++;
1670         break;
1671 
1672       case T_DOUBLE:
1673         assert( i + 1 < total_in_args &&
1674                 in_sig_bt[i + 1] == T_VOID &&
1675                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1676         __ double_move(in_regs[i], out_regs[c_arg]);
1677         float_args++;
1678         break;
1679 
1680       case T_LONG :
1681         __ long_move(in_regs[i], out_regs[c_arg]);
1682         int_args++;
1683         break;
1684 
1685       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1686 
1687       default:
1688         __ move32_64(in_regs[i], out_regs[c_arg]);
1689         int_args++;
1690     }
1691   }
1692 
1693   // point c_arg at the first arg that is already loaded in case we
1694   // need to spill before we call out
1695   int c_arg = total_c_args - total_in_args;
1696 
1697   // Pre-load a static method's oop into c_rarg1.
1698   if (method->is_static()) {
1699 
1700     //  load oop into a register
1701     __ movoop(c_rarg1,
1702               JNIHandles::make_local(method->method_holder()->java_mirror()));
1703 
1704     // Now handlize the static class mirror it's known not-null.
1705     __ str(c_rarg1, Address(sp, klass_offset));
1706     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1707 
1708     // Now get the handle
1709     __ lea(c_rarg1, Address(sp, klass_offset));
1710     // and protect the arg if we must spill
1711     c_arg--;
1712   }
1713 
1714   // Change state to native (we save the return address in the thread, since it might not
1715   // be pushed on the stack when we do a stack traversal).
1716   // We use the same pc/oopMap repeatedly when we call out
1717 
1718   Label native_return;
1719   __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1720 
1721   Label dtrace_method_entry, dtrace_method_entry_done;
1722   {
1723     uint64_t offset;
1724     __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1725     __ ldrb(rscratch1, Address(rscratch1, offset));
1726     __ cbnzw(rscratch1, dtrace_method_entry);
1727     __ bind(dtrace_method_entry_done);
1728   }
1729 
1730   // RedefineClasses() tracing support for obsolete method entry
1731   if (log_is_enabled(Trace, redefine, class, obsolete)) {
1732     // protect the args we've loaded
1733     save_args(masm, total_c_args, c_arg, out_regs);
1734     __ mov_metadata(c_rarg1, method());
1735     __ call_VM_leaf(
1736       CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1737       rthread, c_rarg1);
1738     restore_args(masm, total_c_args, c_arg, out_regs);
1739   }
1740 
1741   // Lock a synchronized method
1742 
1743   // Register definitions used by locking and unlocking
1744 
1745   const Register swap_reg = r0;
1746   const Register obj_reg  = r19;  // Will contain the oop
1747   const Register lock_reg = r13;  // Address of compiler lock object (BasicLock)
1748   const Register old_hdr  = r13;  // value of old header at unlock time
1749   const Register lock_tmp = r14;  // Temporary used by lightweight_lock/unlock
1750   const Register tmp = lr;
1751 
1752   Label slow_path_lock;
1753   Label lock_done;
1754 
1755   if (method->is_synchronized()) {
1756     Label count;
1757     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1758 
1759     // Get the handle (the 2nd argument)
1760     __ mov(oop_handle_reg, c_rarg1);
1761 
1762     // Get address of the box
1763 
1764     __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1765 
1766     // Load the oop from the handle
1767     __ ldr(obj_reg, Address(oop_handle_reg, 0));
1768 
1769     if (LockingMode == LM_MONITOR) {
1770       __ b(slow_path_lock);
1771     } else if (LockingMode == LM_LEGACY) {
1772       // Load (object->mark() | 1) into swap_reg %r0
1773       __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1774       __ orr(swap_reg, rscratch1, 1);
1775 
1776       // Save (object->mark() | 1) into BasicLock's displaced header
1777       __ str(swap_reg, Address(lock_reg, mark_word_offset));
1778 
1779       // src -> dest iff dest == r0 else r0 <- dest
1780       __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/nullptr);
1781 
1782       // Hmm should this move to the slow path code area???
1783 
1784       // Test if the oopMark is an obvious stack pointer, i.e.,
1785       //  1) (mark & 3) == 0, and
1786       //  2) sp <= mark < mark + os::pagesize()
1787       // These 3 tests can be done by evaluating the following
1788       // expression: ((mark - sp) & (3 - os::vm_page_size())),
1789       // assuming both stack pointer and pagesize have their
1790       // least significant 2 bits clear.
1791       // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
1792 
1793       __ sub(swap_reg, sp, swap_reg);
1794       __ neg(swap_reg, swap_reg);
1795       __ ands(swap_reg, swap_reg, 3 - (int)os::vm_page_size());
1796 
1797       // Save the test result, for recursive case, the result is zero
1798       __ str(swap_reg, Address(lock_reg, mark_word_offset));
1799       __ br(Assembler::NE, slow_path_lock);
1800       __ b(lock_done);
1801     } else {
1802       assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1803       __ lightweight_lock(obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
1804       __ b(lock_done);
1805     }
1806     __ bind(count);
1807     __ inc_held_monitor_count();
1808 
1809     // Slow path will re-enter here
1810     __ bind(lock_done);
1811   }
1812 
1813 
1814   // Finally just about ready to make the JNI call
1815 
1816   // get JNIEnv* which is first argument to native
1817   __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
1818 
1819   // Now set thread in native
1820   __ mov(rscratch1, _thread_in_native);
1821   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1822   __ stlrw(rscratch1, rscratch2);
1823 
1824   __ rt_call(native_func);
1825 
1826   __ bind(native_return);
1827 
1828   intptr_t return_pc = (intptr_t) __ pc();
1829   oop_maps->add_gc_map(return_pc - start, map);
1830 
1831   // Verify or restore cpu control state after JNI call
1832   __ restore_cpu_control_state_after_jni(rscratch1, rscratch2);
1833 
1834   // Unpack native results.
1835   switch (ret_type) {
1836   case T_BOOLEAN: __ c2bool(r0);                     break;
1837   case T_CHAR   : __ ubfx(r0, r0, 0, 16);            break;
1838   case T_BYTE   : __ sbfx(r0, r0, 0, 8);             break;
1839   case T_SHORT  : __ sbfx(r0, r0, 0, 16);            break;
1840   case T_INT    : __ sbfx(r0, r0, 0, 32);            break;
1841   case T_DOUBLE :
1842   case T_FLOAT  :
1843     // Result is in v0 we'll save as needed
1844     break;
1845   case T_ARRAY:                 // Really a handle
1846   case T_OBJECT:                // Really a handle
1847       break; // can't de-handlize until after safepoint check
1848   case T_VOID: break;
1849   case T_LONG: break;
1850   default       : ShouldNotReachHere();
1851   }
1852 
1853   Label safepoint_in_progress, safepoint_in_progress_done;
1854   Label after_transition;
1855 
1856   // Switch thread to "native transition" state before reading the synchronization state.
1857   // This additional state is necessary because reading and testing the synchronization
1858   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1859   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1860   //     VM thread changes sync state to synchronizing and suspends threads for GC.
1861   //     Thread A is resumed to finish this native method, but doesn't block here since it
1862   //     didn't see any synchronization is progress, and escapes.
1863   __ mov(rscratch1, _thread_in_native_trans);
1864 
1865   __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
1866 
1867   // Force this write out before the read below
1868   if (!UseSystemMemoryBarrier) {
1869     __ dmb(Assembler::ISH);
1870   }
1871 
1872   __ verify_sve_vector_length();
1873 
1874   // Check for safepoint operation in progress and/or pending suspend requests.
1875   {
1876     // We need an acquire here to ensure that any subsequent load of the
1877     // global SafepointSynchronize::_state flag is ordered after this load
1878     // of the thread-local polling word.  We don't want this poll to
1879     // return false (i.e. not safepointing) and a later poll of the global
1880     // SafepointSynchronize::_state spuriously to return true.
1881     //
1882     // This is to avoid a race when we're in a native->Java transition
1883     // racing the code which wakes up from a safepoint.
1884 
1885     __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
1886     __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1887     __ cbnzw(rscratch1, safepoint_in_progress);
1888     __ bind(safepoint_in_progress_done);
1889   }
1890 
1891   // change thread state
1892   __ mov(rscratch1, _thread_in_Java);
1893   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1894   __ stlrw(rscratch1, rscratch2);
1895   __ bind(after_transition);
1896 
1897   Label reguard;
1898   Label reguard_done;
1899   __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
1900   __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
1901   __ br(Assembler::EQ, reguard);
1902   __ bind(reguard_done);
1903 
1904   // native result if any is live
1905 
1906   // Unlock
1907   Label unlock_done;
1908   Label slow_path_unlock;
1909   if (method->is_synchronized()) {
1910 
1911     // Get locked oop from the handle we passed to jni
1912     __ ldr(obj_reg, Address(oop_handle_reg, 0));
1913 
1914     Label done, not_recursive;
1915 
1916     if (LockingMode == LM_LEGACY) {
1917       // Simple recursive lock?
1918       __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1919       __ cbnz(rscratch1, not_recursive);
1920       __ b(done);
1921     }
1922 
1923     __ bind(not_recursive);
1924 
1925     // Must save r0 if if it is live now because cmpxchg must use it
1926     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1927       save_native_result(masm, ret_type, stack_slots);
1928     }
1929 
1930     if (LockingMode == LM_MONITOR) {
1931       __ b(slow_path_unlock);
1932     } else if (LockingMode == LM_LEGACY) {
1933       // get address of the stack lock
1934       __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1935       //  get old displaced header
1936       __ ldr(old_hdr, Address(r0, 0));
1937 
1938       // Atomic swap old header if oop still contains the stack lock
1939       Label count;
1940       __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock);
1941       __ bind(count);
1942       __ dec_held_monitor_count();
1943     } else {
1944       assert(LockingMode == LM_LIGHTWEIGHT, "");
1945       __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
1946     }
1947 
1948     // slow path re-enters here
1949     __ bind(unlock_done);
1950     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1951       restore_native_result(masm, ret_type, stack_slots);
1952     }
1953 
1954     __ bind(done);
1955   }
1956 
1957   Label dtrace_method_exit, dtrace_method_exit_done;
1958   {
1959     uint64_t offset;
1960     __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1961     __ ldrb(rscratch1, Address(rscratch1, offset));
1962     __ cbnzw(rscratch1, dtrace_method_exit);
1963     __ bind(dtrace_method_exit_done);
1964   }
1965 
1966   __ reset_last_Java_frame(false);
1967 
1968   // Unbox oop result, e.g. JNIHandles::resolve result.
1969   if (is_reference_type(ret_type)) {
1970     __ resolve_jobject(r0, r1, r2);
1971   }
1972 
1973   if (CheckJNICalls) {
1974     // clear_pending_jni_exception_check
1975     __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
1976   }
1977 
1978   // reset handle block
1979   __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
1980   __ str(zr, Address(r2, JNIHandleBlock::top_offset()));
1981 
1982   __ leave();
1983 
1984   // Any exception pending?
1985   __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1986   __ cbnz(rscratch1, exception_pending);
1987 
1988   // We're done
1989   __ ret(lr);
1990 
1991   // Unexpected paths are out of line and go here
1992 
1993   // forward the exception
1994   __ bind(exception_pending);
1995 
1996   // and forward the exception
1997   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1998 
1999   // Slow path locking & unlocking
2000   if (method->is_synchronized()) {
2001 
2002     __ block_comment("Slow path lock {");
2003     __ bind(slow_path_lock);
2004 
2005     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2006     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2007 
2008     // protect the args we've loaded
2009     save_args(masm, total_c_args, c_arg, out_regs);
2010 
2011     __ mov(c_rarg0, obj_reg);
2012     __ mov(c_rarg1, lock_reg);
2013     __ mov(c_rarg2, rthread);
2014 
2015     // Not a leaf but we have last_Java_frame setup as we want
2016     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2017     restore_args(masm, total_c_args, c_arg, out_regs);
2018 
2019 #ifdef ASSERT
2020     { Label L;
2021       __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2022       __ cbz(rscratch1, L);
2023       __ stop("no pending exception allowed on exit from monitorenter");
2024       __ bind(L);
2025     }
2026 #endif
2027     __ b(lock_done);
2028 
2029     __ block_comment("} Slow path lock");
2030 
2031     __ block_comment("Slow path unlock {");
2032     __ bind(slow_path_unlock);
2033 
2034     // If we haven't already saved the native result we must save it now as xmm registers
2035     // are still exposed.
2036 
2037     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2038       save_native_result(masm, ret_type, stack_slots);
2039     }
2040 
2041     __ mov(c_rarg2, rthread);
2042     __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2043     __ mov(c_rarg0, obj_reg);
2044 
2045     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2046     // NOTE that obj_reg == r19 currently
2047     __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2048     __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2049 
2050     __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2051 
2052 #ifdef ASSERT
2053     {
2054       Label L;
2055       __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2056       __ cbz(rscratch1, L);
2057       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2058       __ bind(L);
2059     }
2060 #endif /* ASSERT */
2061 
2062     __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2063 
2064     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2065       restore_native_result(masm, ret_type, stack_slots);
2066     }
2067     __ b(unlock_done);
2068 
2069     __ block_comment("} Slow path unlock");
2070 
2071   } // synchronized
2072 
2073   // SLOW PATH Reguard the stack if needed
2074 
2075   __ bind(reguard);
2076   save_native_result(masm, ret_type, stack_slots);
2077   __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2078   restore_native_result(masm, ret_type, stack_slots);
2079   // and continue
2080   __ b(reguard_done);
2081 
2082   // SLOW PATH safepoint
2083   {
2084     __ block_comment("safepoint {");
2085     __ bind(safepoint_in_progress);
2086 
2087     // Don't use call_VM as it will see a possible pending exception and forward it
2088     // and never return here preventing us from clearing _last_native_pc down below.
2089     //
2090     save_native_result(masm, ret_type, stack_slots);
2091     __ mov(c_rarg0, rthread);
2092 #ifndef PRODUCT
2093   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2094 #endif
2095     __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2096     __ blr(rscratch1);
2097 
2098     // Restore any method result value
2099     restore_native_result(masm, ret_type, stack_slots);
2100 
2101     __ b(safepoint_in_progress_done);
2102     __ block_comment("} safepoint");
2103   }
2104 
2105   // SLOW PATH dtrace support
2106   {
2107     __ block_comment("dtrace entry {");
2108     __ bind(dtrace_method_entry);
2109 
2110     // We have all of the arguments setup at this point. We must not touch any register
2111     // argument registers at this point (what if we save/restore them there are no oop?
2112 
2113     save_args(masm, total_c_args, c_arg, out_regs);
2114     __ mov_metadata(c_rarg1, method());
2115     __ call_VM_leaf(
2116       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2117       rthread, c_rarg1);
2118     restore_args(masm, total_c_args, c_arg, out_regs);
2119     __ b(dtrace_method_entry_done);
2120     __ block_comment("} dtrace entry");
2121   }
2122 
2123   {
2124     __ block_comment("dtrace exit {");
2125     __ bind(dtrace_method_exit);
2126     save_native_result(masm, ret_type, stack_slots);
2127     __ mov_metadata(c_rarg1, method());
2128     __ call_VM_leaf(
2129          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2130          rthread, c_rarg1);
2131     restore_native_result(masm, ret_type, stack_slots);
2132     __ b(dtrace_method_exit_done);
2133     __ block_comment("} dtrace exit");
2134   }
2135 
2136 
2137   __ flush();
2138 
2139   nmethod *nm = nmethod::new_native_nmethod(method,
2140                                             compile_id,
2141                                             masm->code(),
2142                                             vep_offset,
2143                                             frame_complete,
2144                                             stack_slots / VMRegImpl::slots_per_word,
2145                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2146                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2147                                             oop_maps);
2148 
2149   return nm;
2150 }
2151 
2152 // this function returns the adjust size (in number of words) to a c2i adapter
2153 // activation for use during deoptimization
2154 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2155   assert(callee_locals >= callee_parameters,
2156           "test and remove; got more parms than locals");
2157   if (callee_locals < callee_parameters)
2158     return 0;                   // No adjustment for negative locals
2159   int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2160   // diff is counted in stack words
2161   return align_up(diff, 2);
2162 }
2163 
2164 
2165 //------------------------------generate_deopt_blob----------------------------
2166 void SharedRuntime::generate_deopt_blob() {
2167   // Allocate space for the code
2168   ResourceMark rm;
2169   // Setup code generation tools
2170   int pad = 0;
2171 #if INCLUDE_JVMCI
2172   if (EnableJVMCI) {
2173     pad += 512; // Increase the buffer size when compiling for JVMCI
2174   }
2175 #endif
2176   CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2177   MacroAssembler* masm = new MacroAssembler(&buffer);
2178   int frame_size_in_words;
2179   OopMap* map = nullptr;
2180   OopMapSet *oop_maps = new OopMapSet();
2181   RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2182 
2183   // -------------
2184   // This code enters when returning to a de-optimized nmethod.  A return
2185   // address has been pushed on the stack, and return values are in
2186   // registers.
2187   // If we are doing a normal deopt then we were called from the patched
2188   // nmethod from the point we returned to the nmethod. So the return
2189   // address on the stack is wrong by NativeCall::instruction_size
2190   // We will adjust the value so it looks like we have the original return
2191   // address on the stack (like when we eagerly deoptimized).
2192   // In the case of an exception pending when deoptimizing, we enter
2193   // with a return address on the stack that points after the call we patched
2194   // into the exception handler. We have the following register state from,
2195   // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2196   //    r0: exception oop
2197   //    r19: exception handler
2198   //    r3: throwing pc
2199   // So in this case we simply jam r3 into the useless return address and
2200   // the stack looks just like we want.
2201   //
2202   // At this point we need to de-opt.  We save the argument return
2203   // registers.  We call the first C routine, fetch_unroll_info().  This
2204   // routine captures the return values and returns a structure which
2205   // describes the current frame size and the sizes of all replacement frames.
2206   // The current frame is compiled code and may contain many inlined
2207   // functions, each with their own JVM state.  We pop the current frame, then
2208   // push all the new frames.  Then we call the C routine unpack_frames() to
2209   // populate these frames.  Finally unpack_frames() returns us the new target
2210   // address.  Notice that callee-save registers are BLOWN here; they have
2211   // already been captured in the vframeArray at the time the return PC was
2212   // patched.
2213   address start = __ pc();
2214   Label cont;
2215 
2216   // Prolog for non exception case!
2217 
2218   // Save everything in sight.
2219   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2220 
2221   // Normal deoptimization.  Save exec mode for unpack_frames.
2222   __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2223   __ b(cont);
2224 
2225   int reexecute_offset = __ pc() - start;
2226 #if INCLUDE_JVMCI && !defined(COMPILER1)
2227   if (EnableJVMCI && UseJVMCICompiler) {
2228     // JVMCI does not use this kind of deoptimization
2229     __ should_not_reach_here();
2230   }
2231 #endif
2232 
2233   // Reexecute case
2234   // return address is the pc describes what bci to do re-execute at
2235 
2236   // No need to update map as each call to save_live_registers will produce identical oopmap
2237   (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2238 
2239   __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2240   __ b(cont);
2241 
2242 #if INCLUDE_JVMCI
2243   Label after_fetch_unroll_info_call;
2244   int implicit_exception_uncommon_trap_offset = 0;
2245   int uncommon_trap_offset = 0;
2246 
2247   if (EnableJVMCI) {
2248     implicit_exception_uncommon_trap_offset = __ pc() - start;
2249 
2250     __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2251     __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2252 
2253     uncommon_trap_offset = __ pc() - start;
2254 
2255     // Save everything in sight.
2256     reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2257     // fetch_unroll_info needs to call last_java_frame()
2258     Label retaddr;
2259     __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2260 
2261     __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2262     __ movw(rscratch1, -1);
2263     __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2264 
2265     __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2266     __ mov(c_rarg0, rthread);
2267     __ movw(c_rarg2, rcpool); // exec mode
2268     __ lea(rscratch1,
2269            RuntimeAddress(CAST_FROM_FN_PTR(address,
2270                                            Deoptimization::uncommon_trap)));
2271     __ blr(rscratch1);
2272     __ bind(retaddr);
2273     oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2274 
2275     __ reset_last_Java_frame(false);
2276 
2277     __ b(after_fetch_unroll_info_call);
2278   } // EnableJVMCI
2279 #endif // INCLUDE_JVMCI
2280 
2281   int exception_offset = __ pc() - start;
2282 
2283   // Prolog for exception case
2284 
2285   // all registers are dead at this entry point, except for r0, and
2286   // r3 which contain the exception oop and exception pc
2287   // respectively.  Set them in TLS and fall thru to the
2288   // unpack_with_exception_in_tls entry point.
2289 
2290   __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2291   __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2292 
2293   int exception_in_tls_offset = __ pc() - start;
2294 
2295   // new implementation because exception oop is now passed in JavaThread
2296 
2297   // Prolog for exception case
2298   // All registers must be preserved because they might be used by LinearScan
2299   // Exceptiop oop and throwing PC are passed in JavaThread
2300   // tos: stack at point of call to method that threw the exception (i.e. only
2301   // args are on the stack, no return address)
2302 
2303   // The return address pushed by save_live_registers will be patched
2304   // later with the throwing pc. The correct value is not available
2305   // now because loading it from memory would destroy registers.
2306 
2307   // NB: The SP at this point must be the SP of the method that is
2308   // being deoptimized.  Deoptimization assumes that the frame created
2309   // here by save_live_registers is immediately below the method's SP.
2310   // This is a somewhat fragile mechanism.
2311 
2312   // Save everything in sight.
2313   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2314 
2315   // Now it is safe to overwrite any register
2316 
2317   // Deopt during an exception.  Save exec mode for unpack_frames.
2318   __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2319 
2320   // load throwing pc from JavaThread and patch it as the return address
2321   // of the current frame. Then clear the field in JavaThread
2322   __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2323   __ protect_return_address(r3);
2324   __ str(r3, Address(rfp, wordSize));
2325   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2326 
2327 #ifdef ASSERT
2328   // verify that there is really an exception oop in JavaThread
2329   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2330   __ verify_oop(r0);
2331 
2332   // verify that there is no pending exception
2333   Label no_pending_exception;
2334   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2335   __ cbz(rscratch1, no_pending_exception);
2336   __ stop("must not have pending exception here");
2337   __ bind(no_pending_exception);
2338 #endif
2339 
2340   __ bind(cont);
2341 
2342   // Call C code.  Need thread and this frame, but NOT official VM entry
2343   // crud.  We cannot block on this call, no GC can happen.
2344   //
2345   // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2346 
2347   // fetch_unroll_info needs to call last_java_frame().
2348 
2349   Label retaddr;
2350   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2351 #ifdef ASSERT
2352   { Label L;
2353     __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2354     __ cbz(rscratch1, L);
2355     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2356     __ bind(L);
2357   }
2358 #endif // ASSERT
2359   __ mov(c_rarg0, rthread);
2360   __ mov(c_rarg1, rcpool);
2361   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2362   __ blr(rscratch1);
2363   __ bind(retaddr);
2364 
2365   // Need to have an oopmap that tells fetch_unroll_info where to
2366   // find any register it might need.
2367   oop_maps->add_gc_map(__ pc() - start, map);
2368 
2369   __ reset_last_Java_frame(false);
2370 
2371 #if INCLUDE_JVMCI
2372   if (EnableJVMCI) {
2373     __ bind(after_fetch_unroll_info_call);
2374   }
2375 #endif
2376 
2377   // Load UnrollBlock* into r5
2378   __ mov(r5, r0);
2379 
2380   __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset()));
2381    Label noException;
2382   __ cmpw(rcpool, Deoptimization::Unpack_exception);   // Was exception pending?
2383   __ br(Assembler::NE, noException);
2384   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2385   // QQQ this is useless it was null above
2386   __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2387   __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2388   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2389 
2390   __ verify_oop(r0);
2391 
2392   // Overwrite the result registers with the exception results.
2393   __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2394   // I think this is useless
2395   // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2396 
2397   __ bind(noException);
2398 
2399   // Only register save data is on the stack.
2400   // Now restore the result registers.  Everything else is either dead
2401   // or captured in the vframeArray.
2402 
2403   // Restore fp result register
2404   __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2405   // Restore integer result register
2406   __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2407 
2408   // Pop all of the register save area off the stack
2409   __ add(sp, sp, frame_size_in_words * wordSize);
2410 
2411   // All of the register save area has been popped of the stack. Only the
2412   // return address remains.
2413 
2414   // Pop all the frames we must move/replace.
2415   //
2416   // Frame picture (youngest to oldest)
2417   // 1: self-frame (no frame link)
2418   // 2: deopting frame  (no frame link)
2419   // 3: caller of deopting frame (could be compiled/interpreted).
2420   //
2421   // Note: by leaving the return address of self-frame on the stack
2422   // and using the size of frame 2 to adjust the stack
2423   // when we are done the return to frame 3 will still be on the stack.
2424 
2425   // Pop deoptimized frame
2426   __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2427   __ sub(r2, r2, 2 * wordSize);
2428   __ add(sp, sp, r2);
2429   __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2430 
2431 #ifdef ASSERT
2432   // Compilers generate code that bang the stack by as much as the
2433   // interpreter would need. So this stack banging should never
2434   // trigger a fault. Verify that it does not on non product builds.
2435   __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2436   __ bang_stack_size(r19, r2);
2437 #endif
2438   // Load address of array of frame pcs into r2
2439   __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset()));
2440 
2441   // Trash the old pc
2442   // __ addptr(sp, wordSize);  FIXME ????
2443 
2444   // Load address of array of frame sizes into r4
2445   __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset()));
2446 
2447   // Load counter into r3
2448   __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset()));
2449 
2450   // Now adjust the caller's stack to make up for the extra locals
2451   // but record the original sp so that we can save it in the skeletal interpreter
2452   // frame and the stack walking of interpreter_sender will get the unextended sp
2453   // value and not the "real" sp value.
2454 
2455   const Register sender_sp = r6;
2456 
2457   __ mov(sender_sp, sp);
2458   __ ldrw(r19, Address(r5,
2459                        Deoptimization::UnrollBlock::
2460                        caller_adjustment_offset()));
2461   __ sub(sp, sp, r19);
2462 
2463   // Push interpreter frames in a loop
2464   __ mov(rscratch1, (uint64_t)0xDEADDEAD);        // Make a recognizable pattern
2465   __ mov(rscratch2, rscratch1);
2466   Label loop;
2467   __ bind(loop);
2468   __ ldr(r19, Address(__ post(r4, wordSize)));          // Load frame size
2469   __ sub(r19, r19, 2*wordSize);           // We'll push pc and fp by hand
2470   __ ldr(lr, Address(__ post(r2, wordSize)));  // Load pc
2471   __ enter();                           // Save old & set new fp
2472   __ sub(sp, sp, r19);                  // Prolog
2473   // This value is corrected by layout_activation_impl
2474   __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2475   __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2476   __ mov(sender_sp, sp);               // Pass sender_sp to next frame
2477   __ sub(r3, r3, 1);                   // Decrement counter
2478   __ cbnz(r3, loop);
2479 
2480     // Re-push self-frame
2481   __ ldr(lr, Address(r2));
2482   __ enter();
2483 
2484   // Allocate a full sized register save area.  We subtract 2 because
2485   // enter() just pushed 2 words
2486   __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2487 
2488   // Restore frame locals after moving the frame
2489   __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2490   __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2491 
2492   // Call C code.  Need thread but NOT official VM entry
2493   // crud.  We cannot block on this call, no GC can happen.  Call should
2494   // restore return values to their stack-slots with the new SP.
2495   //
2496   // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2497 
2498   // Use rfp because the frames look interpreted now
2499   // Don't need the precise return PC here, just precise enough to point into this code blob.
2500   address the_pc = __ pc();
2501   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2502 
2503   __ mov(c_rarg0, rthread);
2504   __ movw(c_rarg1, rcpool); // second arg: exec_mode
2505   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2506   __ blr(rscratch1);
2507 
2508   // Set an oopmap for the call site
2509   // Use the same PC we used for the last java frame
2510   oop_maps->add_gc_map(the_pc - start,
2511                        new OopMap( frame_size_in_words, 0 ));
2512 
2513   // Clear fp AND pc
2514   __ reset_last_Java_frame(true);
2515 
2516   // Collect return values
2517   __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2518   __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2519   // I think this is useless (throwing pc?)
2520   // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2521 
2522   // Pop self-frame.
2523   __ leave();                           // Epilog
2524 
2525   // Jump to interpreter
2526   __ ret(lr);
2527 
2528   // Make sure all code is generated
2529   masm->flush();
2530 
2531   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2532   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2533 #if INCLUDE_JVMCI
2534   if (EnableJVMCI) {
2535     _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2536     _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2537   }
2538 #endif
2539 }
2540 
2541 // Number of stack slots between incoming argument block and the start of
2542 // a new frame.  The PROLOG must add this many slots to the stack.  The
2543 // EPILOG must remove this many slots. aarch64 needs two slots for
2544 // return address and fp.
2545 // TODO think this is correct but check
2546 uint SharedRuntime::in_preserve_stack_slots() {
2547   return 4;
2548 }
2549 
2550 uint SharedRuntime::out_preserve_stack_slots() {
2551   return 0;
2552 }
2553 
2554 VMReg SharedRuntime::thread_register() {
2555   return rthread->as_VMReg();
2556 }
2557 
2558 #ifdef COMPILER2
2559 //------------------------------generate_uncommon_trap_blob--------------------
2560 void SharedRuntime::generate_uncommon_trap_blob() {
2561   // Allocate space for the code
2562   ResourceMark rm;
2563   // Setup code generation tools
2564   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2565   MacroAssembler* masm = new MacroAssembler(&buffer);
2566 
2567   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2568 
2569   address start = __ pc();
2570 
2571   // Push self-frame.  We get here with a return address in LR
2572   // and sp should be 16 byte aligned
2573   // push rfp and retaddr by hand
2574   __ protect_return_address();
2575   __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
2576   // we don't expect an arg reg save area
2577 #ifndef PRODUCT
2578   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2579 #endif
2580   // compiler left unloaded_class_index in j_rarg0 move to where the
2581   // runtime expects it.
2582   if (c_rarg1 != j_rarg0) {
2583     __ movw(c_rarg1, j_rarg0);
2584   }
2585 
2586   // we need to set the past SP to the stack pointer of the stub frame
2587   // and the pc to the address where this runtime call will return
2588   // although actually any pc in this code blob will do).
2589   Label retaddr;
2590   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2591 
2592   // Call C code.  Need thread but NOT official VM entry
2593   // crud.  We cannot block on this call, no GC can happen.  Call should
2594   // capture callee-saved registers as well as return values.
2595   // Thread is in rdi already.
2596   //
2597   // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2598   //
2599   // n.b. 2 gp args, 0 fp args, integral return type
2600 
2601   __ mov(c_rarg0, rthread);
2602   __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap);
2603   __ lea(rscratch1,
2604          RuntimeAddress(CAST_FROM_FN_PTR(address,
2605                                          Deoptimization::uncommon_trap)));
2606   __ blr(rscratch1);
2607   __ bind(retaddr);
2608 
2609   // Set an oopmap for the call site
2610   OopMapSet* oop_maps = new OopMapSet();
2611   OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2612 
2613   // location of rfp is known implicitly by the frame sender code
2614 
2615   oop_maps->add_gc_map(__ pc() - start, map);
2616 
2617   __ reset_last_Java_frame(false);
2618 
2619   // move UnrollBlock* into r4
2620   __ mov(r4, r0);
2621 
2622 #ifdef ASSERT
2623   { Label L;
2624     __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset()));
2625     __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2626     __ br(Assembler::EQ, L);
2627     __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap");
2628     __ bind(L);
2629   }
2630 #endif
2631 
2632   // Pop all the frames we must move/replace.
2633   //
2634   // Frame picture (youngest to oldest)
2635   // 1: self-frame (no frame link)
2636   // 2: deopting frame  (no frame link)
2637   // 3: caller of deopting frame (could be compiled/interpreted).
2638 
2639   // Pop self-frame.  We have no frame, and must rely only on r0 and sp.
2640   __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2641 
2642   // Pop deoptimized frame (int)
2643   __ ldrw(r2, Address(r4,
2644                       Deoptimization::UnrollBlock::
2645                       size_of_deoptimized_frame_offset()));
2646   __ sub(r2, r2, 2 * wordSize);
2647   __ add(sp, sp, r2);
2648   __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2649 
2650 #ifdef ASSERT
2651   // Compilers generate code that bang the stack by as much as the
2652   // interpreter would need. So this stack banging should never
2653   // trigger a fault. Verify that it does not on non product builds.
2654   __ ldrw(r1, Address(r4,
2655                       Deoptimization::UnrollBlock::
2656                       total_frame_sizes_offset()));
2657   __ bang_stack_size(r1, r2);
2658 #endif
2659 
2660   // Load address of array of frame pcs into r2 (address*)
2661   __ ldr(r2, Address(r4,
2662                      Deoptimization::UnrollBlock::frame_pcs_offset()));
2663 
2664   // Load address of array of frame sizes into r5 (intptr_t*)
2665   __ ldr(r5, Address(r4,
2666                      Deoptimization::UnrollBlock::
2667                      frame_sizes_offset()));
2668 
2669   // Counter
2670   __ ldrw(r3, Address(r4,
2671                       Deoptimization::UnrollBlock::
2672                       number_of_frames_offset())); // (int)
2673 
2674   // Now adjust the caller's stack to make up for the extra locals but
2675   // record the original sp so that we can save it in the skeletal
2676   // interpreter frame and the stack walking of interpreter_sender
2677   // will get the unextended sp value and not the "real" sp value.
2678 
2679   const Register sender_sp = r8;
2680 
2681   __ mov(sender_sp, sp);
2682   __ ldrw(r1, Address(r4,
2683                       Deoptimization::UnrollBlock::
2684                       caller_adjustment_offset())); // (int)
2685   __ sub(sp, sp, r1);
2686 
2687   // Push interpreter frames in a loop
2688   Label loop;
2689   __ bind(loop);
2690   __ ldr(r1, Address(r5, 0));       // Load frame size
2691   __ sub(r1, r1, 2 * wordSize);     // We'll push pc and rfp by hand
2692   __ ldr(lr, Address(r2, 0));       // Save return address
2693   __ enter();                       // and old rfp & set new rfp
2694   __ sub(sp, sp, r1);               // Prolog
2695   __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2696   // This value is corrected by layout_activation_impl
2697   __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2698   __ mov(sender_sp, sp);          // Pass sender_sp to next frame
2699   __ add(r5, r5, wordSize);       // Bump array pointer (sizes)
2700   __ add(r2, r2, wordSize);       // Bump array pointer (pcs)
2701   __ subsw(r3, r3, 1);            // Decrement counter
2702   __ br(Assembler::GT, loop);
2703   __ ldr(lr, Address(r2, 0));     // save final return address
2704   // Re-push self-frame
2705   __ enter();                     // & old rfp & set new rfp
2706 
2707   // Use rfp because the frames look interpreted now
2708   // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2709   // Don't need the precise return PC here, just precise enough to point into this code blob.
2710   address the_pc = __ pc();
2711   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2712 
2713   // Call C code.  Need thread but NOT official VM entry
2714   // crud.  We cannot block on this call, no GC can happen.  Call should
2715   // restore return values to their stack-slots with the new SP.
2716   // Thread is in rdi already.
2717   //
2718   // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2719   //
2720   // n.b. 2 gp args, 0 fp args, integral return type
2721 
2722   // sp should already be aligned
2723   __ mov(c_rarg0, rthread);
2724   __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2725   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2726   __ blr(rscratch1);
2727 
2728   // Set an oopmap for the call site
2729   // Use the same PC we used for the last java frame
2730   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2731 
2732   // Clear fp AND pc
2733   __ reset_last_Java_frame(true);
2734 
2735   // Pop self-frame.
2736   __ leave();                 // Epilog
2737 
2738   // Jump to interpreter
2739   __ ret(lr);
2740 
2741   // Make sure all code is generated
2742   masm->flush();
2743 
2744   _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
2745                                                  SimpleRuntimeFrame::framesize >> 1);
2746 }
2747 #endif // COMPILER2
2748 
2749 
2750 //------------------------------generate_handler_blob------
2751 //
2752 // Generate a special Compile2Runtime blob that saves all registers,
2753 // and setup oopmap.
2754 //
2755 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2756   ResourceMark rm;
2757   OopMapSet *oop_maps = new OopMapSet();
2758   OopMap* map;
2759 
2760   // Allocate space for the code.  Setup code generation tools.
2761   CodeBuffer buffer("handler_blob", 2048, 1024);
2762   MacroAssembler* masm = new MacroAssembler(&buffer);
2763 
2764   address start   = __ pc();
2765   address call_pc = nullptr;
2766   int frame_size_in_words;
2767   bool cause_return = (poll_type == POLL_AT_RETURN);
2768   RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2769 
2770   // When the signal occurred, the LR was either signed and stored on the stack (in which
2771   // case it will be restored from the stack before being used) or unsigned and not stored
2772   // on the stack. Stipping ensures we get the right value.
2773   __ strip_return_address();
2774 
2775   // Save Integer and Float registers.
2776   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2777 
2778   // The following is basically a call_VM.  However, we need the precise
2779   // address of the call in order to generate an oopmap. Hence, we do all the
2780   // work ourselves.
2781 
2782   Label retaddr;
2783   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2784 
2785   // The return address must always be correct so that frame constructor never
2786   // sees an invalid pc.
2787 
2788   if (!cause_return) {
2789     // overwrite the return address pushed by save_live_registers
2790     // Additionally, r20 is a callee-saved register so we can look at
2791     // it later to determine if someone changed the return address for
2792     // us!
2793     __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2794     __ protect_return_address(r20);
2795     __ str(r20, Address(rfp, wordSize));
2796   }
2797 
2798   // Do the call
2799   __ mov(c_rarg0, rthread);
2800   __ lea(rscratch1, RuntimeAddress(call_ptr));
2801   __ blr(rscratch1);
2802   __ bind(retaddr);
2803 
2804   // Set an oopmap for the call site.  This oopmap will map all
2805   // oop-registers and debug-info registers as callee-saved.  This
2806   // will allow deoptimization at this safepoint to find all possible
2807   // debug-info recordings, as well as let GC find all oops.
2808 
2809   oop_maps->add_gc_map( __ pc() - start, map);
2810 
2811   Label noException;
2812 
2813   __ reset_last_Java_frame(false);
2814 
2815   __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2816 
2817   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2818   __ cbz(rscratch1, noException);
2819 
2820   // Exception pending
2821 
2822   reg_save.restore_live_registers(masm);
2823 
2824   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2825 
2826   // No exception case
2827   __ bind(noException);
2828 
2829   Label no_adjust, bail;
2830   if (!cause_return) {
2831     // If our stashed return pc was modified by the runtime we avoid touching it
2832     __ ldr(rscratch1, Address(rfp, wordSize));
2833     __ cmp(r20, rscratch1);
2834     __ br(Assembler::NE, no_adjust);
2835     __ authenticate_return_address(r20);
2836 
2837 #ifdef ASSERT
2838     // Verify the correct encoding of the poll we're about to skip.
2839     // See NativeInstruction::is_ldrw_to_zr()
2840     __ ldrw(rscratch1, Address(r20));
2841     __ ubfx(rscratch2, rscratch1, 22, 10);
2842     __ cmpw(rscratch2, 0b1011100101);
2843     __ br(Assembler::NE, bail);
2844     __ ubfx(rscratch2, rscratch1, 0, 5);
2845     __ cmpw(rscratch2, 0b11111);
2846     __ br(Assembler::NE, bail);
2847 #endif
2848     // Adjust return pc forward to step over the safepoint poll instruction
2849     __ add(r20, r20, NativeInstruction::instruction_size);
2850     __ protect_return_address(r20);
2851     __ str(r20, Address(rfp, wordSize));
2852   }
2853 
2854   __ bind(no_adjust);
2855   // Normal exit, restore registers and exit.
2856   reg_save.restore_live_registers(masm);
2857 
2858   __ ret(lr);
2859 
2860 #ifdef ASSERT
2861   __ bind(bail);
2862   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2863 #endif
2864 
2865   // Make sure all code is generated
2866   masm->flush();
2867 
2868   // Fill-out other meta info
2869   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2870 }
2871 
2872 //
2873 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2874 //
2875 // Generate a stub that calls into vm to find out the proper destination
2876 // of a java call. All the argument registers are live at this point
2877 // but since this is generic code we don't know what they are and the caller
2878 // must do any gc of the args.
2879 //
2880 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2881   assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2882 
2883   // allocate space for the code
2884   ResourceMark rm;
2885 
2886   CodeBuffer buffer(name, 1000, 512);
2887   MacroAssembler* masm                = new MacroAssembler(&buffer);
2888 
2889   int frame_size_in_words;
2890   RegisterSaver reg_save(false /* save_vectors */);
2891 
2892   OopMapSet *oop_maps = new OopMapSet();
2893   OopMap* map = nullptr;
2894 
2895   int start = __ offset();
2896 
2897   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2898 
2899   int frame_complete = __ offset();
2900 
2901   {
2902     Label retaddr;
2903     __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2904 
2905     __ mov(c_rarg0, rthread);
2906     __ lea(rscratch1, RuntimeAddress(destination));
2907 
2908     __ blr(rscratch1);
2909     __ bind(retaddr);
2910   }
2911 
2912   // Set an oopmap for the call site.
2913   // We need this not only for callee-saved registers, but also for volatile
2914   // registers that the compiler might be keeping live across a safepoint.
2915 
2916   oop_maps->add_gc_map( __ offset() - start, map);
2917 
2918   // r0 contains the address we are going to jump to assuming no exception got installed
2919 
2920   // clear last_Java_sp
2921   __ reset_last_Java_frame(false);
2922   // check for pending exceptions
2923   Label pending;
2924   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2925   __ cbnz(rscratch1, pending);
2926 
2927   // get the returned Method*
2928   __ get_vm_result_2(rmethod, rthread);
2929   __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
2930 
2931   // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
2932   __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
2933   reg_save.restore_live_registers(masm);
2934 
2935   // We are back to the original state on entry and ready to go.
2936 
2937   __ br(rscratch1);
2938 
2939   // Pending exception after the safepoint
2940 
2941   __ bind(pending);
2942 
2943   reg_save.restore_live_registers(masm);
2944 
2945   // exception pending => remove activation and forward to exception handler
2946 
2947   __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
2948 
2949   __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
2950   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2951 
2952   // -------------
2953   // make sure all code is generated
2954   masm->flush();
2955 
2956   // return the  blob
2957   // frame_size_words or bytes??
2958   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
2959 }
2960 
2961 #ifdef COMPILER2
2962 // This is here instead of runtime_aarch64_64.cpp because it uses SimpleRuntimeFrame
2963 //
2964 //------------------------------generate_exception_blob---------------------------
2965 // creates exception blob at the end
2966 // Using exception blob, this code is jumped from a compiled method.
2967 // (see emit_exception_handler in x86_64.ad file)
2968 //
2969 // Given an exception pc at a call we call into the runtime for the
2970 // handler in this method. This handler might merely restore state
2971 // (i.e. callee save registers) unwind the frame and jump to the
2972 // exception handler for the nmethod if there is no Java level handler
2973 // for the nmethod.
2974 //
2975 // This code is entered with a jmp.
2976 //
2977 // Arguments:
2978 //   r0: exception oop
2979 //   r3: exception pc
2980 //
2981 // Results:
2982 //   r0: exception oop
2983 //   r3: exception pc in caller or ???
2984 //   destination: exception handler of caller
2985 //
2986 // Note: the exception pc MUST be at a call (precise debug information)
2987 //       Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved.
2988 //
2989 
2990 void OptoRuntime::generate_exception_blob() {
2991   assert(!OptoRuntime::is_callee_saved_register(R3_num), "");
2992   assert(!OptoRuntime::is_callee_saved_register(R0_num), "");
2993   assert(!OptoRuntime::is_callee_saved_register(R2_num), "");
2994 
2995   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2996 
2997   // Allocate space for the code
2998   ResourceMark rm;
2999   // Setup code generation tools
3000   CodeBuffer buffer("exception_blob", 2048, 1024);
3001   MacroAssembler* masm = new MacroAssembler(&buffer);
3002 
3003   // TODO check various assumptions made here
3004   //
3005   // make sure we do so before running this
3006 
3007   address start = __ pc();
3008 
3009   // push rfp and retaddr by hand
3010   // Exception pc is 'return address' for stack walker
3011   __ protect_return_address();
3012   __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
3013   // there are no callee save registers and we don't expect an
3014   // arg reg save area
3015 #ifndef PRODUCT
3016   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3017 #endif
3018   // Store exception in Thread object. We cannot pass any arguments to the
3019   // handle_exception call, since we do not want to make any assumption
3020   // about the size of the frame where the exception happened in.
3021   __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
3022   __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
3023 
3024   // This call does all the hard work.  It checks if an exception handler
3025   // exists in the method.
3026   // If so, it returns the handler address.
3027   // If not, it prepares for stack-unwinding, restoring the callee-save
3028   // registers of the frame being removed.
3029   //
3030   // address OptoRuntime::handle_exception_C(JavaThread* thread)
3031   //
3032   // n.b. 1 gp arg, 0 fp args, integral return type
3033 
3034   // the stack should always be aligned
3035   address the_pc = __ pc();
3036   __ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
3037   __ mov(c_rarg0, rthread);
3038   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3039   __ blr(rscratch1);
3040   // handle_exception_C is a special VM call which does not require an explicit
3041   // instruction sync afterwards.
3042 
3043   // May jump to SVE compiled code
3044   __ reinitialize_ptrue();
3045 
3046   // Set an oopmap for the call site.  This oopmap will only be used if we
3047   // are unwinding the stack.  Hence, all locations will be dead.
3048   // Callee-saved registers will be the same as the frame above (i.e.,
3049   // handle_exception_stub), since they were restored when we got the
3050   // exception.
3051 
3052   OopMapSet* oop_maps = new OopMapSet();
3053 
3054   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3055 
3056   __ reset_last_Java_frame(false);
3057 
3058   // Restore callee-saved registers
3059 
3060   // rfp is an implicitly saved callee saved register (i.e. the calling
3061   // convention will save restore it in prolog/epilog) Other than that
3062   // there are no callee save registers now that adapter frames are gone.
3063   // and we dont' expect an arg reg save area
3064   __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize)));
3065   __ authenticate_return_address(r3);
3066 
3067   // r0: exception handler
3068 
3069   // We have a handler in r0 (could be deopt blob).
3070   __ mov(r8, r0);
3071 
3072   // Get the exception oop
3073   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
3074   // Get the exception pc in case we are deoptimized
3075   __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset()));
3076 #ifdef ASSERT
3077   __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset()));
3078   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
3079 #endif
3080   // Clear the exception oop so GC no longer processes it as a root.
3081   __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
3082 
3083   // r0: exception oop
3084   // r8:  exception handler
3085   // r4: exception pc
3086   // Jump to handler
3087 
3088   __ br(r8);
3089 
3090   // Make sure all code is generated
3091   masm->flush();
3092 
3093   // Set exception blob
3094   _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3095 }
3096 
3097 #endif // COMPILER2