1 /*
   2  * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #include "precompiled.hpp"
  28 #include "asm/macroAssembler.hpp"
  29 #include "asm/macroAssembler.inline.hpp"
  30 #include "code/codeCache.hpp"
  31 #include "code/compiledIC.hpp"
  32 #include "code/debugInfoRec.hpp"
  33 #include "code/icBuffer.hpp"
  34 #include "code/vtableStubs.hpp"
  35 #include "compiler/oopMap.hpp"
  36 #include "gc/shared/barrierSetAssembler.hpp"
  37 #include "interpreter/interpreter.hpp"
  38 #include "interpreter/interp_masm.hpp"
  39 #include "logging/log.hpp"
  40 #include "memory/resourceArea.hpp"
  41 #include "nativeInst_aarch64.hpp"
  42 #include "oops/compiledICHolder.hpp"
  43 #include "oops/klass.inline.hpp"
  44 #include "prims/methodHandles.hpp"
  45 #include "runtime/jniHandles.hpp"
  46 #include "runtime/safepointMechanism.hpp"
  47 #include "runtime/sharedRuntime.hpp"
  48 #include "runtime/signature.hpp"
  49 #include "runtime/stubRoutines.hpp"
  50 #include "runtime/vframeArray.hpp"
  51 #include "utilities/align.hpp"
  52 #include "utilities/formatBuffer.hpp"
  53 #include "vmreg_aarch64.inline.hpp"
  54 #ifdef COMPILER1
  55 #include "c1/c1_Runtime1.hpp"
  56 #endif
  57 #ifdef COMPILER2
  58 #include "adfiles/ad_aarch64.hpp"
  59 #include "opto/runtime.hpp"
  60 #endif
  61 #if INCLUDE_JVMCI
  62 #include "jvmci/jvmciJavaClasses.hpp"
  63 #endif
  64 
  65 #define __ masm->
  66 
  67 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  68 
  69 class SimpleRuntimeFrame {
  70 
  71   public:
  72 
  73   // Most of the runtime stubs have this simple frame layout.
  74   // This class exists to make the layout shared in one place.
  75   // Offsets are for compiler stack slots, which are jints.
  76   enum layout {
  77     // The frame sender code expects that rbp will be in the "natural" place and
  78     // will override any oopMap setting for it. We must therefore force the layout
  79     // so that it agrees with the frame sender code.
  80     // we don't expect any arg reg save area so aarch64 asserts that
  81     // frame::arg_reg_save_area_bytes == 0
  82     rbp_off = 0,
  83     rbp_off2,
  84     return_off, return_off2,
  85     framesize
  86   };
  87 };
  88 
  89 // FIXME -- this is used by C1
  90 class RegisterSaver {
  91   const bool _save_vectors;
  92  public:
  93   RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
  94 
  95   OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
  96   void restore_live_registers(MacroAssembler* masm);
  97 
  98   // Offsets into the register save area
  99   // Used by deoptimization when it is managing result register
 100   // values on its own
 101 
 102   int reg_offset_in_bytes(Register r);
 103   int r0_offset_in_bytes()    { return reg_offset_in_bytes(r0); }
 104   int rscratch1_offset_in_bytes()    { return reg_offset_in_bytes(rscratch1); }
 105   int v0_offset_in_bytes(void)   { return 0; }
 106 
 107   // Capture info about frame layout
 108   // Note this is only correct when not saving full vectors.
 109   enum layout {
 110                 fpu_state_off = 0,
 111                 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
 112                 // The frame sender code expects that rfp will be in
 113                 // the "natural" place and will override any oopMap
 114                 // setting for it. We must therefore force the layout
 115                 // so that it agrees with the frame sender code.
 116                 r0_off = fpu_state_off + FPUStateSizeInWords,
 117                 rfp_off = r0_off + (RegisterImpl::number_of_registers - 2) * RegisterImpl::max_slots_per_register,
 118                 return_off = rfp_off + RegisterImpl::max_slots_per_register,      // slot for return address
 119                 reg_save_size = return_off + RegisterImpl::max_slots_per_register};
 120 
 121 };
 122 
 123 int RegisterSaver::reg_offset_in_bytes(Register r) {
 124   // The integer registers are located above the floating point
 125   // registers in the stack frame pushed by save_live_registers() so the
 126   // offset depends on whether we are saving full vectors, and whether
 127   // those vectors are NEON or SVE.
 128 
 129   int slots_per_vect = FloatRegisterImpl::save_slots_per_register;
 130 
 131 #if COMPILER2_OR_JVMCI
 132   if (_save_vectors) {
 133     slots_per_vect = FloatRegisterImpl::slots_per_neon_register;
 134 
 135 #ifdef COMPILER2
 136     if (Matcher::supports_scalable_vector()) {
 137       slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
 138     }
 139 #endif
 140   }
 141 #endif
 142 
 143   int r0_offset = (slots_per_vect * FloatRegisterImpl::number_of_registers) * BytesPerInt;
 144   return r0_offset + r->encoding() * wordSize;
 145 }
 146 
 147 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
 148   bool use_sve = false;
 149   int sve_vector_size_in_bytes = 0;
 150   int sve_vector_size_in_slots = 0;
 151 
 152 #ifdef COMPILER2
 153   use_sve = Matcher::supports_scalable_vector();
 154   sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
 155   sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
 156 #endif
 157 
 158 #if COMPILER2_OR_JVMCI
 159   if (_save_vectors) {
 160     int vect_words = 0;
 161     int extra_save_slots_per_register = 0;
 162     // Save upper half of vector registers
 163     if (use_sve) {
 164       extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegisterImpl::save_slots_per_register;
 165     } else {
 166       extra_save_slots_per_register = FloatRegisterImpl::extra_save_slots_per_neon_register;
 167     }
 168     vect_words = FloatRegisterImpl::number_of_registers * extra_save_slots_per_register /
 169                  VMRegImpl::slots_per_word;
 170     additional_frame_words += vect_words;
 171   }
 172 #else
 173   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 174 #endif
 175 
 176   int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
 177                                      reg_save_size * BytesPerInt, 16);
 178   // OopMap frame size is in compiler stack slots (jint's) not bytes or words
 179   int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
 180   // The caller will allocate additional_frame_words
 181   int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
 182   // CodeBlob frame size is in words.
 183   int frame_size_in_words = frame_size_in_bytes / wordSize;
 184   *total_frame_words = frame_size_in_words;
 185 
 186   // Save Integer and Float registers.
 187   __ enter();
 188   __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes);
 189 
 190   // Set an oopmap for the call site.  This oopmap will map all
 191   // oop-registers and debug-info registers as callee-saved.  This
 192   // will allow deoptimization at this safepoint to find all possible
 193   // debug-info recordings, as well as let GC find all oops.
 194 
 195   OopMapSet *oop_maps = new OopMapSet();
 196   OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
 197 
 198   for (int i = 0; i < RegisterImpl::number_of_registers; i++) {
 199     Register r = as_Register(i);
 200     if (r <= rfp && r != rscratch1 && r != rscratch2) {
 201       // SP offsets are in 4-byte words.
 202       // Register slots are 8 bytes wide, 32 floating-point registers.
 203       int sp_offset = RegisterImpl::max_slots_per_register * i +
 204                       FloatRegisterImpl::save_slots_per_register * FloatRegisterImpl::number_of_registers;
 205       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots),
 206                                 r->as_VMReg());
 207     }
 208   }
 209 
 210   for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) {
 211     FloatRegister r = as_FloatRegister(i);
 212     int sp_offset = 0;
 213     if (_save_vectors) {
 214       sp_offset = use_sve ? (sve_vector_size_in_slots * i) :
 215                             (FloatRegisterImpl::slots_per_neon_register * i);
 216     } else {
 217       sp_offset = FloatRegisterImpl::save_slots_per_register * i;
 218     }
 219     oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
 220                               r->as_VMReg());
 221   }
 222 
 223   return oop_map;
 224 }
 225 
 226 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
 227 #ifdef COMPILER2
 228   __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
 229                    Matcher::scalable_vector_reg_size(T_BYTE));
 230 #else
 231 #if !INCLUDE_JVMCI
 232   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 233 #endif
 234   __ pop_CPU_state(_save_vectors);
 235 #endif
 236   __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
 237 
 238 }
 239 
 240 // Is vector's size (in bytes) bigger than a size saved by default?
 241 // 8 bytes vector registers are saved by default on AArch64.
 242 bool SharedRuntime::is_wide_vector(int size) {
 243   return size > 8;
 244 }
 245 
 246 // The java_calling_convention describes stack locations as ideal slots on
 247 // a frame with no abi restrictions. Since we must observe abi restrictions
 248 // (like the placement of the register window) the slots must be biased by
 249 // the following value.
 250 static int reg2offset_in(VMReg r) {
 251   // Account for saved rfp and lr
 252   // This should really be in_preserve_stack_slots
 253   return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
 254 }
 255 
 256 static int reg2offset_out(VMReg r) {
 257   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 258 }
 259 
 260 // ---------------------------------------------------------------------------
 261 // Read the array of BasicTypes from a signature, and compute where the
 262 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 263 // quantities.  Values less than VMRegImpl::stack0 are registers, those above
 264 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 265 // as framesizes are fixed.
 266 // VMRegImpl::stack0 refers to the first slot 0(sp).
 267 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 268 // up to RegisterImpl::number_of_registers) are the 64-bit
 269 // integer registers.
 270 
 271 // Note: the INPUTS in sig_bt are in units of Java argument words,
 272 // which are 64-bit.  The OUTPUTS are in 32-bit units.
 273 
 274 // The Java calling convention is a "shifted" version of the C ABI.
 275 // By skipping the first C ABI register we can call non-static jni
 276 // methods with small numbers of arguments without having to shuffle
 277 // the arguments at all. Since we control the java ABI we ought to at
 278 // least get some advantage out of it.
 279 
 280 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 281                                            VMRegPair *regs,
 282                                            int total_args_passed) {
 283 
 284   // Create the mapping between argument positions and
 285   // registers.
 286   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 287     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
 288   };
 289   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 290     j_farg0, j_farg1, j_farg2, j_farg3,
 291     j_farg4, j_farg5, j_farg6, j_farg7
 292   };
 293 
 294 
 295   uint int_args = 0;
 296   uint fp_args = 0;
 297   uint stk_args = 0; // inc by 2 each time
 298 
 299   for (int i = 0; i < total_args_passed; i++) {
 300     switch (sig_bt[i]) {
 301     case T_BOOLEAN:
 302     case T_CHAR:
 303     case T_BYTE:
 304     case T_SHORT:
 305     case T_INT:
 306       if (int_args < Argument::n_int_register_parameters_j) {
 307         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 308       } else {
 309         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 310         stk_args += 2;
 311       }
 312       break;
 313     case T_VOID:
 314       // halves of T_LONG or T_DOUBLE
 315       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 316       regs[i].set_bad();
 317       break;
 318     case T_LONG:
 319       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 320       // fall through
 321     case T_OBJECT:
 322     case T_ARRAY:
 323     case T_ADDRESS:
 324       if (int_args < Argument::n_int_register_parameters_j) {
 325         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 326       } else {
 327         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 328         stk_args += 2;
 329       }
 330       break;
 331     case T_FLOAT:
 332       if (fp_args < Argument::n_float_register_parameters_j) {
 333         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 334       } else {
 335         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 336         stk_args += 2;
 337       }
 338       break;
 339     case T_DOUBLE:
 340       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 341       if (fp_args < Argument::n_float_register_parameters_j) {
 342         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 343       } else {
 344         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 345         stk_args += 2;
 346       }
 347       break;
 348     default:
 349       ShouldNotReachHere();
 350       break;
 351     }
 352   }
 353 
 354   return align_up(stk_args, 2);
 355 }
 356 
 357 // Patch the callers callsite with entry to compiled code if it exists.
 358 static void patch_callers_callsite(MacroAssembler *masm) {
 359   Label L;
 360   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 361   __ cbz(rscratch1, L);
 362 
 363   __ enter();
 364   __ push_CPU_state();
 365 
 366   // VM needs caller's callsite
 367   // VM needs target method
 368   // This needs to be a long call since we will relocate this adapter to
 369   // the codeBuffer and it may not reach
 370 
 371 #ifndef PRODUCT
 372   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
 373 #endif
 374 
 375   __ mov(c_rarg0, rmethod);
 376   __ mov(c_rarg1, lr);
 377   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 378   __ blr(rscratch1);
 379 
 380   // Explicit isb required because fixup_callers_callsite may change the code
 381   // stream.
 382   __ safepoint_isb();
 383 
 384   __ pop_CPU_state();
 385   // restore sp
 386   __ leave();
 387   __ bind(L);
 388 }
 389 
 390 static void gen_c2i_adapter(MacroAssembler *masm,
 391                             int total_args_passed,
 392                             int comp_args_on_stack,
 393                             const BasicType *sig_bt,
 394                             const VMRegPair *regs,
 395                             Label& skip_fixup) {
 396   // Before we get into the guts of the C2I adapter, see if we should be here
 397   // at all.  We've come from compiled code and are attempting to jump to the
 398   // interpreter, which means the caller made a static call to get here
 399   // (vcalls always get a compiled target if there is one).  Check for a
 400   // compiled target.  If there is one, we need to patch the caller's call.
 401   patch_callers_callsite(masm);
 402 
 403   __ bind(skip_fixup);
 404 
 405   int words_pushed = 0;
 406 
 407   // Since all args are passed on the stack, total_args_passed *
 408   // Interpreter::stackElementSize is the space we need.
 409 
 410   int extraspace = total_args_passed * Interpreter::stackElementSize;
 411 
 412   __ mov(r13, sp);
 413 
 414   // stack is aligned, keep it that way
 415   extraspace = align_up(extraspace, 2*wordSize);
 416 
 417   if (extraspace)
 418     __ sub(sp, sp, extraspace);
 419 
 420   // Now write the args into the outgoing interpreter space
 421   for (int i = 0; i < total_args_passed; i++) {
 422     if (sig_bt[i] == T_VOID) {
 423       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 424       continue;
 425     }
 426 
 427     // offset to start parameters
 428     int st_off   = (total_args_passed - i - 1) * Interpreter::stackElementSize;
 429     int next_off = st_off - Interpreter::stackElementSize;
 430 
 431     // Say 4 args:
 432     // i   st_off
 433     // 0   32 T_LONG
 434     // 1   24 T_VOID
 435     // 2   16 T_OBJECT
 436     // 3    8 T_BOOL
 437     // -    0 return address
 438     //
 439     // However to make thing extra confusing. Because we can fit a Java long/double in
 440     // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
 441     // leaves one slot empty and only stores to a single slot. In this case the
 442     // slot that is occupied is the T_VOID slot. See I said it was confusing.
 443 
 444     VMReg r_1 = regs[i].first();
 445     VMReg r_2 = regs[i].second();
 446     if (!r_1->is_valid()) {
 447       assert(!r_2->is_valid(), "");
 448       continue;
 449     }
 450     if (r_1->is_stack()) {
 451       // memory to memory use rscratch1
 452       int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size
 453                     + extraspace
 454                     + words_pushed * wordSize);
 455       if (!r_2->is_valid()) {
 456         // sign extend??
 457         __ ldrw(rscratch1, Address(sp, ld_off));
 458         __ str(rscratch1, Address(sp, st_off));
 459 
 460       } else {
 461 
 462         __ ldr(rscratch1, Address(sp, ld_off));
 463 
 464         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 465         // T_DOUBLE and T_LONG use two slots in the interpreter
 466         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 467           // ld_off == LSW, ld_off+wordSize == MSW
 468           // st_off == MSW, next_off == LSW
 469           __ str(rscratch1, Address(sp, next_off));
 470 #ifdef ASSERT
 471           // Overwrite the unused slot with known junk
 472           __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaaaull);
 473           __ str(rscratch1, Address(sp, st_off));
 474 #endif /* ASSERT */
 475         } else {
 476           __ str(rscratch1, Address(sp, st_off));
 477         }
 478       }
 479     } else if (r_1->is_Register()) {
 480       Register r = r_1->as_Register();
 481       if (!r_2->is_valid()) {
 482         // must be only an int (or less ) so move only 32bits to slot
 483         // why not sign extend??
 484         __ str(r, Address(sp, st_off));
 485       } else {
 486         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 487         // T_DOUBLE and T_LONG use two slots in the interpreter
 488         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 489           // jlong/double in gpr
 490 #ifdef ASSERT
 491           // Overwrite the unused slot with known junk
 492           __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaabull);
 493           __ str(rscratch1, Address(sp, st_off));
 494 #endif /* ASSERT */
 495           __ str(r, Address(sp, next_off));
 496         } else {
 497           __ str(r, Address(sp, st_off));
 498         }
 499       }
 500     } else {
 501       assert(r_1->is_FloatRegister(), "");
 502       if (!r_2->is_valid()) {
 503         // only a float use just part of the slot
 504         __ strs(r_1->as_FloatRegister(), Address(sp, st_off));
 505       } else {
 506 #ifdef ASSERT
 507         // Overwrite the unused slot with known junk
 508         __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaacull);
 509         __ str(rscratch1, Address(sp, st_off));
 510 #endif /* ASSERT */
 511         __ strd(r_1->as_FloatRegister(), Address(sp, next_off));
 512       }
 513     }
 514   }
 515 
 516   __ mov(esp, sp); // Interp expects args on caller's expression stack
 517 
 518   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
 519   __ br(rscratch1);
 520 }
 521 
 522 
 523 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 524                                     int total_args_passed,
 525                                     int comp_args_on_stack,
 526                                     const BasicType *sig_bt,
 527                                     const VMRegPair *regs) {
 528 
 529   // Note: r13 contains the senderSP on entry. We must preserve it since
 530   // we may do a i2c -> c2i transition if we lose a race where compiled
 531   // code goes non-entrant while we get args ready.
 532 
 533   // In addition we use r13 to locate all the interpreter args because
 534   // we must align the stack to 16 bytes.
 535 
 536   // Adapters are frameless.
 537 
 538   // An i2c adapter is frameless because the *caller* frame, which is
 539   // interpreted, routinely repairs its own esp (from
 540   // interpreter_frame_last_sp), even if a callee has modified the
 541   // stack pointer.  It also recalculates and aligns sp.
 542 
 543   // A c2i adapter is frameless because the *callee* frame, which is
 544   // interpreted, routinely repairs its caller's sp (from sender_sp,
 545   // which is set up via the senderSP register).
 546 
 547   // In other words, if *either* the caller or callee is interpreted, we can
 548   // get the stack pointer repaired after a call.
 549 
 550   // This is why c2i and i2c adapters cannot be indefinitely composed.
 551   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 552   // both caller and callee would be compiled methods, and neither would
 553   // clean up the stack pointer changes performed by the two adapters.
 554   // If this happens, control eventually transfers back to the compiled
 555   // caller, but with an uncorrected stack, causing delayed havoc.
 556 
 557   if (VerifyAdapterCalls &&
 558       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 559 #if 0
 560     // So, let's test for cascading c2i/i2c adapters right now.
 561     //  assert(Interpreter::contains($return_addr) ||
 562     //         StubRoutines::contains($return_addr),
 563     //         "i2c adapter must return to an interpreter frame");
 564     __ block_comment("verify_i2c { ");
 565     Label L_ok;
 566     if (Interpreter::code() != NULL)
 567       range_check(masm, rax, r11,
 568                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 569                   L_ok);
 570     if (StubRoutines::code1() != NULL)
 571       range_check(masm, rax, r11,
 572                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 573                   L_ok);
 574     if (StubRoutines::code2() != NULL)
 575       range_check(masm, rax, r11,
 576                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 577                   L_ok);
 578     const char* msg = "i2c adapter must return to an interpreter frame";
 579     __ block_comment(msg);
 580     __ stop(msg);
 581     __ bind(L_ok);
 582     __ block_comment("} verify_i2ce ");
 583 #endif
 584   }
 585 
 586   // Cut-out for having no stack args.
 587   int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
 588   if (comp_args_on_stack) {
 589     __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
 590     __ andr(sp, rscratch1, -16);
 591   }
 592 
 593   // Will jump to the compiled code just as if compiled code was doing it.
 594   // Pre-load the register-jump target early, to schedule it better.
 595   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset())));
 596 
 597 #if INCLUDE_JVMCI
 598   if (EnableJVMCI) {
 599     // check if this call should be routed towards a specific entry point
 600     __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 601     Label no_alternative_target;
 602     __ cbz(rscratch2, no_alternative_target);
 603     __ mov(rscratch1, rscratch2);
 604     __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 605     __ bind(no_alternative_target);
 606   }
 607 #endif // INCLUDE_JVMCI
 608 
 609   // Now generate the shuffle code.
 610   for (int i = 0; i < total_args_passed; i++) {
 611     if (sig_bt[i] == T_VOID) {
 612       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 613       continue;
 614     }
 615 
 616     // Pick up 0, 1 or 2 words from SP+offset.
 617 
 618     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 619             "scrambled load targets?");
 620     // Load in argument order going down.
 621     int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize;
 622     // Point to interpreter value (vs. tag)
 623     int next_off = ld_off - Interpreter::stackElementSize;
 624     //
 625     //
 626     //
 627     VMReg r_1 = regs[i].first();
 628     VMReg r_2 = regs[i].second();
 629     if (!r_1->is_valid()) {
 630       assert(!r_2->is_valid(), "");
 631       continue;
 632     }
 633     if (r_1->is_stack()) {
 634       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 635       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size;
 636       if (!r_2->is_valid()) {
 637         // sign extend???
 638         __ ldrsw(rscratch2, Address(esp, ld_off));
 639         __ str(rscratch2, Address(sp, st_off));
 640       } else {
 641         //
 642         // We are using two optoregs. This can be either T_OBJECT,
 643         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 644         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 645         // So we must adjust where to pick up the data to match the
 646         // interpreter.
 647         //
 648         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 649         // are accessed as negative so LSW is at LOW address
 650 
 651         // ld_off is MSW so get LSW
 652         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 653                            next_off : ld_off;
 654         __ ldr(rscratch2, Address(esp, offset));
 655         // st_off is LSW (i.e. reg.first())
 656         __ str(rscratch2, Address(sp, st_off));
 657       }
 658     } else if (r_1->is_Register()) {  // Register argument
 659       Register r = r_1->as_Register();
 660       if (r_2->is_valid()) {
 661         //
 662         // We are using two VMRegs. This can be either T_OBJECT,
 663         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 664         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 665         // So we must adjust where to pick up the data to match the
 666         // interpreter.
 667 
 668         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 669                            next_off : ld_off;
 670 
 671         // this can be a misaligned move
 672         __ ldr(r, Address(esp, offset));
 673       } else {
 674         // sign extend and use a full word?
 675         __ ldrw(r, Address(esp, ld_off));
 676       }
 677     } else {
 678       if (!r_2->is_valid()) {
 679         __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
 680       } else {
 681         __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
 682       }
 683     }
 684   }
 685 
 686   __ mov(rscratch2, rscratch1);
 687   __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
 688   __ mov(rscratch1, rscratch2);
 689 
 690   // 6243940 We might end up in handle_wrong_method if
 691   // the callee is deoptimized as we race thru here. If that
 692   // happens we don't want to take a safepoint because the
 693   // caller frame will look interpreted and arguments are now
 694   // "compiled" so it is much better to make this transition
 695   // invisible to the stack walking code. Unfortunately if
 696   // we try and find the callee by normal means a safepoint
 697   // is possible. So we stash the desired callee in the thread
 698   // and the vm will find there should this case occur.
 699 
 700   __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
 701 
 702   __ br(rscratch1);
 703 }
 704 
 705 // ---------------------------------------------------------------
 706 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 707                                                             int total_args_passed,
 708                                                             int comp_args_on_stack,
 709                                                             const BasicType *sig_bt,
 710                                                             const VMRegPair *regs,
 711                                                             AdapterFingerPrint* fingerprint) {
 712   address i2c_entry = __ pc();
 713 
 714   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 715 
 716   address c2i_unverified_entry = __ pc();
 717   Label skip_fixup;
 718 
 719   Label ok;
 720 
 721   Register holder = rscratch2;
 722   Register receiver = j_rarg0;
 723   Register tmp = r10;  // A call-clobbered register not used for arg passing
 724 
 725   // -------------------------------------------------------------------------
 726   // Generate a C2I adapter.  On entry we know rmethod holds the Method* during calls
 727   // to the interpreter.  The args start out packed in the compiled layout.  They
 728   // need to be unpacked into the interpreter layout.  This will almost always
 729   // require some stack space.  We grow the current (compiled) stack, then repack
 730   // the args.  We  finally end in a jump to the generic interpreter entry point.
 731   // On exit from the interpreter, the interpreter will restore our SP (lest the
 732   // compiled code, which relys solely on SP and not FP, get sick).
 733 
 734   {
 735     __ block_comment("c2i_unverified_entry {");
 736     __ load_klass(rscratch1, receiver);
 737     __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset()));
 738     __ cmp(rscratch1, tmp);
 739     __ ldr(rmethod, Address(holder, CompiledICHolder::holder_metadata_offset()));
 740     __ br(Assembler::EQ, ok);
 741     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 742 
 743     __ bind(ok);
 744     // Method might have been compiled since the call site was patched to
 745     // interpreted; if that is the case treat it as a miss so we can get
 746     // the call site corrected.
 747     __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 748     __ cbz(rscratch1, skip_fixup);
 749     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 750     __ block_comment("} c2i_unverified_entry");
 751   }
 752 
 753   address c2i_entry = __ pc();
 754 
 755   // Class initialization barrier for static methods
 756   address c2i_no_clinit_check_entry = NULL;
 757   if (VM_Version::supports_fast_class_init_checks()) {
 758     Label L_skip_barrier;
 759 
 760     { // Bypass the barrier for non-static methods
 761       __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset()));
 762       __ andsw(zr, rscratch1, JVM_ACC_STATIC);
 763       __ br(Assembler::EQ, L_skip_barrier); // non-static
 764     }
 765 
 766     __ load_method_holder(rscratch2, rmethod);
 767     __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
 768     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 769 
 770     __ bind(L_skip_barrier);
 771     c2i_no_clinit_check_entry = __ pc();
 772   }
 773 
 774   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 775   bs->c2i_entry_barrier(masm);
 776 
 777   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 778 
 779   __ flush();
 780   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
 781 }
 782 
 783 static int c_calling_convention_priv(const BasicType *sig_bt,
 784                                          VMRegPair *regs,
 785                                          VMRegPair *regs2,
 786                                          int total_args_passed) {
 787   assert(regs2 == NULL, "not needed on AArch64");
 788 
 789 // We return the amount of VMRegImpl stack slots we need to reserve for all
 790 // the arguments NOT counting out_preserve_stack_slots.
 791 
 792     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 793       c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5,  c_rarg6,  c_rarg7
 794     };
 795     static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 796       c_farg0, c_farg1, c_farg2, c_farg3,
 797       c_farg4, c_farg5, c_farg6, c_farg7
 798     };
 799 
 800     uint int_args = 0;
 801     uint fp_args = 0;
 802     uint stk_args = 0; // inc by 2 each time
 803 
 804     for (int i = 0; i < total_args_passed; i++) {
 805       switch (sig_bt[i]) {
 806       case T_BOOLEAN:
 807       case T_CHAR:
 808       case T_BYTE:
 809       case T_SHORT:
 810       case T_INT:
 811         if (int_args < Argument::n_int_register_parameters_c) {
 812           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 813         } else {
 814 #ifdef __APPLE__
 815           // Less-than word types are stored one after another.
 816           // The code is unable to handle this so bailout.
 817           return -1;
 818 #endif
 819           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 820           stk_args += 2;
 821         }
 822         break;
 823       case T_LONG:
 824         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 825         // fall through
 826       case T_OBJECT:
 827       case T_ARRAY:
 828       case T_ADDRESS:
 829       case T_METADATA:
 830         if (int_args < Argument::n_int_register_parameters_c) {
 831           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 832         } else {
 833           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 834           stk_args += 2;
 835         }
 836         break;
 837       case T_FLOAT:
 838         if (fp_args < Argument::n_float_register_parameters_c) {
 839           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 840         } else {
 841 #ifdef __APPLE__
 842           // Less-than word types are stored one after another.
 843           // The code is unable to handle this so bailout.
 844           return -1;
 845 #endif
 846           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 847           stk_args += 2;
 848         }
 849         break;
 850       case T_DOUBLE:
 851         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 852         if (fp_args < Argument::n_float_register_parameters_c) {
 853           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 854         } else {
 855           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 856           stk_args += 2;
 857         }
 858         break;
 859       case T_VOID: // Halves of longs and doubles
 860         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 861         regs[i].set_bad();
 862         break;
 863       default:
 864         ShouldNotReachHere();
 865         break;
 866       }
 867     }
 868 
 869   return stk_args;
 870 }
 871 
 872 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
 873                                              uint num_bits,
 874                                              uint total_args_passed) {
 875   Unimplemented();
 876   return 0;
 877 }
 878 
 879 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 880                                          VMRegPair *regs,
 881                                          VMRegPair *regs2,
 882                                          int total_args_passed)
 883 {
 884   int result = c_calling_convention_priv(sig_bt, regs, regs2, total_args_passed);
 885   guarantee(result >= 0, "Unsupported arguments configuration");
 886   return result;
 887 }
 888 
 889 // On 64 bit we will store integer like items to the stack as
 890 // 64 bits items (Aarch64 abi) even though java would only store
 891 // 32bits for a parameter. On 32bit it will simply be 32 bits
 892 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
 893 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
 894   if (src.first()->is_stack()) {
 895     if (dst.first()->is_stack()) {
 896       // stack to stack
 897       __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
 898       __ str(rscratch1, Address(sp, reg2offset_out(dst.first())));
 899     } else {
 900       // stack to reg
 901       __ ldrsw(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first())));
 902     }
 903   } else if (dst.first()->is_stack()) {
 904     // reg to stack
 905     // Do we really have to sign extend???
 906     // __ movslq(src.first()->as_Register(), src.first()->as_Register());
 907     __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first())));
 908   } else {
 909     if (dst.first() != src.first()) {
 910       __ sxtw(dst.first()->as_Register(), src.first()->as_Register());
 911     }
 912   }
 913 }
 914 
 915 // An oop arg. Must pass a handle not the oop itself
 916 static void object_move(MacroAssembler* masm,
 917                         OopMap* map,
 918                         int oop_handle_offset,
 919                         int framesize_in_slots,
 920                         VMRegPair src,
 921                         VMRegPair dst,
 922                         bool is_receiver,
 923                         int* receiver_offset) {
 924 
 925   // must pass a handle. First figure out the location we use as a handle
 926 
 927   Register rHandle = dst.first()->is_stack() ? rscratch2 : dst.first()->as_Register();
 928 
 929   // See if oop is NULL if it is we need no handle
 930 
 931   if (src.first()->is_stack()) {
 932 
 933     // Oop is already on the stack as an argument
 934     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
 935     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
 936     if (is_receiver) {
 937       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
 938     }
 939 
 940     __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
 941     __ lea(rHandle, Address(rfp, reg2offset_in(src.first())));
 942     // conditionally move a NULL
 943     __ cmp(rscratch1, zr);
 944     __ csel(rHandle, zr, rHandle, Assembler::EQ);
 945   } else {
 946 
 947     // Oop is in an a register we must store it to the space we reserve
 948     // on the stack for oop_handles and pass a handle if oop is non-NULL
 949 
 950     const Register rOop = src.first()->as_Register();
 951     int oop_slot;
 952     if (rOop == j_rarg0)
 953       oop_slot = 0;
 954     else if (rOop == j_rarg1)
 955       oop_slot = 1;
 956     else if (rOop == j_rarg2)
 957       oop_slot = 2;
 958     else if (rOop == j_rarg3)
 959       oop_slot = 3;
 960     else if (rOop == j_rarg4)
 961       oop_slot = 4;
 962     else if (rOop == j_rarg5)
 963       oop_slot = 5;
 964     else if (rOop == j_rarg6)
 965       oop_slot = 6;
 966     else {
 967       assert(rOop == j_rarg7, "wrong register");
 968       oop_slot = 7;
 969     }
 970 
 971     oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
 972     int offset = oop_slot*VMRegImpl::stack_slot_size;
 973 
 974     map->set_oop(VMRegImpl::stack2reg(oop_slot));
 975     // Store oop in handle area, may be NULL
 976     __ str(rOop, Address(sp, offset));
 977     if (is_receiver) {
 978       *receiver_offset = offset;
 979     }
 980 
 981     __ cmp(rOop, zr);
 982     __ lea(rHandle, Address(sp, offset));
 983     // conditionally move a NULL
 984     __ csel(rHandle, zr, rHandle, Assembler::EQ);
 985   }
 986 
 987   // If arg is on the stack then place it otherwise it is already in correct reg.
 988   if (dst.first()->is_stack()) {
 989     __ str(rHandle, Address(sp, reg2offset_out(dst.first())));
 990   }
 991 }
 992 
 993 // A float arg may have to do float reg int reg conversion
 994 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
 995   assert(src.first()->is_stack() && dst.first()->is_stack() ||
 996          src.first()->is_reg() && dst.first()->is_reg(), "Unexpected error");
 997   if (src.first()->is_stack()) {
 998     if (dst.first()->is_stack()) {
 999       __ ldrw(rscratch1, Address(rfp, reg2offset_in(src.first())));
1000       __ strw(rscratch1, Address(sp, reg2offset_out(dst.first())));
1001     } else {
1002       ShouldNotReachHere();
1003     }
1004   } else if (src.first() != dst.first()) {
1005     if (src.is_single_phys_reg() && dst.is_single_phys_reg())
1006       __ fmovs(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1007     else
1008       ShouldNotReachHere();
1009   }
1010 }
1011 
1012 // A long move
1013 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1014   if (src.first()->is_stack()) {
1015     if (dst.first()->is_stack()) {
1016       // stack to stack
1017       __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
1018       __ str(rscratch1, Address(sp, reg2offset_out(dst.first())));
1019     } else {
1020       // stack to reg
1021       __ ldr(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first())));
1022     }
1023   } else if (dst.first()->is_stack()) {
1024     // reg to stack
1025     // Do we really have to sign extend???
1026     // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1027     __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first())));
1028   } else {
1029     if (dst.first() != src.first()) {
1030       __ mov(dst.first()->as_Register(), src.first()->as_Register());
1031     }
1032   }
1033 }
1034 
1035 
1036 // A double move
1037 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1038   assert(src.first()->is_stack() && dst.first()->is_stack() ||
1039          src.first()->is_reg() && dst.first()->is_reg(), "Unexpected error");
1040   if (src.first()->is_stack()) {
1041     if (dst.first()->is_stack()) {
1042       __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
1043       __ str(rscratch1, Address(sp, reg2offset_out(dst.first())));
1044     } else {
1045       ShouldNotReachHere();
1046     }
1047   } else if (src.first() != dst.first()) {
1048     if (src.is_single_phys_reg() && dst.is_single_phys_reg())
1049       __ fmovd(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1050     else
1051       ShouldNotReachHere();
1052   }
1053 }
1054 
1055 
1056 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1057   // We always ignore the frame_slots arg and just use the space just below frame pointer
1058   // which by this time is free to use
1059   switch (ret_type) {
1060   case T_FLOAT:
1061     __ strs(v0, Address(rfp, -wordSize));
1062     break;
1063   case T_DOUBLE:
1064     __ strd(v0, Address(rfp, -wordSize));
1065     break;
1066   case T_VOID:  break;
1067   default: {
1068     __ str(r0, Address(rfp, -wordSize));
1069     }
1070   }
1071 }
1072 
1073 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1074   // We always ignore the frame_slots arg and just use the space just below frame pointer
1075   // which by this time is free to use
1076   switch (ret_type) {
1077   case T_FLOAT:
1078     __ ldrs(v0, Address(rfp, -wordSize));
1079     break;
1080   case T_DOUBLE:
1081     __ ldrd(v0, Address(rfp, -wordSize));
1082     break;
1083   case T_VOID:  break;
1084   default: {
1085     __ ldr(r0, Address(rfp, -wordSize));
1086     }
1087   }
1088 }
1089 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1090   RegSet x;
1091   for ( int i = first_arg ; i < arg_count ; i++ ) {
1092     if (args[i].first()->is_Register()) {
1093       x = x + args[i].first()->as_Register();
1094     } else if (args[i].first()->is_FloatRegister()) {
1095       __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
1096     }
1097   }
1098   __ push(x, sp);
1099 }
1100 
1101 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1102   RegSet x;
1103   for ( int i = first_arg ; i < arg_count ; i++ ) {
1104     if (args[i].first()->is_Register()) {
1105       x = x + args[i].first()->as_Register();
1106     } else {
1107       ;
1108     }
1109   }
1110   __ pop(x, sp);
1111   for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1112     if (args[i].first()->is_Register()) {
1113       ;
1114     } else if (args[i].first()->is_FloatRegister()) {
1115       __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
1116     }
1117   }
1118 }
1119 
1120 // Unpack an array argument into a pointer to the body and the length
1121 // if the array is non-null, otherwise pass 0 for both.
1122 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { Unimplemented(); }
1123 
1124 
1125 class ComputeMoveOrder: public StackObj {
1126   class MoveOperation: public ResourceObj {
1127     friend class ComputeMoveOrder;
1128    private:
1129     VMRegPair        _src;
1130     VMRegPair        _dst;
1131     int              _src_index;
1132     int              _dst_index;
1133     bool             _processed;
1134     MoveOperation*  _next;
1135     MoveOperation*  _prev;
1136 
1137     static int get_id(VMRegPair r) { Unimplemented(); return 0; }
1138 
1139    public:
1140     MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1141       _src(src)
1142     , _dst(dst)
1143     , _src_index(src_index)
1144     , _dst_index(dst_index)
1145     , _processed(false)
1146     , _next(NULL)
1147     , _prev(NULL) { Unimplemented(); }
1148 
1149     VMRegPair src() const              { Unimplemented(); return _src; }
1150     int src_id() const                 { Unimplemented(); return 0; }
1151     int src_index() const              { Unimplemented(); return 0; }
1152     VMRegPair dst() const              { Unimplemented(); return _src; }
1153     void set_dst(int i, VMRegPair dst) { Unimplemented(); }
1154     int dst_index() const              { Unimplemented(); return 0; }
1155     int dst_id() const                 { Unimplemented(); return 0; }
1156     MoveOperation* next() const        { Unimplemented(); return 0; }
1157     MoveOperation* prev() const        { Unimplemented(); return 0; }
1158     void set_processed()               { Unimplemented(); }
1159     bool is_processed() const          { Unimplemented(); return 0; }
1160 
1161     // insert
1162     void break_cycle(VMRegPair temp_register) { Unimplemented(); }
1163 
1164     void link(GrowableArray<MoveOperation*>& killer) { Unimplemented(); }
1165   };
1166 
1167  private:
1168   GrowableArray<MoveOperation*> edges;
1169 
1170  public:
1171   ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1172                     BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { Unimplemented(); }
1173 
1174   // Collected all the move operations
1175   void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { Unimplemented(); }
1176 
1177   // Walk the edges breaking cycles between moves.  The result list
1178   // can be walked in order to produce the proper set of loads
1179   GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { Unimplemented(); return 0; }
1180 };
1181 
1182 
1183 static void rt_call(MacroAssembler* masm, address dest) {
1184   CodeBlob *cb = CodeCache::find_blob(dest);
1185   if (cb) {
1186     __ far_call(RuntimeAddress(dest));
1187   } else {
1188     __ lea(rscratch1, RuntimeAddress(dest));
1189     __ blr(rscratch1);
1190   }
1191 }
1192 
1193 static void verify_oop_args(MacroAssembler* masm,
1194                             const methodHandle& method,
1195                             const BasicType* sig_bt,
1196                             const VMRegPair* regs) {
1197   Register temp_reg = r19;  // not part of any compiled calling seq
1198   if (VerifyOops) {
1199     for (int i = 0; i < method->size_of_parameters(); i++) {
1200       if (sig_bt[i] == T_OBJECT ||
1201           sig_bt[i] == T_ARRAY) {
1202         VMReg r = regs[i].first();
1203         assert(r->is_valid(), "bad oop arg");
1204         if (r->is_stack()) {
1205           __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1206           __ verify_oop(temp_reg);
1207         } else {
1208           __ verify_oop(r->as_Register());
1209         }
1210       }
1211     }
1212   }
1213 }
1214 
1215 // defined in stubGenerator_aarch64.cpp
1216 OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots);
1217 void fill_continuation_entry(MacroAssembler* masm);
1218 void continuation_enter_cleanup(MacroAssembler* masm);
1219 
1220 // enterSpecial(Continuation c, boolean isContinue)
1221 // On entry: c_rarg1 -- the continuation object
1222 //           c_rarg2 -- isContinue
1223 static void gen_continuation_enter(MacroAssembler* masm,
1224                                  const methodHandle& method,
1225                                  const BasicType* sig_bt,
1226                                  const VMRegPair* regs,
1227                                  int& exception_offset,
1228                                  OopMapSet*oop_maps,
1229                                  int& frame_complete,
1230                                  int& stack_slots) {
1231   //verify_oop_args(masm, method, sig_bt, regs);
1232   Address resolve(SharedRuntime::get_resolve_static_call_stub(), 
1233                   relocInfo::static_call_type);
1234 
1235   stack_slots = 2; // will be overwritten
1236   address start = __ pc();
1237 
1238   Label call_thaw, exit;
1239 
1240   __ enter(); // push(rbp);
1241 
1242   //BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1243   //bs->nmethod_entry_barrier(masm);
1244   OopMap* map = continuation_enter_setup(masm, stack_slots);
1245 
1246   // Frame is now completed as far as size and linkage.
1247   frame_complete =__ pc() - start;
1248 
1249   fill_continuation_entry(masm);
1250 
1251   __ cmp(c_rarg2, (u1)0);
1252   __ br(Assembler::NE, call_thaw);
1253   
1254   address mark = __ pc();
1255 //  __ relocate(resolve.rspec());
1256   //if (!far_branches()) {
1257 //  __ bl(resolve.target()); 
1258   __ trampoline_call1(resolve, NULL, false);
1259 
1260   oop_maps->add_gc_map(__ pc() - start, map);
1261   __ post_call_nop();
1262 
1263   __ b(exit);
1264 
1265   __ bind(call_thaw);
1266 
1267   rt_call(masm, CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1268   oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1269   ContinuationEntry::return_pc_offset = __ pc() - start;
1270   __ post_call_nop();
1271 
1272   __ bind(exit);
1273   continuation_enter_cleanup(masm);
1274   __ leave();
1275   __ ret(lr);
1276 
1277   /// exception handling
1278 
1279   exception_offset = __ pc() - start;
1280   {
1281       __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1282   
1283       continuation_enter_cleanup(masm);
1284       // __ mov(sp, rfp);
1285   
1286       __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1287       __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1288 
1289       // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1290 
1291       __ mov(r1, r0); // the exception handler
1292       __ mov(r0, r19); // restore return value contaning the exception oop
1293       __ verify_oop(r0);
1294 
1295       __ leave();
1296       __ mov(r3, lr);
1297       __ br(r1); // the exception handler
1298   }
1299 
1300   CodeBuffer* cbuf = masm->code_section()->outer();
1301   address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, mark);
1302 }
1303 
1304 static void gen_special_dispatch(MacroAssembler* masm,
1305                                  const methodHandle& method,
1306                                  const BasicType* sig_bt,
1307                                  const VMRegPair* regs) {
1308   verify_oop_args(masm, method, sig_bt, regs);
1309   vmIntrinsics::ID iid = method->intrinsic_id();
1310 
1311   // Now write the args into the outgoing interpreter space
1312   bool     has_receiver   = false;
1313   Register receiver_reg   = noreg;
1314   int      member_arg_pos = -1;
1315   Register member_reg     = noreg;
1316   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1317   if (ref_kind != 0) {
1318     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1319     member_reg = r19;  // known to be free at this point
1320     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1321   } else if (iid == vmIntrinsics::_invokeBasic || iid == vmIntrinsics::_linkToNative) {
1322     has_receiver = true;
1323   } else {
1324     fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1325   }
1326 
1327   if (member_reg != noreg) {
1328     // Load the member_arg into register, if necessary.
1329     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1330     VMReg r = regs[member_arg_pos].first();
1331     if (r->is_stack()) {
1332       __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1333     } else {
1334       // no data motion is needed
1335       member_reg = r->as_Register();
1336     }
1337   }
1338 
1339   if (has_receiver) {
1340     // Make sure the receiver is loaded into a register.
1341     assert(method->size_of_parameters() > 0, "oob");
1342     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1343     VMReg r = regs[0].first();
1344     assert(r->is_valid(), "bad receiver arg");
1345     if (r->is_stack()) {
1346       // Porting note:  This assumes that compiled calling conventions always
1347       // pass the receiver oop in a register.  If this is not true on some
1348       // platform, pick a temp and load the receiver from stack.
1349       fatal("receiver always in a register");
1350       receiver_reg = r2;  // known to be free at this point
1351       __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1352     } else {
1353       // no data motion is needed
1354       receiver_reg = r->as_Register();
1355     }
1356   }
1357 
1358   // Figure out which address we are really jumping to:
1359   MethodHandles::generate_method_handle_dispatch(masm, iid,
1360                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1361 }
1362 
1363 // ---------------------------------------------------------------------------
1364 // Generate a native wrapper for a given method.  The method takes arguments
1365 // in the Java compiled code convention, marshals them to the native
1366 // convention (handlizes oops, etc), transitions to native, makes the call,
1367 // returns to java state (possibly blocking), unhandlizes any result and
1368 // returns.
1369 //
1370 // Critical native functions are a shorthand for the use of
1371 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1372 // functions.  The wrapper is expected to unpack the arguments before
1373 // passing them to the callee. Critical native functions leave the state _in_Java,
1374 // since they block out GC.
1375 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1376 // block and the check for pending exceptions it's impossible for them
1377 // to be thrown.
1378 //
1379 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1380                                                 const methodHandle& method,
1381                                                 int compile_id,
1382                                                 BasicType* in_sig_bt,
1383                                                 VMRegPair* in_regs,
1384                                                 BasicType ret_type,
1385                                                 address critical_entry) {
1386   if (method->is_continuation_enter_intrinsic()) {
1387     vmIntrinsics::ID iid = method->intrinsic_id();
1388     intptr_t start = (intptr_t)__ pc();
1389     int vep_offset = ((intptr_t)__ pc()) - start;
1390     int exception_offset = 0;
1391     int frame_complete = 0;
1392     int stack_slots = 0;
1393     OopMapSet* oop_maps =  new OopMapSet();
1394     gen_continuation_enter(masm,
1395                          method,
1396                          in_sig_bt,
1397                          in_regs,
1398                          exception_offset,
1399                          oop_maps,
1400                          frame_complete,
1401                          stack_slots);
1402     __ flush();
1403     nmethod* nm = nmethod::new_native_nmethod(method,
1404                                               compile_id,
1405                                               masm->code(),
1406                                               vep_offset,
1407                                               frame_complete,
1408                                               stack_slots,
1409                                               in_ByteSize(-1),
1410                                               in_ByteSize(-1),
1411                                               oop_maps,
1412                                               exception_offset);
1413     ContinuationEntry::set_enter_nmethod(nm);
1414     return nm;
1415   }
1416 
1417   if (method->is_method_handle_intrinsic()) {
1418     vmIntrinsics::ID iid = method->intrinsic_id();
1419     intptr_t start = (intptr_t)__ pc();
1420     int vep_offset = ((intptr_t)__ pc()) - start;
1421 
1422     // First instruction must be a nop as it may need to be patched on deoptimisation
1423     __ nop();
1424     gen_special_dispatch(masm,
1425                          method,
1426                          in_sig_bt,
1427                          in_regs);
1428     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1429     __ flush();
1430     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1431     return nmethod::new_native_nmethod(method,
1432                                        compile_id,
1433                                        masm->code(),
1434                                        vep_offset,
1435                                        frame_complete,
1436                                        stack_slots / VMRegImpl::slots_per_word,
1437                                        in_ByteSize(-1),
1438                                        in_ByteSize(-1),
1439                                        (OopMapSet*)NULL);
1440   }
1441   bool is_critical_native = true;
1442   address native_func = critical_entry;
1443   if (native_func == NULL) {
1444     native_func = method->native_function();
1445     is_critical_native = false;
1446   }
1447   assert(native_func != NULL, "must have function");
1448 
1449   // An OopMap for lock (and class if static)
1450   OopMapSet *oop_maps = new OopMapSet();
1451   intptr_t start = (intptr_t)__ pc();
1452 
1453   // We have received a description of where all the java arg are located
1454   // on entry to the wrapper. We need to convert these args to where
1455   // the jni function will expect them. To figure out where they go
1456   // we convert the java signature to a C signature by inserting
1457   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1458 
1459   const int total_in_args = method->size_of_parameters();
1460   int total_c_args = total_in_args;
1461   if (!is_critical_native) {
1462     total_c_args += 1;
1463     if (method->is_static()) {
1464       total_c_args++;
1465     }
1466   } else {
1467     for (int i = 0; i < total_in_args; i++) {
1468       if (in_sig_bt[i] == T_ARRAY) {
1469         total_c_args++;
1470       }
1471     }
1472   }
1473 
1474   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1475   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1476   BasicType* in_elem_bt = NULL;
1477 
1478   int argc = 0;
1479   if (!is_critical_native) {
1480     out_sig_bt[argc++] = T_ADDRESS;
1481     if (method->is_static()) {
1482       out_sig_bt[argc++] = T_OBJECT;
1483     }
1484 
1485     for (int i = 0; i < total_in_args ; i++ ) {
1486       out_sig_bt[argc++] = in_sig_bt[i];
1487     }
1488   } else {
1489     in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1490     SignatureStream ss(method->signature());
1491     for (int i = 0; i < total_in_args ; i++ ) {
1492       if (in_sig_bt[i] == T_ARRAY) {
1493         // Arrays are passed as int, elem* pair
1494         out_sig_bt[argc++] = T_INT;
1495         out_sig_bt[argc++] = T_ADDRESS;
1496         ss.skip_array_prefix(1);  // skip one '['
1497         assert(ss.is_primitive(), "primitive type expected");
1498         in_elem_bt[i] = ss.type();
1499       } else {
1500         out_sig_bt[argc++] = in_sig_bt[i];
1501         in_elem_bt[i] = T_VOID;
1502       }
1503       if (in_sig_bt[i] != T_VOID) {
1504         assert(in_sig_bt[i] == ss.type() ||
1505                in_sig_bt[i] == T_ARRAY, "must match");
1506         ss.next();
1507       }
1508     }
1509   }
1510 
1511   // Now figure out where the args must be stored and how much stack space
1512   // they require.
1513   int out_arg_slots;
1514   out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, NULL, total_c_args);
1515 
1516   if (out_arg_slots < 0) {
1517     return NULL;
1518   }
1519 
1520   // Compute framesize for the wrapper.  We need to handlize all oops in
1521   // incoming registers
1522 
1523   // Calculate the total number of stack slots we will need.
1524 
1525   // First count the abi requirement plus all of the outgoing args
1526   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1527 
1528   // Now the space for the inbound oop handle area
1529   int total_save_slots = 8 * VMRegImpl::slots_per_word;  // 8 arguments passed in registers
1530   if (is_critical_native) {
1531     // Critical natives may have to call out so they need a save area
1532     // for register arguments.
1533     int double_slots = 0;
1534     int single_slots = 0;
1535     for ( int i = 0; i < total_in_args; i++) {
1536       if (in_regs[i].first()->is_Register()) {
1537         const Register reg = in_regs[i].first()->as_Register();
1538         switch (in_sig_bt[i]) {
1539           case T_BOOLEAN:
1540           case T_BYTE:
1541           case T_SHORT:
1542           case T_CHAR:
1543           case T_INT:  single_slots++; break;
1544           case T_ARRAY:  // specific to LP64 (7145024)
1545           case T_LONG: double_slots++; break;
1546           default:  ShouldNotReachHere();
1547         }
1548       } else if (in_regs[i].first()->is_FloatRegister()) {
1549         ShouldNotReachHere();
1550       }
1551     }
1552     total_save_slots = double_slots * 2 + single_slots;
1553     // align the save area
1554     if (double_slots != 0) {
1555       stack_slots = align_up(stack_slots, 2);
1556     }
1557   }
1558 
1559   int oop_handle_offset = stack_slots;
1560   stack_slots += total_save_slots;
1561 
1562   // Now any space we need for handlizing a klass if static method
1563 
1564   int klass_slot_offset = 0;
1565   int klass_offset = -1;
1566   int lock_slot_offset = 0;
1567   bool is_static = false;
1568 
1569   if (method->is_static()) {
1570     klass_slot_offset = stack_slots;
1571     stack_slots += VMRegImpl::slots_per_word;
1572     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1573     is_static = true;
1574   }
1575 
1576   // Plus a lock if needed
1577 
1578   if (method->is_synchronized()) {
1579     lock_slot_offset = stack_slots;
1580     stack_slots += VMRegImpl::slots_per_word;
1581   }
1582 
1583   // Now a place (+2) to save return values or temp during shuffling
1584   // + 4 for return address (which we own) and saved rfp
1585   stack_slots += 6;
1586 
1587   // Ok The space we have allocated will look like:
1588   //
1589   //
1590   // FP-> |                     |
1591   //      |---------------------|
1592   //      | 2 slots for moves   |
1593   //      |---------------------|
1594   //      | lock box (if sync)  |
1595   //      |---------------------| <- lock_slot_offset
1596   //      | klass (if static)   |
1597   //      |---------------------| <- klass_slot_offset
1598   //      | oopHandle area      |
1599   //      |---------------------| <- oop_handle_offset (8 java arg registers)
1600   //      | outbound memory     |
1601   //      | based arguments     |
1602   //      |                     |
1603   //      |---------------------|
1604   //      |                     |
1605   // SP-> | out_preserved_slots |
1606   //
1607   //
1608 
1609 
1610   // Now compute actual number of stack words we need rounding to make
1611   // stack properly aligned.
1612   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1613 
1614   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1615 
1616   // First thing make an ic check to see if we should even be here
1617 
1618   // We are free to use all registers as temps without saving them and
1619   // restoring them except rfp. rfp is the only callee save register
1620   // as far as the interpreter and the compiler(s) are concerned.
1621 
1622 
1623   const Register ic_reg = rscratch2;
1624   const Register receiver = j_rarg0;
1625 
1626   Label hit;
1627   Label exception_pending;
1628 
1629   assert_different_registers(ic_reg, receiver, rscratch1);
1630   __ verify_oop(receiver);
1631   __ cmp_klass(receiver, ic_reg, rscratch1);
1632   __ br(Assembler::EQ, hit);
1633 
1634   __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1635 
1636   // Verified entry point must be aligned
1637   __ align(8);
1638 
1639   __ bind(hit);
1640 
1641   int vep_offset = ((intptr_t)__ pc()) - start;
1642 
1643   // If we have to make this method not-entrant we'll overwrite its
1644   // first instruction with a jump.  For this action to be legal we
1645   // must ensure that this first instruction is a B, BL, NOP, BKPT,
1646   // SVC, HVC, or SMC.  Make it a NOP.
1647   __ nop();
1648 
1649   if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1650     Label L_skip_barrier;
1651     __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1652     __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1653     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1654 
1655     __ bind(L_skip_barrier);
1656   }
1657 
1658   // Generate stack overflow check
1659   __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1660 
1661   // Generate a new frame for the wrapper.
1662   __ enter();
1663   // -2 because return address is already present and so is saved rfp
1664   __ sub(sp, sp, stack_size - 2*wordSize);
1665 
1666   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1667   bs->nmethod_entry_barrier(masm);
1668 
1669   // Frame is now completed as far as size and linkage.
1670   int frame_complete = ((intptr_t)__ pc()) - start;
1671 
1672   // We use r20 as the oop handle for the receiver/klass
1673   // It is callee save so it survives the call to native
1674 
1675   const Register oop_handle_reg = r20;
1676 
1677   //
1678   // We immediately shuffle the arguments so that any vm call we have to
1679   // make from here on out (sync slow path, jvmti, etc.) we will have
1680   // captured the oops from our caller and have a valid oopMap for
1681   // them.
1682 
1683   // -----------------
1684   // The Grand Shuffle
1685 
1686   // The Java calling convention is either equal (linux) or denser (win64) than the
1687   // c calling convention. However the because of the jni_env argument the c calling
1688   // convention always has at least one more (and two for static) arguments than Java.
1689   // Therefore if we move the args from java -> c backwards then we will never have
1690   // a register->register conflict and we don't have to build a dependency graph
1691   // and figure out how to break any cycles.
1692   //
1693 
1694   // Record esp-based slot for receiver on stack for non-static methods
1695   int receiver_offset = -1;
1696 
1697   // This is a trick. We double the stack slots so we can claim
1698   // the oops in the caller's frame. Since we are sure to have
1699   // more args than the caller doubling is enough to make
1700   // sure we can capture all the incoming oop args from the
1701   // caller.
1702   //
1703   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1704 
1705   // Mark location of rfp (someday)
1706   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1707 
1708 
1709   int float_args = 0;
1710   int int_args = 0;
1711 
1712 #ifdef ASSERT
1713   bool reg_destroyed[RegisterImpl::number_of_registers];
1714   bool freg_destroyed[FloatRegisterImpl::number_of_registers];
1715   for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
1716     reg_destroyed[r] = false;
1717   }
1718   for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) {
1719     freg_destroyed[f] = false;
1720   }
1721 
1722 #endif /* ASSERT */
1723 
1724   // This may iterate in two different directions depending on the
1725   // kind of native it is.  The reason is that for regular JNI natives
1726   // the incoming and outgoing registers are offset upwards and for
1727   // critical natives they are offset down.
1728   GrowableArray<int> arg_order(2 * total_in_args);
1729   VMRegPair tmp_vmreg;
1730   tmp_vmreg.set2(r19->as_VMReg());
1731 
1732   if (!is_critical_native) {
1733     for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1734       arg_order.push(i);
1735       arg_order.push(c_arg);
1736     }
1737   } else {
1738     // Compute a valid move order, using tmp_vmreg to break any cycles
1739     ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
1740   }
1741 
1742   int temploc = -1;
1743   for (int ai = 0; ai < arg_order.length(); ai += 2) {
1744     int i = arg_order.at(ai);
1745     int c_arg = arg_order.at(ai + 1);
1746     __ block_comment(err_msg("move %d -> %d", i, c_arg));
1747     if (c_arg == -1) {
1748       assert(is_critical_native, "should only be required for critical natives");
1749       // This arg needs to be moved to a temporary
1750       __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
1751       in_regs[i] = tmp_vmreg;
1752       temploc = i;
1753       continue;
1754     } else if (i == -1) {
1755       assert(is_critical_native, "should only be required for critical natives");
1756       // Read from the temporary location
1757       assert(temploc != -1, "must be valid");
1758       i = temploc;
1759       temploc = -1;
1760     }
1761 #ifdef ASSERT
1762     if (in_regs[i].first()->is_Register()) {
1763       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1764     } else if (in_regs[i].first()->is_FloatRegister()) {
1765       assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1766     }
1767     if (out_regs[c_arg].first()->is_Register()) {
1768       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1769     } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1770       freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1771     }
1772 #endif /* ASSERT */
1773     switch (in_sig_bt[i]) {
1774       case T_ARRAY:
1775         if (is_critical_native) {
1776           unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1777           c_arg++;
1778 #ifdef ASSERT
1779           if (out_regs[c_arg].first()->is_Register()) {
1780             reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1781           } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1782             freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1783           }
1784 #endif
1785           int_args++;
1786           break;
1787         }
1788       case T_OBJECT:
1789         assert(!is_critical_native, "no oop arguments");
1790         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1791                     ((i == 0) && (!is_static)),
1792                     &receiver_offset);
1793         int_args++;
1794         break;
1795       case T_VOID:
1796         break;
1797 
1798       case T_FLOAT:
1799         float_move(masm, in_regs[i], out_regs[c_arg]);
1800         float_args++;
1801         break;
1802 
1803       case T_DOUBLE:
1804         assert( i + 1 < total_in_args &&
1805                 in_sig_bt[i + 1] == T_VOID &&
1806                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1807         double_move(masm, in_regs[i], out_regs[c_arg]);
1808         float_args++;
1809         break;
1810 
1811       case T_LONG :
1812         long_move(masm, in_regs[i], out_regs[c_arg]);
1813         int_args++;
1814         break;
1815 
1816       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1817 
1818       default:
1819         move32_64(masm, in_regs[i], out_regs[c_arg]);
1820         int_args++;
1821     }
1822   }
1823 
1824   // point c_arg at the first arg that is already loaded in case we
1825   // need to spill before we call out
1826   int c_arg = total_c_args - total_in_args;
1827 
1828   // Pre-load a static method's oop into c_rarg1.
1829   if (method->is_static() && !is_critical_native) {
1830 
1831     //  load oop into a register
1832     __ movoop(c_rarg1,
1833               JNIHandles::make_local(method->method_holder()->java_mirror()),
1834               /*immediate*/true);
1835 
1836     // Now handlize the static class mirror it's known not-null.
1837     __ str(c_rarg1, Address(sp, klass_offset));
1838     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1839 
1840     // Now get the handle
1841     __ lea(c_rarg1, Address(sp, klass_offset));
1842     // and protect the arg if we must spill
1843     c_arg--;
1844   }
1845 
1846   // Change state to native (we save the return address in the thread, since it might not
1847   // be pushed on the stack when we do a stack traversal).
1848   // We use the same pc/oopMap repeatedly when we call out
1849 
1850   Label native_return;
1851   __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1852 
1853   Label dtrace_method_entry, dtrace_method_entry_done;
1854   {
1855     uint64_t offset;
1856     __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1857     __ ldrb(rscratch1, Address(rscratch1, offset));
1858     __ cbnzw(rscratch1, dtrace_method_entry);
1859     __ bind(dtrace_method_entry_done);
1860   }
1861 
1862   // RedefineClasses() tracing support for obsolete method entry
1863   if (log_is_enabled(Trace, redefine, class, obsolete)) {
1864     // protect the args we've loaded
1865     save_args(masm, total_c_args, c_arg, out_regs);
1866     __ mov_metadata(c_rarg1, method());
1867     __ call_VM_leaf(
1868       CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1869       rthread, c_rarg1);
1870     restore_args(masm, total_c_args, c_arg, out_regs);
1871   }
1872 
1873   // Lock a synchronized method
1874 
1875   // Register definitions used by locking and unlocking
1876 
1877   const Register swap_reg = r0;
1878   const Register obj_reg  = r19;  // Will contain the oop
1879   const Register lock_reg = r13;  // Address of compiler lock object (BasicLock)
1880   const Register old_hdr  = r13;  // value of old header at unlock time
1881   const Register tmp = lr;
1882 
1883   Label slow_path_lock;
1884   Label lock_done;
1885 
1886   if (method->is_synchronized()) {
1887     assert(!is_critical_native, "unhandled");
1888 
1889     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1890 
1891     // Get the handle (the 2nd argument)
1892     __ mov(oop_handle_reg, c_rarg1);
1893 
1894     // Get address of the box
1895 
1896     __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1897 
1898     // Load the oop from the handle
1899     __ ldr(obj_reg, Address(oop_handle_reg, 0));
1900 
1901     // Load (object->mark() | 1) into swap_reg %r0
1902     __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1903     __ orr(swap_reg, rscratch1, 1);
1904 
1905     // Save (object->mark() | 1) into BasicLock's displaced header
1906     __ str(swap_reg, Address(lock_reg, mark_word_offset));
1907 
1908     // src -> dest iff dest == r0 else r0 <- dest
1909     { Label here;
1910       __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, lock_done, /*fallthrough*/NULL);
1911     }
1912 
1913     // Hmm should this move to the slow path code area???
1914 
1915     // Test if the oopMark is an obvious stack pointer, i.e.,
1916     //  1) (mark & 3) == 0, and
1917     //  2) sp <= mark < mark + os::pagesize()
1918     // These 3 tests can be done by evaluating the following
1919     // expression: ((mark - sp) & (3 - os::vm_page_size())),
1920     // assuming both stack pointer and pagesize have their
1921     // least significant 2 bits clear.
1922     // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
1923 
1924     __ sub(swap_reg, sp, swap_reg);
1925     __ neg(swap_reg, swap_reg);
1926     __ ands(swap_reg, swap_reg, 3 - os::vm_page_size());
1927 
1928     // Save the test result, for recursive case, the result is zero
1929     __ str(swap_reg, Address(lock_reg, mark_word_offset));
1930     __ br(Assembler::NE, slow_path_lock);
1931 
1932     // Slow path will re-enter here
1933 
1934     __ bind(lock_done);
1935   }
1936 
1937 
1938   // Finally just about ready to make the JNI call
1939 
1940   // get JNIEnv* which is first argument to native
1941   if (!is_critical_native) {
1942     __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
1943 
1944     // Now set thread in native
1945     __ mov(rscratch1, _thread_in_native);
1946     __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1947     __ stlrw(rscratch1, rscratch2);
1948   }
1949 
1950   rt_call(masm, native_func);
1951 
1952   __ bind(native_return);
1953 
1954   intptr_t return_pc = (intptr_t) __ pc();
1955   oop_maps->add_gc_map(return_pc - start, map);
1956 
1957   // Unpack native results.
1958   switch (ret_type) {
1959   case T_BOOLEAN: __ c2bool(r0);                     break;
1960   case T_CHAR   : __ ubfx(r0, r0, 0, 16);            break;
1961   case T_BYTE   : __ sbfx(r0, r0, 0, 8);             break;
1962   case T_SHORT  : __ sbfx(r0, r0, 0, 16);            break;
1963   case T_INT    : __ sbfx(r0, r0, 0, 32);            break;
1964   case T_DOUBLE :
1965   case T_FLOAT  :
1966     // Result is in v0 we'll save as needed
1967     break;
1968   case T_ARRAY:                 // Really a handle
1969   case T_OBJECT:                // Really a handle
1970       break; // can't de-handlize until after safepoint check
1971   case T_VOID: break;
1972   case T_LONG: break;
1973   default       : ShouldNotReachHere();
1974   }
1975 
1976   Label safepoint_in_progress, safepoint_in_progress_done;
1977   Label after_transition;
1978 
1979   // If this is a critical native, check for a safepoint or suspend request after the call.
1980   // If a safepoint is needed, transition to native, then to native_trans to handle
1981   // safepoints like the native methods that are not critical natives.
1982   if (is_critical_native) {
1983     Label needs_safepoint;
1984     __ safepoint_poll(needs_safepoint, false /* at_return */, true /* acquire */, false /* in_nmethod */);
1985     __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1986     __ cbnzw(rscratch1, needs_safepoint);
1987     __ b(after_transition);
1988     __ bind(needs_safepoint);
1989   }
1990 
1991   // Switch thread to "native transition" state before reading the synchronization state.
1992   // This additional state is necessary because reading and testing the synchronization
1993   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1994   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1995   //     VM thread changes sync state to synchronizing and suspends threads for GC.
1996   //     Thread A is resumed to finish this native method, but doesn't block here since it
1997   //     didn't see any synchronization is progress, and escapes.
1998   __ mov(rscratch1, _thread_in_native_trans);
1999 
2000   __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
2001 
2002   // Force this write out before the read below
2003   __ dmb(Assembler::ISH);
2004 
2005   __ verify_sve_vector_length();
2006 
2007   // Check for safepoint operation in progress and/or pending suspend requests.
2008   {
2009     // We need an acquire here to ensure that any subsequent load of the
2010     // global SafepointSynchronize::_state flag is ordered after this load
2011     // of the thread-local polling word.  We don't want this poll to
2012     // return false (i.e. not safepointing) and a later poll of the global
2013     // SafepointSynchronize::_state spuriously to return true.
2014     //
2015     // This is to avoid a race when we're in a native->Java transition
2016     // racing the code which wakes up from a safepoint.
2017 
2018     __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
2019     __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
2020     __ cbnzw(rscratch1, safepoint_in_progress);
2021     __ bind(safepoint_in_progress_done);
2022   }
2023 
2024   // change thread state
2025   __ mov(rscratch1, _thread_in_Java);
2026   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2027   __ stlrw(rscratch1, rscratch2);
2028   __ bind(after_transition);
2029 
2030   Label reguard;
2031   Label reguard_done;
2032   __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
2033   __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
2034   __ br(Assembler::EQ, reguard);
2035   __ bind(reguard_done);
2036 
2037   // native result if any is live
2038 
2039   // Unlock
2040   Label unlock_done;
2041   Label slow_path_unlock;
2042   if (method->is_synchronized()) {
2043 
2044     // Get locked oop from the handle we passed to jni
2045     __ ldr(obj_reg, Address(oop_handle_reg, 0));
2046 
2047     Label done;
2048     // Simple recursive lock?
2049 
2050     __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2051     __ cbz(rscratch1, done);
2052 
2053     // Must save r0 if if it is live now because cmpxchg must use it
2054     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2055       save_native_result(masm, ret_type, stack_slots);
2056     }
2057 
2058 
2059     // get address of the stack lock
2060     __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2061     //  get old displaced header
2062     __ ldr(old_hdr, Address(r0, 0));
2063 
2064     // Atomic swap old header if oop still contains the stack lock
2065     Label succeed;
2066     __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, succeed, &slow_path_unlock);
2067     __ bind(succeed);
2068 
2069     // slow path re-enters here
2070     __ bind(unlock_done);
2071     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2072       restore_native_result(masm, ret_type, stack_slots);
2073     }
2074 
2075     __ bind(done);
2076   }
2077 
2078   Label dtrace_method_exit, dtrace_method_exit_done;
2079   {
2080     uint64_t offset;
2081     __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
2082     __ ldrb(rscratch1, Address(rscratch1, offset));
2083     __ cbnzw(rscratch1, dtrace_method_exit);
2084     __ bind(dtrace_method_exit_done);
2085   }
2086 
2087   __ reset_last_Java_frame(false);
2088 
2089   // Unbox oop result, e.g. JNIHandles::resolve result.
2090   if (is_reference_type(ret_type)) {
2091     __ resolve_jobject(r0, rthread, rscratch2);
2092   }
2093 
2094   if (CheckJNICalls) {
2095     // clear_pending_jni_exception_check
2096     __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
2097   }
2098 
2099   if (!is_critical_native) {
2100     // reset handle block
2101     __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
2102     __ str(zr, Address(r2, JNIHandleBlock::top_offset_in_bytes()));
2103   }
2104 
2105   __ leave();
2106 
2107   if (!is_critical_native) {
2108     // Any exception pending?
2109     __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2110     __ cbnz(rscratch1, exception_pending);
2111   }
2112 
2113   // We're done
2114   __ ret(lr);
2115 
2116   // Unexpected paths are out of line and go here
2117 
2118   if (!is_critical_native) {
2119     // forward the exception
2120     __ bind(exception_pending);
2121 
2122     // and forward the exception
2123     __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2124   }
2125 
2126   // Slow path locking & unlocking
2127   if (method->is_synchronized()) {
2128 
2129     __ block_comment("Slow path lock {");
2130     __ bind(slow_path_lock);
2131 
2132     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2133     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2134 
2135     // protect the args we've loaded
2136     save_args(masm, total_c_args, c_arg, out_regs);
2137 
2138     __ mov(c_rarg0, obj_reg);
2139     __ mov(c_rarg1, lock_reg);
2140     __ mov(c_rarg2, rthread);
2141 
2142     // Not a leaf but we have last_Java_frame setup as we want
2143     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2144     restore_args(masm, total_c_args, c_arg, out_regs);
2145 
2146 #ifdef ASSERT
2147     { Label L;
2148       __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2149       __ cbz(rscratch1, L);
2150       __ stop("no pending exception allowed on exit from monitorenter");
2151       __ bind(L);
2152     }
2153 #endif
2154     __ b(lock_done);
2155 
2156     __ block_comment("} Slow path lock");
2157 
2158     __ block_comment("Slow path unlock {");
2159     __ bind(slow_path_unlock);
2160 
2161     // If we haven't already saved the native result we must save it now as xmm registers
2162     // are still exposed.
2163 
2164     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2165       save_native_result(masm, ret_type, stack_slots);
2166     }
2167 
2168     __ mov(c_rarg2, rthread);
2169     __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2170     __ mov(c_rarg0, obj_reg);
2171 
2172     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2173     // NOTE that obj_reg == r19 currently
2174     __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2175     __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2176 
2177     rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2178 
2179 #ifdef ASSERT
2180     {
2181       Label L;
2182       __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2183       __ cbz(rscratch1, L);
2184       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2185       __ bind(L);
2186     }
2187 #endif /* ASSERT */
2188 
2189     __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2190 
2191     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2192       restore_native_result(masm, ret_type, stack_slots);
2193     }
2194     __ b(unlock_done);
2195 
2196     __ block_comment("} Slow path unlock");
2197 
2198   } // synchronized
2199 
2200   // SLOW PATH Reguard the stack if needed
2201 
2202   __ bind(reguard);
2203   save_native_result(masm, ret_type, stack_slots);
2204   rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2205   restore_native_result(masm, ret_type, stack_slots);
2206   // and continue
2207   __ b(reguard_done);
2208 
2209   // SLOW PATH safepoint
2210   {
2211     __ block_comment("safepoint {");
2212     __ bind(safepoint_in_progress);
2213 
2214     // Don't use call_VM as it will see a possible pending exception and forward it
2215     // and never return here preventing us from clearing _last_native_pc down below.
2216     //
2217     save_native_result(masm, ret_type, stack_slots);
2218     __ mov(c_rarg0, rthread);
2219 #ifndef PRODUCT
2220   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2221 #endif
2222     __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2223     __ blr(rscratch1);
2224 
2225     // Restore any method result value
2226     restore_native_result(masm, ret_type, stack_slots);
2227 
2228     __ b(safepoint_in_progress_done);
2229     __ block_comment("} safepoint");
2230   }
2231 
2232   // SLOW PATH dtrace support
2233   {
2234     __ block_comment("dtrace entry {");
2235     __ bind(dtrace_method_entry);
2236 
2237     // We have all of the arguments setup at this point. We must not touch any register
2238     // argument registers at this point (what if we save/restore them there are no oop?
2239 
2240     save_args(masm, total_c_args, c_arg, out_regs);
2241     __ mov_metadata(c_rarg1, method());
2242     __ call_VM_leaf(
2243       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2244       rthread, c_rarg1);
2245     restore_args(masm, total_c_args, c_arg, out_regs);
2246     __ b(dtrace_method_entry_done);
2247     __ block_comment("} dtrace entry");
2248   }
2249 
2250   {
2251     __ block_comment("dtrace exit {");
2252     __ bind(dtrace_method_exit);
2253     save_native_result(masm, ret_type, stack_slots);
2254     __ mov_metadata(c_rarg1, method());
2255     __ call_VM_leaf(
2256          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2257          rthread, c_rarg1);
2258     restore_native_result(masm, ret_type, stack_slots);
2259     __ b(dtrace_method_exit_done);
2260     __ block_comment("} dtrace exit");
2261   }
2262 
2263 
2264   __ flush();
2265 
2266   nmethod *nm = nmethod::new_native_nmethod(method,
2267                                             compile_id,
2268                                             masm->code(),
2269                                             vep_offset,
2270                                             frame_complete,
2271                                             stack_slots / VMRegImpl::slots_per_word,
2272                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2273                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2274                                             oop_maps);
2275 
2276   return nm;
2277 }
2278 
2279 // this function returns the adjust size (in number of words) to a c2i adapter
2280 // activation for use during deoptimization
2281 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2282   assert(callee_locals >= callee_parameters,
2283           "test and remove; got more parms than locals");
2284   if (callee_locals < callee_parameters)
2285     return 0;                   // No adjustment for negative locals
2286   int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2287   // diff is counted in stack words
2288   return align_up(diff, 2);
2289 }
2290 
2291 
2292 //------------------------------generate_deopt_blob----------------------------
2293 void SharedRuntime::generate_deopt_blob() {
2294   // Allocate space for the code
2295   ResourceMark rm;
2296   // Setup code generation tools
2297   int pad = 0;
2298 #if INCLUDE_JVMCI
2299   if (EnableJVMCI) {
2300     pad += 512; // Increase the buffer size when compiling for JVMCI
2301   }
2302 #endif
2303   CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2304   MacroAssembler* masm = new MacroAssembler(&buffer);
2305   int frame_size_in_words;
2306   OopMap* map = NULL;
2307   OopMapSet *oop_maps = new OopMapSet();
2308   RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2309 
2310   // -------------
2311   // This code enters when returning to a de-optimized nmethod.  A return
2312   // address has been pushed on the the stack, and return values are in
2313   // registers.
2314   // If we are doing a normal deopt then we were called from the patched
2315   // nmethod from the point we returned to the nmethod. So the return
2316   // address on the stack is wrong by NativeCall::instruction_size
2317   // We will adjust the value so it looks like we have the original return
2318   // address on the stack (like when we eagerly deoptimized).
2319   // In the case of an exception pending when deoptimizing, we enter
2320   // with a return address on the stack that points after the call we patched
2321   // into the exception handler. We have the following register state from,
2322   // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2323   //    r0: exception oop
2324   //    r19: exception handler
2325   //    r3: throwing pc
2326   // So in this case we simply jam r3 into the useless return address and
2327   // the stack looks just like we want.
2328   //
2329   // At this point we need to de-opt.  We save the argument return
2330   // registers.  We call the first C routine, fetch_unroll_info().  This
2331   // routine captures the return values and returns a structure which
2332   // describes the current frame size and the sizes of all replacement frames.
2333   // The current frame is compiled code and may contain many inlined
2334   // functions, each with their own JVM state.  We pop the current frame, then
2335   // push all the new frames.  Then we call the C routine unpack_frames() to
2336   // populate these frames.  Finally unpack_frames() returns us the new target
2337   // address.  Notice that callee-save registers are BLOWN here; they have
2338   // already been captured in the vframeArray at the time the return PC was
2339   // patched.
2340   address start = __ pc();
2341   Label cont;
2342 
2343   // Prolog for non exception case!
2344 
2345   // Save everything in sight.
2346   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2347 
2348   // Normal deoptimization.  Save exec mode for unpack_frames.
2349   __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2350   __ b(cont);
2351 
2352   int reexecute_offset = __ pc() - start;
2353 #if INCLUDE_JVMCI && !defined(COMPILER1)
2354   if (EnableJVMCI && UseJVMCICompiler) {
2355     // JVMCI does not use this kind of deoptimization
2356     __ should_not_reach_here();
2357   }
2358 #endif
2359 
2360   // Reexecute case
2361   // return address is the pc describes what bci to do re-execute at
2362 
2363   // No need to update map as each call to save_live_registers will produce identical oopmap
2364   (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2365 
2366   __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2367   __ b(cont);
2368 
2369 #if INCLUDE_JVMCI
2370   Label after_fetch_unroll_info_call;
2371   int implicit_exception_uncommon_trap_offset = 0;
2372   int uncommon_trap_offset = 0;
2373 
2374   if (EnableJVMCI) {
2375     implicit_exception_uncommon_trap_offset = __ pc() - start;
2376 
2377     __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2378     __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2379 
2380     uncommon_trap_offset = __ pc() - start;
2381 
2382     // Save everything in sight.
2383     reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2384     // fetch_unroll_info needs to call last_java_frame()
2385     Label retaddr;
2386     __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2387 
2388     __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2389     __ movw(rscratch1, -1);
2390     __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2391 
2392     __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2393     __ mov(c_rarg0, rthread);
2394     __ movw(c_rarg2, rcpool); // exec mode
2395     __ lea(rscratch1,
2396            RuntimeAddress(CAST_FROM_FN_PTR(address,
2397                                            Deoptimization::uncommon_trap)));
2398     __ blr(rscratch1);
2399     __ bind(retaddr);
2400     oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2401 
2402     __ reset_last_Java_frame(false);
2403 
2404     __ b(after_fetch_unroll_info_call);
2405   } // EnableJVMCI
2406 #endif // INCLUDE_JVMCI
2407 
2408   int exception_offset = __ pc() - start;
2409 
2410   // Prolog for exception case
2411 
2412   // all registers are dead at this entry point, except for r0, and
2413   // r3 which contain the exception oop and exception pc
2414   // respectively.  Set them in TLS and fall thru to the
2415   // unpack_with_exception_in_tls entry point.
2416 
2417   __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2418   __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2419 
2420   int exception_in_tls_offset = __ pc() - start;
2421 
2422   // new implementation because exception oop is now passed in JavaThread
2423 
2424   // Prolog for exception case
2425   // All registers must be preserved because they might be used by LinearScan
2426   // Exceptiop oop and throwing PC are passed in JavaThread
2427   // tos: stack at point of call to method that threw the exception (i.e. only
2428   // args are on the stack, no return address)
2429 
2430   // The return address pushed by save_live_registers will be patched
2431   // later with the throwing pc. The correct value is not available
2432   // now because loading it from memory would destroy registers.
2433 
2434   // NB: The SP at this point must be the SP of the method that is
2435   // being deoptimized.  Deoptimization assumes that the frame created
2436   // here by save_live_registers is immediately below the method's SP.
2437   // This is a somewhat fragile mechanism.
2438 
2439   // Save everything in sight.
2440   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2441 
2442   // Now it is safe to overwrite any register
2443 
2444   // Deopt during an exception.  Save exec mode for unpack_frames.
2445   __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2446 
2447   // load throwing pc from JavaThread and patch it as the return address
2448   // of the current frame. Then clear the field in JavaThread
2449 
2450   __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2451   __ str(r3, Address(rfp, wordSize));
2452   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2453 
2454 #ifdef ASSERT
2455   // verify that there is really an exception oop in JavaThread
2456   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2457   __ verify_oop(r0);
2458 
2459   // verify that there is no pending exception
2460   Label no_pending_exception;
2461   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2462   __ cbz(rscratch1, no_pending_exception);
2463   __ stop("must not have pending exception here");
2464   __ bind(no_pending_exception);
2465 #endif
2466 
2467   __ bind(cont);
2468 
2469   // Call C code.  Need thread and this frame, but NOT official VM entry
2470   // crud.  We cannot block on this call, no GC can happen.
2471   //
2472   // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2473 
2474   // fetch_unroll_info needs to call last_java_frame().
2475 
2476   Label retaddr;
2477   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2478 #ifdef ASSERT0
2479   { Label L;
2480     __ ldr(rscratch1, Address(rthread,
2481                               JavaThread::last_Java_fp_offset()));
2482     __ cbz(rscratch1, L);
2483     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2484     __ bind(L);
2485   }
2486 #endif // ASSERT
2487   __ mov(c_rarg0, rthread);
2488   __ mov(c_rarg1, rcpool);
2489   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2490   __ blr(rscratch1);
2491   __ bind(retaddr);
2492 
2493   // Need to have an oopmap that tells fetch_unroll_info where to
2494   // find any register it might need.
2495   oop_maps->add_gc_map(__ pc() - start, map);
2496 
2497   __ reset_last_Java_frame(false);
2498 
2499 #if INCLUDE_JVMCI
2500   if (EnableJVMCI) {
2501     __ bind(after_fetch_unroll_info_call);
2502   }
2503 #endif
2504 
2505   // Load UnrollBlock* into r5
2506   __ mov(r5, r0);
2507 
2508   __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2509    Label noException;
2510   __ cmpw(rcpool, Deoptimization::Unpack_exception);   // Was exception pending?
2511   __ br(Assembler::NE, noException);
2512   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2513   // QQQ this is useless it was NULL above
2514   __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2515   __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2516   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2517 
2518   __ verify_oop(r0);
2519 
2520   // Overwrite the result registers with the exception results.
2521   __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2522   // I think this is useless
2523   // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2524 
2525   __ bind(noException);
2526 
2527   // Only register save data is on the stack.
2528   // Now restore the result registers.  Everything else is either dead
2529   // or captured in the vframeArray.
2530 
2531   // Restore fp result register
2532   __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2533   // Restore integer result register
2534   __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2535 
2536   // Pop all of the register save area off the stack
2537   __ add(sp, sp, frame_size_in_words * wordSize);
2538 
2539   // All of the register save area has been popped of the stack. Only the
2540   // return address remains.
2541 
2542   // Pop all the frames we must move/replace.
2543   //
2544   // Frame picture (youngest to oldest)
2545   // 1: self-frame (no frame link)
2546   // 2: deopting frame  (no frame link)
2547   // 3: caller of deopting frame (could be compiled/interpreted).
2548   //
2549   // Note: by leaving the return address of self-frame on the stack
2550   // and using the size of frame 2 to adjust the stack
2551   // when we are done the return to frame 3 will still be on the stack.
2552 
2553   // Pop deoptimized frame
2554   __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2555   __ sub(r2, r2, 2 * wordSize);
2556   __ add(sp, sp, r2);
2557   __ ldp(rfp, lr, __ post(sp, 2 * wordSize));
2558   // LR should now be the return address to the caller (3)
2559 
2560 #ifdef ASSERT
2561   // Compilers generate code that bang the stack by as much as the
2562   // interpreter would need. So this stack banging should never
2563   // trigger a fault. Verify that it does not on non product builds.
2564   __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2565   __ bang_stack_size(r19, r2);
2566 #endif
2567   // Load address of array of frame pcs into r2
2568   __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2569 
2570   // Trash the old pc
2571   // __ addptr(sp, wordSize);  FIXME ????
2572 
2573   // Load address of array of frame sizes into r4
2574   __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2575 
2576   // Load counter into r3
2577   __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2578 
2579   // Now adjust the caller's stack to make up for the extra locals
2580   // but record the original sp so that we can save it in the skeletal interpreter
2581   // frame and the stack walking of interpreter_sender will get the unextended sp
2582   // value and not the "real" sp value.
2583 
2584   const Register sender_sp = r6;
2585 
2586   __ mov(sender_sp, sp);
2587   __ ldrw(r19, Address(r5,
2588                        Deoptimization::UnrollBlock::
2589                        caller_adjustment_offset_in_bytes()));
2590   __ sub(sp, sp, r19);
2591 
2592   // Push interpreter frames in a loop
2593   __ mov(rscratch1, (uint64_t)0xDEADDEAD);        // Make a recognizable pattern
2594   __ mov(rscratch2, rscratch1);
2595   Label loop;
2596   __ bind(loop);
2597   __ ldr(r19, Address(__ post(r4, wordSize)));          // Load frame size
2598   __ sub(r19, r19, 2*wordSize);           // We'll push pc and fp by hand
2599   __ ldr(lr, Address(__ post(r2, wordSize)));  // Load pc
2600   __ enter();                           // Save old & set new fp
2601   __ sub(sp, sp, r19);                  // Prolog
2602   // This value is corrected by layout_activation_impl
2603   __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2604   __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2605   __ mov(sender_sp, sp);               // Pass sender_sp to next frame
2606   __ sub(r3, r3, 1);                   // Decrement counter
2607   __ cbnz(r3, loop);
2608 
2609     // Re-push self-frame
2610   __ ldr(lr, Address(r2));
2611   __ enter();
2612 
2613   // Allocate a full sized register save area.  We subtract 2 because
2614   // enter() just pushed 2 words
2615   __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2616 
2617   // Restore frame locals after moving the frame
2618   __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2619   __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2620 
2621   // Call C code.  Need thread but NOT official VM entry
2622   // crud.  We cannot block on this call, no GC can happen.  Call should
2623   // restore return values to their stack-slots with the new SP.
2624   //
2625   // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2626 
2627   // Use rfp because the frames look interpreted now
2628   // Don't need the precise return PC here, just precise enough to point into this code blob.
2629   address the_pc = __ pc();
2630   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2631 
2632   __ mov(c_rarg0, rthread);
2633   __ movw(c_rarg1, rcpool); // second arg: exec_mode
2634   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2635   __ blr(rscratch1);
2636 
2637   // Set an oopmap for the call site
2638   // Use the same PC we used for the last java frame
2639   oop_maps->add_gc_map(the_pc - start,
2640                        new OopMap( frame_size_in_words, 0 ));
2641 
2642   // Clear fp AND pc
2643   __ reset_last_Java_frame(true);
2644 
2645   // Collect return values
2646   __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2647   __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2648   // I think this is useless (throwing pc?)
2649   // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2650 
2651   // Pop self-frame.
2652   __ leave();                           // Epilog
2653 
2654   // Jump to interpreter
2655   __ ret(lr);
2656 
2657   // Make sure all code is generated
2658   masm->flush();
2659 
2660   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2661   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2662 #if INCLUDE_JVMCI
2663   if (EnableJVMCI) {
2664     _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2665     _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2666   }
2667 #endif
2668 }
2669 
2670 // Number of stack slots between incoming argument block and the start of
2671 // a new frame.  The PROLOG must add this many slots to the stack.  The
2672 // EPILOG must remove this many slots. aarch64 needs two slots for
2673 // return address and fp.
2674 // TODO think this is correct but check
2675 uint SharedRuntime::in_preserve_stack_slots() {
2676   return 4;
2677 }
2678 
2679 uint SharedRuntime::out_preserve_stack_slots() {
2680   return 0;
2681 }
2682 
2683 #ifdef COMPILER2
2684 //------------------------------generate_uncommon_trap_blob--------------------
2685 void SharedRuntime::generate_uncommon_trap_blob() {
2686   // Allocate space for the code
2687   ResourceMark rm;
2688   // Setup code generation tools
2689   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2690   MacroAssembler* masm = new MacroAssembler(&buffer);
2691 
2692   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2693 
2694   address start = __ pc();
2695 
2696   // Push self-frame.  We get here with a return address in LR
2697   // and sp should be 16 byte aligned
2698   // push rfp and retaddr by hand
2699   __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
2700   // we don't expect an arg reg save area
2701 #ifndef PRODUCT
2702   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2703 #endif
2704   // compiler left unloaded_class_index in j_rarg0 move to where the
2705   // runtime expects it.
2706   if (c_rarg1 != j_rarg0) {
2707     __ movw(c_rarg1, j_rarg0);
2708   }
2709 
2710   // we need to set the past SP to the stack pointer of the stub frame
2711   // and the pc to the address where this runtime call will return
2712   // although actually any pc in this code blob will do).
2713   Label retaddr;
2714   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2715 
2716   // Call C code.  Need thread but NOT official VM entry
2717   // crud.  We cannot block on this call, no GC can happen.  Call should
2718   // capture callee-saved registers as well as return values.
2719   // Thread is in rdi already.
2720   //
2721   // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2722   //
2723   // n.b. 2 gp args, 0 fp args, integral return type
2724 
2725   __ mov(c_rarg0, rthread);
2726   __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap);
2727   __ lea(rscratch1,
2728          RuntimeAddress(CAST_FROM_FN_PTR(address,
2729                                          Deoptimization::uncommon_trap)));
2730   __ blr(rscratch1);
2731   __ bind(retaddr);
2732 
2733   // Set an oopmap for the call site
2734   OopMapSet* oop_maps = new OopMapSet();
2735   OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2736 
2737   // location of rfp is known implicitly by the frame sender code
2738 
2739   oop_maps->add_gc_map(__ pc() - start, map);
2740 
2741   __ reset_last_Java_frame(false);
2742 
2743   // move UnrollBlock* into r4
2744   __ mov(r4, r0);
2745 
2746 #ifdef ASSERT
2747   { Label L;
2748     __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2749     __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2750     __ br(Assembler::EQ, L);
2751     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2752     __ bind(L);
2753   }
2754 #endif
2755 
2756   // Pop all the frames we must move/replace.
2757   //
2758   // Frame picture (youngest to oldest)
2759   // 1: self-frame (no frame link)
2760   // 2: deopting frame  (no frame link)
2761   // 3: caller of deopting frame (could be compiled/interpreted).
2762 
2763   // Pop self-frame.  We have no frame, and must rely only on r0 and sp.
2764   __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2765 
2766   // Pop deoptimized frame (int)
2767   __ ldrw(r2, Address(r4,
2768                       Deoptimization::UnrollBlock::
2769                       size_of_deoptimized_frame_offset_in_bytes()));
2770   __ sub(r2, r2, 2 * wordSize);
2771   __ add(sp, sp, r2);
2772   __ ldp(rfp, lr, __ post(sp, 2 * wordSize));
2773   // LR should now be the return address to the caller (3) frame
2774 
2775 #ifdef ASSERT
2776   // Compilers generate code that bang the stack by as much as the
2777   // interpreter would need. So this stack banging should never
2778   // trigger a fault. Verify that it does not on non product builds.
2779   __ ldrw(r1, Address(r4,
2780                       Deoptimization::UnrollBlock::
2781                       total_frame_sizes_offset_in_bytes()));
2782   __ bang_stack_size(r1, r2);
2783 #endif
2784 
2785   // Load address of array of frame pcs into r2 (address*)
2786   __ ldr(r2, Address(r4,
2787                      Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2788 
2789   // Load address of array of frame sizes into r5 (intptr_t*)
2790   __ ldr(r5, Address(r4,
2791                      Deoptimization::UnrollBlock::
2792                      frame_sizes_offset_in_bytes()));
2793 
2794   // Counter
2795   __ ldrw(r3, Address(r4,
2796                       Deoptimization::UnrollBlock::
2797                       number_of_frames_offset_in_bytes())); // (int)
2798 
2799   // Now adjust the caller's stack to make up for the extra locals but
2800   // record the original sp so that we can save it in the skeletal
2801   // interpreter frame and the stack walking of interpreter_sender
2802   // will get the unextended sp value and not the "real" sp value.
2803 
2804   const Register sender_sp = r8;
2805 
2806   __ mov(sender_sp, sp);
2807   __ ldrw(r1, Address(r4,
2808                       Deoptimization::UnrollBlock::
2809                       caller_adjustment_offset_in_bytes())); // (int)
2810   __ sub(sp, sp, r1);
2811 
2812   // Push interpreter frames in a loop
2813   Label loop;
2814   __ bind(loop);
2815   __ ldr(r1, Address(r5, 0));       // Load frame size
2816   __ sub(r1, r1, 2 * wordSize);     // We'll push pc and rfp by hand
2817   __ ldr(lr, Address(r2, 0));       // Save return address
2818   __ enter();                       // and old rfp & set new rfp
2819   __ sub(sp, sp, r1);               // Prolog
2820   __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2821   // This value is corrected by layout_activation_impl
2822   __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2823   __ mov(sender_sp, sp);          // Pass sender_sp to next frame
2824   __ add(r5, r5, wordSize);       // Bump array pointer (sizes)
2825   __ add(r2, r2, wordSize);       // Bump array pointer (pcs)
2826   __ subsw(r3, r3, 1);            // Decrement counter
2827   __ br(Assembler::GT, loop);
2828   __ ldr(lr, Address(r2, 0));     // save final return address
2829   // Re-push self-frame
2830   __ enter();                     // & old rfp & set new rfp
2831 
2832   // Use rfp because the frames look interpreted now
2833   // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2834   // Don't need the precise return PC here, just precise enough to point into this code blob.
2835   address the_pc = __ pc();
2836   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2837 
2838   // Call C code.  Need thread but NOT official VM entry
2839   // crud.  We cannot block on this call, no GC can happen.  Call should
2840   // restore return values to their stack-slots with the new SP.
2841   // Thread is in rdi already.
2842   //
2843   // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2844   //
2845   // n.b. 2 gp args, 0 fp args, integral return type
2846 
2847   // sp should already be aligned
2848   __ mov(c_rarg0, rthread);
2849   __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2850   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2851   __ blr(rscratch1);
2852 
2853   // Set an oopmap for the call site
2854   // Use the same PC we used for the last java frame
2855   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2856 
2857   // Clear fp AND pc
2858   __ reset_last_Java_frame(true);
2859 
2860   // Pop self-frame.
2861   __ leave();                 // Epilog
2862 
2863   // Jump to interpreter
2864   __ ret(lr);
2865 
2866   // Make sure all code is generated
2867   masm->flush();
2868 
2869   _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
2870                                                  SimpleRuntimeFrame::framesize >> 1);
2871 }
2872 #endif // COMPILER2
2873 
2874 
2875 //------------------------------generate_handler_blob------
2876 //
2877 // Generate a special Compile2Runtime blob that saves all registers,
2878 // and setup oopmap.
2879 //
2880 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2881   ResourceMark rm;
2882   OopMapSet *oop_maps = new OopMapSet();
2883   OopMap* map;
2884 
2885   // Allocate space for the code.  Setup code generation tools.
2886   CodeBuffer buffer("handler_blob", 2048, 1024);
2887   MacroAssembler* masm = new MacroAssembler(&buffer);
2888 
2889   address start   = __ pc();
2890   address call_pc = NULL;
2891   int frame_size_in_words;
2892   bool cause_return = (poll_type == POLL_AT_RETURN);
2893   RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2894 
2895   // Save Integer and Float registers.
2896   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2897 
2898   // The following is basically a call_VM.  However, we need the precise
2899   // address of the call in order to generate an oopmap. Hence, we do all the
2900   // work outselves.
2901 
2902   Label retaddr;
2903   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2904 
2905   // The return address must always be correct so that frame constructor never
2906   // sees an invalid pc.
2907 
2908   if (!cause_return) {
2909     // overwrite the return address pushed by save_live_registers
2910     // Additionally, r20 is a callee-saved register so we can look at
2911     // it later to determine if someone changed the return address for
2912     // us!
2913     __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2914     __ str(r20, Address(rfp, wordSize));
2915   }
2916 
2917   // Do the call
2918   __ mov(c_rarg0, rthread);
2919   __ lea(rscratch1, RuntimeAddress(call_ptr));
2920   __ blr(rscratch1);
2921   __ bind(retaddr);
2922 
2923   // Set an oopmap for the call site.  This oopmap will map all
2924   // oop-registers and debug-info registers as callee-saved.  This
2925   // will allow deoptimization at this safepoint to find all possible
2926   // debug-info recordings, as well as let GC find all oops.
2927 
2928   oop_maps->add_gc_map( __ pc() - start, map);
2929 
2930   Label noException;
2931 
2932   __ reset_last_Java_frame(false);
2933 
2934   __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2935 
2936   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2937   __ cbz(rscratch1, noException);
2938 
2939   // Exception pending
2940 
2941   reg_save.restore_live_registers(masm);
2942 
2943   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2944 
2945   // No exception case
2946   __ bind(noException);
2947 
2948   Label no_adjust, bail;
2949   if (!cause_return) {
2950     // If our stashed return pc was modified by the runtime we avoid touching it
2951     __ ldr(rscratch1, Address(rfp, wordSize));
2952     __ cmp(r20, rscratch1);
2953     __ br(Assembler::NE, no_adjust);
2954 
2955 #ifdef ASSERT
2956     // Verify the correct encoding of the poll we're about to skip.
2957     // See NativeInstruction::is_ldrw_to_zr()
2958     __ ldrw(rscratch1, Address(r20));
2959     __ ubfx(rscratch2, rscratch1, 22, 10);
2960     __ cmpw(rscratch2, 0b1011100101);
2961     __ br(Assembler::NE, bail);
2962     __ ubfx(rscratch2, rscratch1, 0, 5);
2963     __ cmpw(rscratch2, 0b11111);
2964     __ br(Assembler::NE, bail);
2965 #endif
2966     // Adjust return pc forward to step over the safepoint poll instruction
2967     __ add(r20, r20, NativeInstruction::instruction_size);
2968     __ str(r20, Address(rfp, wordSize));
2969   }
2970 
2971   __ bind(no_adjust);
2972   // Normal exit, restore registers and exit.
2973   reg_save.restore_live_registers(masm);
2974 
2975   __ ret(lr);
2976 
2977 #ifdef ASSERT
2978   __ bind(bail);
2979   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2980 #endif
2981 
2982   // Make sure all code is generated
2983   masm->flush();
2984 
2985   // Fill-out other meta info
2986   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2987 }
2988 
2989 //
2990 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2991 //
2992 // Generate a stub that calls into vm to find out the proper destination
2993 // of a java call. All the argument registers are live at this point
2994 // but since this is generic code we don't know what they are and the caller
2995 // must do any gc of the args.
2996 //
2997 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2998   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2999 
3000   // allocate space for the code
3001   ResourceMark rm;
3002 
3003   CodeBuffer buffer(name, 1000, 512);
3004   MacroAssembler* masm                = new MacroAssembler(&buffer);
3005 
3006   int frame_size_in_words;
3007   RegisterSaver reg_save(false /* save_vectors */);
3008 
3009   OopMapSet *oop_maps = new OopMapSet();
3010   OopMap* map = NULL;
3011 
3012   int start = __ offset();
3013 
3014   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
3015 
3016   int frame_complete = __ offset();
3017 
3018   {
3019     Label retaddr;
3020     __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
3021 
3022     __ mov(c_rarg0, rthread);
3023     __ lea(rscratch1, RuntimeAddress(destination));
3024 
3025     __ blr(rscratch1);
3026     __ bind(retaddr);
3027   }
3028 
3029   // Set an oopmap for the call site.
3030   // We need this not only for callee-saved registers, but also for volatile
3031   // registers that the compiler might be keeping live across a safepoint.
3032 
3033   oop_maps->add_gc_map( __ offset() - start, map);
3034 
3035   // r0 contains the address we are going to jump to assuming no exception got installed
3036 
3037   // clear last_Java_sp
3038   __ reset_last_Java_frame(false);
3039   // check for pending exceptions
3040   Label pending;
3041   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
3042   __ cbnz(rscratch1, pending);
3043 
3044   // get the returned Method*
3045   __ get_vm_result_2(rmethod, rthread);
3046   __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
3047 
3048   // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
3049   __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
3050   reg_save.restore_live_registers(masm);
3051 
3052   // We are back the the original state on entry and ready to go.
3053 
3054   __ br(rscratch1);
3055 
3056   // Pending exception after the safepoint
3057 
3058   __ bind(pending);
3059 
3060   reg_save.restore_live_registers(masm);
3061 
3062   // exception pending => remove activation and forward to exception handler
3063 
3064   __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
3065 
3066   __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
3067   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3068 
3069   // -------------
3070   // make sure all code is generated
3071   masm->flush();
3072 
3073   // return the  blob
3074   // frame_size_words or bytes??
3075   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3076 }
3077 
3078 #ifdef COMPILER2
3079 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3080 //
3081 //------------------------------generate_exception_blob---------------------------
3082 // creates exception blob at the end
3083 // Using exception blob, this code is jumped from a compiled method.
3084 // (see emit_exception_handler in x86_64.ad file)
3085 //
3086 // Given an exception pc at a call we call into the runtime for the
3087 // handler in this method. This handler might merely restore state
3088 // (i.e. callee save registers) unwind the frame and jump to the
3089 // exception handler for the nmethod if there is no Java level handler
3090 // for the nmethod.
3091 //
3092 // This code is entered with a jmp.
3093 //
3094 // Arguments:
3095 //   r0: exception oop
3096 //   r3: exception pc
3097 //
3098 // Results:
3099 //   r0: exception oop
3100 //   r3: exception pc in caller or ???
3101 //   destination: exception handler of caller
3102 //
3103 // Note: the exception pc MUST be at a call (precise debug information)
3104 //       Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved.
3105 //
3106 
3107 void OptoRuntime::generate_exception_blob() {
3108   assert(!OptoRuntime::is_callee_saved_register(R3_num), "");
3109   assert(!OptoRuntime::is_callee_saved_register(R0_num), "");
3110   assert(!OptoRuntime::is_callee_saved_register(R2_num), "");
3111 
3112   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3113 
3114   // Allocate space for the code
3115   ResourceMark rm;
3116   // Setup code generation tools
3117   CodeBuffer buffer("exception_blob", 2048, 1024);
3118   MacroAssembler* masm = new MacroAssembler(&buffer);
3119 
3120   // TODO check various assumptions made here
3121   //
3122   // make sure we do so before running this
3123 
3124   address start = __ pc();
3125 
3126   // push rfp and retaddr by hand
3127   // Exception pc is 'return address' for stack walker
3128   __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
3129   // there are no callee save registers and we don't expect an
3130   // arg reg save area
3131 #ifndef PRODUCT
3132   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3133 #endif
3134   // Store exception in Thread object. We cannot pass any arguments to the
3135   // handle_exception call, since we do not want to make any assumption
3136   // about the size of the frame where the exception happened in.
3137   __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
3138   __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
3139 
3140   // This call does all the hard work.  It checks if an exception handler
3141   // exists in the method.
3142   // If so, it returns the handler address.
3143   // If not, it prepares for stack-unwinding, restoring the callee-save
3144   // registers of the frame being removed.
3145   //
3146   // address OptoRuntime::handle_exception_C(JavaThread* thread)
3147   //
3148   // n.b. 1 gp arg, 0 fp args, integral return type
3149 
3150   // the stack should always be aligned
3151   address the_pc = __ pc();
3152   __ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
3153   __ mov(c_rarg0, rthread);
3154   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3155   __ blr(rscratch1);
3156   // handle_exception_C is a special VM call which does not require an explicit
3157   // instruction sync afterwards.
3158 
3159   // May jump to SVE compiled code
3160   __ reinitialize_ptrue();
3161 
3162   // Set an oopmap for the call site.  This oopmap will only be used if we
3163   // are unwinding the stack.  Hence, all locations will be dead.
3164   // Callee-saved registers will be the same as the frame above (i.e.,
3165   // handle_exception_stub), since they were restored when we got the
3166   // exception.
3167 
3168   OopMapSet* oop_maps = new OopMapSet();
3169 
3170   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3171 
3172   __ reset_last_Java_frame(false);
3173 
3174   // Restore callee-saved registers
3175 
3176   // rfp is an implicitly saved callee saved register (i.e. the calling
3177   // convention will save restore it in prolog/epilog) Other than that
3178   // there are no callee save registers now that adapter frames are gone.
3179   // and we dont' expect an arg reg save area
3180   __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize)));
3181 
3182   // r0: exception handler
3183 
3184   // We have a handler in r0 (could be deopt blob).
3185   __ mov(r8, r0);
3186 
3187   // Get the exception oop
3188   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
3189   // Get the exception pc in case we are deoptimized
3190   __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset()));
3191 #ifdef ASSERT
3192   __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset()));
3193   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
3194 #endif
3195   // Clear the exception oop so GC no longer processes it as a root.
3196   __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
3197 
3198   // r0: exception oop
3199   // r8:  exception handler
3200   // r4: exception pc
3201   // Jump to handler
3202 
3203   __ br(r8);
3204 
3205   // Make sure all code is generated
3206   masm->flush();
3207 
3208   // Set exception blob
3209   _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3210 }
3211 
3212 // ---------------------------------------------------------------
3213 
3214 class NativeInvokerGenerator : public StubCodeGenerator {
3215   address _call_target;
3216   int _shadow_space_bytes;
3217 
3218   const GrowableArray<VMReg>& _input_registers;
3219   const GrowableArray<VMReg>& _output_registers;
3220 
3221   int _frame_complete;
3222   int _framesize;
3223   OopMapSet* _oop_maps;
3224 public:
3225   NativeInvokerGenerator(CodeBuffer* buffer,
3226                          address call_target,
3227                          int shadow_space_bytes,
3228                          const GrowableArray<VMReg>& input_registers,
3229                          const GrowableArray<VMReg>& output_registers)
3230    : StubCodeGenerator(buffer, PrintMethodHandleStubs),
3231      _call_target(call_target),
3232      _shadow_space_bytes(shadow_space_bytes),
3233      _input_registers(input_registers),
3234      _output_registers(output_registers),
3235      _frame_complete(0),
3236      _framesize(0),
3237      _oop_maps(NULL) {
3238     assert(_output_registers.length() <= 1
3239            || (_output_registers.length() == 2 && !_output_registers.at(1)->is_valid()), "no multi-reg returns");
3240   }
3241 
3242   void generate();
3243 
3244   int spill_size_in_bytes() const {
3245     if (_output_registers.length() == 0) {
3246       return 0;
3247     }
3248     VMReg reg = _output_registers.at(0);
3249     assert(reg->is_reg(), "must be a register");
3250     if (reg->is_Register()) {
3251       return 8;
3252     } else if (reg->is_FloatRegister()) {
3253       bool use_sve = Matcher::supports_scalable_vector();
3254       if (use_sve) {
3255         return Matcher::scalable_vector_reg_size(T_BYTE);
3256       }
3257       return 16;
3258     } else {
3259       ShouldNotReachHere();
3260     }
3261     return 0;
3262   }
3263 
3264   void spill_output_registers() {
3265     if (_output_registers.length() == 0) {
3266       return;
3267     }
3268     VMReg reg = _output_registers.at(0);
3269     assert(reg->is_reg(), "must be a register");
3270     MacroAssembler* masm = _masm;
3271     if (reg->is_Register()) {
3272       __ spill(reg->as_Register(), true, 0);
3273     } else if (reg->is_FloatRegister()) {
3274       bool use_sve = Matcher::supports_scalable_vector();
3275       if (use_sve) {
3276         __ spill_sve_vector(reg->as_FloatRegister(), 0, Matcher::scalable_vector_reg_size(T_BYTE));
3277       } else {
3278         __ spill(reg->as_FloatRegister(), __ Q, 0);
3279       }
3280     } else {
3281       ShouldNotReachHere();
3282     }
3283   }
3284 
3285   void fill_output_registers() {
3286     if (_output_registers.length() == 0) {
3287       return;
3288     }
3289     VMReg reg = _output_registers.at(0);
3290     assert(reg->is_reg(), "must be a register");
3291     MacroAssembler* masm = _masm;
3292     if (reg->is_Register()) {
3293       __ unspill(reg->as_Register(), true, 0);
3294     } else if (reg->is_FloatRegister()) {
3295       bool use_sve = Matcher::supports_scalable_vector();
3296       if (use_sve) {
3297         __ unspill_sve_vector(reg->as_FloatRegister(), 0, Matcher::scalable_vector_reg_size(T_BYTE));
3298       } else {
3299         __ unspill(reg->as_FloatRegister(), __ Q, 0);
3300       }
3301     } else {
3302       ShouldNotReachHere();
3303     }
3304   }
3305 
3306   int frame_complete() const {
3307     return _frame_complete;
3308   }
3309 
3310   int framesize() const {
3311     return (_framesize >> (LogBytesPerWord - LogBytesPerInt));
3312   }
3313 
3314   OopMapSet* oop_maps() const {
3315     return _oop_maps;
3316   }
3317 
3318 private:
3319 #ifdef ASSERT
3320   bool target_uses_register(VMReg reg) {
3321     return _input_registers.contains(reg) || _output_registers.contains(reg);
3322   }
3323 #endif
3324 };
3325 
3326 static const int native_invoker_code_size = 1024;
3327 
3328 RuntimeStub* SharedRuntime::make_native_invoker(address call_target,
3329                                                 int shadow_space_bytes,
3330                                                 const GrowableArray<VMReg>& input_registers,
3331                                                 const GrowableArray<VMReg>& output_registers) {
3332   int locs_size  = 64;
3333   CodeBuffer code("nep_invoker_blob", native_invoker_code_size, locs_size);
3334   NativeInvokerGenerator g(&code, call_target, shadow_space_bytes, input_registers, output_registers);
3335   g.generate();
3336   code.log_section_sizes("nep_invoker_blob");
3337 
3338   RuntimeStub* stub =
3339     RuntimeStub::new_runtime_stub("nep_invoker_blob",
3340                                   &code,
3341                                   g.frame_complete(),
3342                                   g.framesize(),
3343                                   g.oop_maps(), false);
3344   return stub;
3345 }
3346 
3347 void NativeInvokerGenerator::generate() {
3348   assert(!(target_uses_register(rscratch1->as_VMReg())
3349            || target_uses_register(rscratch2->as_VMReg())
3350            || target_uses_register(rthread->as_VMReg())),
3351          "Register conflict");
3352 
3353   enum layout {
3354     rbp_off,
3355     rbp_off2,
3356     return_off,
3357     return_off2,
3358     framesize // inclusive of return address
3359   };
3360 
3361   assert(_shadow_space_bytes == 0, "not expecting shadow space on AArch64");
3362   _framesize = align_up(framesize + (spill_size_in_bytes() >> LogBytesPerInt), 4);
3363   assert(is_even(_framesize/2), "sp not 16-byte aligned");
3364 
3365   _oop_maps  = new OopMapSet();
3366   MacroAssembler* masm = _masm;
3367 
3368   address start = __ pc();
3369 
3370   __ enter();
3371 
3372   // lr and fp are already in place
3373   __ sub(sp, rfp, ((unsigned)_framesize-4) << LogBytesPerInt); // prolog
3374 
3375   _frame_complete = __ pc() - start;
3376 
3377   address the_pc = __ pc();
3378   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
3379   OopMap* map = new OopMap(_framesize, 0);
3380   _oop_maps->add_gc_map(the_pc - start, map);
3381 
3382   // State transition
3383   __ mov(rscratch1, _thread_in_native);
3384   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
3385   __ stlrw(rscratch1, rscratch2);
3386 
3387   rt_call(masm, _call_target);
3388 
3389   __ mov(rscratch1, _thread_in_native_trans);
3390   __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
3391 
3392   // Force this write out before the read below
3393   __ membar(Assembler::LoadLoad | Assembler::LoadStore |
3394             Assembler::StoreLoad | Assembler::StoreStore);
3395 
3396   __ verify_sve_vector_length();
3397 
3398   Label L_after_safepoint_poll;
3399   Label L_safepoint_poll_slow_path;
3400 
3401   __ safepoint_poll(L_safepoint_poll_slow_path, true /* at_return */, true /* acquire */, false /* in_nmethod */);
3402 
3403   __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
3404   __ cbnzw(rscratch1, L_safepoint_poll_slow_path);
3405 
3406   __ bind(L_after_safepoint_poll);
3407 
3408   // change thread state
3409   __ mov(rscratch1, _thread_in_Java);
3410   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
3411   __ stlrw(rscratch1, rscratch2);
3412 
3413   __ block_comment("reguard stack check");
3414   Label L_reguard;
3415   Label L_after_reguard;
3416   __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
3417   __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
3418   __ br(Assembler::EQ, L_reguard);
3419   __ bind(L_after_reguard);
3420 
3421   __ reset_last_Java_frame(true);
3422 
3423   __ leave(); // required for proper stackwalking of RuntimeStub frame
3424   __ ret(lr);
3425 
3426   //////////////////////////////////////////////////////////////////////////////
3427 
3428   __ block_comment("{ L_safepoint_poll_slow_path");
3429   __ bind(L_safepoint_poll_slow_path);
3430 
3431   // Need to save the native result registers around any runtime calls.
3432   spill_output_registers();
3433 
3434   __ mov(c_rarg0, rthread);
3435   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3436   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
3437   __ blr(rscratch1);
3438 
3439   fill_output_registers();
3440 
3441   __ b(L_after_safepoint_poll);
3442   __ block_comment("} L_safepoint_poll_slow_path");
3443 
3444   //////////////////////////////////////////////////////////////////////////////
3445 
3446   __ block_comment("{ L_reguard");
3447   __ bind(L_reguard);
3448 
3449   spill_output_registers();
3450 
3451   rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
3452 
3453   fill_output_registers();
3454 
3455   __ b(L_after_reguard);
3456 
3457   __ block_comment("} L_reguard");
3458 
3459   //////////////////////////////////////////////////////////////////////////////
3460 
3461   __ flush();
3462 }
3463 #endif // COMPILER2