151 static int cpu_model2() { return _model2; }
152 static int cpu_variant() { return _variant; }
153 static int cpu_revision() { return _revision; }
154
155 static bool model_is(int cpu_model) {
156 return _model == cpu_model || _model2 == cpu_model;
157 }
158
159 static bool is_zva_enabled() { return 0 <= _zva_length; }
160 static int zva_length() {
161 assert(is_zva_enabled(), "ZVA not available");
162 return _zva_length;
163 }
164
165 static int icache_line_size() { return _icache_line_size; }
166 static int dcache_line_size() { return _dcache_line_size; }
167 static int get_initial_sve_vector_length() { return _initial_sve_vector_length; };
168
169 // Aarch64 supports fast class initialization checks
170 static bool supports_fast_class_init_checks() { return true; }
171 constexpr static bool supports_stack_watermark_barrier() { return true; }
172 constexpr static bool supports_recursive_lightweight_locking() { return true; }
173
174 constexpr static bool supports_secondary_supers_table() { return true; }
175
176 static void get_compatible_board(char *buf, int buflen);
177
178 static const SpinWait& spin_wait_desc() { return _spin_wait; }
179
180 static bool supports_on_spin_wait() { return _spin_wait.inst() != SpinWait::NONE; }
181
182 static bool supports_float16() { return true; }
183
184 #ifdef __APPLE__
185 // Is the CPU running emulated (for example macOS Rosetta running x86_64 code on M1 ARM (aarch64)
186 static bool is_cpu_emulated();
187 #endif
188
189 static void initialize_cpu_information(void);
190
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151 static int cpu_model2() { return _model2; }
152 static int cpu_variant() { return _variant; }
153 static int cpu_revision() { return _revision; }
154
155 static bool model_is(int cpu_model) {
156 return _model == cpu_model || _model2 == cpu_model;
157 }
158
159 static bool is_zva_enabled() { return 0 <= _zva_length; }
160 static int zva_length() {
161 assert(is_zva_enabled(), "ZVA not available");
162 return _zva_length;
163 }
164
165 static int icache_line_size() { return _icache_line_size; }
166 static int dcache_line_size() { return _dcache_line_size; }
167 static int get_initial_sve_vector_length() { return _initial_sve_vector_length; };
168
169 // Aarch64 supports fast class initialization checks
170 static bool supports_fast_class_init_checks() { return true; }
171 static bool supports_cont_preemption() { return true; }
172 constexpr static bool supports_stack_watermark_barrier() { return true; }
173 constexpr static bool supports_recursive_lightweight_locking() { return true; }
174
175 constexpr static bool supports_secondary_supers_table() { return true; }
176
177 static void get_compatible_board(char *buf, int buflen);
178
179 static const SpinWait& spin_wait_desc() { return _spin_wait; }
180
181 static bool supports_on_spin_wait() { return _spin_wait.inst() != SpinWait::NONE; }
182
183 static bool supports_float16() { return true; }
184
185 #ifdef __APPLE__
186 // Is the CPU running emulated (for example macOS Rosetta running x86_64 code on M1 ARM (aarch64)
187 static bool is_cpu_emulated();
188 #endif
189
190 static void initialize_cpu_information(void);
191
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