1 /*
   2  * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2012, 2019 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "c1/c1_Compilation.hpp"
  29 #include "c1/c1_FrameMap.hpp"
  30 #include "c1/c1_Instruction.hpp"
  31 #include "c1/c1_LIRAssembler.hpp"
  32 #include "c1/c1_LIRGenerator.hpp"
  33 #include "c1/c1_Runtime1.hpp"
  34 #include "c1/c1_ValueStack.hpp"
  35 #include "ci/ciArray.hpp"
  36 #include "ci/ciObjArrayKlass.hpp"
  37 #include "ci/ciTypeArrayKlass.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 #include "runtime/stubRoutines.hpp"
  40 #include "runtime/vm_version.hpp"
  41 #include "utilities/powerOfTwo.hpp"
  42 #include "vmreg_ppc.inline.hpp"
  43 
  44 #ifdef ASSERT
  45 #define __ gen()->lir(__FILE__, __LINE__)->
  46 #else
  47 #define __ gen()->lir()->
  48 #endif
  49 
  50 void LIRItem::load_byte_item() {
  51   // Byte loads use same registers as other loads.
  52   load_item();
  53 }
  54 
  55 
  56 void LIRItem::load_nonconstant() {
  57   LIR_Opr r = value()->operand();
  58   if (_gen->can_inline_as_constant(value())) {
  59     if (!r->is_constant()) {
  60       r = LIR_OprFact::value_type(value()->type());
  61     }
  62     _result = r;
  63   } else {
  64     load_item();
  65   }
  66 }
  67 
  68 
  69 //--------------------------------------------------------------
  70 //               LIRGenerator
  71 //--------------------------------------------------------------
  72 
  73 LIR_Opr LIRGenerator::exceptionOopOpr()              { return FrameMap::R3_oop_opr; }
  74 LIR_Opr LIRGenerator::exceptionPcOpr()               { return FrameMap::R4_opr; }
  75 LIR_Opr LIRGenerator::syncLockOpr()                  { return FrameMap::R5_opr; }     // Need temp effect for MonitorEnterStub.
  76 LIR_Opr LIRGenerator::syncTempOpr()                  { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
  77 LIR_Opr LIRGenerator::getThreadTemp()                { return LIR_OprFact::illegalOpr; } // not needed
  78 
  79 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  80   LIR_Opr opr;
  81   switch (type->tag()) {
  82   case intTag:     opr = FrameMap::R3_opr;         break;
  83   case objectTag:  opr = FrameMap::R3_oop_opr;     break;
  84   case longTag:    opr = FrameMap::R3_long_opr;    break;
  85   case floatTag:   opr = FrameMap::F1_opr;         break;
  86   case doubleTag:  opr = FrameMap::F1_double_opr;  break;
  87 
  88   case addressTag:
  89   default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  90   }
  91 
  92   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  93   return opr;
  94 }
  95 
  96 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
  97   ShouldNotReachHere();
  98   return LIR_OprFact::illegalOpr;
  99 }
 100 
 101 
 102 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 103   return new_register(T_INT);
 104 }
 105 
 106 
 107 //--------- loading items into registers --------------------------------
 108 
 109 // PPC cannot inline all constants.
 110 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 111   if (v->type()->as_IntConstant() != NULL) {
 112     return Assembler::is_simm16(v->type()->as_IntConstant()->value());
 113   } else if (v->type()->as_LongConstant() != NULL) {
 114     return Assembler::is_simm16(v->type()->as_LongConstant()->value());
 115   } else if (v->type()->as_ObjectConstant() != NULL) {
 116     return v->type()->as_ObjectConstant()->value()->is_null_object();
 117   } else {
 118     return false;
 119   }
 120 }
 121 
 122 
 123 // Only simm16 constants can be inlined.
 124 bool LIRGenerator::can_inline_as_constant(Value i) const {
 125   return can_store_as_constant(i, as_BasicType(i->type()));
 126 }
 127 
 128 
 129 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 130   if (c->type() == T_INT) {
 131     return Assembler::is_simm16(c->as_jint());
 132   }
 133   if (c->type() == T_LONG) {
 134     return Assembler::is_simm16(c->as_jlong());
 135   }
 136   if (c->type() == T_OBJECT) {
 137     return c->as_jobject() == NULL;
 138   }
 139   return false;
 140 }
 141 
 142 
 143 LIR_Opr LIRGenerator::safepoint_poll_register() {
 144   return new_register(T_INT);
 145 }
 146 
 147 
 148 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 149                                             int shift, int disp, BasicType type) {
 150   assert(base->is_register(), "must be");
 151   intx large_disp = disp;
 152 
 153   // Accumulate fixed displacements.
 154   if (index->is_constant()) {
 155     LIR_Const *constant = index->as_constant_ptr();
 156     if (constant->type() == T_LONG) {
 157       large_disp += constant->as_jlong() << shift;
 158     } else {
 159       large_disp += (intx)(constant->as_jint()) << shift;
 160     }
 161     index = LIR_OprFact::illegalOpr;
 162   }
 163 
 164   if (index->is_register()) {
 165     // Apply the shift and accumulate the displacement.
 166     if (shift > 0) {
 167       LIR_Opr tmp = new_pointer_register();
 168       __ shift_left(index, shift, tmp);
 169       index = tmp;
 170     }
 171     if (large_disp != 0) {
 172       LIR_Opr tmp = new_pointer_register();
 173       if (Assembler::is_simm16(large_disp)) {
 174         __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
 175         index = tmp;
 176       } else {
 177         __ move(LIR_OprFact::intptrConst(large_disp), tmp);
 178         __ add(tmp, index, tmp);
 179         index = tmp;
 180       }
 181       large_disp = 0;
 182     }
 183   } else if (!Assembler::is_simm16(large_disp)) {
 184     // Index is illegal so replace it with the displacement loaded into a register.
 185     index = new_pointer_register();
 186     __ move(LIR_OprFact::intptrConst(large_disp), index);
 187     large_disp = 0;
 188   }
 189 
 190   // At this point we either have base + index or base + displacement.
 191   if (large_disp == 0) {
 192     return new LIR_Address(base, index, type);
 193   } else {
 194     assert(Assembler::is_simm16(large_disp), "must be");
 195     return new LIR_Address(base, large_disp, type);
 196   }
 197 }
 198 
 199 
 200 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 201                                               BasicType type) {
 202   int elem_size = type2aelembytes(type);
 203   int shift = exact_log2(elem_size);
 204 
 205   LIR_Opr base_opr;
 206   intx offset = arrayOopDesc::base_offset_in_bytes(type);
 207 
 208   if (index_opr->is_constant()) {
 209     intx i = index_opr->as_constant_ptr()->as_jint();
 210     intx array_offset = i * elem_size;
 211     if (Assembler::is_simm16(array_offset + offset)) {
 212       base_opr = array_opr;
 213       offset = array_offset + offset;
 214     } else {
 215       base_opr = new_pointer_register();
 216       if (Assembler::is_simm16(array_offset)) {
 217         __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
 218       } else {
 219         __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
 220         __ add(base_opr, array_opr, base_opr);
 221       }
 222     }
 223   } else {
 224 #ifdef _LP64
 225     if (index_opr->type() == T_INT) {
 226       LIR_Opr tmp = new_register(T_LONG);
 227       __ convert(Bytecodes::_i2l, index_opr, tmp);
 228       index_opr = tmp;
 229     }
 230 #endif
 231 
 232     base_opr = new_pointer_register();
 233     assert (index_opr->is_register(), "Must be register");
 234     if (shift > 0) {
 235       __ shift_left(index_opr, shift, base_opr);
 236       __ add(base_opr, array_opr, base_opr);
 237     } else {
 238       __ add(index_opr, array_opr, base_opr);
 239     }
 240   }
 241   return new LIR_Address(base_opr, offset, type);
 242 }
 243 
 244 
 245 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 246   LIR_Opr r = NULL;
 247   if (type == T_LONG) {
 248     r = LIR_OprFact::longConst(x);
 249   } else if (type == T_INT) {
 250     r = LIR_OprFact::intConst(x);
 251   } else {
 252     ShouldNotReachHere();
 253   }
 254   if (!Assembler::is_simm16(x)) {
 255     LIR_Opr tmp = new_register(type);
 256     __ move(r, tmp);
 257     return tmp;
 258   }
 259   return r;
 260 }
 261 
 262 
 263 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 264   LIR_Opr pointer = new_pointer_register();
 265   __ move(LIR_OprFact::intptrConst(counter), pointer);
 266   LIR_Address* addr = new LIR_Address(pointer, type);
 267   increment_counter(addr, step);
 268 }
 269 
 270 
 271 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 272   LIR_Opr temp = new_register(addr->type());
 273   __ move(addr, temp);
 274   __ add(temp, load_immediate(step, addr->type()), temp);
 275   __ move(temp, addr);
 276 }
 277 
 278 
 279 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 280   LIR_Opr tmp = FrameMap::R0_opr;
 281   __ load(new LIR_Address(base, disp, T_INT), tmp, info);
 282   __ cmp(condition, tmp, c);
 283 }
 284 
 285 
 286 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
 287                                int disp, BasicType type, CodeEmitInfo* info) {
 288   LIR_Opr tmp = FrameMap::R0_opr;
 289   __ load(new LIR_Address(base, disp, type), tmp, info);
 290   __ cmp(condition, reg, tmp);
 291 }
 292 
 293 
 294 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 295   assert(left != result, "should be different registers");
 296   if (is_power_of_2(c + 1)) {
 297     __ shift_left(left, log2i_exact(c + 1), result);
 298     __ sub(result, left, result);
 299     return true;
 300   } else if (is_power_of_2(c - 1)) {
 301     __ shift_left(left, log2i_exact(c - 1), result);
 302     __ add(result, left, result);
 303     return true;
 304   }
 305   return false;
 306 }
 307 
 308 
 309 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
 310   BasicType t = item->type();
 311   LIR_Opr sp_opr = FrameMap::SP_opr;
 312   __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
 313 }
 314 
 315 
 316 //----------------------------------------------------------------------
 317 //             visitor functions
 318 //----------------------------------------------------------------------
 319 
 320 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 321   // Following registers are used by slow_subtype_check:
 322   LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
 323   LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
 324   LIR_Opr tmp3 = FrameMap::R6_opr; // temp
 325   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 326 }
 327 
 328 
 329 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 330   assert(x->is_pinned(),"");
 331   LIRItem obj(x->obj(), this);
 332   obj.load_item();
 333 
 334   set_no_result(x);
 335 
 336   // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
 337   LIR_Opr lock    = FrameMap::R5_opr;
 338   LIR_Opr scratch = FrameMap::R4_opr;
 339   LIR_Opr hdr     = FrameMap::R6_opr;
 340 
 341   CodeEmitInfo* info_for_exception = NULL;
 342   if (x->needs_null_check()) {
 343     info_for_exception = state_for(x);
 344   }
 345 
 346   // This CodeEmitInfo must not have the xhandlers because here the
 347   // object is already locked (xhandlers expects object to be unlocked).
 348   CodeEmitInfo* info = state_for(x, x->state(), true);
 349   monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
 350 }
 351 
 352 
 353 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 354   assert(x->is_pinned(),"");
 355   LIRItem obj(x->obj(), this);
 356   obj.dont_load_item();
 357 
 358   set_no_result(x);
 359   LIR_Opr lock     = FrameMap::R5_opr;
 360   LIR_Opr hdr      = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
 361   LIR_Opr obj_temp = FrameMap::R6_opr;
 362   monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
 363 }
 364 
 365 
 366 // _ineg, _lneg, _fneg, _dneg
 367 void LIRGenerator::do_NegateOp(NegateOp* x) {
 368   LIRItem value(x->x(), this);
 369   value.load_item();
 370   LIR_Opr reg = rlock_result(x);
 371   __ negate(value.result(), reg);
 372 }
 373 
 374 
 375 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 376 //      _dadd, _dmul, _dsub, _ddiv, _drem
 377 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 378   switch (x->op()) {
 379   case Bytecodes::_fadd:
 380   case Bytecodes::_fmul:
 381   case Bytecodes::_fsub:
 382   case Bytecodes::_fdiv:
 383   case Bytecodes::_dadd:
 384   case Bytecodes::_dmul:
 385   case Bytecodes::_dsub:
 386   case Bytecodes::_ddiv: {
 387     LIRItem left(x->x(), this);
 388     LIRItem right(x->y(), this);
 389     left.load_item();
 390     right.load_item();
 391     rlock_result(x);
 392     arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result());
 393   }
 394   break;
 395 
 396   case Bytecodes::_frem:
 397   case Bytecodes::_drem: {
 398     address entry = NULL;
 399     switch (x->op()) {
 400     case Bytecodes::_frem:
 401       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 402       break;
 403     case Bytecodes::_drem:
 404       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 405       break;
 406     default:
 407       ShouldNotReachHere();
 408     }
 409     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
 410     set_result(x, result);
 411   }
 412   break;
 413 
 414   default: ShouldNotReachHere();
 415   }
 416 }
 417 
 418 
 419 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 420 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 421   bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
 422 
 423   LIRItem right(x->y(), this);
 424   // Missing test if instr is commutative and if we should swap.
 425   if (right.value()->type()->as_LongConstant() &&
 426       (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == ((-1)<<15)) ) {
 427     // Sub is implemented by addi and can't support min_simm16 as constant..
 428     right.load_item();
 429   } else {
 430     right.load_nonconstant();
 431   }
 432   assert(right.is_constant() || right.is_register(), "wrong state of right");
 433 
 434   if (is_div_rem) {
 435     LIR_Opr divisor = right.result();
 436     if (divisor->is_register()) {
 437       CodeEmitInfo* null_check_info = state_for(x);
 438       __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
 439       __ branch(lir_cond_equal, new DivByZeroStub(null_check_info));
 440     } else {
 441       jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
 442       if (const_divisor == 0) {
 443         CodeEmitInfo* null_check_info = state_for(x);
 444         __ jump(new DivByZeroStub(null_check_info));
 445         rlock_result(x);
 446         __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
 447         return;
 448       }
 449       if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
 450         // Remainder computation would need additional tmp != R0.
 451         right.load_item();
 452       }
 453     }
 454   }
 455 
 456   LIRItem left(x->x(), this);
 457   left.load_item();
 458   rlock_result(x);
 459   if (is_div_rem) {
 460     CodeEmitInfo* info = NULL; // Null check already done above.
 461     LIR_Opr tmp = FrameMap::R0_opr;
 462     if (x->op() == Bytecodes::_lrem) {
 463       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 464     } else if (x->op() == Bytecodes::_ldiv) {
 465       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 466     }
 467   } else {
 468     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 469   }
 470 }
 471 
 472 
 473 // for: _iadd, _imul, _isub, _idiv, _irem
 474 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 475   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
 476 
 477   LIRItem right(x->y(), this);
 478   // Missing test if instr is commutative and if we should swap.
 479   if (right.value()->type()->as_IntConstant() &&
 480       (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == ((-1)<<15)) ) {
 481     // Sub is implemented by addi and can't support min_simm16 as constant.
 482     right.load_item();
 483   } else {
 484     right.load_nonconstant();
 485   }
 486   assert(right.is_constant() || right.is_register(), "wrong state of right");
 487 
 488   if (is_div_rem) {
 489     LIR_Opr divisor = right.result();
 490     if (divisor->is_register()) {
 491       CodeEmitInfo* null_check_info = state_for(x);
 492       __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
 493       __ branch(lir_cond_equal, new DivByZeroStub(null_check_info));
 494     } else {
 495       jint const_divisor = divisor->as_constant_ptr()->as_jint();
 496       if (const_divisor == 0) {
 497         CodeEmitInfo* null_check_info = state_for(x);
 498         __ jump(new DivByZeroStub(null_check_info));
 499         rlock_result(x);
 500         __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
 501         return;
 502       }
 503       if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
 504         // Remainder computation would need additional tmp != R0.
 505         right.load_item();
 506       }
 507     }
 508   }
 509 
 510   LIRItem left(x->x(), this);
 511   left.load_item();
 512   rlock_result(x);
 513   if (is_div_rem) {
 514     CodeEmitInfo* info = NULL; // Null check already done above.
 515     LIR_Opr tmp = FrameMap::R0_opr;
 516     if (x->op() == Bytecodes::_irem) {
 517       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 518     } else if (x->op() == Bytecodes::_idiv) {
 519       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 520     }
 521   } else {
 522     arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
 523   }
 524 }
 525 
 526 
 527 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 528   ValueTag tag = x->type()->tag();
 529   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 530   switch (tag) {
 531     case floatTag:
 532     case doubleTag: do_ArithmeticOp_FPU(x);  return;
 533     case longTag:   do_ArithmeticOp_Long(x); return;
 534     case intTag:    do_ArithmeticOp_Int(x);  return;
 535     default: ShouldNotReachHere();
 536   }
 537 }
 538 
 539 
 540 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 541 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 542   LIRItem value(x->x(), this);
 543   LIRItem count(x->y(), this);
 544   value.load_item();
 545   LIR_Opr reg = rlock_result(x);
 546   LIR_Opr mcount;
 547   if (count.result()->is_register()) {
 548     mcount = FrameMap::R0_opr;
 549   } else {
 550     mcount = LIR_OprFact::illegalOpr;
 551   }
 552   shift_op(x->op(), reg, value.result(), count.result(), mcount);
 553 }
 554 
 555 
 556 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
 557   jlong int_or_long_const;
 558   if (type->as_IntConstant()) {
 559     int_or_long_const = type->as_IntConstant()->value();
 560   } else if (type->as_LongConstant()) {
 561     int_or_long_const = type->as_LongConstant()->value();
 562   } else if (type->as_ObjectConstant()) {
 563     return type->as_ObjectConstant()->value()->is_null_object();
 564   } else {
 565     return false;
 566   }
 567 
 568   if (Assembler::is_uimm(int_or_long_const, 16)) return true;
 569   if ((int_or_long_const & 0xFFFF) == 0 &&
 570       Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
 571 
 572   // see Assembler::andi
 573   if (bc == Bytecodes::_iand &&
 574       (is_power_of_2(int_or_long_const+1) ||
 575        is_power_of_2(int_or_long_const) ||
 576        is_power_of_2(-int_or_long_const))) return true;
 577   if (bc == Bytecodes::_land &&
 578       (is_power_of_2(int_or_long_const+1) ||
 579        (Assembler::is_uimm(int_or_long_const, 32) && is_power_of_2(int_or_long_const)) ||
 580        (int_or_long_const != min_jlong && is_power_of_2(-int_or_long_const)))) return true;
 581 
 582   // special case: xor -1
 583   if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor) &&
 584       int_or_long_const == -1) return true;
 585   return false;
 586 }
 587 
 588 
 589 // _iand, _land, _ior, _lor, _ixor, _lxor
 590 void LIRGenerator::do_LogicOp(LogicOp* x) {
 591   LIRItem left(x->x(), this);
 592   LIRItem right(x->y(), this);
 593 
 594   left.load_item();
 595 
 596   Value rval = right.value();
 597   LIR_Opr r = rval->operand();
 598   ValueType *type = rval->type();
 599   // Logic instructions use unsigned immediate values.
 600   if (can_handle_logic_op_as_uimm(type, x->op())) {
 601     if (!r->is_constant()) {
 602       r = LIR_OprFact::value_type(type);
 603       rval->set_operand(r);
 604     }
 605     right.set_result(r);
 606   } else {
 607     right.load_item();
 608   }
 609 
 610   LIR_Opr reg = rlock_result(x);
 611 
 612   logic_op(x->op(), reg, left.result(), right.result());
 613 }
 614 
 615 
 616 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 617 void LIRGenerator::do_CompareOp(CompareOp* x) {
 618   LIRItem left(x->x(), this);
 619   LIRItem right(x->y(), this);
 620   left.load_item();
 621   right.load_item();
 622   LIR_Opr reg = rlock_result(x);
 623   if (x->x()->type()->is_float_kind()) {
 624     Bytecodes::Code code = x->op();
 625     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 626   } else if (x->x()->type()->tag() == longTag) {
 627     __ lcmp2int(left.result(), right.result(), reg);
 628   } else {
 629     Unimplemented();
 630   }
 631 }
 632 
 633 
 634 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 635   LIR_Opr result = new_register(T_INT);
 636   LIR_Opr t1 = LIR_OprFact::illegalOpr;
 637   LIR_Opr t2 = LIR_OprFact::illegalOpr;
 638   cmp_value.load_item();
 639   new_value.load_item();
 640 
 641   // Volatile load may be followed by Unsafe CAS.
 642   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 643     __ membar();
 644   } else {
 645     __ membar_release();
 646   }
 647 
 648   if (is_reference_type(type)) {
 649     if (UseCompressedOops) {
 650       t1 = new_register(T_OBJECT);
 651       t2 = new_register(T_OBJECT);
 652     }
 653     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
 654   } else if (type == T_INT) {
 655     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
 656   } else if (type == T_LONG) {
 657     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
 658   } else {
 659     Unimplemented();
 660   }
 661   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 662            result, type);
 663   return result;
 664 }
 665 
 666 
 667 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 668   LIR_Opr result = new_register(type);
 669   LIR_Opr tmp = FrameMap::R0_opr;
 670 
 671   value.load_item();
 672 
 673   // Volatile load may be followed by Unsafe CAS.
 674   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 675     __ membar();
 676   } else {
 677     __ membar_release();
 678   }
 679 
 680   __ xchg(addr, value.result(), result, tmp);
 681 
 682   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 683     __ membar_acquire();
 684   } else {
 685     __ membar();
 686   }
 687   return result;
 688 }
 689 
 690 
 691 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 692   LIR_Opr result = new_register(type);
 693   LIR_Opr tmp = FrameMap::R0_opr;
 694 
 695   value.load_item();
 696 
 697   // Volatile load may be followed by Unsafe CAS.
 698   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 699     __ membar(); // To be safe. Unsafe semantics are unclear.
 700   } else {
 701     __ membar_release();
 702   }
 703 
 704   __ xadd(addr, value.result(), result, tmp);
 705 
 706   if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 707     __ membar_acquire();
 708   } else {
 709     __ membar();
 710   }
 711   return result;
 712 }
 713 
 714 
 715 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 716   switch (x->id()) {
 717     case vmIntrinsics::_dabs: {
 718       assert(x->number_of_arguments() == 1, "wrong type");
 719       LIRItem value(x->argument_at(0), this);
 720       value.load_item();
 721       LIR_Opr dst = rlock_result(x);
 722       __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
 723       break;
 724     }
 725     case vmIntrinsics::_dsqrt: {
 726       if (VM_Version::has_fsqrt()) {
 727         assert(x->number_of_arguments() == 1, "wrong type");
 728         LIRItem value(x->argument_at(0), this);
 729         value.load_item();
 730         LIR_Opr dst = rlock_result(x);
 731         __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
 732         break;
 733       } // else fallthru
 734     }
 735     case vmIntrinsics::_dsin:   // fall through
 736     case vmIntrinsics::_dcos:   // fall through
 737     case vmIntrinsics::_dtan:   // fall through
 738     case vmIntrinsics::_dlog:   // fall through
 739     case vmIntrinsics::_dlog10: // fall through
 740     case vmIntrinsics::_dexp: {
 741       assert(x->number_of_arguments() == 1, "wrong type");
 742 
 743       address runtime_entry = NULL;
 744       switch (x->id()) {
 745         case vmIntrinsics::_dsqrt:
 746           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
 747           break;
 748         case vmIntrinsics::_dsin:
 749           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
 750           break;
 751         case vmIntrinsics::_dcos:
 752           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
 753           break;
 754         case vmIntrinsics::_dtan:
 755           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
 756           break;
 757         case vmIntrinsics::_dlog:
 758           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
 759           break;
 760         case vmIntrinsics::_dlog10:
 761           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
 762           break;
 763         case vmIntrinsics::_dexp:
 764           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
 765           break;
 766         default:
 767           ShouldNotReachHere();
 768       }
 769 
 770       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
 771       set_result(x, result);
 772       break;
 773     }
 774     case vmIntrinsics::_dpow: {
 775       assert(x->number_of_arguments() == 2, "wrong type");
 776       address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
 777       LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
 778       set_result(x, result);
 779       break;
 780     }
 781     default:
 782       break;
 783   }
 784 }
 785 
 786 
 787 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 788   assert(x->number_of_arguments() == 5, "wrong type");
 789 
 790   // Make all state_for calls early since they can emit code.
 791   CodeEmitInfo* info = state_for(x, x->state());
 792 
 793   LIRItem src     (x->argument_at(0), this);
 794   LIRItem src_pos (x->argument_at(1), this);
 795   LIRItem dst     (x->argument_at(2), this);
 796   LIRItem dst_pos (x->argument_at(3), this);
 797   LIRItem length  (x->argument_at(4), this);
 798 
 799   // Load all values in callee_save_registers (C calling convention),
 800   // as this makes the parameter passing to the fast case simpler.
 801   src.load_item_force     (FrameMap::R14_oop_opr);
 802   src_pos.load_item_force (FrameMap::R15_opr);
 803   dst.load_item_force     (FrameMap::R17_oop_opr);
 804   dst_pos.load_item_force (FrameMap::R18_opr);
 805   length.load_item_force  (FrameMap::R19_opr);
 806   LIR_Opr tmp =            FrameMap::R20_opr;
 807 
 808   int flags;
 809   ciArrayKlass* expected_type;
 810   arraycopy_helper(x, &flags, &expected_type);
 811 
 812   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
 813                length.result(), tmp,
 814                expected_type, flags, info);
 815   set_no_result(x);
 816 }
 817 
 818 
 819 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 820 // _i2b, _i2c, _i2s
 821 void LIRGenerator::do_Convert(Convert* x) {
 822   if (!VM_Version::has_mtfprd()) {
 823     switch (x->op()) {
 824 
 825       // int -> float: force spill
 826       case Bytecodes::_l2f: {
 827         if (!VM_Version::has_fcfids()) { // fcfids is >= Power7 only
 828           // fcfid+frsp needs fixup code to avoid rounding incompatibility.
 829           address entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
 830           LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
 831           set_result(x, result);
 832           return;
 833         } // else fallthru
 834       }
 835       case Bytecodes::_l2d: {
 836         LIRItem value(x->value(), this);
 837         LIR_Opr reg = rlock_result(x);
 838         value.load_item();
 839         LIR_Opr tmp = force_to_spill(value.result(), T_DOUBLE);
 840         __ convert(x->op(), tmp, reg);
 841         return;
 842       }
 843       case Bytecodes::_i2f:
 844       case Bytecodes::_i2d: {
 845         LIRItem value(x->value(), this);
 846         LIR_Opr reg = rlock_result(x);
 847         value.load_item();
 848         // Convert i2l first.
 849         LIR_Opr tmp1 = new_register(T_LONG);
 850         __ convert(Bytecodes::_i2l, value.result(), tmp1);
 851         LIR_Opr tmp2 = force_to_spill(tmp1, T_DOUBLE);
 852         __ convert(x->op(), tmp2, reg);
 853         return;
 854       }
 855 
 856       // float -> int: result will be stored
 857       case Bytecodes::_f2l:
 858       case Bytecodes::_d2l: {
 859         LIRItem value(x->value(), this);
 860         LIR_Opr reg = rlock_result(x);
 861         value.set_destroys_register(); // USE_KILL
 862         value.load_item();
 863         set_vreg_flag(reg, must_start_in_memory);
 864         __ convert(x->op(), value.result(), reg);
 865         return;
 866       }
 867       case Bytecodes::_f2i:
 868       case Bytecodes::_d2i: {
 869         LIRItem value(x->value(), this);
 870         LIR_Opr reg = rlock_result(x);
 871         value.set_destroys_register(); // USE_KILL
 872         value.load_item();
 873         // Convert l2i afterwards.
 874         LIR_Opr tmp1 = new_register(T_LONG);
 875         set_vreg_flag(tmp1, must_start_in_memory);
 876         __ convert(x->op(), value.result(), tmp1);
 877         __ convert(Bytecodes::_l2i, tmp1, reg);
 878         return;
 879       }
 880 
 881       // Within same category: just register conversions.
 882       case Bytecodes::_i2b:
 883       case Bytecodes::_i2c:
 884       case Bytecodes::_i2s:
 885       case Bytecodes::_i2l:
 886       case Bytecodes::_l2i:
 887       case Bytecodes::_f2d:
 888       case Bytecodes::_d2f:
 889         break;
 890 
 891       default: ShouldNotReachHere();
 892     }
 893   }
 894 
 895   // Register conversion.
 896   LIRItem value(x->value(), this);
 897   LIR_Opr reg = rlock_result(x);
 898   value.load_item();
 899   switch (x->op()) {
 900     case Bytecodes::_f2l:
 901     case Bytecodes::_d2l:
 902     case Bytecodes::_f2i:
 903     case Bytecodes::_d2i: value.set_destroys_register(); break; // USE_KILL
 904     default: break;
 905   }
 906   __ convert(x->op(), value.result(), reg);
 907 }
 908 
 909 
 910 void LIRGenerator::do_NewInstance(NewInstance* x) {
 911   // This instruction can be deoptimized in the slow path.
 912   const LIR_Opr reg = result_register_for(x->type());
 913 #ifndef PRODUCT
 914   if (PrintNotLoaded && !x->klass()->is_loaded()) {
 915     tty->print_cr("   ###class not loaded at new bci %d", x->printable_bci());
 916   }
 917 #endif
 918   CodeEmitInfo* info = state_for(x, x->state());
 919   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
 920   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 921   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 922   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 923   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 924   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
 925 
 926   // Must prevent reordering of stores for object initialization
 927   // with stores that publish the new object.
 928   __ membar_storestore();
 929   LIR_Opr result = rlock_result(x);
 930   __ move(reg, result);
 931 }
 932 
 933 
 934 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 935   // Evaluate state_for early since it may emit code.
 936   CodeEmitInfo* info = state_for(x, x->state());
 937 
 938   LIRItem length(x->length(), this);
 939   length.load_item();
 940 
 941   LIR_Opr reg = result_register_for(x->type());
 942   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
 943   // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
 944   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 945   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 946   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 947   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 948   LIR_Opr len = length.result();
 949   BasicType elem_type = x->elt_type();
 950 
 951   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
 952 
 953   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
 954   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
 955 
 956   // Must prevent reordering of stores for object initialization
 957   // with stores that publish the new object.
 958   __ membar_storestore();
 959   LIR_Opr result = rlock_result(x);
 960   __ move(reg, result);
 961 }
 962 
 963 
 964 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
 965   // Evaluate state_for early since it may emit code.
 966   CodeEmitInfo* info = state_for(x, x->state());
 967   // In case of patching (i.e., object class is not yet loaded),
 968   // we need to reexecute the instruction and therefore provide
 969   // the state before the parameters have been consumed.
 970   CodeEmitInfo* patching_info = NULL;
 971   if (!x->klass()->is_loaded() || PatchALot) {
 972     patching_info = state_for(x, x->state_before());
 973   }
 974 
 975   LIRItem length(x->length(), this);
 976   length.load_item();
 977 
 978   const LIR_Opr reg = result_register_for(x->type());
 979   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
 980   // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
 981   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 982   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 983   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 984   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 985   LIR_Opr len = length.result();
 986 
 987   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
 988   ciMetadata* obj = ciObjArrayKlass::make(x->klass());
 989   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
 990     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
 991   }
 992   klass2reg_with_patching(klass_reg, obj, patching_info);
 993   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
 994 
 995   // Must prevent reordering of stores for object initialization
 996   // with stores that publish the new object.
 997   __ membar_storestore();
 998   LIR_Opr result = rlock_result(x);
 999   __ move(reg, result);
1000 }
1001 
1002 
1003 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1004   Values* dims = x->dims();
1005   int i = dims->length();
1006   LIRItemList* items = new LIRItemList(i, i, NULL);
1007   while (i-- > 0) {
1008     LIRItem* size = new LIRItem(dims->at(i), this);
1009     items->at_put(i, size);
1010   }
1011 
1012   // Evaluate state_for early since it may emit code.
1013   CodeEmitInfo* patching_info = NULL;
1014   if (!x->klass()->is_loaded() || PatchALot) {
1015     patching_info = state_for(x, x->state_before());
1016 
1017     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1018     // clone all handlers (NOTE: Usually this is handled transparently
1019     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1020     // is done explicitly here because a stub isn't being used).
1021     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1022   }
1023   CodeEmitInfo* info = state_for(x, x->state());
1024 
1025   i = dims->length();
1026   while (i-- > 0) {
1027     LIRItem* size = items->at(i);
1028     size->load_nonconstant();
1029     // FrameMap::_reserved_argument_area_size includes the dimensions
1030     // varargs, because it's initialized to hir()->max_stack() when the
1031     // FrameMap is created.
1032     store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
1033   }
1034 
1035   const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
1036   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1037 
1038   LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
1039   __ move(LIR_OprFact::intConst(x->rank()), rank);
1040 
1041   LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
1042   __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
1043           varargs);
1044 
1045   // Note: This instruction can be deoptimized in the slow path.
1046   LIR_OprList* args = new LIR_OprList(3);
1047   args->append(klass_reg);
1048   args->append(rank);
1049   args->append(varargs);
1050   const LIR_Opr reg = result_register_for(x->type());
1051   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1052                   LIR_OprFact::illegalOpr,
1053                   reg, args, info);
1054 
1055   // Must prevent reordering of stores for object initialization
1056   // with stores that publish the new object.
1057   __ membar_storestore();
1058   LIR_Opr result = rlock_result(x);
1059   __ move(reg, result);
1060 }
1061 
1062 
1063 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1064   // nothing to do for now
1065 }
1066 
1067 
1068 void LIRGenerator::do_CheckCast(CheckCast* x) {
1069   LIRItem obj(x->obj(), this);
1070   CodeEmitInfo* patching_info = NULL;
1071   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1072     // Must do this before locking the destination register as
1073     // an oop register, and before the obj is loaded (so x->obj()->item()
1074     // is valid for creating a debug info location).
1075     patching_info = state_for(x, x->state_before());
1076   }
1077   obj.load_item();
1078   LIR_Opr out_reg = rlock_result(x);
1079   CodeStub* stub;
1080   CodeEmitInfo* info_for_exception =
1081       (x->needs_exception_state() ? state_for(x) :
1082                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1083 
1084   if (x->is_incompatible_class_change_check()) {
1085     assert(patching_info == NULL, "can't patch this");
1086     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1087                                    LIR_OprFact::illegalOpr, info_for_exception);
1088   } else if (x->is_invokespecial_receiver_check()) {
1089     assert(patching_info == NULL, "can't patch this");
1090     stub = new DeoptimizeStub(info_for_exception,
1091                               Deoptimization::Reason_class_check,
1092                               Deoptimization::Action_none);
1093   } else {
1094     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1095   }
1096   // Following registers are used by slow_subtype_check:
1097   LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1098   LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1099   LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1100   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1101                x->direct_compare(), info_for_exception, patching_info, stub,
1102                x->profiled_method(), x->profiled_bci());
1103 }
1104 
1105 
1106 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1107   LIRItem obj(x->obj(), this);
1108   CodeEmitInfo* patching_info = NULL;
1109   if (!x->klass()->is_loaded() || PatchALot) {
1110     patching_info = state_for(x, x->state_before());
1111   }
1112   // Ensure the result register is not the input register because the
1113   // result is initialized before the patching safepoint.
1114   obj.load_item();
1115   LIR_Opr out_reg = rlock_result(x);
1116   // Following registers are used by slow_subtype_check:
1117   LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1118   LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1119   LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1120   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1121                 x->direct_compare(), patching_info,
1122                 x->profiled_method(), x->profiled_bci());
1123 }
1124 
1125 
1126 void LIRGenerator::do_If(If* x) {
1127   assert(x->number_of_sux() == 2, "inconsistency");
1128   ValueTag tag = x->x()->type()->tag();
1129   LIRItem xitem(x->x(), this);
1130   LIRItem yitem(x->y(), this);
1131   LIRItem* xin = &xitem;
1132   LIRItem* yin = &yitem;
1133   If::Condition cond = x->cond();
1134 
1135   LIR_Opr left = LIR_OprFact::illegalOpr;
1136   LIR_Opr right = LIR_OprFact::illegalOpr;
1137 
1138   xin->load_item();
1139   left = xin->result();
1140 
1141   if (yin->result()->is_constant() && yin->result()->type() == T_INT &&
1142       Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1143     // Inline int constants which are small enough to be immediate operands.
1144     right = LIR_OprFact::value_type(yin->value()->type());
1145   } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1146              (cond == If::eql || cond == If::neq)) {
1147     // Inline long zero.
1148     right = LIR_OprFact::value_type(yin->value()->type());
1149   } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1150     right = LIR_OprFact::value_type(yin->value()->type());
1151   } else {
1152     yin->load_item();
1153     right = yin->result();
1154   }
1155   set_no_result(x);
1156 
1157   // Add safepoint before generating condition code so it can be recomputed.
1158   if (x->is_safepoint()) {
1159     // Increment backedge counter if needed.
1160     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1161         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1162     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1163   }
1164 
1165   __ cmp(lir_cond(cond), left, right);
1166   // Generate branch profiling. Profiling code doesn't kill flags.
1167   profile_branch(x, cond);
1168   move_to_phi(x->state());
1169   if (x->x()->type()->is_float_kind()) {
1170     __ branch(lir_cond(cond), x->tsux(), x->usux());
1171   } else {
1172     __ branch(lir_cond(cond), x->tsux());
1173   }
1174   assert(x->default_sux() == x->fsux(), "wrong destination above");
1175   __ jump(x->default_sux());
1176 }
1177 
1178 
1179 LIR_Opr LIRGenerator::getThreadPointer() {
1180   return FrameMap::as_pointer_opr(R16_thread);
1181 }
1182 
1183 
1184 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1185   LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1186   __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1187   LIR_OprList* args = new LIR_OprList(1);
1188   args->append(arg1);
1189   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1190   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1191 }
1192 
1193 
1194 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1195                                         CodeEmitInfo* info) {
1196 #ifdef _LP64
1197   __ store(value, address, info);
1198 #else
1199   Unimplemented();
1200 //  __ volatile_store_mem_reg(value, address, info);
1201 #endif
1202 }
1203 
1204 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1205                                        CodeEmitInfo* info) {
1206 #ifdef _LP64
1207   __ load(address, result, info);
1208 #else
1209   Unimplemented();
1210 //  __ volatile_load_mem_reg(address, result, info);
1211 #endif
1212 }
1213 
1214 
1215 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1216   assert(UseCRC32Intrinsics, "or should not be here");
1217   LIR_Opr result = rlock_result(x);
1218 
1219   switch (x->id()) {
1220     case vmIntrinsics::_updateCRC32: {
1221       LIRItem crc(x->argument_at(0), this);
1222       LIRItem val(x->argument_at(1), this);
1223       // Registers destroyed by update_crc32.
1224       crc.set_destroys_register();
1225       val.set_destroys_register();
1226       crc.load_item();
1227       val.load_item();
1228       __ update_crc32(crc.result(), val.result(), result);
1229       break;
1230     }
1231     case vmIntrinsics::_updateBytesCRC32:
1232     case vmIntrinsics::_updateByteBufferCRC32: {
1233       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1234 
1235       LIRItem crc(x->argument_at(0), this);
1236       LIRItem buf(x->argument_at(1), this);
1237       LIRItem off(x->argument_at(2), this);
1238       LIRItem len(x->argument_at(3), this);
1239       buf.load_item();
1240       off.load_nonconstant();
1241 
1242       LIR_Opr index = off.result();
1243       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1244       if (off.result()->is_constant()) {
1245         index = LIR_OprFact::illegalOpr;
1246         offset += off.result()->as_jint();
1247       }
1248       LIR_Opr base_op = buf.result();
1249       LIR_Address* a = NULL;
1250 
1251       if (index->is_valid()) {
1252         LIR_Opr tmp = new_register(T_LONG);
1253         __ convert(Bytecodes::_i2l, index, tmp);
1254         index = tmp;
1255         __ add(index, LIR_OprFact::intptrConst(offset), index);
1256         a = new LIR_Address(base_op, index, T_BYTE);
1257       } else {
1258         a = new LIR_Address(base_op, offset, T_BYTE);
1259       }
1260 
1261       BasicTypeList signature(3);
1262       signature.append(T_INT);
1263       signature.append(T_ADDRESS);
1264       signature.append(T_INT);
1265       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1266       const LIR_Opr result_reg = result_register_for(x->type());
1267 
1268       LIR_Opr arg1 = cc->at(0),
1269               arg2 = cc->at(1),
1270               arg3 = cc->at(2);
1271 
1272       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1273       __ leal(LIR_OprFact::address(a), arg2);
1274       len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1275 
1276       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1277       __ move(result_reg, result);
1278       break;
1279     }
1280     default: {
1281       ShouldNotReachHere();
1282     }
1283   }
1284 }
1285 
1286 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1287   assert(UseCRC32CIntrinsics, "or should not be here");
1288   LIR_Opr result = rlock_result(x);
1289 
1290   switch (x->id()) {
1291     case vmIntrinsics::_updateBytesCRC32C:
1292     case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1293       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1294 
1295       LIRItem crc(x->argument_at(0), this);
1296       LIRItem buf(x->argument_at(1), this);
1297       LIRItem off(x->argument_at(2), this);
1298       LIRItem end(x->argument_at(3), this);
1299       buf.load_item();
1300       off.load_nonconstant();
1301       end.load_nonconstant();
1302 
1303       // len = end - off
1304       LIR_Opr len  = end.result();
1305       LIR_Opr tmpA = new_register(T_INT);
1306       LIR_Opr tmpB = new_register(T_INT);
1307       __ move(end.result(), tmpA);
1308       __ move(off.result(), tmpB);
1309       __ sub(tmpA, tmpB, tmpA);
1310       len = tmpA;
1311 
1312       LIR_Opr index = off.result();
1313       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1314       if (off.result()->is_constant()) {
1315         index = LIR_OprFact::illegalOpr;
1316         offset += off.result()->as_jint();
1317       }
1318       LIR_Opr base_op = buf.result();
1319       LIR_Address* a = NULL;
1320 
1321       if (index->is_valid()) {
1322         LIR_Opr tmp = new_register(T_LONG);
1323         __ convert(Bytecodes::_i2l, index, tmp);
1324         index = tmp;
1325         __ add(index, LIR_OprFact::intptrConst(offset), index);
1326         a = new LIR_Address(base_op, index, T_BYTE);
1327       } else {
1328         a = new LIR_Address(base_op, offset, T_BYTE);
1329       }
1330 
1331       BasicTypeList signature(3);
1332       signature.append(T_INT);
1333       signature.append(T_ADDRESS);
1334       signature.append(T_INT);
1335       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1336       const LIR_Opr result_reg = result_register_for(x->type());
1337 
1338       LIR_Opr arg1 = cc->at(0),
1339               arg2 = cc->at(1),
1340               arg3 = cc->at(2);
1341 
1342       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1343       __ leal(LIR_OprFact::address(a), arg2);
1344       __ move(len, cc->at(2));   // We skip int->long conversion here, because CRC32C stub expects int.
1345 
1346       __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1347       __ move(result_reg, result);
1348       break;
1349     }
1350     default: {
1351       ShouldNotReachHere();
1352     }
1353   }
1354 }
1355 
1356 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1357   assert(x->number_of_arguments() == 3, "wrong type");
1358   assert(UseFMA, "Needs FMA instructions support.");
1359   LIRItem value(x->argument_at(0), this);
1360   LIRItem value1(x->argument_at(1), this);
1361   LIRItem value2(x->argument_at(2), this);
1362 
1363   value.load_item();
1364   value1.load_item();
1365   value2.load_item();
1366 
1367   LIR_Opr calc_input = value.result();
1368   LIR_Opr calc_input1 = value1.result();
1369   LIR_Opr calc_input2 = value2.result();
1370   LIR_Opr calc_result = rlock_result(x);
1371 
1372   switch (x->id()) {
1373   case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1374   case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1375   default:                  ShouldNotReachHere();
1376   }
1377 }
1378 
1379 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1380   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1381 }
1382 
1383 void LIRGenerator::do_continuation_doYield(Intrinsic* x) {
1384   fatal("Continuation.doYield intrinsic is not implemented on this platform");
1385 }