1 /*
2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #ifndef CPU_RISCV_INTERP_MASM_RISCV_HPP
28 #define CPU_RISCV_INTERP_MASM_RISCV_HPP
29
30 #include "asm/macroAssembler.hpp"
31 #include "interpreter/invocationCounter.hpp"
32 #include "runtime/frame.hpp"
33
34 // This file specializes the assembler with interpreter-specific macros
35
36 typedef ByteSize (*OffsetFunction)(uint);
37
38 class InterpreterMacroAssembler: public MacroAssembler {
39 protected:
40 // Interpreter specific version of call_VM_base
41 using MacroAssembler::call_VM_leaf_base;
42
43 virtual void call_VM_leaf_base(address entry_point,
44 int number_of_arguments);
45
46 virtual void call_VM_base(Register oop_result,
47 Register java_thread,
48 Register last_java_sp,
49 Label* return_pc,
50 address entry_point,
51 int number_of_arguments,
52 bool check_exceptions);
53
54 // base routine for all dispatches
55 void dispatch_base(TosState state, address* table, bool verifyoop = true,
56 bool generate_poll = false, Register Rs = t0);
57
58 public:
59 InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code) {}
60
61 void load_earlyret_value(TosState state);
62
63 // Use for vthread preemption
64 void call_VM_preemptable(Register oop_result,
65 address entry_point,
66 Register arg_1,
67 bool check_exceptions = true);
68
69 void call_VM_preemptable(Register oop_result,
70 address entry_point,
71 Register arg_1,
72 Register arg_2,
73 bool check_exceptions = true);
74
75 void restore_after_resume(bool is_native);
76
77 private:
78 void call_VM_preemptable_helper(Register oop_result,
79 address entry_point,
80 int number_of_arguments,
81 bool check_exceptions);
82
83 public:
84 void jump_to_entry(address entry);
85
86 virtual void check_and_handle_popframe(Register java_thread);
87 virtual void check_and_handle_earlyret(Register java_thread);
88
89 // Interpreter-specific registers
90 void save_bcp() {
91 sd(xbcp, Address(fp, frame::interpreter_frame_bcp_offset * wordSize));
92 }
93
94 void restore_bcp() {
95 ld(xbcp, Address(fp, frame::interpreter_frame_bcp_offset * wordSize));
96 }
97
98 void restore_locals() {
99 ld(xlocals, Address(fp, frame::interpreter_frame_locals_offset * wordSize));
100 shadd(xlocals, xlocals, fp, t0, LogBytesPerWord);
101 }
102
103 void restore_constant_pool_cache() {
104 ld(xcpool, Address(fp, frame::interpreter_frame_cache_offset * wordSize));
105 }
106
107 void restore_sp_after_call() {
108 Label L;
109 ld(t0, Address(fp, frame::interpreter_frame_extended_sp_offset * wordSize));
110 shadd(t0, t0, fp, t0, LogBytesPerWord);
111 #ifdef ASSERT
112 bnez(t0, L);
113 stop("SP is null");
114 #endif
115 bind(L);
116 mv(sp, t0);
117 }
118
119 void check_extended_sp(const char* msg = "check extended SP") {
120 #ifdef ASSERT
121 Label L;
122 ld(t0, Address(fp, frame::interpreter_frame_extended_sp_offset * wordSize));
123 shadd(t0, t0, fp, t0, LogBytesPerWord);
124 beq(sp, t0, L);
125 stop(msg);
126 bind(L);
127 #endif
128 }
129
130 #define check_extended_sp() \
131 check_extended_sp("SP does not match extended SP in frame at " __FILE__ ":" XSTR(__LINE__))
132
133 void get_dispatch();
134
135 // Helpers for runtime call arguments/results
136 void get_method(Register reg) {
137 ld(reg, Address(fp, frame::interpreter_frame_method_offset * wordSize));
138 }
139
140 void get_const(Register reg) {
141 get_method(reg);
142 ld(reg, Address(reg, in_bytes(Method::const_offset())));
143 }
144
145 void get_constant_pool(Register reg) {
146 get_const(reg);
147 ld(reg, Address(reg, in_bytes(ConstMethod::constants_offset())));
148 }
149
150 void get_constant_pool_cache(Register reg) {
151 get_constant_pool(reg);
152 ld(reg, Address(reg, ConstantPool::cache_offset()));
153 }
154
155 void get_cpool_and_tags(Register cpool, Register tags) {
156 get_constant_pool(cpool);
157 ld(tags, Address(cpool, ConstantPool::tags_offset()));
158 }
159
160 void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset);
161 void get_cache_index_at_bcp(Register index, Register tmp, int bcp_offset, size_t index_size = sizeof(u2));
162 void get_method_counters(Register method, Register mcs, Label& skip);
163
164 // Load cpool->resolved_references(index).
165 void load_resolved_reference_at_index(Register result, Register index, Register tmp = x15);
166
167 // Load cpool->resolved_klass_at(index).
168 void load_resolved_klass_at_offset(Register cpool, Register index, Register klass, Register temp);
169
170 void pop_ptr(Register r = x10);
171 void pop_i(Register r = x10);
172 void pop_l(Register r = x10);
173 void pop_f(FloatRegister r = f10);
174 void pop_d(FloatRegister r = f10);
175 void push_ptr(Register r = x10);
176 void push_i(Register r = x10);
177 void push_l(Register r = x10);
178 void push_f(FloatRegister r = f10);
179 void push_d(FloatRegister r = f10);
180
181 void pop(TosState state); // transition vtos -> state
182 void push(TosState state); // transition state -> vtos
183
184 void empty_expression_stack() {
185 ld(t0, Address(fp, frame::interpreter_frame_monitor_block_top_offset * wordSize));
186 shadd(esp, t0, fp, t0, LogBytesPerWord);
187 // null last_sp until next java call
188 sd(zr, Address(fp, frame::interpreter_frame_last_sp_offset * wordSize));
189 }
190
191 // Helpers for swap and dup
192 void load_ptr(int n, Register val);
193 void store_ptr(int n, Register val);
194
195 // Load float value from 'address'. The value is loaded onto the fp register f10.
196 void load_float(Address src);
197 void load_double(Address src);
198
199 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
200 // a subtype of super_klass.
201 void gen_subtype_check( Register sub_klass, Label &ok_is_subtype );
202
203 // Dispatching
204 void dispatch_prolog(TosState state, int step = 0);
205 void dispatch_epilog(TosState state, int step = 0);
206 // dispatch via t0
207 void dispatch_only(TosState state, bool generate_poll = false, Register Rs = t0);
208 // dispatch normal table via t0 (assume t0 is loaded already)
209 void dispatch_only_normal(TosState state, Register Rs = t0);
210 void dispatch_only_noverify(TosState state, Register Rs = t0);
211 // load t0 from [xbcp + step] and dispatch via t0
212 void dispatch_next(TosState state, int step = 0, bool generate_poll = false);
213 // load t0 from [xbcp] and dispatch via t0 and table
214 void dispatch_via (TosState state, address* table);
215
216 // jump to an invoked target
217 void prepare_to_jump_from_interpreted();
218 void jump_from_interpreted(Register method);
219
220
221 // Returning from interpreted functions
222 //
223 // Removes the current activation (incl. unlocking of monitors)
224 // and sets up the return address. This code is also used for
225 // exception unwindwing. In that case, we do not want to throw
226 // IllegalMonitorStateExceptions, since that might get us into an
227 // infinite rethrow exception loop.
228 // Additionally this code is used for popFrame and earlyReturn.
229 // In popFrame case we want to skip throwing an exception,
230 // installing an exception, and notifying jvmdi.
231 // In earlyReturn case we only want to skip throwing an exception
232 // and installing an exception.
233 void remove_activation(TosState state,
234 bool throw_monitor_exception = true,
235 bool install_monitor_exception = true,
236 bool notify_jvmdi = true);
237
238 // FIXME: Give us a valid frame at a null check.
239 virtual void null_check(Register reg, int offset = -1) {
240 MacroAssembler::null_check(reg, offset);
241 }
242
243 // Object locking
244 void lock_object (Register lock_reg);
245 void unlock_object(Register lock_reg);
246
247 // Interpreter profiling operations
248 void set_method_data_pointer_for_bcp();
249 void test_method_data_pointer(Register mdp, Label& zero_continue);
250 void verify_method_data_pointer();
251
252 void set_mdp_data_at(Register mdp_in, int constant, Register value);
253 void increment_mdp_data_at(Register mdp_in, int constant);
254 void increment_mdp_data_at(Register mdp_in, Register index, int constant);
255 void increment_mask_and_jump(Address counter_addr,
256 int increment, Address mask,
257 Register tmp1, Register tmp2,
258 bool preloaded, Label* where);
259
260 void set_mdp_flag_at(Register mdp_in, int flag_constant);
261 void test_mdp_data_at(Register mdp_in, int offset, Register value,
262 Register test_value_out,
263 Label& not_equal_continue);
264
265 void record_klass_in_profile(Register receiver, Register mdp,
266 Register reg2);
267 void record_klass_in_profile_helper(Register receiver, Register mdp,
268 Register reg2, Label& done);
269 void record_item_in_profile_helper(Register item, Register mdp,
270 Register reg2, int start_row, Label& done, int total_rows,
271 OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn);
272
273 void update_mdp_by_offset(Register mdp_in, int offset_of_offset);
274 void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp);
275 void update_mdp_by_constant(Register mdp_in, int constant);
276 void update_mdp_for_ret(Register return_bci);
277
278 // narrow int return value
279 void narrow(Register result);
280
281 void profile_taken_branch(Register mdp);
282 void profile_not_taken_branch(Register mdp);
283 void profile_call(Register mdp);
284 void profile_final_call(Register mdp);
285 void profile_virtual_call(Register receiver, Register mdp,
286 Register t1,
287 bool receiver_can_be_null = false);
288 void profile_ret(Register return_bci, Register mdp);
289 void profile_null_seen(Register mdp);
290 void profile_typecheck(Register mdp, Register klass, Register temp);
291 void profile_typecheck_failed(Register mdp);
292 void profile_switch_default(Register mdp);
293 void profile_switch_case(Register index_in_scratch, Register mdp,
294 Register temp);
295
296 void profile_obj_type(Register obj, const Address& mdo_addr, Register tmp);
297 void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual);
298 void profile_return_type(Register mdp, Register ret, Register tmp);
299 void profile_parameters_type(Register mdp, Register tmp1, Register tmp2, Register tmp3);
300
301 typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode;
302
303 // support for jvmti/dtrace
304 void notify_method_entry();
305 void notify_method_exit(TosState state, NotifyMethodExitMode mode);
306
307 JFR_ONLY(void enter_jfr_critical_section();)
308 JFR_ONLY(void leave_jfr_critical_section();)
309
310 virtual void _call_Unimplemented(address call_site) {
311 save_bcp();
312 set_last_Java_frame(esp, fp, (address) pc(), t0);
313 MacroAssembler::_call_Unimplemented(call_site);
314 }
315
316 void load_resolved_indy_entry(Register cache, Register index);
317 void load_field_entry(Register cache, Register index, int bcp_offset = 1);
318 void load_method_entry(Register cache, Register index, int bcp_offset = 1);
319
320 void verify_field_offset(Register reg) NOT_DEBUG_RETURN;
321 void verify_access_flags(Register access_flags, uint32_t flag,
322 const char* msg, bool stop_by_hit = true) NOT_DEBUG_RETURN;
323 void verify_frame_setup() NOT_DEBUG_RETURN;
324 };
325
326 #endif // CPU_RISCV_INTERP_MASM_RISCV_HPP