1 /* 2 * Copyright (c) 2016, 2024, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016, 2024 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/macroAssembler.inline.hpp" 28 #include "code/debugInfoRec.hpp" 29 #include "code/vtableStubs.hpp" 30 #include "code/compiledIC.hpp" 31 #include "compiler/oopMap.hpp" 32 #include "gc/shared/barrierSetAssembler.hpp" 33 #include "gc/shared/gcLocker.hpp" 34 #include "interpreter/interpreter.hpp" 35 #include "interpreter/interp_masm.hpp" 36 #include "memory/resourceArea.hpp" 37 #include "nativeInst_s390.hpp" 38 #include "oops/klass.inline.hpp" 39 #include "prims/methodHandles.hpp" 40 #include "registerSaver_s390.hpp" 41 #include "runtime/jniHandles.hpp" 42 #include "runtime/safepointMechanism.hpp" 43 #include "runtime/sharedRuntime.hpp" 44 #include "runtime/signature.hpp" 45 #include "runtime/stubRoutines.hpp" 46 #include "runtime/vframeArray.hpp" 47 #include "utilities/align.hpp" 48 #include "utilities/macros.hpp" 49 #include "vmreg_s390.inline.hpp" 50 #ifdef COMPILER1 51 #include "c1/c1_Runtime1.hpp" 52 #endif 53 #ifdef COMPILER2 54 #include "opto/ad.hpp" 55 #include "opto/runtime.hpp" 56 #endif 57 58 #ifdef PRODUCT 59 #define __ masm-> 60 #else 61 #define __ (Verbose ? (masm->block_comment(FILE_AND_LINE),masm):masm)-> 62 #endif 63 64 #define BLOCK_COMMENT(str) __ block_comment(str) 65 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") 66 67 #define RegisterSaver_LiveIntReg(regname) \ 68 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() } 69 70 #define RegisterSaver_LiveFloatReg(regname) \ 71 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() } 72 73 // Registers which are not saved/restored, but still they have got a frame slot. 74 // Used to get same frame size for RegisterSaver_LiveRegs and RegisterSaver_LiveRegsWithoutR2 75 #define RegisterSaver_ExcludedIntReg(regname) \ 76 { RegisterSaver::excluded_reg, regname->encoding(), regname->as_VMReg() } 77 78 // Registers which are not saved/restored, but still they have got a frame slot. 79 // Used to get same frame size for RegisterSaver_LiveRegs and RegisterSaver_LiveRegsWithoutR2. 80 #define RegisterSaver_ExcludedFloatReg(regname) \ 81 { RegisterSaver::excluded_reg, regname->encoding(), regname->as_VMReg() } 82 83 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = { 84 // Live registers which get spilled to the stack. Register positions 85 // in this array correspond directly to the stack layout. 86 // 87 // live float registers: 88 // 89 RegisterSaver_LiveFloatReg(Z_F0 ), 90 // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1) 91 RegisterSaver_LiveFloatReg(Z_F2 ), 92 RegisterSaver_LiveFloatReg(Z_F3 ), 93 RegisterSaver_LiveFloatReg(Z_F4 ), 94 RegisterSaver_LiveFloatReg(Z_F5 ), 95 RegisterSaver_LiveFloatReg(Z_F6 ), 96 RegisterSaver_LiveFloatReg(Z_F7 ), 97 RegisterSaver_LiveFloatReg(Z_F8 ), 98 RegisterSaver_LiveFloatReg(Z_F9 ), 99 RegisterSaver_LiveFloatReg(Z_F10), 100 RegisterSaver_LiveFloatReg(Z_F11), 101 RegisterSaver_LiveFloatReg(Z_F12), 102 RegisterSaver_LiveFloatReg(Z_F13), 103 RegisterSaver_LiveFloatReg(Z_F14), 104 RegisterSaver_LiveFloatReg(Z_F15), 105 // 106 // RegisterSaver_ExcludedIntReg(Z_R0), // scratch 107 // RegisterSaver_ExcludedIntReg(Z_R1), // scratch 108 RegisterSaver_LiveIntReg(Z_R2 ), 109 RegisterSaver_LiveIntReg(Z_R3 ), 110 RegisterSaver_LiveIntReg(Z_R4 ), 111 RegisterSaver_LiveIntReg(Z_R5 ), 112 RegisterSaver_LiveIntReg(Z_R6 ), 113 RegisterSaver_LiveIntReg(Z_R7 ), 114 RegisterSaver_LiveIntReg(Z_R8 ), 115 RegisterSaver_LiveIntReg(Z_R9 ), 116 RegisterSaver_LiveIntReg(Z_R10), 117 RegisterSaver_LiveIntReg(Z_R11), 118 RegisterSaver_LiveIntReg(Z_R12), 119 RegisterSaver_LiveIntReg(Z_R13), 120 // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.) 121 // RegisterSaver_ExcludedIntReg(Z_R15) // stack pointer 122 }; 123 124 static const RegisterSaver::LiveRegType RegisterSaver_LiveIntRegs[] = { 125 // Live registers which get spilled to the stack. Register positions 126 // in this array correspond directly to the stack layout. 127 // 128 // live float registers: All excluded, but still they get a stack slot to get same frame size. 129 // 130 RegisterSaver_ExcludedFloatReg(Z_F0 ), 131 // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1) 132 RegisterSaver_ExcludedFloatReg(Z_F2 ), 133 RegisterSaver_ExcludedFloatReg(Z_F3 ), 134 RegisterSaver_ExcludedFloatReg(Z_F4 ), 135 RegisterSaver_ExcludedFloatReg(Z_F5 ), 136 RegisterSaver_ExcludedFloatReg(Z_F6 ), 137 RegisterSaver_ExcludedFloatReg(Z_F7 ), 138 RegisterSaver_ExcludedFloatReg(Z_F8 ), 139 RegisterSaver_ExcludedFloatReg(Z_F9 ), 140 RegisterSaver_ExcludedFloatReg(Z_F10), 141 RegisterSaver_ExcludedFloatReg(Z_F11), 142 RegisterSaver_ExcludedFloatReg(Z_F12), 143 RegisterSaver_ExcludedFloatReg(Z_F13), 144 RegisterSaver_ExcludedFloatReg(Z_F14), 145 RegisterSaver_ExcludedFloatReg(Z_F15), 146 // 147 // RegisterSaver_ExcludedIntReg(Z_R0), // scratch 148 // RegisterSaver_ExcludedIntReg(Z_R1), // scratch 149 RegisterSaver_LiveIntReg(Z_R2 ), 150 RegisterSaver_LiveIntReg(Z_R3 ), 151 RegisterSaver_LiveIntReg(Z_R4 ), 152 RegisterSaver_LiveIntReg(Z_R5 ), 153 RegisterSaver_LiveIntReg(Z_R6 ), 154 RegisterSaver_LiveIntReg(Z_R7 ), 155 RegisterSaver_LiveIntReg(Z_R8 ), 156 RegisterSaver_LiveIntReg(Z_R9 ), 157 RegisterSaver_LiveIntReg(Z_R10), 158 RegisterSaver_LiveIntReg(Z_R11), 159 RegisterSaver_LiveIntReg(Z_R12), 160 RegisterSaver_LiveIntReg(Z_R13), 161 // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.) 162 // RegisterSaver_ExcludedIntReg(Z_R15) // stack pointer 163 }; 164 165 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegsWithoutR2[] = { 166 // Live registers which get spilled to the stack. Register positions 167 // in this array correspond directly to the stack layout. 168 // 169 // live float registers: 170 // 171 RegisterSaver_LiveFloatReg(Z_F0 ), 172 // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1) 173 RegisterSaver_LiveFloatReg(Z_F2 ), 174 RegisterSaver_LiveFloatReg(Z_F3 ), 175 RegisterSaver_LiveFloatReg(Z_F4 ), 176 RegisterSaver_LiveFloatReg(Z_F5 ), 177 RegisterSaver_LiveFloatReg(Z_F6 ), 178 RegisterSaver_LiveFloatReg(Z_F7 ), 179 RegisterSaver_LiveFloatReg(Z_F8 ), 180 RegisterSaver_LiveFloatReg(Z_F9 ), 181 RegisterSaver_LiveFloatReg(Z_F10), 182 RegisterSaver_LiveFloatReg(Z_F11), 183 RegisterSaver_LiveFloatReg(Z_F12), 184 RegisterSaver_LiveFloatReg(Z_F13), 185 RegisterSaver_LiveFloatReg(Z_F14), 186 RegisterSaver_LiveFloatReg(Z_F15), 187 // 188 // RegisterSaver_ExcludedIntReg(Z_R0), // scratch 189 // RegisterSaver_ExcludedIntReg(Z_R1), // scratch 190 RegisterSaver_ExcludedIntReg(Z_R2), // Omit saving R2. 191 RegisterSaver_LiveIntReg(Z_R3 ), 192 RegisterSaver_LiveIntReg(Z_R4 ), 193 RegisterSaver_LiveIntReg(Z_R5 ), 194 RegisterSaver_LiveIntReg(Z_R6 ), 195 RegisterSaver_LiveIntReg(Z_R7 ), 196 RegisterSaver_LiveIntReg(Z_R8 ), 197 RegisterSaver_LiveIntReg(Z_R9 ), 198 RegisterSaver_LiveIntReg(Z_R10), 199 RegisterSaver_LiveIntReg(Z_R11), 200 RegisterSaver_LiveIntReg(Z_R12), 201 RegisterSaver_LiveIntReg(Z_R13), 202 // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.) 203 // RegisterSaver_ExcludedIntReg(Z_R15) // stack pointer 204 }; 205 206 // Live argument registers which get spilled to the stack. 207 static const RegisterSaver::LiveRegType RegisterSaver_LiveArgRegs[] = { 208 RegisterSaver_LiveFloatReg(Z_FARG1), 209 RegisterSaver_LiveFloatReg(Z_FARG2), 210 RegisterSaver_LiveFloatReg(Z_FARG3), 211 RegisterSaver_LiveFloatReg(Z_FARG4), 212 RegisterSaver_LiveIntReg(Z_ARG1), 213 RegisterSaver_LiveIntReg(Z_ARG2), 214 RegisterSaver_LiveIntReg(Z_ARG3), 215 RegisterSaver_LiveIntReg(Z_ARG4), 216 RegisterSaver_LiveIntReg(Z_ARG5) 217 }; 218 219 static const RegisterSaver::LiveRegType RegisterSaver_LiveVolatileRegs[] = { 220 // Live registers which get spilled to the stack. Register positions 221 // in this array correspond directly to the stack layout. 222 // 223 // live float registers: 224 // 225 RegisterSaver_LiveFloatReg(Z_F0 ), 226 // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1) 227 RegisterSaver_LiveFloatReg(Z_F2 ), 228 RegisterSaver_LiveFloatReg(Z_F3 ), 229 RegisterSaver_LiveFloatReg(Z_F4 ), 230 RegisterSaver_LiveFloatReg(Z_F5 ), 231 RegisterSaver_LiveFloatReg(Z_F6 ), 232 RegisterSaver_LiveFloatReg(Z_F7 ), 233 // RegisterSaver_LiveFloatReg(Z_F8 ), // non-volatile 234 // RegisterSaver_LiveFloatReg(Z_F9 ), // non-volatile 235 // RegisterSaver_LiveFloatReg(Z_F10), // non-volatile 236 // RegisterSaver_LiveFloatReg(Z_F11), // non-volatile 237 // RegisterSaver_LiveFloatReg(Z_F12), // non-volatile 238 // RegisterSaver_LiveFloatReg(Z_F13), // non-volatile 239 // RegisterSaver_LiveFloatReg(Z_F14), // non-volatile 240 // RegisterSaver_LiveFloatReg(Z_F15), // non-volatile 241 // 242 // RegisterSaver_ExcludedIntReg(Z_R0), // scratch 243 // RegisterSaver_ExcludedIntReg(Z_R1), // scratch 244 RegisterSaver_LiveIntReg(Z_R2 ), 245 RegisterSaver_LiveIntReg(Z_R3 ), 246 RegisterSaver_LiveIntReg(Z_R4 ), 247 RegisterSaver_LiveIntReg(Z_R5 ), 248 // RegisterSaver_LiveIntReg(Z_R6 ), // non-volatile 249 // RegisterSaver_LiveIntReg(Z_R7 ), // non-volatile 250 // RegisterSaver_LiveIntReg(Z_R8 ), // non-volatile 251 // RegisterSaver_LiveIntReg(Z_R9 ), // non-volatile 252 // RegisterSaver_LiveIntReg(Z_R10), // non-volatile 253 // RegisterSaver_LiveIntReg(Z_R11), // non-volatile 254 // RegisterSaver_LiveIntReg(Z_R12), // non-volatile 255 // RegisterSaver_LiveIntReg(Z_R13), // non-volatile 256 // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.) 257 // RegisterSaver_ExcludedIntReg(Z_R15) // stack pointer 258 }; 259 260 int RegisterSaver::live_reg_save_size(RegisterSet reg_set) { 261 int reg_space = -1; 262 switch (reg_set) { 263 case all_registers: reg_space = sizeof(RegisterSaver_LiveRegs); break; 264 case all_registers_except_r2: reg_space = sizeof(RegisterSaver_LiveRegsWithoutR2); break; 265 case all_integer_registers: reg_space = sizeof(RegisterSaver_LiveIntRegs); break; 266 case all_volatile_registers: reg_space = sizeof(RegisterSaver_LiveVolatileRegs); break; 267 case arg_registers: reg_space = sizeof(RegisterSaver_LiveArgRegs); break; 268 default: ShouldNotReachHere(); 269 } 270 return (reg_space / sizeof(RegisterSaver::LiveRegType)) * reg_size; 271 } 272 273 274 int RegisterSaver::live_reg_frame_size(RegisterSet reg_set) { 275 return live_reg_save_size(reg_set) + frame::z_abi_160_size; 276 } 277 278 279 // return_pc: Specify the register that should be stored as the return pc in the current frame. 280 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, RegisterSet reg_set, Register return_pc) { 281 // Record volatile registers as callee-save values in an OopMap so 282 // their save locations will be propagated to the caller frame's 283 // RegisterMap during StackFrameStream construction (needed for 284 // deoptimization; see compiledVFrame::create_stack_value). 285 286 // Calculate frame size. 287 const int frame_size_in_bytes = live_reg_frame_size(reg_set); 288 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint); 289 const int register_save_offset = frame_size_in_bytes - live_reg_save_size(reg_set); 290 291 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words. 292 OopMap* map = new OopMap(frame_size_in_slots, 0); 293 294 int regstosave_num = 0; 295 const RegisterSaver::LiveRegType* live_regs = nullptr; 296 297 switch (reg_set) { 298 case all_registers: 299 regstosave_num = sizeof(RegisterSaver_LiveRegs)/sizeof(RegisterSaver::LiveRegType); 300 live_regs = RegisterSaver_LiveRegs; 301 break; 302 case all_registers_except_r2: 303 regstosave_num = sizeof(RegisterSaver_LiveRegsWithoutR2)/sizeof(RegisterSaver::LiveRegType);; 304 live_regs = RegisterSaver_LiveRegsWithoutR2; 305 break; 306 case all_integer_registers: 307 regstosave_num = sizeof(RegisterSaver_LiveIntRegs)/sizeof(RegisterSaver::LiveRegType); 308 live_regs = RegisterSaver_LiveIntRegs; 309 break; 310 case all_volatile_registers: 311 regstosave_num = sizeof(RegisterSaver_LiveVolatileRegs)/sizeof(RegisterSaver::LiveRegType); 312 live_regs = RegisterSaver_LiveVolatileRegs; 313 break; 314 case arg_registers: 315 regstosave_num = sizeof(RegisterSaver_LiveArgRegs)/sizeof(RegisterSaver::LiveRegType);; 316 live_regs = RegisterSaver_LiveArgRegs; 317 break; 318 default: ShouldNotReachHere(); 319 } 320 321 // Save return pc in old frame. 322 __ save_return_pc(return_pc); 323 324 // Push a new frame (includes stack linkage). 325 // Use return_pc as scratch for push_frame. Z_R0_scratch (the default) and Z_R1_scratch are 326 // illegally used to pass parameters by RangeCheckStub::emit_code(). 327 __ push_frame(frame_size_in_bytes, return_pc); 328 // We have to restore return_pc right away. 329 // Nobody else will. Furthermore, return_pc isn't necessarily the default (Z_R14). 330 // Nobody else knows which register we saved. 331 __ z_lg(return_pc, _z_common_abi(return_pc) + frame_size_in_bytes, Z_SP); 332 333 // Register save area in new frame starts above z_abi_160 area. 334 int offset = register_save_offset; 335 336 Register first = noreg; 337 Register last = noreg; 338 int first_offset = -1; 339 bool float_spilled = false; 340 341 for (int i = 0; i < regstosave_num; i++, offset += reg_size) { 342 int reg_num = live_regs[i].reg_num; 343 int reg_type = live_regs[i].reg_type; 344 345 switch (reg_type) { 346 case RegisterSaver::int_reg: { 347 Register reg = as_Register(reg_num); 348 if (last != reg->predecessor()) { 349 if (first != noreg) { 350 __ z_stmg(first, last, first_offset, Z_SP); 351 } 352 first = reg; 353 first_offset = offset; 354 DEBUG_ONLY(float_spilled = false); 355 } 356 last = reg; 357 assert(last != Z_R0, "r0 would require special treatment"); 358 assert(!float_spilled, "for simplicity, do not mix up ints and floats in RegisterSaver_LiveRegs[]"); 359 break; 360 } 361 362 case RegisterSaver::excluded_reg: // Not saved/restored, but with dedicated slot. 363 continue; // Continue with next loop iteration. 364 365 case RegisterSaver::float_reg: { 366 FloatRegister freg = as_FloatRegister(reg_num); 367 __ z_std(freg, offset, Z_SP); 368 DEBUG_ONLY(float_spilled = true); 369 break; 370 } 371 372 default: 373 ShouldNotReachHere(); 374 break; 375 } 376 377 // Second set_callee_saved is really a waste but we'll keep things as they were for now 378 map->set_callee_saved(VMRegImpl::stack2reg(offset >> 2), live_regs[i].vmreg); 379 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size) >> 2), live_regs[i].vmreg->next()); 380 } 381 assert(first != noreg, "Should spill at least one int reg."); 382 __ z_stmg(first, last, first_offset, Z_SP); 383 384 // And we're done. 385 return map; 386 } 387 388 389 // Generate the OopMap (again, regs where saved before). 390 OopMap* RegisterSaver::generate_oop_map(MacroAssembler* masm, RegisterSet reg_set) { 391 // Calculate frame size. 392 const int frame_size_in_bytes = live_reg_frame_size(reg_set); 393 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint); 394 const int register_save_offset = frame_size_in_bytes - live_reg_save_size(reg_set); 395 396 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words. 397 OopMap* map = new OopMap(frame_size_in_slots, 0); 398 399 int regstosave_num = 0; 400 const RegisterSaver::LiveRegType* live_regs = nullptr; 401 402 switch (reg_set) { 403 case all_registers: 404 regstosave_num = sizeof(RegisterSaver_LiveRegs)/sizeof(RegisterSaver::LiveRegType); 405 live_regs = RegisterSaver_LiveRegs; 406 break; 407 case all_registers_except_r2: 408 regstosave_num = sizeof(RegisterSaver_LiveRegsWithoutR2)/sizeof(RegisterSaver::LiveRegType);; 409 live_regs = RegisterSaver_LiveRegsWithoutR2; 410 break; 411 case all_integer_registers: 412 regstosave_num = sizeof(RegisterSaver_LiveIntRegs)/sizeof(RegisterSaver::LiveRegType); 413 live_regs = RegisterSaver_LiveIntRegs; 414 break; 415 case all_volatile_registers: 416 regstosave_num = sizeof(RegisterSaver_LiveVolatileRegs)/sizeof(RegisterSaver::LiveRegType); 417 live_regs = RegisterSaver_LiveVolatileRegs; 418 break; 419 case arg_registers: 420 regstosave_num = sizeof(RegisterSaver_LiveArgRegs)/sizeof(RegisterSaver::LiveRegType);; 421 live_regs = RegisterSaver_LiveArgRegs; 422 break; 423 default: ShouldNotReachHere(); 424 } 425 426 // Register save area in new frame starts above z_abi_160 area. 427 int offset = register_save_offset; 428 for (int i = 0; i < regstosave_num; i++) { 429 if (live_regs[i].reg_type < RegisterSaver::excluded_reg) { 430 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), live_regs[i].vmreg); 431 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2), live_regs[i].vmreg->next()); 432 } 433 offset += reg_size; 434 } 435 return map; 436 } 437 438 439 // Pop the current frame and restore all the registers that we saved. 440 void RegisterSaver::restore_live_registers(MacroAssembler* masm, RegisterSet reg_set) { 441 int offset; 442 const int register_save_offset = live_reg_frame_size(reg_set) - live_reg_save_size(reg_set); 443 444 Register first = noreg; 445 Register last = noreg; 446 int first_offset = -1; 447 bool float_spilled = false; 448 449 int regstosave_num = 0; 450 const RegisterSaver::LiveRegType* live_regs = nullptr; 451 452 switch (reg_set) { 453 case all_registers: 454 regstosave_num = sizeof(RegisterSaver_LiveRegs)/sizeof(RegisterSaver::LiveRegType);; 455 live_regs = RegisterSaver_LiveRegs; 456 break; 457 case all_registers_except_r2: 458 regstosave_num = sizeof(RegisterSaver_LiveRegsWithoutR2)/sizeof(RegisterSaver::LiveRegType);; 459 live_regs = RegisterSaver_LiveRegsWithoutR2; 460 break; 461 case all_integer_registers: 462 regstosave_num = sizeof(RegisterSaver_LiveIntRegs)/sizeof(RegisterSaver::LiveRegType); 463 live_regs = RegisterSaver_LiveIntRegs; 464 break; 465 case all_volatile_registers: 466 regstosave_num = sizeof(RegisterSaver_LiveVolatileRegs)/sizeof(RegisterSaver::LiveRegType);; 467 live_regs = RegisterSaver_LiveVolatileRegs; 468 break; 469 case arg_registers: 470 regstosave_num = sizeof(RegisterSaver_LiveArgRegs)/sizeof(RegisterSaver::LiveRegType);; 471 live_regs = RegisterSaver_LiveArgRegs; 472 break; 473 default: ShouldNotReachHere(); 474 } 475 476 // Restore all registers (ints and floats). 477 478 // Register save area in new frame starts above z_abi_160 area. 479 offset = register_save_offset; 480 481 for (int i = 0; i < regstosave_num; i++, offset += reg_size) { 482 int reg_num = live_regs[i].reg_num; 483 int reg_type = live_regs[i].reg_type; 484 485 switch (reg_type) { 486 case RegisterSaver::excluded_reg: 487 continue; // Continue with next loop iteration. 488 489 case RegisterSaver::int_reg: { 490 Register reg = as_Register(reg_num); 491 if (last != reg->predecessor()) { 492 if (first != noreg) { 493 __ z_lmg(first, last, first_offset, Z_SP); 494 } 495 first = reg; 496 first_offset = offset; 497 DEBUG_ONLY(float_spilled = false); 498 } 499 last = reg; 500 assert(last != Z_R0, "r0 would require special treatment"); 501 assert(!float_spilled, "for simplicity, do not mix up ints and floats in RegisterSaver_LiveRegs[]"); 502 break; 503 } 504 505 case RegisterSaver::float_reg: { 506 FloatRegister freg = as_FloatRegister(reg_num); 507 __ z_ld(freg, offset, Z_SP); 508 DEBUG_ONLY(float_spilled = true); 509 break; 510 } 511 512 default: 513 ShouldNotReachHere(); 514 } 515 } 516 assert(first != noreg, "Should spill at least one int reg."); 517 __ z_lmg(first, last, first_offset, Z_SP); 518 519 // Pop the frame. 520 __ pop_frame(); 521 522 // Restore the flags. 523 __ restore_return_pc(); 524 } 525 526 527 // Pop the current frame and restore the registers that might be holding a result. 528 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 529 int i; 530 int offset; 531 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) / 532 sizeof(RegisterSaver::LiveRegType); 533 const int register_save_offset = live_reg_frame_size(all_registers) - live_reg_save_size(all_registers); 534 535 // Restore all result registers (ints and floats). 536 offset = register_save_offset; 537 for (int i = 0; i < regstosave_num; i++, offset += reg_size) { 538 int reg_num = RegisterSaver_LiveRegs[i].reg_num; 539 int reg_type = RegisterSaver_LiveRegs[i].reg_type; 540 switch (reg_type) { 541 case RegisterSaver::excluded_reg: 542 continue; // Continue with next loop iteration. 543 case RegisterSaver::int_reg: { 544 if (as_Register(reg_num) == Z_RET) { // int result_reg 545 __ z_lg(as_Register(reg_num), offset, Z_SP); 546 } 547 break; 548 } 549 case RegisterSaver::float_reg: { 550 if (as_FloatRegister(reg_num) == Z_FRET) { // float result_reg 551 __ z_ld(as_FloatRegister(reg_num), offset, Z_SP); 552 } 553 break; 554 } 555 default: 556 ShouldNotReachHere(); 557 } 558 } 559 } 560 561 // --------------------------------------------------------------------------- 562 void SharedRuntime::save_native_result(MacroAssembler * masm, 563 BasicType ret_type, 564 int frame_slots) { 565 Address memaddr(Z_SP, frame_slots * VMRegImpl::stack_slot_size); 566 567 switch (ret_type) { 568 case T_BOOLEAN: // Save shorter types as int. Do we need sign extension at restore?? 569 case T_BYTE: 570 case T_CHAR: 571 case T_SHORT: 572 case T_INT: 573 __ reg2mem_opt(Z_RET, memaddr, false); 574 break; 575 case T_OBJECT: // Save pointer types as long. 576 case T_ARRAY: 577 case T_ADDRESS: 578 case T_VOID: 579 case T_LONG: 580 __ reg2mem_opt(Z_RET, memaddr); 581 break; 582 case T_FLOAT: 583 __ freg2mem_opt(Z_FRET, memaddr, false); 584 break; 585 case T_DOUBLE: 586 __ freg2mem_opt(Z_FRET, memaddr); 587 break; 588 default: 589 ShouldNotReachHere(); 590 break; 591 } 592 } 593 594 void SharedRuntime::restore_native_result(MacroAssembler *masm, 595 BasicType ret_type, 596 int frame_slots) { 597 Address memaddr(Z_SP, frame_slots * VMRegImpl::stack_slot_size); 598 599 switch (ret_type) { 600 case T_BOOLEAN: // Restore shorter types as int. Do we need sign extension at restore?? 601 case T_BYTE: 602 case T_CHAR: 603 case T_SHORT: 604 case T_INT: 605 __ mem2reg_opt(Z_RET, memaddr, false); 606 break; 607 case T_OBJECT: // Restore pointer types as long. 608 case T_ARRAY: 609 case T_ADDRESS: 610 case T_VOID: 611 case T_LONG: 612 __ mem2reg_opt(Z_RET, memaddr); 613 break; 614 case T_FLOAT: 615 __ mem2freg_opt(Z_FRET, memaddr, false); 616 break; 617 case T_DOUBLE: 618 __ mem2freg_opt(Z_FRET, memaddr); 619 break; 620 default: 621 ShouldNotReachHere(); 622 break; 623 } 624 } 625 626 // --------------------------------------------------------------------------- 627 // Read the array of BasicTypes from a signature, and compute where the 628 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 629 // quantities. Values less than VMRegImpl::stack0 are registers, those above 630 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 631 // as framesizes are fixed. 632 // VMRegImpl::stack0 refers to the first slot 0(sp). 633 // VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Registers 634 // up to Register::number_of_registers are the 64-bit integer registers. 635 636 // Note: the INPUTS in sig_bt are in units of Java argument words, which are 637 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 638 // units regardless of build. 639 640 // The Java calling convention is a "shifted" version of the C ABI. 641 // By skipping the first C ABI register we can call non-static jni methods 642 // with small numbers of arguments without having to shuffle the arguments 643 // at all. Since we control the java ABI we ought to at least get some 644 // advantage out of it. 645 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 646 VMRegPair *regs, 647 int total_args_passed) { 648 // c2c calling conventions for compiled-compiled calls. 649 650 // An int/float occupies 1 slot here. 651 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats. 652 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles. 653 654 const VMReg z_iarg_reg[5] = { 655 Z_R2->as_VMReg(), 656 Z_R3->as_VMReg(), 657 Z_R4->as_VMReg(), 658 Z_R5->as_VMReg(), 659 Z_R6->as_VMReg() 660 }; 661 const VMReg z_farg_reg[4] = { 662 Z_F0->as_VMReg(), 663 Z_F2->as_VMReg(), 664 Z_F4->as_VMReg(), 665 Z_F6->as_VMReg() 666 }; 667 const int z_num_iarg_registers = sizeof(z_iarg_reg) / sizeof(z_iarg_reg[0]); 668 const int z_num_farg_registers = sizeof(z_farg_reg) / sizeof(z_farg_reg[0]); 669 670 assert(Register::number_of_arg_registers == z_num_iarg_registers, "iarg reg count mismatch"); 671 assert(FloatRegister::number_of_arg_registers == z_num_farg_registers, "farg reg count mismatch"); 672 673 int i; 674 int stk = 0; 675 int ireg = 0; 676 int freg = 0; 677 678 for (int i = 0; i < total_args_passed; ++i) { 679 switch (sig_bt[i]) { 680 case T_BOOLEAN: 681 case T_CHAR: 682 case T_BYTE: 683 case T_SHORT: 684 case T_INT: 685 if (ireg < z_num_iarg_registers) { 686 // Put int/ptr in register. 687 regs[i].set1(z_iarg_reg[ireg]); 688 ++ireg; 689 } else { 690 // Put int/ptr on stack. 691 regs[i].set1(VMRegImpl::stack2reg(stk)); 692 stk += inc_stk_for_intfloat; 693 } 694 break; 695 case T_LONG: 696 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half"); 697 if (ireg < z_num_iarg_registers) { 698 // Put long in register. 699 regs[i].set2(z_iarg_reg[ireg]); 700 ++ireg; 701 } else { 702 // Put long on stack and align to 2 slots. 703 if (stk & 0x1) { ++stk; } 704 regs[i].set2(VMRegImpl::stack2reg(stk)); 705 stk += inc_stk_for_longdouble; 706 } 707 break; 708 case T_OBJECT: 709 case T_ARRAY: 710 case T_ADDRESS: 711 if (ireg < z_num_iarg_registers) { 712 // Put ptr in register. 713 regs[i].set2(z_iarg_reg[ireg]); 714 ++ireg; 715 } else { 716 // Put ptr on stack and align to 2 slots, because 717 // "64-bit pointers record oop-ishness on 2 aligned adjacent 718 // registers." (see OopFlow::build_oop_map). 719 if (stk & 0x1) { ++stk; } 720 regs[i].set2(VMRegImpl::stack2reg(stk)); 721 stk += inc_stk_for_longdouble; 722 } 723 break; 724 case T_FLOAT: 725 if (freg < z_num_farg_registers) { 726 // Put float in register. 727 regs[i].set1(z_farg_reg[freg]); 728 ++freg; 729 } else { 730 // Put float on stack. 731 regs[i].set1(VMRegImpl::stack2reg(stk)); 732 stk += inc_stk_for_intfloat; 733 } 734 break; 735 case T_DOUBLE: 736 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half"); 737 if (freg < z_num_farg_registers) { 738 // Put double in register. 739 regs[i].set2(z_farg_reg[freg]); 740 ++freg; 741 } else { 742 // Put double on stack and align to 2 slots. 743 if (stk & 0x1) { ++stk; } 744 regs[i].set2(VMRegImpl::stack2reg(stk)); 745 stk += inc_stk_for_longdouble; 746 } 747 break; 748 case T_VOID: 749 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 750 // Do not count halves. 751 regs[i].set_bad(); 752 break; 753 default: 754 ShouldNotReachHere(); 755 } 756 } 757 return stk; 758 } 759 760 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 761 VMRegPair *regs, 762 int total_args_passed) { 763 764 // Calling conventions for C runtime calls and calls to JNI native methods. 765 const VMReg z_iarg_reg[5] = { 766 Z_R2->as_VMReg(), 767 Z_R3->as_VMReg(), 768 Z_R4->as_VMReg(), 769 Z_R5->as_VMReg(), 770 Z_R6->as_VMReg() 771 }; 772 const VMReg z_farg_reg[4] = { 773 Z_F0->as_VMReg(), 774 Z_F2->as_VMReg(), 775 Z_F4->as_VMReg(), 776 Z_F6->as_VMReg() 777 }; 778 const int z_num_iarg_registers = sizeof(z_iarg_reg) / sizeof(z_iarg_reg[0]); 779 const int z_num_farg_registers = sizeof(z_farg_reg) / sizeof(z_farg_reg[0]); 780 781 // Check calling conventions consistency. 782 assert(Register::number_of_arg_registers == z_num_iarg_registers, "iarg reg count mismatch"); 783 assert(FloatRegister::number_of_arg_registers == z_num_farg_registers, "farg reg count mismatch"); 784 785 // Avoid passing C arguments in the wrong stack slots. 786 787 // 'Stk' counts stack slots. Due to alignment, 32 bit values occupy 788 // 2 such slots, like 64 bit values do. 789 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats. 790 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles. 791 792 int i; 793 // Leave room for C-compatible ABI 794 int stk = (frame::z_abi_160_size - frame::z_jit_out_preserve_size) / VMRegImpl::stack_slot_size; 795 int freg = 0; 796 int ireg = 0; 797 798 // We put the first 5 arguments into registers and the rest on the 799 // stack. Float arguments are already in their argument registers 800 // due to c2c calling conventions (see calling_convention). 801 for (int i = 0; i < total_args_passed; ++i) { 802 switch (sig_bt[i]) { 803 case T_BOOLEAN: 804 case T_CHAR: 805 case T_BYTE: 806 case T_SHORT: 807 case T_INT: 808 // Fall through, handle as long. 809 case T_LONG: 810 case T_OBJECT: 811 case T_ARRAY: 812 case T_ADDRESS: 813 case T_METADATA: 814 // Oops are already boxed if required (JNI). 815 if (ireg < z_num_iarg_registers) { 816 regs[i].set2(z_iarg_reg[ireg]); 817 ++ireg; 818 } else { 819 regs[i].set2(VMRegImpl::stack2reg(stk)); 820 stk += inc_stk_for_longdouble; 821 } 822 break; 823 case T_FLOAT: 824 if (freg < z_num_farg_registers) { 825 regs[i].set1(z_farg_reg[freg]); 826 ++freg; 827 } else { 828 regs[i].set1(VMRegImpl::stack2reg(stk+1)); 829 stk += inc_stk_for_intfloat; 830 } 831 break; 832 case T_DOUBLE: 833 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half"); 834 if (freg < z_num_farg_registers) { 835 regs[i].set2(z_farg_reg[freg]); 836 ++freg; 837 } else { 838 // Put double on stack. 839 regs[i].set2(VMRegImpl::stack2reg(stk)); 840 stk += inc_stk_for_longdouble; 841 } 842 break; 843 case T_VOID: 844 // Do not count halves. 845 regs[i].set_bad(); 846 break; 847 default: 848 ShouldNotReachHere(); 849 } 850 } 851 return align_up(stk, 2); 852 } 853 854 int SharedRuntime::vector_calling_convention(VMRegPair *regs, 855 uint num_bits, 856 uint total_args_passed) { 857 Unimplemented(); 858 return 0; 859 } 860 861 //////////////////////////////////////////////////////////////////////// 862 // 863 // Argument shufflers 864 // 865 //////////////////////////////////////////////////////////////////////// 866 867 //---------------------------------------------------------------------- 868 // The java_calling_convention describes stack locations as ideal slots on 869 // a frame with no abi restrictions. Since we must observe abi restrictions 870 // (like the placement of the register window) the slots must be biased by 871 // the following value. 872 //---------------------------------------------------------------------- 873 static int reg2slot(VMReg r) { 874 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 875 } 876 877 static int reg2offset(VMReg r) { 878 return reg2slot(r) * VMRegImpl::stack_slot_size; 879 } 880 881 static void verify_oop_args(MacroAssembler *masm, 882 int total_args_passed, 883 const BasicType *sig_bt, 884 const VMRegPair *regs) { 885 if (!VerifyOops) { return; } 886 887 for (int i = 0; i < total_args_passed; i++) { 888 if (is_reference_type(sig_bt[i])) { 889 VMReg r = regs[i].first(); 890 assert(r->is_valid(), "bad oop arg"); 891 892 if (r->is_stack()) { 893 __ z_lg(Z_R0_scratch, 894 Address(Z_SP, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 895 __ verify_oop(Z_R0_scratch, FILE_AND_LINE); 896 } else { 897 __ verify_oop(r->as_Register(), FILE_AND_LINE); 898 } 899 } 900 } 901 } 902 903 static void gen_special_dispatch(MacroAssembler *masm, 904 int total_args_passed, 905 vmIntrinsics::ID special_dispatch, 906 const BasicType *sig_bt, 907 const VMRegPair *regs) { 908 verify_oop_args(masm, total_args_passed, sig_bt, regs); 909 910 // Now write the args into the outgoing interpreter space. 911 bool has_receiver = false; 912 Register receiver_reg = noreg; 913 int member_arg_pos = -1; 914 Register member_reg = noreg; 915 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch); 916 917 if (ref_kind != 0) { 918 member_arg_pos = total_args_passed - 1; // trailing MemberName argument 919 member_reg = Z_R9; // Known to be free at this point. 920 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 921 } else if (special_dispatch == vmIntrinsics::_linkToNative) { 922 member_arg_pos = total_args_passed - 1; // trailing NativeEntryPoint argument 923 member_reg = Z_R9; // known to be free at this point 924 } else { 925 guarantee(special_dispatch == vmIntrinsics::_invokeBasic, 926 "special_dispatch=%d", vmIntrinsics::as_int(special_dispatch)); 927 has_receiver = true; 928 } 929 930 if (member_reg != noreg) { 931 // Load the member_arg into register, if necessary. 932 assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob"); 933 assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object"); 934 935 VMReg r = regs[member_arg_pos].first(); 936 assert(r->is_valid(), "bad member arg"); 937 938 if (r->is_stack()) { 939 __ z_lg(member_reg, Address(Z_SP, reg2offset(r))); 940 } else { 941 // No data motion is needed. 942 member_reg = r->as_Register(); 943 } 944 } 945 946 if (has_receiver) { 947 // Make sure the receiver is loaded into a register. 948 assert(total_args_passed > 0, "oob"); 949 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 950 951 VMReg r = regs[0].first(); 952 assert(r->is_valid(), "bad receiver arg"); 953 954 if (r->is_stack()) { 955 // Porting note: This assumes that compiled calling conventions always 956 // pass the receiver oop in a register. If this is not true on some 957 // platform, pick a temp and load the receiver from stack. 958 assert(false, "receiver always in a register"); 959 receiver_reg = Z_R13; // Known to be free at this point. 960 __ z_lg(receiver_reg, Address(Z_SP, reg2offset(r))); 961 } else { 962 // No data motion is needed. 963 receiver_reg = r->as_Register(); 964 } 965 } 966 967 // Figure out which address we are really jumping to: 968 MethodHandles::generate_method_handle_dispatch(masm, special_dispatch, 969 receiver_reg, member_reg, 970 /*for_compiler_entry:*/ true); 971 } 972 973 //////////////////////////////////////////////////////////////////////// 974 // 975 // Argument shufflers 976 // 977 //////////////////////////////////////////////////////////////////////// 978 979 // Is the size of a vector size (in bytes) bigger than a size saved by default? 980 // 8 bytes registers are saved by default on z/Architecture. 981 bool SharedRuntime::is_wide_vector(int size) { 982 // Note, MaxVectorSize == 8 on this platform. 983 assert(size <= 8, "%d bytes vectors are not supported", size); 984 return size > 8; 985 } 986 987 //---------------------------------------------------------------------- 988 // An oop arg. Must pass a handle not the oop itself 989 //---------------------------------------------------------------------- 990 static void object_move(MacroAssembler *masm, 991 OopMap *map, 992 int oop_handle_offset, 993 int framesize_in_slots, 994 VMRegPair src, 995 VMRegPair dst, 996 bool is_receiver, 997 int *receiver_offset) { 998 int frame_offset = framesize_in_slots*VMRegImpl::stack_slot_size; 999 1000 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)), "only one receiving object per call, please."); 1001 1002 // Must pass a handle. First figure out the location we use as a handle. 1003 1004 if (src.first()->is_stack()) { 1005 // Oop is already on the stack, put handle on stack or in register 1006 // If handle will be on the stack, use temp reg to calculate it. 1007 Register rHandle = dst.first()->is_stack() ? Z_R1 : dst.first()->as_Register(); 1008 Label skip; 1009 int slot_in_older_frame = reg2slot(src.first()); 1010 1011 guarantee(!is_receiver, "expecting receiver in register"); 1012 map->set_oop(VMRegImpl::stack2reg(slot_in_older_frame + framesize_in_slots)); 1013 1014 __ add2reg(rHandle, reg2offset(src.first())+frame_offset, Z_SP); 1015 __ load_and_test_long(Z_R0, Address(rHandle)); 1016 __ z_brne(skip); 1017 // Use a null handle if oop is null. 1018 __ clear_reg(rHandle, true, false); 1019 __ bind(skip); 1020 1021 // Copy handle to the right place (register or stack). 1022 if (dst.first()->is_stack()) { 1023 __ z_stg(rHandle, reg2offset(dst.first()), Z_SP); 1024 } // else 1025 // nothing to do. rHandle uses the correct register 1026 } else { 1027 // Oop is passed in an input register. We must flush it to the stack. 1028 const Register rOop = src.first()->as_Register(); 1029 const Register rHandle = dst.first()->is_stack() ? Z_R1 : dst.first()->as_Register(); 1030 int oop_slot = (rOop->encoding()-Z_ARG1->encoding()) * VMRegImpl::slots_per_word + oop_handle_offset; 1031 int oop_slot_offset = oop_slot*VMRegImpl::stack_slot_size; 1032 NearLabel skip; 1033 1034 if (is_receiver) { 1035 *receiver_offset = oop_slot_offset; 1036 } 1037 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 1038 1039 // Flush Oop to stack, calculate handle. 1040 __ z_stg(rOop, oop_slot_offset, Z_SP); 1041 __ add2reg(rHandle, oop_slot_offset, Z_SP); 1042 1043 // If Oop is null, use a null handle. 1044 __ compare64_and_branch(rOop, (RegisterOrConstant)0L, Assembler::bcondNotEqual, skip); 1045 __ clear_reg(rHandle, true, false); 1046 __ bind(skip); 1047 1048 // Copy handle to the right place (register or stack). 1049 if (dst.first()->is_stack()) { 1050 __ z_stg(rHandle, reg2offset(dst.first()), Z_SP); 1051 } // else 1052 // nothing to do here, since rHandle = dst.first()->as_Register in this case. 1053 } 1054 } 1055 1056 //---------------------------------------------------------------------- 1057 // A float arg. May have to do float reg to int reg conversion 1058 //---------------------------------------------------------------------- 1059 static void float_move(MacroAssembler *masm, 1060 VMRegPair src, 1061 VMRegPair dst, 1062 int framesize_in_slots, 1063 int workspace_slot_offset) { 1064 int frame_offset = framesize_in_slots * VMRegImpl::stack_slot_size; 1065 int workspace_offset = workspace_slot_offset * VMRegImpl::stack_slot_size; 1066 1067 // We do not accept an argument in a VMRegPair to be spread over two slots, 1068 // no matter what physical location (reg or stack) the slots may have. 1069 // We just check for the unaccepted slot to be invalid. 1070 assert(!src.second()->is_valid(), "float in arg spread over two slots"); 1071 assert(!dst.second()->is_valid(), "float out arg spread over two slots"); 1072 1073 if (src.first()->is_stack()) { 1074 if (dst.first()->is_stack()) { 1075 // stack -> stack. The easiest of the bunch. 1076 __ z_mvc(Address(Z_SP, reg2offset(dst.first())), 1077 Address(Z_SP, reg2offset(src.first()) + frame_offset), sizeof(float)); 1078 } else { 1079 // stack to reg 1080 Address memaddr(Z_SP, reg2offset(src.first()) + frame_offset); 1081 if (dst.first()->is_Register()) { 1082 __ mem2reg_opt(dst.first()->as_Register(), memaddr, false); 1083 } else { 1084 __ mem2freg_opt(dst.first()->as_FloatRegister(), memaddr, false); 1085 } 1086 } 1087 } else if (src.first()->is_Register()) { 1088 if (dst.first()->is_stack()) { 1089 // gpr -> stack 1090 __ reg2mem_opt(src.first()->as_Register(), 1091 Address(Z_SP, reg2offset(dst.first()), false )); 1092 } else { 1093 if (dst.first()->is_Register()) { 1094 // gpr -> gpr 1095 __ move_reg_if_needed(dst.first()->as_Register(), T_INT, 1096 src.first()->as_Register(), T_INT); 1097 } else { 1098 if (VM_Version::has_FPSupportEnhancements()) { 1099 // gpr -> fpr. Exploit z10 capability of direct transfer. 1100 __ z_ldgr(dst.first()->as_FloatRegister(), src.first()->as_Register()); 1101 } else { 1102 // gpr -> fpr. Use work space on stack to transfer data. 1103 Address stackaddr(Z_SP, workspace_offset); 1104 1105 __ reg2mem_opt(src.first()->as_Register(), stackaddr, false); 1106 __ mem2freg_opt(dst.first()->as_FloatRegister(), stackaddr, false); 1107 } 1108 } 1109 } 1110 } else { 1111 if (dst.first()->is_stack()) { 1112 // fpr -> stack 1113 __ freg2mem_opt(src.first()->as_FloatRegister(), 1114 Address(Z_SP, reg2offset(dst.first())), false); 1115 } else { 1116 if (dst.first()->is_Register()) { 1117 if (VM_Version::has_FPSupportEnhancements()) { 1118 // fpr -> gpr. 1119 __ z_lgdr(dst.first()->as_Register(), src.first()->as_FloatRegister()); 1120 } else { 1121 // fpr -> gpr. Use work space on stack to transfer data. 1122 Address stackaddr(Z_SP, workspace_offset); 1123 1124 __ freg2mem_opt(src.first()->as_FloatRegister(), stackaddr, false); 1125 __ mem2reg_opt(dst.first()->as_Register(), stackaddr, false); 1126 } 1127 } else { 1128 // fpr -> fpr 1129 __ move_freg_if_needed(dst.first()->as_FloatRegister(), T_FLOAT, 1130 src.first()->as_FloatRegister(), T_FLOAT); 1131 } 1132 } 1133 } 1134 } 1135 1136 //---------------------------------------------------------------------- 1137 // A double arg. May have to do double reg to long reg conversion 1138 //---------------------------------------------------------------------- 1139 static void double_move(MacroAssembler *masm, 1140 VMRegPair src, 1141 VMRegPair dst, 1142 int framesize_in_slots, 1143 int workspace_slot_offset) { 1144 int frame_offset = framesize_in_slots*VMRegImpl::stack_slot_size; 1145 int workspace_offset = workspace_slot_offset*VMRegImpl::stack_slot_size; 1146 1147 // Since src is always a java calling convention we know that the 1148 // src pair is always either all registers or all stack (and aligned?) 1149 1150 if (src.first()->is_stack()) { 1151 if (dst.first()->is_stack()) { 1152 // stack -> stack. The easiest of the bunch. 1153 __ z_mvc(Address(Z_SP, reg2offset(dst.first())), 1154 Address(Z_SP, reg2offset(src.first()) + frame_offset), sizeof(double)); 1155 } else { 1156 // stack to reg 1157 Address stackaddr(Z_SP, reg2offset(src.first()) + frame_offset); 1158 1159 if (dst.first()->is_Register()) { 1160 __ mem2reg_opt(dst.first()->as_Register(), stackaddr); 1161 } else { 1162 __ mem2freg_opt(dst.first()->as_FloatRegister(), stackaddr); 1163 } 1164 } 1165 } else if (src.first()->is_Register()) { 1166 if (dst.first()->is_stack()) { 1167 // gpr -> stack 1168 __ reg2mem_opt(src.first()->as_Register(), 1169 Address(Z_SP, reg2offset(dst.first()))); 1170 } else { 1171 if (dst.first()->is_Register()) { 1172 // gpr -> gpr 1173 __ move_reg_if_needed(dst.first()->as_Register(), T_LONG, 1174 src.first()->as_Register(), T_LONG); 1175 } else { 1176 if (VM_Version::has_FPSupportEnhancements()) { 1177 // gpr -> fpr. Exploit z10 capability of direct transfer. 1178 __ z_ldgr(dst.first()->as_FloatRegister(), src.first()->as_Register()); 1179 } else { 1180 // gpr -> fpr. Use work space on stack to transfer data. 1181 Address stackaddr(Z_SP, workspace_offset); 1182 __ reg2mem_opt(src.first()->as_Register(), stackaddr); 1183 __ mem2freg_opt(dst.first()->as_FloatRegister(), stackaddr); 1184 } 1185 } 1186 } 1187 } else { 1188 if (dst.first()->is_stack()) { 1189 // fpr -> stack 1190 __ freg2mem_opt(src.first()->as_FloatRegister(), 1191 Address(Z_SP, reg2offset(dst.first()))); 1192 } else { 1193 if (dst.first()->is_Register()) { 1194 if (VM_Version::has_FPSupportEnhancements()) { 1195 // fpr -> gpr. Exploit z10 capability of direct transfer. 1196 __ z_lgdr(dst.first()->as_Register(), src.first()->as_FloatRegister()); 1197 } else { 1198 // fpr -> gpr. Use work space on stack to transfer data. 1199 Address stackaddr(Z_SP, workspace_offset); 1200 1201 __ freg2mem_opt(src.first()->as_FloatRegister(), stackaddr); 1202 __ mem2reg_opt(dst.first()->as_Register(), stackaddr); 1203 } 1204 } else { 1205 // fpr -> fpr 1206 // In theory these overlap but the ordering is such that this is likely a nop. 1207 __ move_freg_if_needed(dst.first()->as_FloatRegister(), T_DOUBLE, 1208 src.first()->as_FloatRegister(), T_DOUBLE); 1209 } 1210 } 1211 } 1212 } 1213 1214 //---------------------------------------------------------------------- 1215 // A long arg. 1216 //---------------------------------------------------------------------- 1217 static void long_move(MacroAssembler *masm, 1218 VMRegPair src, 1219 VMRegPair dst, 1220 int framesize_in_slots) { 1221 int frame_offset = framesize_in_slots*VMRegImpl::stack_slot_size; 1222 1223 if (src.first()->is_stack()) { 1224 if (dst.first()->is_stack()) { 1225 // stack -> stack. The easiest of the bunch. 1226 __ z_mvc(Address(Z_SP, reg2offset(dst.first())), 1227 Address(Z_SP, reg2offset(src.first()) + frame_offset), sizeof(long)); 1228 } else { 1229 // stack to reg 1230 assert(dst.first()->is_Register(), "long dst value must be in GPR"); 1231 __ mem2reg_opt(dst.first()->as_Register(), 1232 Address(Z_SP, reg2offset(src.first()) + frame_offset)); 1233 } 1234 } else { 1235 // reg to reg 1236 assert(src.first()->is_Register(), "long src value must be in GPR"); 1237 if (dst.first()->is_stack()) { 1238 // reg -> stack 1239 __ reg2mem_opt(src.first()->as_Register(), 1240 Address(Z_SP, reg2offset(dst.first()))); 1241 } else { 1242 // reg -> reg 1243 assert(dst.first()->is_Register(), "long dst value must be in GPR"); 1244 __ move_reg_if_needed(dst.first()->as_Register(), 1245 T_LONG, src.first()->as_Register(), T_LONG); 1246 } 1247 } 1248 } 1249 1250 1251 //---------------------------------------------------------------------- 1252 // A int-like arg. 1253 //---------------------------------------------------------------------- 1254 // On z/Architecture we will store integer like items to the stack as 64 bit 1255 // items, according to the z/Architecture ABI, even though Java would only store 1256 // 32 bits for a parameter. 1257 // We do sign extension for all base types. That is ok since the only 1258 // unsigned base type is T_CHAR, and T_CHAR uses only 16 bits of an int. 1259 // Sign extension 32->64 bit will thus not affect the value. 1260 //---------------------------------------------------------------------- 1261 static void move32_64(MacroAssembler *masm, 1262 VMRegPair src, 1263 VMRegPair dst, 1264 int framesize_in_slots) { 1265 int frame_offset = framesize_in_slots * VMRegImpl::stack_slot_size; 1266 1267 if (src.first()->is_stack()) { 1268 Address memaddr(Z_SP, reg2offset(src.first()) + frame_offset); 1269 if (dst.first()->is_stack()) { 1270 // stack -> stack. MVC not possible due to sign extension. 1271 Address firstaddr(Z_SP, reg2offset(dst.first())); 1272 __ mem2reg_signed_opt(Z_R0_scratch, memaddr); 1273 __ reg2mem_opt(Z_R0_scratch, firstaddr); 1274 } else { 1275 // stack -> reg, sign extended 1276 __ mem2reg_signed_opt(dst.first()->as_Register(), memaddr); 1277 } 1278 } else { 1279 if (dst.first()->is_stack()) { 1280 // reg -> stack, sign extended 1281 Address firstaddr(Z_SP, reg2offset(dst.first())); 1282 __ z_lgfr(src.first()->as_Register(), src.first()->as_Register()); 1283 __ reg2mem_opt(src.first()->as_Register(), firstaddr); 1284 } else { 1285 // reg -> reg, sign extended 1286 __ z_lgfr(dst.first()->as_Register(), src.first()->as_Register()); 1287 } 1288 } 1289 } 1290 1291 //---------------------------------------------------------------------- 1292 // Wrap a JNI call. 1293 //---------------------------------------------------------------------- 1294 #undef USE_RESIZE_FRAME 1295 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, 1296 const methodHandle& method, 1297 int compile_id, 1298 BasicType *in_sig_bt, 1299 VMRegPair *in_regs, 1300 BasicType ret_type) { 1301 int total_in_args = method->size_of_parameters(); 1302 if (method->is_method_handle_intrinsic()) { 1303 vmIntrinsics::ID iid = method->intrinsic_id(); 1304 intptr_t start = (intptr_t) __ pc(); 1305 int vep_offset = ((intptr_t) __ pc()) - start; 1306 1307 gen_special_dispatch(masm, total_in_args, 1308 method->intrinsic_id(), in_sig_bt, in_regs); 1309 1310 int frame_complete = ((intptr_t)__ pc()) - start; // Not complete, period. 1311 1312 __ flush(); 1313 1314 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // No out slots at all, actually. 1315 1316 return nmethod::new_native_nmethod(method, 1317 compile_id, 1318 masm->code(), 1319 vep_offset, 1320 frame_complete, 1321 stack_slots / VMRegImpl::slots_per_word, 1322 in_ByteSize(-1), 1323 in_ByteSize(-1), 1324 (OopMapSet *) nullptr); 1325 } 1326 1327 1328 /////////////////////////////////////////////////////////////////////// 1329 // 1330 // Precalculations before generating any code 1331 // 1332 /////////////////////////////////////////////////////////////////////// 1333 1334 address native_func = method->native_function(); 1335 assert(native_func != nullptr, "must have function"); 1336 1337 //--------------------------------------------------------------------- 1338 // We have received a description of where all the java args are located 1339 // on entry to the wrapper. We need to convert these args to where 1340 // the jni function will expect them. To figure out where they go 1341 // we convert the java signature to a C signature by inserting 1342 // the hidden arguments as arg[0] and possibly arg[1] (static method). 1343 // 1344 // The first hidden argument arg[0] is a pointer to the JNI environment. 1345 // It is generated for every call. 1346 // The second argument arg[1] to the JNI call, which is hidden for static 1347 // methods, is the boxed lock object. For static calls, the lock object 1348 // is the static method itself. The oop is constructed here. for instance 1349 // calls, the lock is performed on the object itself, the pointer of 1350 // which is passed as the first visible argument. 1351 //--------------------------------------------------------------------- 1352 1353 // Additionally, on z/Architecture we must convert integers 1354 // to longs in the C signature. We do this in advance in order to have 1355 // no trouble with indexes into the bt-arrays. 1356 // So convert the signature and registers now, and adjust the total number 1357 // of in-arguments accordingly. 1358 bool method_is_static = method->is_static(); 1359 int total_c_args = total_in_args + (method_is_static ? 2 : 1); 1360 1361 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1362 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1363 BasicType* in_elem_bt = nullptr; 1364 1365 // Create the signature for the C call: 1366 // 1) add the JNIEnv* 1367 // 2) add the class if the method is static 1368 // 3) copy the rest of the incoming signature (shifted by the number of 1369 // hidden arguments) 1370 1371 int argc = 0; 1372 out_sig_bt[argc++] = T_ADDRESS; 1373 if (method->is_static()) { 1374 out_sig_bt[argc++] = T_OBJECT; 1375 } 1376 1377 for (int i = 0; i < total_in_args; i++) { 1378 out_sig_bt[argc++] = in_sig_bt[i]; 1379 } 1380 1381 /////////////////////////////////////////////////////////////////////// 1382 // Now figure out where the args must be stored and how much stack space 1383 // they require (neglecting out_preserve_stack_slots but providing space 1384 // for storing the first five register arguments). 1385 // It's weird, see int_stk_helper. 1386 /////////////////////////////////////////////////////////////////////// 1387 1388 //--------------------------------------------------------------------- 1389 // Compute framesize for the wrapper. 1390 // 1391 // - We need to handlize all oops passed in registers. 1392 // - We must create space for them here that is disjoint from the save area. 1393 // - We always just allocate 5 words for storing down these object. 1394 // This allows us to simply record the base and use the Ireg number to 1395 // decide which slot to use. 1396 // - Note that the reg number used to index the stack slot is the inbound 1397 // number, not the outbound number. 1398 // - We must shuffle args to match the native convention, 1399 // and to include var-args space. 1400 //--------------------------------------------------------------------- 1401 1402 //--------------------------------------------------------------------- 1403 // Calculate the total number of stack slots we will need: 1404 // - 1) abi requirements 1405 // - 2) outgoing args 1406 // - 3) space for inbound oop handle area 1407 // - 4) space for handlizing a klass if static method 1408 // - 5) space for a lock if synchronized method 1409 // - 6) workspace (save rtn value, int<->float reg moves, ...) 1410 // - 7) filler slots for alignment 1411 //--------------------------------------------------------------------- 1412 // Here is how the space we have allocated will look like. 1413 // Since we use resize_frame, we do not create a new stack frame, 1414 // but just extend the one we got with our own data area. 1415 // 1416 // If an offset or pointer name points to a separator line, it is 1417 // assumed that addressing with offset 0 selects storage starting 1418 // at the first byte above the separator line. 1419 // 1420 // 1421 // ... ... 1422 // | caller's frame | 1423 // FP-> |---------------------| 1424 // | filler slots, if any| 1425 // 7| #slots == mult of 2 | 1426 // |---------------------| 1427 // | work space | 1428 // 6| 2 slots = 8 bytes | 1429 // |---------------------| 1430 // 5| lock box (if sync) | 1431 // |---------------------| <- lock_slot_offset 1432 // 4| klass (if static) | 1433 // |---------------------| <- klass_slot_offset 1434 // 3| oopHandle area | 1435 // | | 1436 // | | 1437 // |---------------------| <- oop_handle_offset 1438 // 2| outbound memory | 1439 // ... ... 1440 // | based arguments | 1441 // |---------------------| 1442 // | vararg | 1443 // ... ... 1444 // | area | 1445 // |---------------------| <- out_arg_slot_offset 1446 // 1| out_preserved_slots | 1447 // ... ... 1448 // | (z_abi spec) | 1449 // SP-> |---------------------| <- FP_slot_offset (back chain) 1450 // ... ... 1451 // 1452 //--------------------------------------------------------------------- 1453 1454 // *_slot_offset indicates offset from SP in #stack slots 1455 // *_offset indicates offset from SP in #bytes 1456 1457 int stack_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args) + // 1+2 1458 SharedRuntime::out_preserve_stack_slots(); // see c_calling_convention 1459 1460 // Now the space for the inbound oop handle area. 1461 int total_save_slots = Register::number_of_arg_registers * VMRegImpl::slots_per_word; 1462 1463 int oop_handle_slot_offset = stack_slots; 1464 stack_slots += total_save_slots; // 3) 1465 1466 int klass_slot_offset = 0; 1467 int klass_offset = -1; 1468 if (method_is_static) { // 4) 1469 klass_slot_offset = stack_slots; 1470 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1471 stack_slots += VMRegImpl::slots_per_word; 1472 } 1473 1474 int lock_slot_offset = 0; 1475 int lock_offset = -1; 1476 if (method->is_synchronized()) { // 5) 1477 lock_slot_offset = stack_slots; 1478 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size; 1479 stack_slots += VMRegImpl::slots_per_word; 1480 } 1481 1482 int workspace_slot_offset= stack_slots; // 6) 1483 stack_slots += 2; 1484 1485 // Now compute actual number of stack words we need. 1486 // Round to align stack properly. 1487 stack_slots = align_up(stack_slots, // 7) 1488 frame::alignment_in_bytes / VMRegImpl::stack_slot_size); 1489 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size; 1490 1491 1492 /////////////////////////////////////////////////////////////////////// 1493 // Now we can start generating code 1494 /////////////////////////////////////////////////////////////////////// 1495 1496 unsigned int wrapper_CodeStart = __ offset(); 1497 unsigned int wrapper_UEPStart; 1498 unsigned int wrapper_VEPStart; 1499 unsigned int wrapper_FrameDone; 1500 unsigned int wrapper_CRegsSet; 1501 Label handle_pending_exception; 1502 1503 //--------------------------------------------------------------------- 1504 // Unverified entry point (UEP) 1505 //--------------------------------------------------------------------- 1506 1507 // check ic: object class <-> cached class 1508 if (!method_is_static) { 1509 wrapper_UEPStart = __ ic_check(CodeEntryAlignment /* end_alignment */); 1510 } 1511 1512 //--------------------------------------------------------------------- 1513 // Verified entry point (VEP) 1514 //--------------------------------------------------------------------- 1515 wrapper_VEPStart = __ offset(); 1516 1517 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) { 1518 Label L_skip_barrier; 1519 Register klass = Z_R1_scratch; 1520 // Notify OOP recorder (don't need the relocation) 1521 AddressLiteral md = __ constant_metadata_address(method->method_holder()); 1522 __ load_const_optimized(klass, md.value()); 1523 __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/); 1524 1525 __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub()); 1526 __ z_br(klass); 1527 1528 __ bind(L_skip_barrier); 1529 } 1530 1531 __ save_return_pc(); 1532 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame. 1533 #ifndef USE_RESIZE_FRAME 1534 __ push_frame(frame_size_in_bytes); // Create a new frame for the wrapper. 1535 #else 1536 __ resize_frame(-frame_size_in_bytes, Z_R0_scratch); // No new frame for the wrapper. 1537 // Just resize the existing one. 1538 #endif 1539 1540 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 1541 bs->nmethod_entry_barrier(masm); 1542 1543 wrapper_FrameDone = __ offset(); 1544 1545 // Native nmethod wrappers never take possession of the oop arguments. 1546 // So the caller will gc the arguments. 1547 // The only thing we need an oopMap for is if the call is static. 1548 // 1549 // An OopMap for lock (and class if static), and one for the VM call itself 1550 OopMapSet *oop_maps = new OopMapSet(); 1551 OopMap *map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1552 1553 ////////////////////////////////////////////////////////////////////// 1554 // 1555 // The Grand Shuffle 1556 // 1557 ////////////////////////////////////////////////////////////////////// 1558 // 1559 // We immediately shuffle the arguments so that for any vm call we have 1560 // to make from here on out (sync slow path, jvmti, etc.) we will have 1561 // captured the oops from our caller and have a valid oopMap for them. 1562 // 1563 //-------------------------------------------------------------------- 1564 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* 1565 // (derived from JavaThread* which is in Z_thread) and, if static, 1566 // the class mirror instead of a receiver. This pretty much guarantees that 1567 // register layout will not match. We ignore these extra arguments during 1568 // the shuffle. The shuffle is described by the two calling convention 1569 // vectors we have in our possession. We simply walk the java vector to 1570 // get the source locations and the c vector to get the destinations. 1571 // 1572 // This is a trick. We double the stack slots so we can claim 1573 // the oops in the caller's frame. Since we are sure to have 1574 // more args than the caller doubling is enough to make 1575 // sure we can capture all the incoming oop args from the caller. 1576 //-------------------------------------------------------------------- 1577 1578 // Record sp-based slot for receiver on stack for non-static methods. 1579 int receiver_offset = -1; 1580 1581 //-------------------------------------------------------------------- 1582 // We move the arguments backwards because the floating point registers 1583 // destination will always be to a register with a greater or equal 1584 // register number or the stack. 1585 // jix is the index of the incoming Java arguments. 1586 // cix is the index of the outgoing C arguments. 1587 //-------------------------------------------------------------------- 1588 1589 #ifdef ASSERT 1590 bool reg_destroyed[Register::number_of_registers]; 1591 bool freg_destroyed[FloatRegister::number_of_registers]; 1592 for (int r = 0; r < Register::number_of_registers; r++) { 1593 reg_destroyed[r] = false; 1594 } 1595 for (int f = 0; f < FloatRegister::number_of_registers; f++) { 1596 freg_destroyed[f] = false; 1597 } 1598 #endif // ASSERT 1599 1600 for (int jix = total_in_args - 1, cix = total_c_args - 1; jix >= 0; jix--, cix--) { 1601 #ifdef ASSERT 1602 if (in_regs[jix].first()->is_Register()) { 1603 assert(!reg_destroyed[in_regs[jix].first()->as_Register()->encoding()], "ack!"); 1604 } else { 1605 if (in_regs[jix].first()->is_FloatRegister()) { 1606 assert(!freg_destroyed[in_regs[jix].first()->as_FloatRegister()->encoding()], "ack!"); 1607 } 1608 } 1609 if (out_regs[cix].first()->is_Register()) { 1610 reg_destroyed[out_regs[cix].first()->as_Register()->encoding()] = true; 1611 } else { 1612 if (out_regs[cix].first()->is_FloatRegister()) { 1613 freg_destroyed[out_regs[cix].first()->as_FloatRegister()->encoding()] = true; 1614 } 1615 } 1616 #endif // ASSERT 1617 1618 switch (in_sig_bt[jix]) { 1619 // Due to casting, small integers should only occur in pairs with type T_LONG. 1620 case T_BOOLEAN: 1621 case T_CHAR: 1622 case T_BYTE: 1623 case T_SHORT: 1624 case T_INT: 1625 // Move int and do sign extension. 1626 move32_64(masm, in_regs[jix], out_regs[cix], stack_slots); 1627 break; 1628 1629 case T_LONG : 1630 long_move(masm, in_regs[jix], out_regs[cix], stack_slots); 1631 break; 1632 1633 case T_ARRAY: 1634 case T_OBJECT: 1635 object_move(masm, map, oop_handle_slot_offset, stack_slots, in_regs[jix], out_regs[cix], 1636 ((jix == 0) && (!method_is_static)), 1637 &receiver_offset); 1638 break; 1639 case T_VOID: 1640 break; 1641 1642 case T_FLOAT: 1643 float_move(masm, in_regs[jix], out_regs[cix], stack_slots, workspace_slot_offset); 1644 break; 1645 1646 case T_DOUBLE: 1647 assert(jix+1 < total_in_args && in_sig_bt[jix+1] == T_VOID && out_sig_bt[cix+1] == T_VOID, "bad arg list"); 1648 double_move(masm, in_regs[jix], out_regs[cix], stack_slots, workspace_slot_offset); 1649 break; 1650 1651 case T_ADDRESS: 1652 assert(false, "found T_ADDRESS in java args"); 1653 break; 1654 1655 default: 1656 ShouldNotReachHere(); 1657 } 1658 } 1659 1660 //-------------------------------------------------------------------- 1661 // Pre-load a static method's oop into ARG2. 1662 // Used both by locking code and the normal JNI call code. 1663 //-------------------------------------------------------------------- 1664 if (method_is_static) { 1665 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()), Z_ARG2); 1666 1667 // Now handlize the static class mirror in ARG2. It's known not-null. 1668 __ z_stg(Z_ARG2, klass_offset, Z_SP); 1669 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 1670 __ add2reg(Z_ARG2, klass_offset, Z_SP); 1671 } 1672 1673 // Get JNIEnv* which is first argument to native. 1674 __ add2reg(Z_ARG1, in_bytes(JavaThread::jni_environment_offset()), Z_thread); 1675 1676 ////////////////////////////////////////////////////////////////////// 1677 // We have all of the arguments setup at this point. 1678 // We MUST NOT touch any outgoing regs from this point on. 1679 // So if we must call out we must push a new frame. 1680 ////////////////////////////////////////////////////////////////////// 1681 1682 1683 // Calc the current pc into Z_R10 and into wrapper_CRegsSet. 1684 // Both values represent the same position. 1685 __ get_PC(Z_R10); // PC into register 1686 wrapper_CRegsSet = __ offset(); // and into into variable. 1687 1688 // Z_R10 now has the pc loaded that we will use when we finally call to native. 1689 1690 // We use the same pc/oopMap repeatedly when we call out. 1691 oop_maps->add_gc_map((int)(wrapper_CRegsSet-wrapper_CodeStart), map); 1692 1693 // Lock a synchronized method. 1694 1695 if (method->is_synchronized()) { 1696 1697 // ATTENTION: args and Z_R10 must be preserved. 1698 Register r_oop = Z_R11; 1699 Register r_box = Z_R12; 1700 Register r_tmp1 = Z_R13; 1701 Register r_tmp2 = Z_R7; 1702 Label done; 1703 1704 // Load the oop for the object or class. R_carg2_classorobject contains 1705 // either the handlized oop from the incoming arguments or the handlized 1706 // class mirror (if the method is static). 1707 __ z_lg(r_oop, 0, Z_ARG2); 1708 1709 lock_offset = (lock_slot_offset * VMRegImpl::stack_slot_size); 1710 // Get the lock box slot's address. 1711 __ add2reg(r_box, lock_offset, Z_SP); 1712 1713 // Try fastpath for locking. 1714 // Fast_lock kills r_temp_1, r_temp_2. 1715 __ compiler_fast_lock_object(r_oop, r_box, r_tmp1, r_tmp2); 1716 __ z_bre(done); 1717 1718 //------------------------------------------------------------------------- 1719 // None of the above fast optimizations worked so we have to get into the 1720 // slow case of monitor enter. Inline a special case of call_VM that 1721 // disallows any pending_exception. 1722 //------------------------------------------------------------------------- 1723 1724 Register oldSP = Z_R11; 1725 1726 __ z_lgr(oldSP, Z_SP); 1727 1728 RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers); 1729 1730 // Prepare arguments for call. 1731 __ z_lg(Z_ARG1, 0, Z_ARG2); // Ynboxed class mirror or unboxed object. 1732 __ add2reg(Z_ARG2, lock_offset, oldSP); 1733 __ z_lgr(Z_ARG3, Z_thread); 1734 1735 __ set_last_Java_frame(oldSP, Z_R10 /* gc map pc */); 1736 1737 // Do the call. 1738 __ load_const_optimized(Z_R1_scratch, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)); 1739 __ call(Z_R1_scratch); 1740 1741 __ reset_last_Java_frame(); 1742 1743 RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers); 1744 #ifdef ASSERT 1745 { Label L; 1746 __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset())); 1747 __ z_bre(L); 1748 __ stop("no pending exception allowed on exit from IR::monitorenter"); 1749 __ bind(L); 1750 } 1751 #endif 1752 __ bind(done); 1753 } // lock for synchronized methods 1754 1755 1756 ////////////////////////////////////////////////////////////////////// 1757 // Finally just about ready to make the JNI call. 1758 ////////////////////////////////////////////////////////////////////// 1759 1760 // Use that pc we placed in Z_R10 a while back as the current frame anchor. 1761 __ set_last_Java_frame(Z_SP, Z_R10); 1762 1763 // Transition from _thread_in_Java to _thread_in_native. 1764 __ set_thread_state(_thread_in_native); 1765 1766 ////////////////////////////////////////////////////////////////////// 1767 // This is the JNI call. 1768 ////////////////////////////////////////////////////////////////////// 1769 1770 __ call_c(native_func); 1771 1772 1773 ////////////////////////////////////////////////////////////////////// 1774 // We have survived the call once we reach here. 1775 ////////////////////////////////////////////////////////////////////// 1776 1777 1778 //-------------------------------------------------------------------- 1779 // Unpack native results. 1780 //-------------------------------------------------------------------- 1781 // For int-types, we do any needed sign-extension required. 1782 // Care must be taken that the return value (in Z_ARG1 = Z_RET = Z_R2 1783 // or in Z_FARG0 = Z_FRET = Z_F0) will survive any VM calls for 1784 // blocking or unlocking. 1785 // An OOP result (handle) is done specially in the slow-path code. 1786 //-------------------------------------------------------------------- 1787 switch (ret_type) { 1788 case T_VOID: break; // Nothing to do! 1789 case T_FLOAT: break; // Got it where we want it (unless slow-path) 1790 case T_DOUBLE: break; // Got it where we want it (unless slow-path) 1791 case T_LONG: break; // Got it where we want it (unless slow-path) 1792 case T_OBJECT: break; // Really a handle. 1793 // Cannot de-handlize until after reclaiming jvm_lock. 1794 case T_ARRAY: break; 1795 1796 case T_BOOLEAN: // 0 -> false(0); !0 -> true(1) 1797 __ z_lngfr(Z_RET, Z_RET); // Force sign bit on except for zero. 1798 __ z_srlg(Z_RET, Z_RET, 63); // Shift sign bit into least significant pos. 1799 break; 1800 case T_BYTE: __ z_lgbr(Z_RET, Z_RET); break; // sign extension 1801 case T_CHAR: __ z_llghr(Z_RET, Z_RET); break; // unsigned result 1802 case T_SHORT: __ z_lghr(Z_RET, Z_RET); break; // sign extension 1803 case T_INT: __ z_lgfr(Z_RET, Z_RET); break; // sign-extend for beauty. 1804 1805 default: 1806 ShouldNotReachHere(); 1807 break; 1808 } 1809 1810 Label after_transition; 1811 1812 // Switch thread to "native transition" state before reading the synchronization state. 1813 // This additional state is necessary because reading and testing the synchronization 1814 // state is not atomic w.r.t. GC, as this scenario demonstrates: 1815 // - Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 1816 // - VM thread changes sync state to synchronizing and suspends threads for GC. 1817 // - Thread A is resumed to finish this native method, but doesn't block here since it 1818 // didn't see any synchronization in progress, and escapes. 1819 1820 // Transition from _thread_in_native to _thread_in_native_trans. 1821 __ set_thread_state(_thread_in_native_trans); 1822 1823 // Safepoint synchronization 1824 //-------------------------------------------------------------------- 1825 // Must we block? 1826 //-------------------------------------------------------------------- 1827 // Block, if necessary, before resuming in _thread_in_Java state. 1828 // In order for GC to work, don't clear the last_Java_sp until after blocking. 1829 //-------------------------------------------------------------------- 1830 { 1831 Label no_block, sync; 1832 1833 save_native_result(masm, ret_type, workspace_slot_offset); // Make Z_R2 available as work reg. 1834 1835 // Force this write out before the read below. 1836 if (!UseSystemMemoryBarrier) { 1837 __ z_fence(); 1838 } 1839 1840 __ safepoint_poll(sync, Z_R1); 1841 1842 __ load_and_test_int(Z_R0, Address(Z_thread, JavaThread::suspend_flags_offset())); 1843 __ z_bre(no_block); 1844 1845 // Block. Save any potential method result value before the operation and 1846 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this 1847 // lets us share the oopMap we used when we went native rather than create 1848 // a distinct one for this pc. 1849 // 1850 __ bind(sync); 1851 __ z_acquire(); 1852 1853 address entry_point = CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans); 1854 1855 __ call_VM_leaf(entry_point, Z_thread); 1856 1857 __ bind(no_block); 1858 restore_native_result(masm, ret_type, workspace_slot_offset); 1859 } 1860 1861 //-------------------------------------------------------------------- 1862 // Thread state is thread_in_native_trans. Any safepoint blocking has 1863 // already happened so we can now change state to _thread_in_Java. 1864 //-------------------------------------------------------------------- 1865 // Transition from _thread_in_native_trans to _thread_in_Java. 1866 __ set_thread_state(_thread_in_Java); 1867 __ bind(after_transition); 1868 1869 //-------------------------------------------------------------------- 1870 // Reguard any pages if necessary. 1871 // Protect native result from being destroyed. 1872 //-------------------------------------------------------------------- 1873 1874 Label no_reguard; 1875 1876 __ z_cli(Address(Z_thread, JavaThread::stack_guard_state_offset() + in_ByteSize(sizeof(StackOverflow::StackGuardState) - 1)), 1877 StackOverflow::stack_guard_yellow_reserved_disabled); 1878 1879 __ z_bre(no_reguard); 1880 1881 save_native_result(masm, ret_type, workspace_slot_offset); 1882 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages), Z_method); 1883 restore_native_result(masm, ret_type, workspace_slot_offset); 1884 1885 __ bind(no_reguard); 1886 1887 1888 // Synchronized methods (slow path only) 1889 // No pending exceptions for now. 1890 //-------------------------------------------------------------------- 1891 // Handle possibly pending exception (will unlock if necessary). 1892 // Native result is, if any is live, in Z_FRES or Z_RES. 1893 //-------------------------------------------------------------------- 1894 // Unlock 1895 //-------------------------------------------------------------------- 1896 if (method->is_synchronized()) { 1897 const Register r_oop = Z_R11; 1898 const Register r_box = Z_R12; 1899 const Register r_tmp1 = Z_R13; 1900 const Register r_tmp2 = Z_R7; 1901 Label done; 1902 1903 // Get unboxed oop of class mirror or object ... 1904 int offset = method_is_static ? klass_offset : receiver_offset; 1905 1906 assert(offset != -1, ""); 1907 __ z_lg(r_oop, offset, Z_SP); 1908 1909 // ... and address of lock object box. 1910 __ add2reg(r_box, lock_offset, Z_SP); 1911 1912 // Try fastpath for unlocking. 1913 // Fast_unlock kills r_tmp1, r_tmp2. 1914 __ compiler_fast_unlock_object(r_oop, r_box, r_tmp1, r_tmp2); 1915 __ z_bre(done); 1916 1917 // Slow path for unlocking. 1918 // Save and restore any potential method result value around the unlocking operation. 1919 const Register R_exc = Z_R11; 1920 1921 save_native_result(masm, ret_type, workspace_slot_offset); 1922 1923 // Must save pending exception around the slow-path VM call. Since it's a 1924 // leaf call, the pending exception (if any) can be kept in a register. 1925 __ z_lg(R_exc, Address(Z_thread, Thread::pending_exception_offset())); 1926 assert(R_exc->is_nonvolatile(), "exception register must be non-volatile"); 1927 1928 // Must clear pending-exception before re-entering the VM. Since this is 1929 // a leaf call, pending-exception-oop can be safely kept in a register. 1930 __ clear_mem(Address(Z_thread, Thread::pending_exception_offset()), sizeof(intptr_t)); 1931 1932 // Inline a special case of call_VM that disallows any pending_exception. 1933 1934 // Get locked oop from the handle we passed to jni. 1935 __ z_lg(Z_ARG1, offset, Z_SP); 1936 __ add2reg(Z_ARG2, lock_offset, Z_SP); 1937 __ z_lgr(Z_ARG3, Z_thread); 1938 1939 __ load_const_optimized(Z_R1_scratch, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)); 1940 1941 __ call(Z_R1_scratch); 1942 1943 #ifdef ASSERT 1944 { 1945 Label L; 1946 __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset())); 1947 __ z_bre(L); 1948 __ stop("no pending exception allowed on exit from IR::monitorexit"); 1949 __ bind(L); 1950 } 1951 #endif 1952 1953 // Check_forward_pending_exception jump to forward_exception if any pending 1954 // exception is set. The forward_exception routine expects to see the 1955 // exception in pending_exception and not in a register. Kind of clumsy, 1956 // since all folks who branch to forward_exception must have tested 1957 // pending_exception first and hence have it in a register already. 1958 __ z_stg(R_exc, Address(Z_thread, Thread::pending_exception_offset())); 1959 restore_native_result(masm, ret_type, workspace_slot_offset); 1960 __ z_bru(done); 1961 __ z_illtrap(0x66); 1962 1963 __ bind(done); 1964 } 1965 1966 1967 //-------------------------------------------------------------------- 1968 // Clear "last Java frame" SP and PC. 1969 //-------------------------------------------------------------------- 1970 1971 __ reset_last_Java_frame(); 1972 1973 // Unpack oop result, e.g. JNIHandles::resolve result. 1974 if (is_reference_type(ret_type)) { 1975 __ resolve_jobject(Z_RET, /* tmp1 */ Z_R13, /* tmp2 */ Z_R7); 1976 } 1977 1978 if (CheckJNICalls) { 1979 // clear_pending_jni_exception_check 1980 __ clear_mem(Address(Z_thread, JavaThread::pending_jni_exception_check_fn_offset()), sizeof(oop)); 1981 } 1982 1983 // Reset handle block. 1984 __ z_lg(Z_R1_scratch, Address(Z_thread, JavaThread::active_handles_offset())); 1985 __ clear_mem(Address(Z_R1_scratch, JNIHandleBlock::top_offset()), 4); 1986 1987 // Check for pending exceptions. 1988 __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset())); 1989 __ z_brne(handle_pending_exception); 1990 1991 1992 ////////////////////////////////////////////////////////////////////// 1993 // Return 1994 ////////////////////////////////////////////////////////////////////// 1995 1996 1997 #ifndef USE_RESIZE_FRAME 1998 __ pop_frame(); // Pop wrapper frame. 1999 #else 2000 __ resize_frame(frame_size_in_bytes, Z_R0_scratch); // Revert stack extension. 2001 #endif 2002 __ restore_return_pc(); // This is the way back to the caller. 2003 __ z_br(Z_R14); 2004 2005 2006 ////////////////////////////////////////////////////////////////////// 2007 // Out-of-line calls to the runtime. 2008 ////////////////////////////////////////////////////////////////////// 2009 2010 2011 //--------------------------------------------------------------------- 2012 // Handler for pending exceptions (out-of-line). 2013 //--------------------------------------------------------------------- 2014 // Since this is a native call, we know the proper exception handler 2015 // is the empty function. We just pop this frame and then jump to 2016 // forward_exception_entry. Z_R14 will contain the native caller's 2017 // return PC. 2018 __ bind(handle_pending_exception); 2019 __ pop_frame(); 2020 __ load_const_optimized(Z_R1_scratch, StubRoutines::forward_exception_entry()); 2021 __ restore_return_pc(); 2022 __ z_br(Z_R1_scratch); 2023 2024 __ flush(); 2025 ////////////////////////////////////////////////////////////////////// 2026 // end of code generation 2027 ////////////////////////////////////////////////////////////////////// 2028 2029 2030 nmethod *nm = nmethod::new_native_nmethod(method, 2031 compile_id, 2032 masm->code(), 2033 (int)(wrapper_VEPStart-wrapper_CodeStart), 2034 (int)(wrapper_FrameDone-wrapper_CodeStart), 2035 stack_slots / VMRegImpl::slots_per_word, 2036 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2037 in_ByteSize(lock_offset), 2038 oop_maps); 2039 2040 return nm; 2041 } 2042 2043 static address gen_c2i_adapter(MacroAssembler *masm, 2044 int total_args_passed, 2045 int comp_args_on_stack, 2046 const BasicType *sig_bt, 2047 const VMRegPair *regs, 2048 Label &skip_fixup) { 2049 // Before we get into the guts of the C2I adapter, see if we should be here 2050 // at all. We've come from compiled code and are attempting to jump to the 2051 // interpreter, which means the caller made a static call to get here 2052 // (vcalls always get a compiled target if there is one). Check for a 2053 // compiled target. If there is one, we need to patch the caller's call. 2054 2055 // These two defs MUST MATCH code in gen_i2c2i_adapter! 2056 const Register ientry = Z_R11; 2057 const Register code = Z_R11; 2058 2059 address c2i_entrypoint; 2060 Label patch_callsite; 2061 2062 // Regular (verified) c2i entry point. 2063 c2i_entrypoint = __ pc(); 2064 2065 // Call patching needed? 2066 __ load_and_test_long(Z_R0_scratch, method_(code)); 2067 __ z_lg(ientry, method_(interpreter_entry)); // Preload interpreter entry (also if patching). 2068 __ z_brne(patch_callsite); // Patch required if code isn't null (compiled target exists). 2069 2070 __ bind(skip_fixup); // Return point from patch_callsite. 2071 2072 // Since all args are passed on the stack, total_args_passed*wordSize is the 2073 // space we need. We need ABI scratch area but we use the caller's since 2074 // it has already been allocated. 2075 2076 const int abi_scratch = frame::z_top_ijava_frame_abi_size; 2077 int extraspace = align_up(total_args_passed, 2)*wordSize + abi_scratch; 2078 Register sender_SP = Z_R10; 2079 Register value = Z_R12; 2080 2081 // Remember the senderSP so we can pop the interpreter arguments off of the stack. 2082 // In addition, frame manager expects initial_caller_sp in Z_R10. 2083 __ z_lgr(sender_SP, Z_SP); 2084 2085 // This should always fit in 14 bit immediate. 2086 __ resize_frame(-extraspace, Z_R0_scratch); 2087 2088 // We use the caller's ABI scratch area (out_preserved_stack_slots) for the initial 2089 // args. This essentially moves the callers ABI scratch area from the top to the 2090 // bottom of the arg area. 2091 2092 int st_off = extraspace - wordSize; 2093 2094 // Now write the args into the outgoing interpreter space. 2095 for (int i = 0; i < total_args_passed; i++) { 2096 VMReg r_1 = regs[i].first(); 2097 VMReg r_2 = regs[i].second(); 2098 if (!r_1->is_valid()) { 2099 assert(!r_2->is_valid(), ""); 2100 continue; 2101 } 2102 if (r_1->is_stack()) { 2103 // The calling convention produces OptoRegs that ignore the preserve area (abi scratch). 2104 // We must account for it here. 2105 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 2106 2107 if (!r_2->is_valid()) { 2108 __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*)); 2109 } else { 2110 // longs are given 2 64-bit slots in the interpreter, 2111 // but the data is passed in only 1 slot. 2112 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 2113 #ifdef ASSERT 2114 __ clear_mem(Address(Z_SP, st_off), sizeof(void *)); 2115 #endif 2116 st_off -= wordSize; 2117 } 2118 __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*)); 2119 } 2120 } else { 2121 if (r_1->is_Register()) { 2122 if (!r_2->is_valid()) { 2123 __ z_st(r_1->as_Register(), st_off, Z_SP); 2124 } else { 2125 // longs are given 2 64-bit slots in the interpreter, but the 2126 // data is passed in only 1 slot. 2127 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 2128 #ifdef ASSERT 2129 __ clear_mem(Address(Z_SP, st_off), sizeof(void *)); 2130 #endif 2131 st_off -= wordSize; 2132 } 2133 __ z_stg(r_1->as_Register(), st_off, Z_SP); 2134 } 2135 } else { 2136 assert(r_1->is_FloatRegister(), ""); 2137 if (!r_2->is_valid()) { 2138 __ z_ste(r_1->as_FloatRegister(), st_off, Z_SP); 2139 } else { 2140 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the 2141 // data is passed in only 1 slot. 2142 // One of these should get known junk... 2143 #ifdef ASSERT 2144 __ z_lzdr(Z_F1); 2145 __ z_std(Z_F1, st_off, Z_SP); 2146 #endif 2147 st_off-=wordSize; 2148 __ z_std(r_1->as_FloatRegister(), st_off, Z_SP); 2149 } 2150 } 2151 } 2152 st_off -= wordSize; 2153 } 2154 2155 2156 // Jump to the interpreter just as if interpreter was doing it. 2157 __ add2reg(Z_esp, st_off, Z_SP); 2158 2159 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in Z_R10. 2160 __ z_br(ientry); 2161 2162 2163 // Prevent illegal entry to out-of-line code. 2164 __ z_illtrap(0x22); 2165 2166 // Generate out-of-line runtime call to patch caller, 2167 // then continue as interpreted. 2168 2169 // IF you lose the race you go interpreted. 2170 // We don't see any possible endless c2i -> i2c -> c2i ... 2171 // transitions no matter how rare. 2172 __ bind(patch_callsite); 2173 2174 RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers); 2175 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), Z_method, Z_R14); 2176 RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers); 2177 __ z_bru(skip_fixup); 2178 2179 // end of out-of-line code 2180 2181 return c2i_entrypoint; 2182 } 2183 2184 // On entry, the following registers are set 2185 // 2186 // Z_thread r8 - JavaThread* 2187 // Z_method r9 - callee's method (method to be invoked) 2188 // Z_esp r7 - operand (or expression) stack pointer of caller. one slot above last arg. 2189 // Z_SP r15 - SP prepared by call stub such that caller's outgoing args are near top 2190 // 2191 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 2192 int total_args_passed, 2193 int comp_args_on_stack, 2194 const BasicType *sig_bt, 2195 const VMRegPair *regs) { 2196 const Register value = Z_R12; 2197 const Register ld_ptr= Z_esp; 2198 2199 int ld_offset = total_args_passed * wordSize; 2200 2201 // Cut-out for having no stack args. 2202 if (comp_args_on_stack) { 2203 // Sig words on the stack are greater than VMRegImpl::stack0. Those in 2204 // registers are below. By subtracting stack0, we either get a negative 2205 // number (all values in registers) or the maximum stack slot accessed. 2206 // Convert VMRegImpl (4 byte) stack slots to words. 2207 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; 2208 // Round up to miminum stack alignment, in wordSize 2209 comp_words_on_stack = align_up(comp_words_on_stack, 2); 2210 2211 __ resize_frame(-comp_words_on_stack*wordSize, Z_R0_scratch); 2212 } 2213 2214 // Now generate the shuffle code. Pick up all register args and move the 2215 // rest through register value=Z_R12. 2216 for (int i = 0; i < total_args_passed; i++) { 2217 if (sig_bt[i] == T_VOID) { 2218 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 2219 continue; 2220 } 2221 2222 // Pick up 0, 1 or 2 words from ld_ptr. 2223 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 2224 "scrambled load targets?"); 2225 VMReg r_1 = regs[i].first(); 2226 VMReg r_2 = regs[i].second(); 2227 if (!r_1->is_valid()) { 2228 assert(!r_2->is_valid(), ""); 2229 continue; 2230 } 2231 if (r_1->is_FloatRegister()) { 2232 if (!r_2->is_valid()) { 2233 __ z_le(r_1->as_FloatRegister(), ld_offset, ld_ptr); 2234 ld_offset-=wordSize; 2235 } else { 2236 // Skip the unused interpreter slot. 2237 __ z_ld(r_1->as_FloatRegister(), ld_offset - wordSize, ld_ptr); 2238 ld_offset -= 2 * wordSize; 2239 } 2240 } else { 2241 if (r_1->is_stack()) { 2242 // Must do a memory to memory move. 2243 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 2244 2245 if (!r_2->is_valid()) { 2246 __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*)); 2247 } else { 2248 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the 2249 // data is passed in only 1 slot. 2250 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 2251 ld_offset -= wordSize; 2252 } 2253 __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*)); 2254 } 2255 } else { 2256 if (!r_2->is_valid()) { 2257 // Not sure we need to do this but it shouldn't hurt. 2258 if (is_reference_type(sig_bt[i]) || sig_bt[i] == T_ADDRESS) { 2259 __ z_lg(r_1->as_Register(), ld_offset, ld_ptr); 2260 } else { 2261 __ z_l(r_1->as_Register(), ld_offset, ld_ptr); 2262 } 2263 } else { 2264 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the 2265 // data is passed in only 1 slot. 2266 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 2267 ld_offset -= wordSize; 2268 } 2269 __ z_lg(r_1->as_Register(), ld_offset, ld_ptr); 2270 } 2271 } 2272 ld_offset -= wordSize; 2273 } 2274 } 2275 2276 // Jump to the compiled code just as if compiled code was doing it. 2277 // load target address from method: 2278 __ z_lg(Z_R1_scratch, Address(Z_method, Method::from_compiled_offset())); 2279 2280 // Store method into thread->callee_target. 2281 // 6243940: We might end up in handle_wrong_method if 2282 // the callee is deoptimized as we race thru here. If that 2283 // happens we don't want to take a safepoint because the 2284 // caller frame will look interpreted and arguments are now 2285 // "compiled" so it is much better to make this transition 2286 // invisible to the stack walking code. Unfortunately, if 2287 // we try and find the callee by normal means a safepoint 2288 // is possible. So we stash the desired callee in the thread 2289 // and the vm will find it there should this case occur. 2290 __ z_stg(Z_method, thread_(callee_target)); 2291 2292 __ z_br(Z_R1_scratch); 2293 } 2294 2295 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 2296 int total_args_passed, 2297 int comp_args_on_stack, 2298 const BasicType *sig_bt, 2299 const VMRegPair *regs, 2300 AdapterFingerPrint* fingerprint) { 2301 __ align(CodeEntryAlignment); 2302 address i2c_entry = __ pc(); 2303 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 2304 2305 address c2i_unverified_entry; 2306 2307 Label skip_fixup; 2308 { 2309 Label ic_miss; 2310 2311 // Out-of-line call to ic_miss handler. 2312 __ call_ic_miss_handler(ic_miss, 0x11, 0, Z_R1_scratch); 2313 2314 // Unverified Entry Point UEP 2315 __ align(CodeEntryAlignment); 2316 c2i_unverified_entry = __ pc(); 2317 2318 __ ic_check(2); 2319 __ z_lg(Z_method, Address(Z_inline_cache, CompiledICData::speculated_method_offset())); 2320 // This def MUST MATCH code in gen_c2i_adapter! 2321 const Register code = Z_R11; 2322 2323 __ load_and_test_long(Z_R0, method_(code)); 2324 __ z_brne(ic_miss); // Cache miss: call runtime to handle this. 2325 2326 // Fallthru to VEP. Duplicate LTG, but saved taken branch. 2327 } 2328 2329 address c2i_entry = __ pc(); 2330 2331 // Class initialization barrier for static methods 2332 address c2i_no_clinit_check_entry = nullptr; 2333 if (VM_Version::supports_fast_class_init_checks()) { 2334 Label L_skip_barrier; 2335 2336 { // Bypass the barrier for non-static methods 2337 __ testbit(Address(Z_method, Method::access_flags_offset()), JVM_ACC_STATIC_BIT); 2338 __ z_bfalse(L_skip_barrier); // non-static 2339 } 2340 2341 Register klass = Z_R11; 2342 __ load_method_holder(klass, Z_method); 2343 __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/); 2344 2345 __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub()); 2346 __ z_br(klass); 2347 2348 __ bind(L_skip_barrier); 2349 c2i_no_clinit_check_entry = __ pc(); 2350 } 2351 2352 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 2353 2354 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry); 2355 } 2356 2357 // This function returns the adjust size (in number of words) to a c2i adapter 2358 // activation for use during deoptimization. 2359 // 2360 // Actually only compiled frames need to be adjusted, but it 2361 // doesn't harm to adjust entry and interpreter frames, too. 2362 // 2363 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { 2364 assert(callee_locals >= callee_parameters, 2365 "test and remove; got more parms than locals"); 2366 // Handle the abi adjustment here instead of doing it in push_skeleton_frames. 2367 return (callee_locals - callee_parameters) * Interpreter::stackElementWords + 2368 frame::z_parent_ijava_frame_abi_size / BytesPerWord; 2369 } 2370 2371 uint SharedRuntime::in_preserve_stack_slots() { 2372 return frame::jit_in_preserve_size_in_4_byte_units; 2373 } 2374 2375 uint SharedRuntime::out_preserve_stack_slots() { 2376 return frame::z_jit_out_preserve_size/VMRegImpl::stack_slot_size; 2377 } 2378 2379 VMReg SharedRuntime::thread_register() { 2380 Unimplemented(); 2381 return nullptr; 2382 } 2383 2384 // 2385 // Frame generation for deopt and uncommon trap blobs. 2386 // 2387 static void push_skeleton_frame(MacroAssembler* masm, 2388 /* Unchanged */ 2389 Register frame_sizes_reg, 2390 Register pcs_reg, 2391 /* Invalidate */ 2392 Register frame_size_reg, 2393 Register pc_reg) { 2394 BLOCK_COMMENT(" push_skeleton_frame {"); 2395 __ z_lg(pc_reg, 0, pcs_reg); 2396 __ z_lg(frame_size_reg, 0, frame_sizes_reg); 2397 __ z_stg(pc_reg, _z_abi(return_pc), Z_SP); 2398 Register fp = pc_reg; 2399 __ push_frame(frame_size_reg, fp); 2400 #ifdef ASSERT 2401 // The magic is required for successful walking skeletal frames. 2402 __ load_const_optimized(frame_size_reg/*tmp*/, frame::z_istate_magic_number); 2403 __ z_stg(frame_size_reg, _z_ijava_state_neg(magic), fp); 2404 // Fill other slots that are supposedly not necessary with eye catchers. 2405 __ load_const_optimized(frame_size_reg/*use as tmp*/, 0xdeadbad1); 2406 __ z_stg(frame_size_reg, _z_ijava_state_neg(top_frame_sp), fp); 2407 // The sender_sp of the bottom frame is set before pushing it. 2408 // The sender_sp of non bottom frames is their caller's top_frame_sp, which 2409 // is unknown here. Luckily it is not needed before filling the frame in 2410 // layout_activation(), we assert this by setting an eye catcher (see 2411 // comments on sender_sp in frame_s390.hpp). 2412 __ z_stg(frame_size_reg, _z_ijava_state_neg(sender_sp), Z_SP); 2413 #endif // ASSERT 2414 BLOCK_COMMENT(" } push_skeleton_frame"); 2415 } 2416 2417 // Loop through the UnrollBlock info and create new frames. 2418 static void push_skeleton_frames(MacroAssembler* masm, bool deopt, 2419 /* read */ 2420 Register unroll_block_reg, 2421 /* invalidate */ 2422 Register frame_sizes_reg, 2423 Register number_of_frames_reg, 2424 Register pcs_reg, 2425 Register tmp1, 2426 Register tmp2) { 2427 BLOCK_COMMENT("push_skeleton_frames {"); 2428 // _number_of_frames is of type int (deoptimization.hpp). 2429 __ z_lgf(number_of_frames_reg, 2430 Address(unroll_block_reg, Deoptimization::UnrollBlock::number_of_frames_offset())); 2431 __ z_lg(pcs_reg, 2432 Address(unroll_block_reg, Deoptimization::UnrollBlock::frame_pcs_offset())); 2433 __ z_lg(frame_sizes_reg, 2434 Address(unroll_block_reg, Deoptimization::UnrollBlock::frame_sizes_offset())); 2435 2436 // stack: (caller_of_deoptee, ...). 2437 2438 // If caller_of_deoptee is a compiled frame, then we extend it to make 2439 // room for the callee's locals and the frame::z_parent_ijava_frame_abi. 2440 // See also Deoptimization::last_frame_adjust() above. 2441 // Note: entry and interpreted frames are adjusted, too. But this doesn't harm. 2442 2443 __ z_lgf(Z_R1_scratch, 2444 Address(unroll_block_reg, Deoptimization::UnrollBlock::caller_adjustment_offset())); 2445 __ z_lgr(tmp1, Z_SP); // Save the sender sp before extending the frame. 2446 __ resize_frame_sub(Z_R1_scratch, tmp2/*tmp*/); 2447 // The oldest skeletal frame requires a valid sender_sp to make it walkable 2448 // (it is required to find the original pc of caller_of_deoptee if it is marked 2449 // for deoptimization - see nmethod::orig_pc_addr()). 2450 __ z_stg(tmp1, _z_ijava_state_neg(sender_sp), Z_SP); 2451 2452 // Now push the new interpreter frames. 2453 Label loop, loop_entry; 2454 2455 // Make sure that there is at least one entry in the array. 2456 DEBUG_ONLY(__ z_ltgr(number_of_frames_reg, number_of_frames_reg)); 2457 __ asm_assert(Assembler::bcondNotZero, "array_size must be > 0", 0x205); 2458 2459 __ z_bru(loop_entry); 2460 2461 __ bind(loop); 2462 2463 __ add2reg(frame_sizes_reg, wordSize); 2464 __ add2reg(pcs_reg, wordSize); 2465 2466 __ bind(loop_entry); 2467 2468 // Allocate a new frame, fill in the pc. 2469 push_skeleton_frame(masm, frame_sizes_reg, pcs_reg, tmp1, tmp2); 2470 2471 __ z_aghi(number_of_frames_reg, -1); // Emit AGHI, because it sets the condition code 2472 __ z_brne(loop); 2473 2474 // Set the top frame's return pc. 2475 __ add2reg(pcs_reg, wordSize); 2476 __ z_lg(Z_R0_scratch, 0, pcs_reg); 2477 __ z_stg(Z_R0_scratch, _z_abi(return_pc), Z_SP); 2478 BLOCK_COMMENT("} push_skeleton_frames"); 2479 } 2480 2481 //------------------------------generate_deopt_blob---------------------------- 2482 void SharedRuntime::generate_deopt_blob() { 2483 // Allocate space for the code. 2484 ResourceMark rm; 2485 // Setup code generation tools. 2486 CodeBuffer buffer("deopt_blob", 2048, 1024); 2487 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer); 2488 Label exec_mode_initialized; 2489 OopMap* map = nullptr; 2490 OopMapSet *oop_maps = new OopMapSet(); 2491 2492 unsigned int start_off = __ offset(); 2493 Label cont; 2494 2495 // -------------------------------------------------------------------------- 2496 // Normal entry (non-exception case) 2497 // 2498 // We have been called from the deopt handler of the deoptee. 2499 // Z_R14 points behind the call in the deopt handler. We adjust 2500 // it such that it points to the start of the deopt handler. 2501 // The return_pc has been stored in the frame of the deoptee and 2502 // will replace the address of the deopt_handler in the call 2503 // to Deoptimization::fetch_unroll_info below. 2504 // The (int) cast is necessary, because -((unsigned int)14) 2505 // is an unsigned int. 2506 __ add2reg(Z_R14, -(int)NativeCall::max_instruction_size()); 2507 2508 const Register exec_mode_reg = Z_tmp_1; 2509 2510 // stack: (deoptee, caller of deoptee, ...) 2511 2512 // pushes an "unpack" frame 2513 // R14 contains the return address pointing into the deoptimized 2514 // nmethod that was valid just before the nmethod was deoptimized. 2515 // save R14 into the deoptee frame. the `fetch_unroll_info' 2516 // procedure called below will read it from there. 2517 map = RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers); 2518 2519 // note the entry point. 2520 __ load_const_optimized(exec_mode_reg, Deoptimization::Unpack_deopt); 2521 __ z_bru(exec_mode_initialized); 2522 2523 #ifndef COMPILER1 2524 int reexecute_offset = 1; // odd offset will produce odd pc, which triggers an hardware trap 2525 #else 2526 // -------------------------------------------------------------------------- 2527 // Reexecute entry 2528 // - Z_R14 = Deopt Handler in nmethod 2529 2530 int reexecute_offset = __ offset() - start_off; 2531 2532 // No need to update map as each call to save_live_registers will produce identical oopmap 2533 (void) RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers); 2534 2535 __ load_const_optimized(exec_mode_reg, Deoptimization::Unpack_reexecute); 2536 __ z_bru(exec_mode_initialized); 2537 #endif 2538 2539 2540 // -------------------------------------------------------------------------- 2541 // Exception entry. We reached here via a branch. Registers on entry: 2542 // - Z_EXC_OOP (Z_ARG1) = exception oop 2543 // - Z_EXC_PC (Z_ARG2) = the exception pc. 2544 2545 int exception_offset = __ offset() - start_off; 2546 2547 // all registers are dead at this entry point, except for Z_EXC_OOP, and 2548 // Z_EXC_PC which contain the exception oop and exception pc 2549 // respectively. Set them in TLS and fall thru to the 2550 // unpack_with_exception_in_tls entry point. 2551 2552 // Store exception oop and pc in thread (location known to GC). 2553 // Need this since the call to "fetch_unroll_info()" may safepoint. 2554 __ z_stg(Z_EXC_OOP, Address(Z_thread, JavaThread::exception_oop_offset())); 2555 __ z_stg(Z_EXC_PC, Address(Z_thread, JavaThread::exception_pc_offset())); 2556 2557 // fall through 2558 2559 int exception_in_tls_offset = __ offset() - start_off; 2560 2561 // new implementation because exception oop is now passed in JavaThread 2562 2563 // Prolog for exception case 2564 // All registers must be preserved because they might be used by LinearScan 2565 // Exceptiop oop and throwing PC are passed in JavaThread 2566 2567 // load throwing pc from JavaThread and us it as the return address of the current frame. 2568 __ z_lg(Z_R1_scratch, Address(Z_thread, JavaThread::exception_pc_offset())); 2569 2570 // Save everything in sight. 2571 (void) RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers, Z_R1_scratch); 2572 2573 // Now it is safe to overwrite any register 2574 2575 // Clear the exception pc field in JavaThread 2576 __ clear_mem(Address(Z_thread, JavaThread::exception_pc_offset()), 8); 2577 2578 // Deopt during an exception. Save exec mode for unpack_frames. 2579 __ load_const_optimized(exec_mode_reg, Deoptimization::Unpack_exception); 2580 2581 2582 #ifdef ASSERT 2583 // verify that there is really an exception oop in JavaThread 2584 __ z_lg(Z_ARG1, Address(Z_thread, JavaThread::exception_oop_offset())); 2585 __ MacroAssembler::verify_oop(Z_ARG1, FILE_AND_LINE); 2586 2587 // verify that there is no pending exception 2588 __ asm_assert_mem8_is_zero(in_bytes(Thread::pending_exception_offset()), Z_thread, 2589 "must not have pending exception here", __LINE__); 2590 #endif 2591 2592 // -------------------------------------------------------------------------- 2593 // At this point, the live registers are saved and 2594 // the exec_mode_reg has been set up correctly. 2595 __ bind(exec_mode_initialized); 2596 2597 // stack: ("unpack" frame, deoptee, caller_of_deoptee, ...). 2598 2599 const Register unroll_block_reg = Z_tmp_2; 2600 2601 // we need to set `last_Java_frame' because `fetch_unroll_info' will 2602 // call `last_Java_frame()'. however we can't block and no gc will 2603 // occur so we don't need an oopmap. the value of the pc in the 2604 // frame is not particularly important. it just needs to identify the blob. 2605 2606 // Don't set last_Java_pc anymore here (is implicitly null then). 2607 // the correct PC is retrieved in pd_last_frame() in that case. 2608 __ set_last_Java_frame(/*sp*/Z_SP, noreg); 2609 // With EscapeAnalysis turned on, this call may safepoint 2610 // despite it's marked as "leaf call"! 2611 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), Z_thread, exec_mode_reg); 2612 // Set an oopmap for the call site this describes all our saved volatile registers 2613 int oop_map_offs = __ offset(); 2614 oop_maps->add_gc_map(oop_map_offs, map); 2615 2616 __ reset_last_Java_frame(); 2617 // save the return value. 2618 __ z_lgr(unroll_block_reg, Z_RET); 2619 // restore the return registers that have been saved 2620 // (among other registers) by save_live_registers(...). 2621 RegisterSaver::restore_result_registers(masm); 2622 2623 // reload the exec mode from the UnrollBlock (it might have changed) 2624 __ z_llgf(exec_mode_reg, Address(unroll_block_reg, Deoptimization::UnrollBlock::unpack_kind_offset())); 2625 2626 // In excp_deopt_mode, restore and clear exception oop which we 2627 // stored in the thread during exception entry above. The exception 2628 // oop will be the return value of this stub. 2629 NearLabel skip_restore_excp; 2630 __ compare64_and_branch(exec_mode_reg, Deoptimization::Unpack_exception, Assembler::bcondNotEqual, skip_restore_excp); 2631 __ z_lg(Z_RET, thread_(exception_oop)); 2632 __ clear_mem(thread_(exception_oop), 8); 2633 __ bind(skip_restore_excp); 2634 2635 // remove the "unpack" frame 2636 __ pop_frame(); 2637 2638 // stack: (deoptee, caller of deoptee, ...). 2639 2640 // pop the deoptee's frame 2641 __ pop_frame(); 2642 2643 // stack: (caller_of_deoptee, ...). 2644 2645 // loop through the `UnrollBlock' info and create interpreter frames. 2646 push_skeleton_frames(masm, true/*deopt*/, 2647 unroll_block_reg, 2648 Z_tmp_3, 2649 Z_tmp_4, 2650 Z_ARG5, 2651 Z_ARG4, 2652 Z_ARG3); 2653 2654 // stack: (skeletal interpreter frame, ..., optional skeletal 2655 // interpreter frame, caller of deoptee, ...). 2656 2657 // push an "unpack" frame taking care of float / int return values. 2658 __ push_frame(RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)); 2659 2660 // stack: (unpack frame, skeletal interpreter frame, ..., optional 2661 // skeletal interpreter frame, caller of deoptee, ...). 2662 2663 // spill live volatile registers since we'll do a call. 2664 __ z_stg(Z_RET, offset_of(frame::z_abi_160_spill, spill[0]), Z_SP); 2665 __ z_std(Z_FRET, offset_of(frame::z_abi_160_spill, spill[1]), Z_SP); 2666 2667 // let the unpacker layout information in the skeletal frames just allocated. 2668 __ get_PC(Z_RET, oop_map_offs - __ offset()); 2669 __ set_last_Java_frame(/*sp*/Z_SP, /*pc*/Z_RET); 2670 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), 2671 Z_thread/*thread*/, exec_mode_reg/*exec_mode*/); 2672 2673 __ reset_last_Java_frame(); 2674 2675 // restore the volatiles saved above. 2676 __ z_lg(Z_RET, offset_of(frame::z_abi_160_spill, spill[0]), Z_SP); 2677 __ z_ld(Z_FRET, offset_of(frame::z_abi_160_spill, spill[1]), Z_SP); 2678 2679 // pop the "unpack" frame. 2680 __ pop_frame(); 2681 __ restore_return_pc(); 2682 2683 // stack: (top interpreter frame, ..., optional interpreter frame, 2684 // caller of deoptee, ...). 2685 2686 __ z_lg(Z_fp, _z_abi(callers_sp), Z_SP); // restore frame pointer 2687 __ restore_bcp(); 2688 __ restore_locals(); 2689 __ restore_esp(); 2690 2691 // return to the interpreter entry point. 2692 __ z_br(Z_R14); 2693 2694 // Make sure all code is generated 2695 masm->flush(); 2696 2697 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)/wordSize); 2698 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2699 } 2700 2701 2702 #ifdef COMPILER2 2703 //------------------------------generate_uncommon_trap_blob-------------------- 2704 void SharedRuntime::generate_uncommon_trap_blob() { 2705 // Allocate space for the code 2706 ResourceMark rm; 2707 // Setup code generation tools 2708 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); 2709 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer); 2710 2711 Register unroll_block_reg = Z_tmp_1; 2712 Register klass_index_reg = Z_ARG2; 2713 Register unc_trap_reg = Z_ARG2; 2714 2715 // stack: (deoptee, caller_of_deoptee, ...). 2716 2717 // push a dummy "unpack" frame and call 2718 // `Deoptimization::uncommon_trap' to pack the compiled frame into a 2719 // vframe array and return the `UnrollBlock' information. 2720 2721 // save R14 to compiled frame. 2722 __ save_return_pc(); 2723 // push the "unpack_frame". 2724 __ push_frame_abi160(0); 2725 2726 // stack: (unpack frame, deoptee, caller_of_deoptee, ...). 2727 2728 // set the "unpack" frame as last_Java_frame. 2729 // `Deoptimization::uncommon_trap' expects it and considers its 2730 // sender frame as the deoptee frame. 2731 __ get_PC(Z_R1_scratch); 2732 __ set_last_Java_frame(/*sp*/Z_SP, /*pc*/Z_R1_scratch); 2733 2734 __ z_lgr(klass_index_reg, Z_ARG1); // passed implicitly as ARG2 2735 __ z_lghi(Z_ARG3, Deoptimization::Unpack_uncommon_trap); // passed implicitly as ARG3 2736 BLOCK_COMMENT("call Deoptimization::uncommon_trap()"); 2737 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), Z_thread); 2738 2739 __ reset_last_Java_frame(); 2740 2741 // pop the "unpack" frame 2742 __ pop_frame(); 2743 2744 // stack: (deoptee, caller_of_deoptee, ...). 2745 2746 // save the return value. 2747 __ z_lgr(unroll_block_reg, Z_RET); 2748 2749 // pop the deoptee frame. 2750 __ pop_frame(); 2751 2752 // stack: (caller_of_deoptee, ...). 2753 2754 #ifdef ASSERT 2755 assert(Immediate::is_uimm8(Deoptimization::Unpack_LIMIT), "Code not fit for larger immediates"); 2756 assert(Immediate::is_uimm8(Deoptimization::Unpack_uncommon_trap), "Code not fit for larger immediates"); 2757 const int unpack_kind_byte_offset = in_bytes(Deoptimization::UnrollBlock::unpack_kind_offset()) 2758 #ifndef VM_LITTLE_ENDIAN 2759 + 3 2760 #endif 2761 ; 2762 if (Displacement::is_shortDisp(unpack_kind_byte_offset)) { 2763 __ z_cli(unpack_kind_byte_offset, unroll_block_reg, Deoptimization::Unpack_uncommon_trap); 2764 } else { 2765 __ z_cliy(unpack_kind_byte_offset, unroll_block_reg, Deoptimization::Unpack_uncommon_trap); 2766 } 2767 __ asm_assert(Assembler::bcondEqual, "SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap", 0); 2768 #endif 2769 2770 __ zap_from_to(Z_SP, Z_SP, Z_R0_scratch, Z_R1, 500, -1); 2771 2772 // allocate new interpreter frame(s) and possibly resize the caller's frame 2773 // (no more adapters !) 2774 push_skeleton_frames(masm, false/*deopt*/, 2775 unroll_block_reg, 2776 Z_tmp_2, 2777 Z_tmp_3, 2778 Z_tmp_4, 2779 Z_ARG5, 2780 Z_ARG4); 2781 2782 // stack: (skeletal interpreter frame, ..., optional skeletal 2783 // interpreter frame, (resized) caller of deoptee, ...). 2784 2785 // push a dummy "unpack" frame taking care of float return values. 2786 // call `Deoptimization::unpack_frames' to layout information in the 2787 // interpreter frames just created 2788 2789 // push the "unpack" frame 2790 const unsigned int framesize_in_bytes = __ push_frame_abi160(0); 2791 2792 // stack: (unpack frame, skeletal interpreter frame, ..., optional 2793 // skeletal interpreter frame, (resized) caller of deoptee, ...). 2794 2795 // set the "unpack" frame as last_Java_frame 2796 __ get_PC(Z_R1_scratch); 2797 __ set_last_Java_frame(/*sp*/Z_SP, /*pc*/Z_R1_scratch); 2798 2799 // indicate it is the uncommon trap case 2800 BLOCK_COMMENT("call Deoptimization::Unpack_uncommon_trap()"); 2801 __ load_const_optimized(unc_trap_reg, Deoptimization::Unpack_uncommon_trap); 2802 // let the unpacker layout information in the skeletal frames just allocated. 2803 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), Z_thread); 2804 2805 __ reset_last_Java_frame(); 2806 // pop the "unpack" frame 2807 __ pop_frame(); 2808 // restore LR from top interpreter frame 2809 __ restore_return_pc(); 2810 2811 // stack: (top interpreter frame, ..., optional interpreter frame, 2812 // (resized) caller of deoptee, ...). 2813 2814 __ z_lg(Z_fp, _z_abi(callers_sp), Z_SP); // restore frame pointer 2815 __ restore_bcp(); 2816 __ restore_locals(); 2817 __ restore_esp(); 2818 2819 // return to the interpreter entry point 2820 __ z_br(Z_R14); 2821 2822 masm->flush(); 2823 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, nullptr, framesize_in_bytes/wordSize); 2824 } 2825 #endif // COMPILER2 2826 2827 2828 //------------------------------generate_handler_blob------ 2829 // 2830 // Generate a special Compile2Runtime blob that saves all registers, 2831 // and setup oopmap. 2832 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 2833 assert(StubRoutines::forward_exception_entry() != nullptr, 2834 "must be generated before"); 2835 2836 ResourceMark rm; 2837 OopMapSet *oop_maps = new OopMapSet(); 2838 OopMap* map; 2839 2840 // Allocate space for the code. Setup code generation tools. 2841 CodeBuffer buffer("handler_blob", 2048, 1024); 2842 MacroAssembler* masm = new MacroAssembler(&buffer); 2843 2844 unsigned int start_off = __ offset(); 2845 address call_pc = nullptr; 2846 int frame_size_in_bytes; 2847 2848 bool cause_return = (poll_type == POLL_AT_RETURN); 2849 // Make room for return address (or push it again) 2850 if (!cause_return) { 2851 __ z_lg(Z_R14, Address(Z_thread, JavaThread::saved_exception_pc_offset())); 2852 } 2853 2854 // Save registers, fpu state, and flags 2855 map = RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers); 2856 2857 if (!cause_return) { 2858 // Keep a copy of the return pc to detect if it gets modified. 2859 __ z_lgr(Z_R6, Z_R14); 2860 } 2861 2862 // The following is basically a call_VM. However, we need the precise 2863 // address of the call in order to generate an oopmap. Hence, we do all the 2864 // work ourselves. 2865 __ set_last_Java_frame(Z_SP, noreg); 2866 2867 // call into the runtime to handle the safepoint poll 2868 __ call_VM_leaf(call_ptr, Z_thread); 2869 2870 2871 // Set an oopmap for the call site. This oopmap will map all 2872 // oop-registers and debug-info registers as callee-saved. This 2873 // will allow deoptimization at this safepoint to find all possible 2874 // debug-info recordings, as well as let GC find all oops. 2875 2876 oop_maps->add_gc_map((int)(__ offset()-start_off), map); 2877 2878 Label noException; 2879 2880 __ reset_last_Java_frame(); 2881 2882 __ load_and_test_long(Z_R1, thread_(pending_exception)); 2883 __ z_bre(noException); 2884 2885 // Pending exception case, used (sporadically) by 2886 // api/java_lang/Thread.State/index#ThreadState et al. 2887 RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers); 2888 2889 // Jump to forward_exception_entry, with the issuing PC in Z_R14 2890 // so it looks like the original nmethod called forward_exception_entry. 2891 __ load_const_optimized(Z_R1_scratch, StubRoutines::forward_exception_entry()); 2892 __ z_br(Z_R1_scratch); 2893 2894 // No exception case 2895 __ bind(noException); 2896 2897 if (!cause_return) { 2898 Label no_adjust; 2899 // If our stashed return pc was modified by the runtime we avoid touching it 2900 const int offset_of_return_pc = _z_common_abi(return_pc) + RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers); 2901 __ z_cg(Z_R6, offset_of_return_pc, Z_SP); 2902 __ z_brne(no_adjust); 2903 2904 // Adjust return pc forward to step over the safepoint poll instruction 2905 __ instr_size(Z_R1_scratch, Z_R6); 2906 __ z_agr(Z_R6, Z_R1_scratch); 2907 __ z_stg(Z_R6, offset_of_return_pc, Z_SP); 2908 2909 __ bind(no_adjust); 2910 } 2911 2912 // Normal exit, restore registers and exit. 2913 RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers); 2914 2915 __ z_br(Z_R14); 2916 2917 // Make sure all code is generated 2918 masm->flush(); 2919 2920 // Fill-out other meta info 2921 return SafepointBlob::create(&buffer, oop_maps, RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)/wordSize); 2922 } 2923 2924 2925 // 2926 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2927 // 2928 // Generate a stub that calls into vm to find out the proper destination 2929 // of a Java call. All the argument registers are live at this point 2930 // but since this is generic code we don't know what they are and the caller 2931 // must do any gc of the args. 2932 // 2933 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 2934 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2935 2936 // allocate space for the code 2937 ResourceMark rm; 2938 2939 CodeBuffer buffer(name, 1000, 512); 2940 MacroAssembler* masm = new MacroAssembler(&buffer); 2941 2942 OopMapSet *oop_maps = new OopMapSet(); 2943 OopMap* map = nullptr; 2944 2945 unsigned int start_off = __ offset(); 2946 2947 map = RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers); 2948 2949 // We must save a PC from within the stub as return PC 2950 // C code doesn't store the LR where we expect the PC, 2951 // so we would run into trouble upon stack walking. 2952 __ get_PC(Z_R1_scratch); 2953 2954 unsigned int frame_complete = __ offset(); 2955 2956 __ set_last_Java_frame(/*sp*/Z_SP, Z_R1_scratch); 2957 2958 __ call_VM_leaf(destination, Z_thread, Z_method); 2959 2960 2961 // Set an oopmap for the call site. 2962 // We need this not only for callee-saved registers, but also for volatile 2963 // registers that the compiler might be keeping live across a safepoint. 2964 2965 oop_maps->add_gc_map((int)(frame_complete-start_off), map); 2966 2967 // clear last_Java_sp 2968 __ reset_last_Java_frame(); 2969 2970 // check for pending exceptions 2971 Label pending; 2972 __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset())); 2973 __ z_brne(pending); 2974 2975 __ z_lgr(Z_R1_scratch, Z_R2); // r1 is neither saved nor restored, r2 contains the continuation. 2976 RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers); 2977 2978 // get the returned method 2979 __ get_vm_result_2(Z_method); 2980 2981 // We are back to the original state on entry and ready to go. 2982 __ z_br(Z_R1_scratch); 2983 2984 // Pending exception after the safepoint 2985 2986 __ bind(pending); 2987 2988 RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers); 2989 2990 // exception pending => remove activation and forward to exception handler 2991 2992 __ z_lgr(Z_R2, Z_R0); // pending_exception 2993 __ clear_mem(Address(Z_thread, JavaThread::vm_result_offset()), sizeof(jlong)); 2994 __ load_const_optimized(Z_R1_scratch, StubRoutines::forward_exception_entry()); 2995 __ z_br(Z_R1_scratch); 2996 2997 // ------------- 2998 // make sure all code is generated 2999 masm->flush(); 3000 3001 // return the blob 3002 // frame_size_words or bytes?? 3003 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)/wordSize, 3004 oop_maps, true); 3005 3006 } 3007 3008 //------------------------------Montgomery multiplication------------------------ 3009 // 3010 3011 // Subtract 0:b from carry:a. Return carry. 3012 static unsigned long 3013 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) { 3014 unsigned long i, c = 8 * (unsigned long)(len - 1); 3015 __asm__ __volatile__ ( 3016 "SLGR %[i], %[i] \n" // initialize to 0 and pre-set carry 3017 "LGHI 0, 8 \n" // index increment (for BRXLG) 3018 "LGR 1, %[c] \n" // index limit (for BRXLG) 3019 "0: \n" 3020 "LG %[c], 0(%[i],%[a]) \n" 3021 "SLBG %[c], 0(%[i],%[b]) \n" // subtract with borrow 3022 "STG %[c], 0(%[i],%[a]) \n" 3023 "BRXLG %[i], 0, 0b \n" // while ((i+=8)<limit); 3024 "SLBGR %[c], %[c] \n" // save carry - 1 3025 : [i]"=&a"(i), [c]"+r"(c) 3026 : [a]"a"(a), [b]"a"(b) 3027 : "cc", "memory", "r0", "r1" 3028 ); 3029 return carry + c; 3030 } 3031 3032 // Multiply (unsigned) Long A by Long B, accumulating the double- 3033 // length result into the accumulator formed of T0, T1, and T2. 3034 inline void MACC(unsigned long A[], long A_ind, 3035 unsigned long B[], long B_ind, 3036 unsigned long &T0, unsigned long &T1, unsigned long &T2) { 3037 long A_si = 8 * A_ind, 3038 B_si = 8 * B_ind; 3039 __asm__ __volatile__ ( 3040 "LG 1, 0(%[A_si],%[A]) \n" 3041 "MLG 0, 0(%[B_si],%[B]) \n" // r0r1 = A * B 3042 "ALGR %[T0], 1 \n" 3043 "LGHI 1, 0 \n" // r1 = 0 3044 "ALCGR %[T1], 0 \n" 3045 "ALCGR %[T2], 1 \n" 3046 : [T0]"+r"(T0), [T1]"+r"(T1), [T2]"+r"(T2) 3047 : [A]"r"(A), [A_si]"r"(A_si), [B]"r"(B), [B_si]"r"(B_si) 3048 : "cc", "r0", "r1" 3049 ); 3050 } 3051 3052 // As above, but add twice the double-length result into the 3053 // accumulator. 3054 inline void MACC2(unsigned long A[], long A_ind, 3055 unsigned long B[], long B_ind, 3056 unsigned long &T0, unsigned long &T1, unsigned long &T2) { 3057 const unsigned long zero = 0; 3058 long A_si = 8 * A_ind, 3059 B_si = 8 * B_ind; 3060 __asm__ __volatile__ ( 3061 "LG 1, 0(%[A_si],%[A]) \n" 3062 "MLG 0, 0(%[B_si],%[B]) \n" // r0r1 = A * B 3063 "ALGR %[T0], 1 \n" 3064 "ALCGR %[T1], 0 \n" 3065 "ALCGR %[T2], %[zero] \n" 3066 "ALGR %[T0], 1 \n" 3067 "ALCGR %[T1], 0 \n" 3068 "ALCGR %[T2], %[zero] \n" 3069 : [T0]"+r"(T0), [T1]"+r"(T1), [T2]"+r"(T2) 3070 : [A]"r"(A), [A_si]"r"(A_si), [B]"r"(B), [B_si]"r"(B_si), [zero]"r"(zero) 3071 : "cc", "r0", "r1" 3072 ); 3073 } 3074 3075 // Fast Montgomery multiplication. The derivation of the algorithm is 3076 // in "A Cryptographic Library for the Motorola DSP56000, 3077 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237". 3078 static void 3079 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[], 3080 unsigned long m[], unsigned long inv, int len) { 3081 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator 3082 int i; 3083 3084 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply"); 3085 3086 for (i = 0; i < len; i++) { 3087 int j; 3088 for (j = 0; j < i; j++) { 3089 MACC(a, j, b, i-j, t0, t1, t2); 3090 MACC(m, j, n, i-j, t0, t1, t2); 3091 } 3092 MACC(a, i, b, 0, t0, t1, t2); 3093 m[i] = t0 * inv; 3094 MACC(m, i, n, 0, t0, t1, t2); 3095 3096 assert(t0 == 0, "broken Montgomery multiply"); 3097 3098 t0 = t1; t1 = t2; t2 = 0; 3099 } 3100 3101 for (i = len; i < 2 * len; i++) { 3102 int j; 3103 for (j = i - len + 1; j < len; j++) { 3104 MACC(a, j, b, i-j, t0, t1, t2); 3105 MACC(m, j, n, i-j, t0, t1, t2); 3106 } 3107 m[i-len] = t0; 3108 t0 = t1; t1 = t2; t2 = 0; 3109 } 3110 3111 while (t0) { 3112 t0 = sub(m, n, t0, len); 3113 } 3114 } 3115 3116 // Fast Montgomery squaring. This uses asymptotically 25% fewer 3117 // multiplies so it should be up to 25% faster than Montgomery 3118 // multiplication. However, its loop control is more complex and it 3119 // may actually run slower on some machines. 3120 static void 3121 montgomery_square(unsigned long a[], unsigned long n[], 3122 unsigned long m[], unsigned long inv, int len) { 3123 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator 3124 int i; 3125 3126 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply"); 3127 3128 for (i = 0; i < len; i++) { 3129 int j; 3130 int end = (i+1)/2; 3131 for (j = 0; j < end; j++) { 3132 MACC2(a, j, a, i-j, t0, t1, t2); 3133 MACC(m, j, n, i-j, t0, t1, t2); 3134 } 3135 if ((i & 1) == 0) { 3136 MACC(a, j, a, j, t0, t1, t2); 3137 } 3138 for (; j < i; j++) { 3139 MACC(m, j, n, i-j, t0, t1, t2); 3140 } 3141 m[i] = t0 * inv; 3142 MACC(m, i, n, 0, t0, t1, t2); 3143 3144 assert(t0 == 0, "broken Montgomery square"); 3145 3146 t0 = t1; t1 = t2; t2 = 0; 3147 } 3148 3149 for (i = len; i < 2*len; i++) { 3150 int start = i-len+1; 3151 int end = start + (len - start)/2; 3152 int j; 3153 for (j = start; j < end; j++) { 3154 MACC2(a, j, a, i-j, t0, t1, t2); 3155 MACC(m, j, n, i-j, t0, t1, t2); 3156 } 3157 if ((i & 1) == 0) { 3158 MACC(a, j, a, j, t0, t1, t2); 3159 } 3160 for (; j < len; j++) { 3161 MACC(m, j, n, i-j, t0, t1, t2); 3162 } 3163 m[i-len] = t0; 3164 t0 = t1; t1 = t2; t2 = 0; 3165 } 3166 3167 while (t0) { 3168 t0 = sub(m, n, t0, len); 3169 } 3170 } 3171 3172 // The threshold at which squaring is advantageous was determined 3173 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz. 3174 // Value seems to be ok for other platforms, too. 3175 #define MONTGOMERY_SQUARING_THRESHOLD 64 3176 3177 // Copy len longwords from s to d, word-swapping as we go. The 3178 // destination array is reversed. 3179 static void reverse_words(unsigned long *s, unsigned long *d, int len) { 3180 d += len; 3181 while(len-- > 0) { 3182 d--; 3183 unsigned long s_val = *s; 3184 // Swap words in a longword on little endian machines. 3185 #ifdef VM_LITTLE_ENDIAN 3186 Unimplemented(); 3187 #endif 3188 *d = s_val; 3189 s++; 3190 } 3191 } 3192 3193 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints, 3194 jint len, jlong inv, 3195 jint *m_ints) { 3196 len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls. 3197 assert(len % 2 == 0, "array length in montgomery_multiply must be even"); 3198 int longwords = len/2; 3199 3200 // Make very sure we don't use so much space that the stack might 3201 // overflow. 512 jints corresponds to an 16384-bit integer and 3202 // will use here a total of 8k bytes of stack space. 3203 int divisor = sizeof(unsigned long) * 4; 3204 guarantee(longwords <= 8192 / divisor, "must be"); 3205 int total_allocation = longwords * sizeof (unsigned long) * 4; 3206 unsigned long *scratch = (unsigned long *)alloca(total_allocation); 3207 3208 // Local scratch arrays 3209 unsigned long 3210 *a = scratch + 0 * longwords, 3211 *b = scratch + 1 * longwords, 3212 *n = scratch + 2 * longwords, 3213 *m = scratch + 3 * longwords; 3214 3215 reverse_words((unsigned long *)a_ints, a, longwords); 3216 reverse_words((unsigned long *)b_ints, b, longwords); 3217 reverse_words((unsigned long *)n_ints, n, longwords); 3218 3219 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords); 3220 3221 reverse_words(m, (unsigned long *)m_ints, longwords); 3222 } 3223 3224 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints, 3225 jint len, jlong inv, 3226 jint *m_ints) { 3227 len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls. 3228 assert(len % 2 == 0, "array length in montgomery_square must be even"); 3229 int longwords = len/2; 3230 3231 // Make very sure we don't use so much space that the stack might 3232 // overflow. 512 jints corresponds to an 16384-bit integer and 3233 // will use here a total of 6k bytes of stack space. 3234 int divisor = sizeof(unsigned long) * 3; 3235 guarantee(longwords <= (8192 / divisor), "must be"); 3236 int total_allocation = longwords * sizeof (unsigned long) * 3; 3237 unsigned long *scratch = (unsigned long *)alloca(total_allocation); 3238 3239 // Local scratch arrays 3240 unsigned long 3241 *a = scratch + 0 * longwords, 3242 *n = scratch + 1 * longwords, 3243 *m = scratch + 2 * longwords; 3244 3245 reverse_words((unsigned long *)a_ints, a, longwords); 3246 reverse_words((unsigned long *)n_ints, n, longwords); 3247 3248 if (len >= MONTGOMERY_SQUARING_THRESHOLD) { 3249 ::montgomery_square(a, n, m, (unsigned long)inv, longwords); 3250 } else { 3251 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords); 3252 } 3253 3254 reverse_words(m, (unsigned long *)m_ints, longwords); 3255 } 3256 3257 extern "C" 3258 int SpinPause() { 3259 return 0; 3260 }