1 /*
   2  * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/c1/barrierSetC1.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "utilities/powerOfTwo.hpp"
  40 #include "vmreg_x86.inline.hpp"
  41 
  42 #ifdef ASSERT
  43 #define __ gen()->lir(__FILE__, __LINE__)->
  44 #else
  45 #define __ gen()->lir()->
  46 #endif
  47 
  48 // Item will be loaded into a byte register; Intel only
  49 void LIRItem::load_byte_item() {
  50   load_item();
  51   LIR_Opr res = result();
  52 
  53   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  54     // make sure that it is a byte register
  55     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  56            "can't load floats in byte register");
  57     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  58     __ move(res, reg);
  59 
  60     _result = reg;
  61   }
  62 }
  63 
  64 
  65 void LIRItem::load_nonconstant() {
  66   LIR_Opr r = value()->operand();
  67   if (r->is_constant()) {
  68     _result = r;
  69   } else {
  70     load_item();
  71   }
  72 }
  73 
  74 //--------------------------------------------------------------
  75 //               LIRGenerator
  76 //--------------------------------------------------------------
  77 
  78 
  79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  80 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  81 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  83 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  84 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  85 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  86 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  87 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  88 
  89 
  90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  91   LIR_Opr opr;
  92   switch (type->tag()) {
  93     case intTag:     opr = FrameMap::rax_opr;          break;
  94     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  95     case longTag:    opr = FrameMap::long0_opr;        break;
  96 #ifdef _LP64
  97     case floatTag:   opr = FrameMap::xmm0_float_opr;   break;
  98     case doubleTag:  opr = FrameMap::xmm0_double_opr;  break;
  99 #else
 100     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
 101     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
 102 #endif // _LP64
 103     case addressTag:
 104     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 105   }
 106 
 107   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 108   return opr;
 109 }
 110 
 111 
 112 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 113   LIR_Opr reg = new_register(T_INT);
 114   set_vreg_flag(reg, LIRGenerator::byte_reg);
 115   return reg;
 116 }
 117 
 118 
 119 //--------- loading items into registers --------------------------------
 120 
 121 
 122 // i486 instructions can inline constants
 123 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 124   if (type == T_SHORT || type == T_CHAR) {
 125     // there is no immediate move of word values in asembler_i486.?pp
 126     return false;
 127   }
 128   Constant* c = v->as_Constant();
 129   if (c && c->state_before() == NULL) {
 130     // constants of any type can be stored directly, except for
 131     // unloaded object constants.
 132     return true;
 133   }
 134   return false;
 135 }
 136 
 137 
 138 bool LIRGenerator::can_inline_as_constant(Value v) const {
 139   if (v->type()->tag() == longTag) return false;
 140   return v->type()->tag() != objectTag ||
 141     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 142 }
 143 
 144 
 145 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 146   if (c->type() == T_LONG) return false;
 147   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 148 }
 149 
 150 
 151 LIR_Opr LIRGenerator::safepoint_poll_register() {
 152   NOT_LP64( return new_register(T_ADDRESS); )
 153   return LIR_OprFact::illegalOpr;
 154 }
 155 
 156 
 157 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 158                                             int shift, int disp, BasicType type) {
 159   assert(base->is_register(), "must be");
 160   if (index->is_constant()) {
 161     LIR_Const *constant = index->as_constant_ptr();
 162 #ifdef _LP64
 163     jlong c;
 164     if (constant->type() == T_INT) {
 165       c = (jlong(index->as_jint()) << shift) + disp;
 166     } else {
 167       assert(constant->type() == T_LONG, "should be");
 168       c = (index->as_jlong() << shift) + disp;
 169     }
 170     if ((jlong)((jint)c) == c) {
 171       return new LIR_Address(base, (jint)c, type);
 172     } else {
 173       LIR_Opr tmp = new_register(T_LONG);
 174       __ move(index, tmp);
 175       return new LIR_Address(base, tmp, type);
 176     }
 177 #else
 178     return new LIR_Address(base,
 179                            ((intx)(constant->as_jint()) << shift) + disp,
 180                            type);
 181 #endif
 182   } else {
 183     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 184   }
 185 }
 186 
 187 
 188 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 189                                               BasicType type) {
 190   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 191 
 192   LIR_Address* addr;
 193   if (index_opr->is_constant()) {
 194     int elem_size = type2aelembytes(type);
 195     addr = new LIR_Address(array_opr,
 196                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 197   } else {
 198 #ifdef _LP64
 199     if (index_opr->type() == T_INT) {
 200       LIR_Opr tmp = new_register(T_LONG);
 201       __ convert(Bytecodes::_i2l, index_opr, tmp);
 202       index_opr = tmp;
 203     }
 204 #endif // _LP64
 205     addr =  new LIR_Address(array_opr,
 206                             index_opr,
 207                             LIR_Address::scale(type),
 208                             offset_in_bytes, type);
 209   }
 210   return addr;
 211 }
 212 
 213 
 214 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 215   LIR_Opr r = NULL;
 216   if (type == T_LONG) {
 217     r = LIR_OprFact::longConst(x);
 218   } else if (type == T_INT) {
 219     r = LIR_OprFact::intConst(x);
 220   } else {
 221     ShouldNotReachHere();
 222   }
 223   return r;
 224 }
 225 
 226 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 227   LIR_Opr pointer = new_pointer_register();
 228   __ move(LIR_OprFact::intptrConst(counter), pointer);
 229   LIR_Address* addr = new LIR_Address(pointer, type);
 230   increment_counter(addr, step);
 231 }
 232 
 233 
 234 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 235   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 236 }
 237 
 238 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 239   __ cmp_mem_int(condition, base, disp, c, info);
 240 }
 241 
 242 
 243 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 244   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 245 }
 246 
 247 
 248 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 249   if (tmp->is_valid() && c > 0 && c < max_jint) {
 250     if (is_power_of_2(c + 1)) {
 251       __ move(left, tmp);
 252       __ shift_left(left, log2i_exact(c + 1), left);
 253       __ sub(left, tmp, result);
 254       return true;
 255     } else if (is_power_of_2(c - 1)) {
 256       __ move(left, tmp);
 257       __ shift_left(left, log2i_exact(c - 1), left);
 258       __ add(left, tmp, result);
 259       return true;
 260     }
 261   }
 262   return false;
 263 }
 264 
 265 
 266 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 267   BasicType type = item->type();
 268   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 269 }
 270 
 271 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 272   LIR_Opr tmp1 = new_register(objectType);
 273   LIR_Opr tmp2 = new_register(objectType);
 274   LIR_Opr tmp3 = new_register(objectType);
 275   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 276 }
 277 
 278 //----------------------------------------------------------------------
 279 //             visitor functions
 280 //----------------------------------------------------------------------
 281 
 282 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 283   assert(x->is_pinned(),"");
 284   LIRItem obj(x->obj(), this);
 285   obj.load_item();
 286 
 287   set_no_result(x);
 288 
 289   // "lock" stores the address of the monitor stack slot, so this is not an oop
 290   LIR_Opr lock = new_register(T_INT);
 291 
 292   CodeEmitInfo* info_for_exception = NULL;
 293   if (x->needs_null_check()) {
 294     info_for_exception = state_for(x);
 295   }
 296   // this CodeEmitInfo must not have the xhandlers because here the
 297   // object is already locked (xhandlers expect object to be unlocked)
 298   CodeEmitInfo* info = state_for(x, x->state(), true);
 299   monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr,
 300                         x->monitor_no(), info_for_exception, info);
 301 }
 302 
 303 
 304 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 305   assert(x->is_pinned(),"");
 306 
 307   LIRItem obj(x->obj(), this);
 308   obj.dont_load_item();
 309 
 310   LIR_Opr lock = new_register(T_INT);
 311   LIR_Opr obj_temp = new_register(T_INT);
 312   set_no_result(x);
 313   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 314 }
 315 
 316 
 317 // _ineg, _lneg, _fneg, _dneg
 318 void LIRGenerator::do_NegateOp(NegateOp* x) {
 319   LIRItem value(x->x(), this);
 320   value.set_destroys_register();
 321   value.load_item();
 322   LIR_Opr reg = rlock(x);
 323 
 324   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 325 #ifdef _LP64
 326   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
 327     if (x->type()->tag() == doubleTag) {
 328       tmp = new_register(T_DOUBLE);
 329       __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 330     }
 331     else if (x->type()->tag() == floatTag) {
 332       tmp = new_register(T_FLOAT);
 333       __ move(LIR_OprFact::floatConst(-0.0), tmp);
 334     }
 335   }
 336 #endif
 337   __ negate(value.result(), reg, tmp);
 338 
 339   set_result(x, round_item(reg));
 340 }
 341 
 342 
 343 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 344 //      _dadd, _dmul, _dsub, _ddiv, _drem
 345 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 346   LIRItem left(x->x(),  this);
 347   LIRItem right(x->y(), this);
 348   LIRItem* left_arg  = &left;
 349   LIRItem* right_arg = &right;
 350   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 351   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 352   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 353     left.load_item();
 354   } else {
 355     left.dont_load_item();
 356   }
 357 
 358 #ifndef _LP64
 359   // do not load right operand if it is a constant.  only 0 and 1 are
 360   // loaded because there are special instructions for loading them
 361   // without memory access (not needed for SSE2 instructions)
 362   bool must_load_right = false;
 363   if (right.is_constant()) {
 364     LIR_Const* c = right.result()->as_constant_ptr();
 365     assert(c != NULL, "invalid constant");
 366     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 367 
 368     if (c->type() == T_FLOAT) {
 369       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 370     } else {
 371       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 372     }
 373   }
 374 #endif // !LP64
 375 
 376   if (must_load_both) {
 377     // frem and drem destroy also right operand, so move it to a new register
 378     right.set_destroys_register();
 379     right.load_item();
 380   } else if (right.is_register()) {
 381     right.load_item();
 382 #ifndef _LP64
 383   } else if (must_load_right) {
 384     right.load_item();
 385 #endif // !LP64
 386   } else {
 387     right.dont_load_item();
 388   }
 389   LIR_Opr reg = rlock(x);
 390   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 391   if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
 392     tmp = new_register(T_DOUBLE);
 393   }
 394 
 395 #ifdef _LP64
 396   if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
 397     // frem and drem are implemented as a direct call into the runtime.
 398     LIRItem left(x->x(), this);
 399     LIRItem right(x->y(), this);
 400 
 401     BasicType bt = as_BasicType(x->type());
 402     BasicTypeList signature(2);
 403     signature.append(bt);
 404     signature.append(bt);
 405     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 406 
 407     const LIR_Opr result_reg = result_register_for(x->type());
 408     left.load_item_force(cc->at(0));
 409     right.load_item_force(cc->at(1));
 410 
 411     address entry = NULL;
 412     switch (x->op()) {
 413       case Bytecodes::_frem:
 414         entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 415         break;
 416       case Bytecodes::_drem:
 417         entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 418         break;
 419       default:
 420         ShouldNotReachHere();
 421     }
 422 
 423     LIR_Opr result = rlock_result(x);
 424     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 425     __ move(result_reg, result);
 426   } else {
 427     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
 428     set_result(x, round_item(reg));
 429   }
 430 #else
 431   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 432     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 433     LIR_Opr fpu0, fpu1;
 434     if (x->op() == Bytecodes::_frem) {
 435       fpu0 = LIR_OprFact::single_fpu(0);
 436       fpu1 = LIR_OprFact::single_fpu(1);
 437     } else {
 438       fpu0 = LIR_OprFact::double_fpu(0);
 439       fpu1 = LIR_OprFact::double_fpu(1);
 440     }
 441     __ move(right.result(), fpu1); // order of left and right operand is important!
 442     __ move(left.result(), fpu0);
 443     __ rem (fpu0, fpu1, fpu0);
 444     __ move(fpu0, reg);
 445 
 446   } else {
 447     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
 448   }
 449   set_result(x, round_item(reg));
 450 #endif // _LP64
 451 }
 452 
 453 
 454 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 455 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 456   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 457     // long division is implemented as a direct call into the runtime
 458     LIRItem left(x->x(), this);
 459     LIRItem right(x->y(), this);
 460 
 461     // the check for division by zero destroys the right operand
 462     right.set_destroys_register();
 463 
 464     BasicTypeList signature(2);
 465     signature.append(T_LONG);
 466     signature.append(T_LONG);
 467     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 468 
 469     // check for division by zero (destroys registers of right operand!)
 470     CodeEmitInfo* info = state_for(x);
 471 
 472     const LIR_Opr result_reg = result_register_for(x->type());
 473     left.load_item_force(cc->at(1));
 474     right.load_item();
 475 
 476     __ move(right.result(), cc->at(0));
 477 
 478     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 479     __ branch(lir_cond_equal, new DivByZeroStub(info));
 480 
 481     address entry = NULL;
 482     switch (x->op()) {
 483     case Bytecodes::_lrem:
 484       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 485       break; // check if dividend is 0 is done elsewhere
 486     case Bytecodes::_ldiv:
 487       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 488       break; // check if dividend is 0 is done elsewhere
 489     default:
 490       ShouldNotReachHere();
 491     }
 492 
 493     LIR_Opr result = rlock_result(x);
 494     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 495     __ move(result_reg, result);
 496   } else if (x->op() == Bytecodes::_lmul) {
 497     // missing test if instr is commutative and if we should swap
 498     LIRItem left(x->x(), this);
 499     LIRItem right(x->y(), this);
 500 
 501     // right register is destroyed by the long mul, so it must be
 502     // copied to a new register.
 503     right.set_destroys_register();
 504 
 505     left.load_item();
 506     right.load_item();
 507 
 508     LIR_Opr reg = FrameMap::long0_opr;
 509     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 510     LIR_Opr result = rlock_result(x);
 511     __ move(reg, result);
 512   } else {
 513     // missing test if instr is commutative and if we should swap
 514     LIRItem left(x->x(), this);
 515     LIRItem right(x->y(), this);
 516 
 517     left.load_item();
 518     // don't load constants to save register
 519     right.load_nonconstant();
 520     rlock_result(x);
 521     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 522   }
 523 }
 524 
 525 
 526 
 527 // for: _iadd, _imul, _isub, _idiv, _irem
 528 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 529   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 530     // The requirements for division and modulo
 531     // input : rax,: dividend                         min_int
 532     //         reg: divisor   (may not be rax,/rdx)   -1
 533     //
 534     // output: rax,: quotient  (= rax, idiv reg)       min_int
 535     //         rdx: remainder (= rax, irem reg)       0
 536 
 537     // rax, and rdx will be destroyed
 538 
 539     // Note: does this invalidate the spec ???
 540     LIRItem right(x->y(), this);
 541     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 542 
 543     // call state_for before load_item_force because state_for may
 544     // force the evaluation of other instructions that are needed for
 545     // correct debug info.  Otherwise the live range of the fix
 546     // register might be too long.
 547     CodeEmitInfo* info = state_for(x);
 548 
 549     left.load_item_force(divInOpr());
 550 
 551     right.load_item();
 552 
 553     LIR_Opr result = rlock_result(x);
 554     LIR_Opr result_reg;
 555     if (x->op() == Bytecodes::_idiv) {
 556       result_reg = divOutOpr();
 557     } else {
 558       result_reg = remOutOpr();
 559     }
 560 
 561     if (!ImplicitDiv0Checks) {
 562       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 563       __ branch(lir_cond_equal, new DivByZeroStub(info));
 564       // Idiv/irem cannot trap (passing info would generate an assertion).
 565       info = NULL;
 566     }
 567     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 568     if (x->op() == Bytecodes::_irem) {
 569       __ irem(left.result(), right.result(), result_reg, tmp, info);
 570     } else if (x->op() == Bytecodes::_idiv) {
 571       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 572     } else {
 573       ShouldNotReachHere();
 574     }
 575 
 576     __ move(result_reg, result);
 577   } else {
 578     // missing test if instr is commutative and if we should swap
 579     LIRItem left(x->x(),  this);
 580     LIRItem right(x->y(), this);
 581     LIRItem* left_arg = &left;
 582     LIRItem* right_arg = &right;
 583     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 584       // swap them if left is real stack (or cached) and right is real register(not cached)
 585       left_arg = &right;
 586       right_arg = &left;
 587     }
 588 
 589     left_arg->load_item();
 590 
 591     // do not need to load right, as we can handle stack and constants
 592     if (x->op() == Bytecodes::_imul ) {
 593       // check if we can use shift instead
 594       bool use_constant = false;
 595       bool use_tmp = false;
 596       if (right_arg->is_constant()) {
 597         jint iconst = right_arg->get_jint_constant();
 598         if (iconst > 0 && iconst < max_jint) {
 599           if (is_power_of_2(iconst)) {
 600             use_constant = true;
 601           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 602             use_constant = true;
 603             use_tmp = true;
 604           }
 605         }
 606       }
 607       if (use_constant) {
 608         right_arg->dont_load_item();
 609       } else {
 610         right_arg->load_item();
 611       }
 612       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 613       if (use_tmp) {
 614         tmp = new_register(T_INT);
 615       }
 616       rlock_result(x);
 617 
 618       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 619     } else {
 620       right_arg->dont_load_item();
 621       rlock_result(x);
 622       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 623       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 624     }
 625   }
 626 }
 627 
 628 
 629 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 630   // when an operand with use count 1 is the left operand, then it is
 631   // likely that no move for 2-operand-LIR-form is necessary
 632   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 633     x->swap_operands();
 634   }
 635 
 636   ValueTag tag = x->type()->tag();
 637   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 638   switch (tag) {
 639     case floatTag:
 640     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 641     case longTag:    do_ArithmeticOp_Long(x); return;
 642     case intTag:     do_ArithmeticOp_Int(x);  return;
 643     default:         ShouldNotReachHere();    return;
 644   }
 645 }
 646 
 647 
 648 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 649 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 650   // count must always be in rcx
 651   LIRItem value(x->x(), this);
 652   LIRItem count(x->y(), this);
 653 
 654   ValueTag elemType = x->type()->tag();
 655   bool must_load_count = !count.is_constant() || elemType == longTag;
 656   if (must_load_count) {
 657     // count for long must be in register
 658     count.load_item_force(shiftCountOpr());
 659   } else {
 660     count.dont_load_item();
 661   }
 662   value.load_item();
 663   LIR_Opr reg = rlock_result(x);
 664 
 665   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 666 }
 667 
 668 
 669 // _iand, _land, _ior, _lor, _ixor, _lxor
 670 void LIRGenerator::do_LogicOp(LogicOp* x) {
 671   // when an operand with use count 1 is the left operand, then it is
 672   // likely that no move for 2-operand-LIR-form is necessary
 673   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 674     x->swap_operands();
 675   }
 676 
 677   LIRItem left(x->x(), this);
 678   LIRItem right(x->y(), this);
 679 
 680   left.load_item();
 681   right.load_nonconstant();
 682   LIR_Opr reg = rlock_result(x);
 683 
 684   logic_op(x->op(), reg, left.result(), right.result());
 685 }
 686 
 687 
 688 
 689 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 690 void LIRGenerator::do_CompareOp(CompareOp* x) {
 691   LIRItem left(x->x(), this);
 692   LIRItem right(x->y(), this);
 693   ValueTag tag = x->x()->type()->tag();
 694   if (tag == longTag) {
 695     left.set_destroys_register();
 696   }
 697   left.load_item();
 698   right.load_item();
 699   LIR_Opr reg = rlock_result(x);
 700 
 701   if (x->x()->type()->is_float_kind()) {
 702     Bytecodes::Code code = x->op();
 703     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 704   } else if (x->x()->type()->tag() == longTag) {
 705     __ lcmp2int(left.result(), right.result(), reg);
 706   } else {
 707     Unimplemented();
 708   }
 709 }
 710 
 711 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 712   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 713   if (is_reference_type(type)) {
 714     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 715     new_value.load_item();
 716     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 717   } else if (type == T_INT) {
 718     cmp_value.load_item_force(FrameMap::rax_opr);
 719     new_value.load_item();
 720     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 721   } else if (type == T_LONG) {
 722     cmp_value.load_item_force(FrameMap::long0_opr);
 723     new_value.load_item_force(FrameMap::long1_opr);
 724     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 725   } else {
 726     Unimplemented();
 727   }
 728   LIR_Opr result = new_register(T_INT);
 729   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 730            result, T_INT);
 731   return result;
 732 }
 733 
 734 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 735   bool is_oop = is_reference_type(type);
 736   LIR_Opr result = new_register(type);
 737   value.load_item();
 738   // Because we want a 2-arg form of xchg and xadd
 739   __ move(value.result(), result);
 740   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 741   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 742   return result;
 743 }
 744 
 745 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 746   LIR_Opr result = new_register(type);
 747   value.load_item();
 748   // Because we want a 2-arg form of xchg and xadd
 749   __ move(value.result(), result);
 750   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 751   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 752   return result;
 753 }
 754 
 755 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 756   assert(x->number_of_arguments() == 3, "wrong type");
 757   assert(UseFMA, "Needs FMA instructions support.");
 758   LIRItem value(x->argument_at(0), this);
 759   LIRItem value1(x->argument_at(1), this);
 760   LIRItem value2(x->argument_at(2), this);
 761 
 762   value2.set_destroys_register();
 763 
 764   value.load_item();
 765   value1.load_item();
 766   value2.load_item();
 767 
 768   LIR_Opr calc_input = value.result();
 769   LIR_Opr calc_input1 = value1.result();
 770   LIR_Opr calc_input2 = value2.result();
 771   LIR_Opr calc_result = rlock_result(x);
 772 
 773   switch (x->id()) {
 774   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 775   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 776   default:                    ShouldNotReachHere();
 777   }
 778 
 779 }
 780 
 781 
 782 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 783   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 784 
 785   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 786       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 787       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 788       x->id() == vmIntrinsics::_dlog10) {
 789     do_LibmIntrinsic(x);
 790     return;
 791   }
 792 
 793   LIRItem value(x->argument_at(0), this);
 794 
 795   bool use_fpu = false;
 796 #ifndef _LP64
 797   if (UseSSE < 2) {
 798     value.set_destroys_register();
 799   }
 800 #endif // !LP64
 801   value.load_item();
 802 
 803   LIR_Opr calc_input = value.result();
 804   LIR_Opr calc_result = rlock_result(x);
 805 
 806   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 807 #ifdef _LP64
 808   if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
 809       (x->id() == vmIntrinsics::_dabs)) {
 810     tmp = new_register(T_DOUBLE);
 811     __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 812   }
 813 #endif
 814 
 815   switch(x->id()) {
 816     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, tmp); break;
 817     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 818     default:                    ShouldNotReachHere();
 819   }
 820 
 821   if (use_fpu) {
 822     __ move(calc_result, x->operand());
 823   }
 824 }
 825 
 826 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 827   LIRItem value(x->argument_at(0), this);
 828   value.set_destroys_register();
 829 
 830   LIR_Opr calc_result = rlock_result(x);
 831   LIR_Opr result_reg = result_register_for(x->type());
 832 
 833   CallingConvention* cc = NULL;
 834 
 835   if (x->id() == vmIntrinsics::_dpow) {
 836     LIRItem value1(x->argument_at(1), this);
 837 
 838     value1.set_destroys_register();
 839 
 840     BasicTypeList signature(2);
 841     signature.append(T_DOUBLE);
 842     signature.append(T_DOUBLE);
 843     cc = frame_map()->c_calling_convention(&signature);
 844     value.load_item_force(cc->at(0));
 845     value1.load_item_force(cc->at(1));
 846   } else {
 847     BasicTypeList signature(1);
 848     signature.append(T_DOUBLE);
 849     cc = frame_map()->c_calling_convention(&signature);
 850     value.load_item_force(cc->at(0));
 851   }
 852 
 853 #ifndef _LP64
 854   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 855   result_reg = tmp;
 856   switch(x->id()) {
 857     case vmIntrinsics::_dexp:
 858       if (StubRoutines::dexp() != NULL) {
 859         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 860       } else {
 861         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 862       }
 863       break;
 864     case vmIntrinsics::_dlog:
 865       if (StubRoutines::dlog() != NULL) {
 866         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 867       } else {
 868         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 869       }
 870       break;
 871     case vmIntrinsics::_dlog10:
 872       if (StubRoutines::dlog10() != NULL) {
 873        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 874       } else {
 875         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 876       }
 877       break;
 878     case vmIntrinsics::_dpow:
 879       if (StubRoutines::dpow() != NULL) {
 880         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 881       } else {
 882         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 883       }
 884       break;
 885     case vmIntrinsics::_dsin:
 886       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 887         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 888       } else {
 889         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 890       }
 891       break;
 892     case vmIntrinsics::_dcos:
 893       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 894         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 895       } else {
 896         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 897       }
 898       break;
 899     case vmIntrinsics::_dtan:
 900       if (StubRoutines::dtan() != NULL) {
 901         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 902       } else {
 903         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 904       }
 905       break;
 906     default:  ShouldNotReachHere();
 907   }
 908 #else
 909   switch (x->id()) {
 910     case vmIntrinsics::_dexp:
 911       if (StubRoutines::dexp() != NULL) {
 912         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 913       } else {
 914         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 915       }
 916       break;
 917     case vmIntrinsics::_dlog:
 918       if (StubRoutines::dlog() != NULL) {
 919       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 920       } else {
 921         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 922       }
 923       break;
 924     case vmIntrinsics::_dlog10:
 925       if (StubRoutines::dlog10() != NULL) {
 926       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 927       } else {
 928         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 929       }
 930       break;
 931     case vmIntrinsics::_dpow:
 932        if (StubRoutines::dpow() != NULL) {
 933       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 934       } else {
 935         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 936       }
 937       break;
 938     case vmIntrinsics::_dsin:
 939       if (StubRoutines::dsin() != NULL) {
 940         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 941       } else {
 942         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 943       }
 944       break;
 945     case vmIntrinsics::_dcos:
 946       if (StubRoutines::dcos() != NULL) {
 947         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 948       } else {
 949         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 950       }
 951       break;
 952     case vmIntrinsics::_dtan:
 953        if (StubRoutines::dtan() != NULL) {
 954       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 955       } else {
 956         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 957       }
 958       break;
 959     default:  ShouldNotReachHere();
 960   }
 961 #endif // _LP64
 962   __ move(result_reg, calc_result);
 963 }
 964 
 965 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 966   assert(x->number_of_arguments() == 5, "wrong type");
 967 
 968   // Make all state_for calls early since they can emit code
 969   CodeEmitInfo* info = state_for(x, x->state());
 970 
 971   LIRItem src(x->argument_at(0), this);
 972   LIRItem src_pos(x->argument_at(1), this);
 973   LIRItem dst(x->argument_at(2), this);
 974   LIRItem dst_pos(x->argument_at(3), this);
 975   LIRItem length(x->argument_at(4), this);
 976 
 977   // operands for arraycopy must use fixed registers, otherwise
 978   // LinearScan will fail allocation (because arraycopy always needs a
 979   // call)
 980 
 981 #ifndef _LP64
 982   src.load_item_force     (FrameMap::rcx_oop_opr);
 983   src_pos.load_item_force (FrameMap::rdx_opr);
 984   dst.load_item_force     (FrameMap::rax_oop_opr);
 985   dst_pos.load_item_force (FrameMap::rbx_opr);
 986   length.load_item_force  (FrameMap::rdi_opr);
 987   LIR_Opr tmp =           (FrameMap::rsi_opr);
 988 #else
 989 
 990   // The java calling convention will give us enough registers
 991   // so that on the stub side the args will be perfect already.
 992   // On the other slow/special case side we call C and the arg
 993   // positions are not similar enough to pick one as the best.
 994   // Also because the java calling convention is a "shifted" version
 995   // of the C convention we can process the java args trivially into C
 996   // args without worry of overwriting during the xfer
 997 
 998   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 999   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1000   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
1001   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1002   length.load_item_force  (FrameMap::as_opr(j_rarg4));
1003 
1004   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
1005 #endif // LP64
1006 
1007   set_no_result(x);
1008 
1009   int flags;
1010   ciArrayKlass* expected_type;
1011   arraycopy_helper(x, &flags, &expected_type);
1012 
1013   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1014 }
1015 
1016 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1017   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1018   // Make all state_for calls early since they can emit code
1019   LIR_Opr result = rlock_result(x);
1020   int flags = 0;
1021   switch (x->id()) {
1022     case vmIntrinsics::_updateCRC32: {
1023       LIRItem crc(x->argument_at(0), this);
1024       LIRItem val(x->argument_at(1), this);
1025       // val is destroyed by update_crc32
1026       val.set_destroys_register();
1027       crc.load_item();
1028       val.load_item();
1029       __ update_crc32(crc.result(), val.result(), result);
1030       break;
1031     }
1032     case vmIntrinsics::_updateBytesCRC32:
1033     case vmIntrinsics::_updateByteBufferCRC32: {
1034       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1035 
1036       LIRItem crc(x->argument_at(0), this);
1037       LIRItem buf(x->argument_at(1), this);
1038       LIRItem off(x->argument_at(2), this);
1039       LIRItem len(x->argument_at(3), this);
1040       buf.load_item();
1041       off.load_nonconstant();
1042 
1043       LIR_Opr index = off.result();
1044       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1045       if(off.result()->is_constant()) {
1046         index = LIR_OprFact::illegalOpr;
1047        offset += off.result()->as_jint();
1048       }
1049       LIR_Opr base_op = buf.result();
1050 
1051 #ifndef _LP64
1052       if (!is_updateBytes) { // long b raw address
1053          base_op = new_register(T_INT);
1054          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1055       }
1056 #else
1057       if (index->is_valid()) {
1058         LIR_Opr tmp = new_register(T_LONG);
1059         __ convert(Bytecodes::_i2l, index, tmp);
1060         index = tmp;
1061       }
1062 #endif
1063 
1064       LIR_Address* a = new LIR_Address(base_op,
1065                                        index,
1066                                        offset,
1067                                        T_BYTE);
1068       BasicTypeList signature(3);
1069       signature.append(T_INT);
1070       signature.append(T_ADDRESS);
1071       signature.append(T_INT);
1072       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1073       const LIR_Opr result_reg = result_register_for(x->type());
1074 
1075       LIR_Opr addr = new_pointer_register();
1076       __ leal(LIR_OprFact::address(a), addr);
1077 
1078       crc.load_item_force(cc->at(0));
1079       __ move(addr, cc->at(1));
1080       len.load_item_force(cc->at(2));
1081 
1082       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1083       __ move(result_reg, result);
1084 
1085       break;
1086     }
1087     default: {
1088       ShouldNotReachHere();
1089     }
1090   }
1091 }
1092 
1093 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1094   Unimplemented();
1095 }
1096 
1097 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1098   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1099 
1100   // Make all state_for calls early since they can emit code
1101   LIR_Opr result = rlock_result(x);
1102 
1103   LIRItem a(x->argument_at(0), this); // Object
1104   LIRItem aOffset(x->argument_at(1), this); // long
1105   LIRItem b(x->argument_at(2), this); // Object
1106   LIRItem bOffset(x->argument_at(3), this); // long
1107   LIRItem length(x->argument_at(4), this); // int
1108   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1109 
1110   a.load_item();
1111   aOffset.load_nonconstant();
1112   b.load_item();
1113   bOffset.load_nonconstant();
1114 
1115   long constant_aOffset = 0;
1116   LIR_Opr result_aOffset = aOffset.result();
1117   if (result_aOffset->is_constant()) {
1118     constant_aOffset = result_aOffset->as_jlong();
1119     result_aOffset = LIR_OprFact::illegalOpr;
1120   }
1121   LIR_Opr result_a = a.result();
1122 
1123   long constant_bOffset = 0;
1124   LIR_Opr result_bOffset = bOffset.result();
1125   if (result_bOffset->is_constant()) {
1126     constant_bOffset = result_bOffset->as_jlong();
1127     result_bOffset = LIR_OprFact::illegalOpr;
1128   }
1129   LIR_Opr result_b = b.result();
1130 
1131 #ifndef _LP64
1132   result_a = new_register(T_INT);
1133   __ convert(Bytecodes::_l2i, a.result(), result_a);
1134   result_b = new_register(T_INT);
1135   __ convert(Bytecodes::_l2i, b.result(), result_b);
1136 #endif
1137 
1138 
1139   LIR_Address* addr_a = new LIR_Address(result_a,
1140                                         result_aOffset,
1141                                         constant_aOffset,
1142                                         T_BYTE);
1143 
1144   LIR_Address* addr_b = new LIR_Address(result_b,
1145                                         result_bOffset,
1146                                         constant_bOffset,
1147                                         T_BYTE);
1148 
1149   BasicTypeList signature(4);
1150   signature.append(T_ADDRESS);
1151   signature.append(T_ADDRESS);
1152   signature.append(T_INT);
1153   signature.append(T_INT);
1154   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1155   const LIR_Opr result_reg = result_register_for(x->type());
1156 
1157   LIR_Opr ptr_addr_a = new_pointer_register();
1158   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1159 
1160   LIR_Opr ptr_addr_b = new_pointer_register();
1161   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1162 
1163   __ move(ptr_addr_a, cc->at(0));
1164   __ move(ptr_addr_b, cc->at(1));
1165   length.load_item_force(cc->at(2));
1166   log2ArrayIndexScale.load_item_force(cc->at(3));
1167 
1168   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1169   __ move(result_reg, result);
1170 }
1171 
1172 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1173 // _i2b, _i2c, _i2s
1174 LIR_Opr fixed_register_for(BasicType type) {
1175   switch (type) {
1176     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1177     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1178     case T_INT:    return FrameMap::rax_opr;
1179     case T_LONG:   return FrameMap::long0_opr;
1180     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1181   }
1182 }
1183 
1184 void LIRGenerator::do_Convert(Convert* x) {
1185 #ifdef _LP64
1186   LIRItem value(x->value(), this);
1187   value.load_item();
1188   LIR_Opr input = value.result();
1189   LIR_Opr result = rlock(x);
1190   __ convert(x->op(), input, result);
1191   assert(result->is_virtual(), "result must be virtual register");
1192   set_result(x, result);
1193 #else
1194   // flags that vary for the different operations and different SSE-settings
1195   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1196 
1197   switch (x->op()) {
1198     case Bytecodes::_i2l: // fall through
1199     case Bytecodes::_l2i: // fall through
1200     case Bytecodes::_i2b: // fall through
1201     case Bytecodes::_i2c: // fall through
1202     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1203 
1204     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1205     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1206     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1207     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1208     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1209     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1210     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1211     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1212     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1213     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1214     default: ShouldNotReachHere();
1215   }
1216 
1217   LIRItem value(x->value(), this);
1218   value.load_item();
1219   LIR_Opr input = value.result();
1220   LIR_Opr result = rlock(x);
1221 
1222   // arguments of lir_convert
1223   LIR_Opr conv_input = input;
1224   LIR_Opr conv_result = result;
1225   ConversionStub* stub = NULL;
1226 
1227   if (fixed_input) {
1228     conv_input = fixed_register_for(input->type());
1229     __ move(input, conv_input);
1230   }
1231 
1232   assert(fixed_result == false || round_result == false, "cannot set both");
1233   if (fixed_result) {
1234     conv_result = fixed_register_for(result->type());
1235   } else if (round_result) {
1236     result = new_register(result->type());
1237     set_vreg_flag(result, must_start_in_memory);
1238   }
1239 
1240   if (needs_stub) {
1241     stub = new ConversionStub(x->op(), conv_input, conv_result);
1242   }
1243 
1244   __ convert(x->op(), conv_input, conv_result, stub);
1245 
1246   if (result != conv_result) {
1247     __ move(conv_result, result);
1248   }
1249 
1250   assert(result->is_virtual(), "result must be virtual register");
1251   set_result(x, result);
1252 #endif // _LP64
1253 }
1254 
1255 
1256 void LIRGenerator::do_NewInstance(NewInstance* x) {
1257   print_if_not_loaded(x);
1258 
1259   CodeEmitInfo* info = state_for(x, x->state());
1260   LIR_Opr reg = result_register_for(x->type());
1261   new_instance(reg, x->klass(), x->is_unresolved(),
1262                        FrameMap::rcx_oop_opr,
1263                        FrameMap::rdi_oop_opr,
1264                        FrameMap::rsi_oop_opr,
1265                        LIR_OprFact::illegalOpr,
1266                        FrameMap::rdx_metadata_opr, info);
1267   LIR_Opr result = rlock_result(x);
1268   __ move(reg, result);
1269 }
1270 
1271 
1272 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1273   CodeEmitInfo* info = state_for(x, x->state());
1274 
1275   LIRItem length(x->length(), this);
1276   length.load_item_force(FrameMap::rbx_opr);
1277 
1278   LIR_Opr reg = result_register_for(x->type());
1279   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1280   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1281   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1282   LIR_Opr tmp4 = reg;
1283   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1284   LIR_Opr len = length.result();
1285   BasicType elem_type = x->elt_type();
1286 
1287   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1288 
1289   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1290   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1291 
1292   LIR_Opr result = rlock_result(x);
1293   __ move(reg, result);
1294 }
1295 
1296 
1297 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1298   LIRItem length(x->length(), this);
1299   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1300   // and therefore provide the state before the parameters have been consumed
1301   CodeEmitInfo* patching_info = NULL;
1302   if (!x->klass()->is_loaded() || PatchALot) {
1303     patching_info =  state_for(x, x->state_before());
1304   }
1305 
1306   CodeEmitInfo* info = state_for(x, x->state());
1307 
1308   const LIR_Opr reg = result_register_for(x->type());
1309   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1310   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1311   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1312   LIR_Opr tmp4 = reg;
1313   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1314 
1315   length.load_item_force(FrameMap::rbx_opr);
1316   LIR_Opr len = length.result();
1317 
1318   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1319   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1320   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1321     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1322   }
1323   klass2reg_with_patching(klass_reg, obj, patching_info);
1324   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1325 
1326   LIR_Opr result = rlock_result(x);
1327   __ move(reg, result);
1328 }
1329 
1330 
1331 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1332   Values* dims = x->dims();
1333   int i = dims->length();
1334   LIRItemList* items = new LIRItemList(i, i, NULL);
1335   while (i-- > 0) {
1336     LIRItem* size = new LIRItem(dims->at(i), this);
1337     items->at_put(i, size);
1338   }
1339 
1340   // Evaluate state_for early since it may emit code.
1341   CodeEmitInfo* patching_info = NULL;
1342   if (!x->klass()->is_loaded() || PatchALot) {
1343     patching_info = state_for(x, x->state_before());
1344 
1345     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1346     // clone all handlers (NOTE: Usually this is handled transparently
1347     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1348     // is done explicitly here because a stub isn't being used).
1349     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1350   }
1351   CodeEmitInfo* info = state_for(x, x->state());
1352 
1353   i = dims->length();
1354   while (i-- > 0) {
1355     LIRItem* size = items->at(i);
1356     size->load_nonconstant();
1357 
1358     store_stack_parameter(size->result(), in_ByteSize(i*4));
1359   }
1360 
1361   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1362   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1363 
1364   LIR_Opr rank = FrameMap::rbx_opr;
1365   __ move(LIR_OprFact::intConst(x->rank()), rank);
1366   LIR_Opr varargs = FrameMap::rcx_opr;
1367   __ move(FrameMap::rsp_opr, varargs);
1368   LIR_OprList* args = new LIR_OprList(3);
1369   args->append(klass_reg);
1370   args->append(rank);
1371   args->append(varargs);
1372   LIR_Opr reg = result_register_for(x->type());
1373   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1374                   LIR_OprFact::illegalOpr,
1375                   reg, args, info);
1376 
1377   LIR_Opr result = rlock_result(x);
1378   __ move(reg, result);
1379 }
1380 
1381 
1382 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1383   // nothing to do for now
1384 }
1385 
1386 
1387 void LIRGenerator::do_CheckCast(CheckCast* x) {
1388   LIRItem obj(x->obj(), this);
1389 
1390   CodeEmitInfo* patching_info = NULL;
1391   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1392     // must do this before locking the destination register as an oop register,
1393     // and before the obj is loaded (the latter is for deoptimization)
1394     patching_info = state_for(x, x->state_before());
1395   }
1396   obj.load_item();
1397 
1398   // info for exceptions
1399   CodeEmitInfo* info_for_exception =
1400       (x->needs_exception_state() ? state_for(x) :
1401                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1402 
1403   CodeStub* stub;
1404   if (x->is_incompatible_class_change_check()) {
1405     assert(patching_info == NULL, "can't patch this");
1406     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1407   } else if (x->is_invokespecial_receiver_check()) {
1408     assert(patching_info == NULL, "can't patch this");
1409     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1410   } else {
1411     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1412   }
1413   LIR_Opr reg = rlock_result(x);
1414   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1415   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1416     tmp3 = new_register(objectType);
1417   }
1418   __ checkcast(reg, obj.result(), x->klass(),
1419                new_register(objectType), new_register(objectType), tmp3,
1420                x->direct_compare(), info_for_exception, patching_info, stub,
1421                x->profiled_method(), x->profiled_bci());
1422 }
1423 
1424 
1425 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1426   LIRItem obj(x->obj(), this);
1427 
1428   // result and test object may not be in same register
1429   LIR_Opr reg = rlock_result(x);
1430   CodeEmitInfo* patching_info = NULL;
1431   if ((!x->klass()->is_loaded() || PatchALot)) {
1432     // must do this before locking the destination register as an oop register
1433     patching_info = state_for(x, x->state_before());
1434   }
1435   obj.load_item();
1436   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1437   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1438     tmp3 = new_register(objectType);
1439   }
1440   __ instanceof(reg, obj.result(), x->klass(),
1441                 new_register(objectType), new_register(objectType), tmp3,
1442                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1443 }
1444 
1445 
1446 void LIRGenerator::do_If(If* x) {
1447   assert(x->number_of_sux() == 2, "inconsistency");
1448   ValueTag tag = x->x()->type()->tag();
1449   bool is_safepoint = x->is_safepoint();
1450 
1451   If::Condition cond = x->cond();
1452 
1453   LIRItem xitem(x->x(), this);
1454   LIRItem yitem(x->y(), this);
1455   LIRItem* xin = &xitem;
1456   LIRItem* yin = &yitem;
1457 
1458   if (tag == longTag) {
1459     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1460     // mirror for other conditions
1461     if (cond == If::gtr || cond == If::leq) {
1462       cond = Instruction::mirror(cond);
1463       xin = &yitem;
1464       yin = &xitem;
1465     }
1466     xin->set_destroys_register();
1467   }
1468   xin->load_item();
1469   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1470     // inline long zero
1471     yin->dont_load_item();
1472   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1473     // longs cannot handle constants at right side
1474     yin->load_item();
1475   } else {
1476     yin->dont_load_item();
1477   }
1478 
1479   LIR_Opr left = xin->result();
1480   LIR_Opr right = yin->result();
1481 
1482   set_no_result(x);
1483 
1484   // add safepoint before generating condition code so it can be recomputed
1485   if (x->is_safepoint()) {
1486     // increment backedge counter if needed
1487     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1488         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1489     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1490   }
1491 
1492   __ cmp(lir_cond(cond), left, right);
1493   // Generate branch profiling. Profiling code doesn't kill flags.
1494   profile_branch(x, cond);
1495   move_to_phi(x->state());
1496   if (x->x()->type()->is_float_kind()) {
1497     __ branch(lir_cond(cond), x->tsux(), x->usux());
1498   } else {
1499     __ branch(lir_cond(cond), x->tsux());
1500   }
1501   assert(x->default_sux() == x->fsux(), "wrong destination above");
1502   __ jump(x->default_sux());
1503 }
1504 
1505 
1506 LIR_Opr LIRGenerator::getThreadPointer() {
1507 #ifdef _LP64
1508   return FrameMap::as_pointer_opr(r15_thread);
1509 #else
1510   LIR_Opr result = new_register(T_INT);
1511   __ get_thread(result);
1512   return result;
1513 #endif //
1514 }
1515 
1516 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1517   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1518   LIR_OprList* args = new LIR_OprList();
1519   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1520   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1521 }
1522 
1523 
1524 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1525                                         CodeEmitInfo* info) {
1526   if (address->type() == T_LONG) {
1527     address = new LIR_Address(address->base(),
1528                               address->index(), address->scale(),
1529                               address->disp(), T_DOUBLE);
1530     // Transfer the value atomically by using FP moves.  This means
1531     // the value has to be moved between CPU and FPU registers.  It
1532     // always has to be moved through spill slot since there's no
1533     // quick way to pack the value into an SSE register.
1534     LIR_Opr temp_double = new_register(T_DOUBLE);
1535     LIR_Opr spill = new_register(T_LONG);
1536     set_vreg_flag(spill, must_start_in_memory);
1537     __ move(value, spill);
1538     __ volatile_move(spill, temp_double, T_LONG);
1539     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1540   } else {
1541     __ store(value, address, info);
1542   }
1543 }
1544 
1545 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1546                                        CodeEmitInfo* info) {
1547   if (address->type() == T_LONG) {
1548     address = new LIR_Address(address->base(),
1549                               address->index(), address->scale(),
1550                               address->disp(), T_DOUBLE);
1551     // Transfer the value atomically by using FP moves.  This means
1552     // the value has to be moved between CPU and FPU registers.  In
1553     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1554     // SSE2+ mode it can be moved directly.
1555     LIR_Opr temp_double = new_register(T_DOUBLE);
1556     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1557     __ volatile_move(temp_double, result, T_LONG);
1558 #ifndef _LP64
1559     if (UseSSE < 2) {
1560       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1561       set_vreg_flag(result, must_start_in_memory);
1562     }
1563 #endif // !LP64
1564   } else {
1565     __ load(address, result, info);
1566   }
1567 }