1 /*
   2  * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/c1/barrierSetC1.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_x86.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 // Item will be loaded into a byte register; Intel only
  48 void LIRItem::load_byte_item() {
  49   load_item();
  50   LIR_Opr res = result();
  51 
  52   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  53     // make sure that it is a byte register
  54     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  55            "can't load floats in byte register");
  56     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  57     __ move(res, reg);
  58 
  59     _result = reg;
  60   }
  61 }
  62 
  63 
  64 void LIRItem::load_nonconstant() {
  65   LIR_Opr r = value()->operand();
  66   if (r->is_constant()) {
  67     _result = r;
  68   } else {
  69     load_item();
  70   }
  71 }
  72 
  73 //--------------------------------------------------------------
  74 //               LIRGenerator
  75 //--------------------------------------------------------------
  76 
  77 
  78 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  79 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  80 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  81 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  83 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  84 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  85 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  86 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  87 
  88 
  89 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  90   LIR_Opr opr;
  91   switch (type->tag()) {
  92     case intTag:     opr = FrameMap::rax_opr;          break;
  93     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  94     case longTag:    opr = FrameMap::long0_opr;        break;
  95     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  96     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  97 
  98     case addressTag:
  99     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 100   }
 101 
 102   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 103   return opr;
 104 }
 105 
 106 
 107 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 108   LIR_Opr reg = new_register(T_INT);
 109   set_vreg_flag(reg, LIRGenerator::byte_reg);
 110   return reg;
 111 }
 112 
 113 
 114 //--------- loading items into registers --------------------------------
 115 
 116 
 117 // i486 instructions can inline constants
 118 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 119   if (type == T_SHORT || type == T_CHAR) {
 120     // there is no immediate move of word values in asembler_i486.?pp
 121     return false;
 122   }
 123   Constant* c = v->as_Constant();
 124   if (c && c->state_before() == NULL) {
 125     // constants of any type can be stored directly, except for
 126     // unloaded object constants.
 127     return true;
 128   }
 129   return false;
 130 }
 131 
 132 
 133 bool LIRGenerator::can_inline_as_constant(Value v) const {
 134   if (v->type()->tag() == longTag) return false;
 135   return v->type()->tag() != objectTag ||
 136     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 137 }
 138 
 139 
 140 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 141   if (c->type() == T_LONG) return false;
 142   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 143 }
 144 
 145 
 146 LIR_Opr LIRGenerator::safepoint_poll_register() {
 147   NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
 148   return LIR_OprFact::illegalOpr;
 149 }
 150 
 151 
 152 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 153                                             int shift, int disp, BasicType type) {
 154   assert(base->is_register(), "must be");
 155   if (index->is_constant()) {
 156     LIR_Const *constant = index->as_constant_ptr();
 157 #ifdef _LP64
 158     jlong c;
 159     if (constant->type() == T_INT) {
 160       c = (jlong(index->as_jint()) << shift) + disp;
 161     } else {
 162       assert(constant->type() == T_LONG, "should be");
 163       c = (index->as_jlong() << shift) + disp;
 164     }
 165     if ((jlong)((jint)c) == c) {
 166       return new LIR_Address(base, (jint)c, type);
 167     } else {
 168       LIR_Opr tmp = new_register(T_LONG);
 169       __ move(index, tmp);
 170       return new LIR_Address(base, tmp, type);
 171     }
 172 #else
 173     return new LIR_Address(base,
 174                            ((intx)(constant->as_jint()) << shift) + disp,
 175                            type);
 176 #endif
 177   } else {
 178     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 179   }
 180 }
 181 
 182 
 183 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 184                                               BasicType type) {
 185   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 186 
 187   LIR_Address* addr;
 188   if (index_opr->is_constant()) {
 189     int elem_size = type2aelembytes(type);
 190     addr = new LIR_Address(array_opr,
 191                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 192   } else {
 193 #ifdef _LP64
 194     if (index_opr->type() == T_INT) {
 195       LIR_Opr tmp = new_register(T_LONG);
 196       __ convert(Bytecodes::_i2l, index_opr, tmp);
 197       index_opr = tmp;
 198     }
 199 #endif // _LP64
 200     addr =  new LIR_Address(array_opr,
 201                             index_opr,
 202                             LIR_Address::scale(type),
 203                             offset_in_bytes, type);
 204   }
 205   return addr;
 206 }
 207 
 208 
 209 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 210   LIR_Opr r = NULL;
 211   if (type == T_LONG) {
 212     r = LIR_OprFact::longConst(x);
 213   } else if (type == T_INT) {
 214     r = LIR_OprFact::intConst(x);
 215   } else {
 216     ShouldNotReachHere();
 217   }
 218   return r;
 219 }
 220 
 221 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 222   LIR_Opr pointer = new_pointer_register();
 223   __ move(LIR_OprFact::intptrConst(counter), pointer);
 224   LIR_Address* addr = new LIR_Address(pointer, type);
 225   increment_counter(addr, step);
 226 }
 227 
 228 
 229 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 230   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 231 }
 232 
 233 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 234   __ cmp_mem_int(condition, base, disp, c, info);
 235 }
 236 
 237 
 238 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 239   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 240 }
 241 
 242 
 243 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 244   if (tmp->is_valid() && c > 0 && c < max_jint) {
 245     if (is_power_of_2(c + 1)) {
 246       __ move(left, tmp);
 247       __ shift_left(left, log2_jint(c + 1), left);
 248       __ sub(left, tmp, result);
 249       return true;
 250     } else if (is_power_of_2(c - 1)) {
 251       __ move(left, tmp);
 252       __ shift_left(left, log2_jint(c - 1), left);
 253       __ add(left, tmp, result);
 254       return true;
 255     }
 256   }
 257   return false;
 258 }
 259 
 260 
 261 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 262   BasicType type = item->type();
 263   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 264 }
 265 
 266 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 267   LIR_Opr tmp1 = new_register(objectType);
 268   LIR_Opr tmp2 = new_register(objectType);
 269   LIR_Opr tmp3 = new_register(objectType);
 270   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 271 }
 272 
 273 //----------------------------------------------------------------------
 274 //             visitor functions
 275 //----------------------------------------------------------------------
 276 
 277 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 278   assert(x->is_pinned(),"");
 279   LIRItem obj(x->obj(), this);
 280   obj.load_item();
 281 
 282   set_no_result(x);
 283 
 284   // "lock" stores the address of the monitor stack slot, so this is not an oop
 285   LIR_Opr lock = new_register(T_INT);
 286   // Need a scratch register for biased locking on x86
 287   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 288   if (UseBiasedLocking) {
 289     scratch = new_register(T_INT);
 290   }
 291 
 292   CodeEmitInfo* info_for_exception = NULL;
 293   if (x->needs_null_check()) {
 294     info_for_exception = state_for(x);
 295   }
 296   // this CodeEmitInfo must not have the xhandlers because here the
 297   // object is already locked (xhandlers expect object to be unlocked)
 298   CodeEmitInfo* info = state_for(x, x->state(), true);
 299   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 300                         x->monitor_no(), info_for_exception, info);
 301 }
 302 
 303 
 304 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 305   assert(x->is_pinned(),"");
 306 
 307   LIRItem obj(x->obj(), this);
 308   obj.dont_load_item();
 309 
 310   LIR_Opr lock = new_register(T_INT);
 311   LIR_Opr obj_temp = new_register(T_INT);
 312   set_no_result(x);
 313   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 314 }
 315 
 316 
 317 // _ineg, _lneg, _fneg, _dneg
 318 void LIRGenerator::do_NegateOp(NegateOp* x) {
 319   LIRItem value(x->x(), this);
 320   value.set_destroys_register();
 321   value.load_item();
 322   LIR_Opr reg = rlock(x);
 323 
 324   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 325 #ifdef _LP64
 326   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
 327     if (x->type()->tag() == doubleTag) {
 328       tmp = new_register(T_DOUBLE);
 329       __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 330     }
 331     else if (x->type()->tag() == floatTag) {
 332       tmp = new_register(T_FLOAT);
 333       __ move(LIR_OprFact::floatConst(-0.0), tmp);
 334     }
 335   }
 336 #endif
 337   __ negate(value.result(), reg, tmp);
 338 
 339   set_result(x, round_item(reg));
 340 }
 341 
 342 void LIRGenerator::do_continuation_getFP(Intrinsic* x) {
 343   LIR_Opr result_reg = rlock_result(x);
 344   __ getfp(result_reg);
 345 }
 346 
 347 void LIRGenerator::do_continuation_getSP(Intrinsic* x) {
 348   LIR_Address* cont_fastpath_addr = new LIR_Address(getThreadPointer(), in_bytes(JavaThread::cont_fastpath_offset()), T_INT);
 349   __ move(LIR_OprFact::intConst(1), cont_fastpath_addr);
 350   LIR_Opr result_reg = rlock_result(x);
 351   __ getsp(result_reg);
 352 }
 353 
 354 void LIRGenerator::do_continuation_getPC(Intrinsic* x) {
 355   BasicTypeList signature(0);
 356   //signature.append(T_LONG);
 357   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 358 
 359   const LIR_Opr result_reg = result_register_for(x->type());
 360   address entry = StubRoutines::cont_getPC();
 361   LIR_Opr result = rlock_result(x);
 362   __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 363   __ move(result_reg, result);
 364 }
 365 
 366 void LIRGenerator::do_continuation_doContinue(Intrinsic* x) {
 367   BasicTypeList signature(0);
 368   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 369 
 370   //const LIR_Opr result_reg = result_register_for(x->type());
 371   address entry = StubRoutines::cont_thaw();
 372   CodeEmitInfo* info = state_for(x, x->state());
 373   __ call_runtime(entry, getThreadTemp(), getThreadTemp(), cc->args(), info);
 374 }
 375 
 376 void LIRGenerator::do_continuation_doYield(Intrinsic* x) {
 377   BasicTypeList signature(1);
 378   signature.append(T_INT);
 379   CallingConvention* cc = frame_map()->java_calling_convention(&signature, true);
 380 
 381   // LIRItem value(x->argument_at(0), this);
 382   // value.load_item();
 383   // __ move(value.result(), cc->at(0)); // scopes
 384   __ move(LIR_OprFact::intConst(0), cc->at(0)); // from interpreter
 385 
 386   const LIR_Opr result_reg = result_register_for(x->type());
 387   address entry = StubRoutines::cont_doYield();
 388   LIR_Opr result = rlock_result(x);
 389   CodeEmitInfo* info = state_for(x, x->state());
 390   __ call_runtime(entry, LIR_OprFact::illegalOpr, result_reg, cc->args(), info);
 391   __ move(result_reg, result);
 392 }
 393 
 394 void LIRGenerator::do_continuation_jump(Intrinsic* x) {
 395   BasicTypeList signature(3);
 396   signature.append(T_LONG);
 397   signature.append(T_LONG);
 398   signature.append(T_LONG);
 399   CallingConvention* cc = frame_map()->java_calling_convention(&signature, true);
 400 
 401   LIRItem sp(x->argument_at(0), this);
 402   LIRItem fp(x->argument_at(1), this);
 403   LIRItem pc(x->argument_at(2), this);
 404 
 405   sp.load_item();
 406   __ move(sp.result(), cc->at(0));
 407   fp.load_item();
 408   __ move(fp.result(), cc->at(1));
 409   pc.load_item();
 410   __ move(pc.result(), cc->at(2));
 411 
 412   address entry = StubRoutines::cont_jump();
 413   __ call_runtime_leaf(entry, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, cc->args());
 414   // set_no_result(x);
 415 }
 416 
 417 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 418 //      _dadd, _dmul, _dsub, _ddiv, _drem
 419 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 420   LIRItem left(x->x(),  this);
 421   LIRItem right(x->y(), this);
 422   LIRItem* left_arg  = &left;
 423   LIRItem* right_arg = &right;
 424   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 425   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 426   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 427     left.load_item();
 428   } else {
 429     left.dont_load_item();
 430   }
 431 
 432   // do not load right operand if it is a constant.  only 0 and 1 are
 433   // loaded because there are special instructions for loading them
 434   // without memory access (not needed for SSE2 instructions)
 435   bool must_load_right = false;
 436   if (right.is_constant()) {
 437     LIR_Const* c = right.result()->as_constant_ptr();
 438     assert(c != NULL, "invalid constant");
 439     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 440 
 441     if (c->type() == T_FLOAT) {
 442       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 443     } else {
 444       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 445     }
 446   }
 447 
 448   if (must_load_both) {
 449     // frem and drem destroy also right operand, so move it to a new register
 450     right.set_destroys_register();
 451     right.load_item();
 452   } else if (right.is_register() || must_load_right) {
 453     right.load_item();
 454   } else {
 455     right.dont_load_item();
 456   }
 457   LIR_Opr reg = rlock(x);
 458   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 459   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 460     tmp = new_register(T_DOUBLE);
 461   }
 462 
 463   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 464     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 465     LIR_Opr fpu0, fpu1;
 466     if (x->op() == Bytecodes::_frem) {
 467       fpu0 = LIR_OprFact::single_fpu(0);
 468       fpu1 = LIR_OprFact::single_fpu(1);
 469     } else {
 470       fpu0 = LIR_OprFact::double_fpu(0);
 471       fpu1 = LIR_OprFact::double_fpu(1);
 472     }
 473     __ move(right.result(), fpu1); // order of left and right operand is important!
 474     __ move(left.result(), fpu0);
 475     __ rem (fpu0, fpu1, fpu0);
 476     __ move(fpu0, reg);
 477 
 478   } else {
 479     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 480   }
 481 
 482   set_result(x, round_item(reg));
 483 }
 484 
 485 
 486 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 487 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 488   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 489     // long division is implemented as a direct call into the runtime
 490     LIRItem left(x->x(), this);
 491     LIRItem right(x->y(), this);
 492 
 493     // the check for division by zero destroys the right operand
 494     right.set_destroys_register();
 495 
 496     BasicTypeList signature(2);
 497     signature.append(T_LONG);
 498     signature.append(T_LONG);
 499     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 500 
 501     // check for division by zero (destroys registers of right operand!)
 502     CodeEmitInfo* info = state_for(x);
 503 
 504     const LIR_Opr result_reg = result_register_for(x->type());
 505     left.load_item_force(cc->at(1));
 506     right.load_item();
 507 
 508     __ move(right.result(), cc->at(0));
 509 
 510     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 511     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 512 
 513     address entry = NULL;
 514     switch (x->op()) {
 515     case Bytecodes::_lrem:
 516       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 517       break; // check if dividend is 0 is done elsewhere
 518     case Bytecodes::_ldiv:
 519       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 520       break; // check if dividend is 0 is done elsewhere
 521     case Bytecodes::_lmul:
 522       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 523       break;
 524     default:
 525       ShouldNotReachHere();
 526     }
 527 
 528     LIR_Opr result = rlock_result(x);
 529     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 530     __ move(result_reg, result);
 531   } else if (x->op() == Bytecodes::_lmul) {
 532     // missing test if instr is commutative and if we should swap
 533     LIRItem left(x->x(), this);
 534     LIRItem right(x->y(), this);
 535 
 536     // right register is destroyed by the long mul, so it must be
 537     // copied to a new register.
 538     right.set_destroys_register();
 539 
 540     left.load_item();
 541     right.load_item();
 542 
 543     LIR_Opr reg = FrameMap::long0_opr;
 544     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 545     LIR_Opr result = rlock_result(x);
 546     __ move(reg, result);
 547   } else {
 548     // missing test if instr is commutative and if we should swap
 549     LIRItem left(x->x(), this);
 550     LIRItem right(x->y(), this);
 551 
 552     left.load_item();
 553     // don't load constants to save register
 554     right.load_nonconstant();
 555     rlock_result(x);
 556     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 557   }
 558 }
 559 
 560 
 561 
 562 // for: _iadd, _imul, _isub, _idiv, _irem
 563 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 564   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 565     // The requirements for division and modulo
 566     // input : rax,: dividend                         min_int
 567     //         reg: divisor   (may not be rax,/rdx)   -1
 568     //
 569     // output: rax,: quotient  (= rax, idiv reg)       min_int
 570     //         rdx: remainder (= rax, irem reg)       0
 571 
 572     // rax, and rdx will be destroyed
 573 
 574     // Note: does this invalidate the spec ???
 575     LIRItem right(x->y(), this);
 576     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 577 
 578     // call state_for before load_item_force because state_for may
 579     // force the evaluation of other instructions that are needed for
 580     // correct debug info.  Otherwise the live range of the fix
 581     // register might be too long.
 582     CodeEmitInfo* info = state_for(x);
 583 
 584     left.load_item_force(divInOpr());
 585 
 586     right.load_item();
 587 
 588     LIR_Opr result = rlock_result(x);
 589     LIR_Opr result_reg;
 590     if (x->op() == Bytecodes::_idiv) {
 591       result_reg = divOutOpr();
 592     } else {
 593       result_reg = remOutOpr();
 594     }
 595 
 596     if (!ImplicitDiv0Checks) {
 597       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 598       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 599       // Idiv/irem cannot trap (passing info would generate an assertion).
 600       info = NULL;
 601     }
 602     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 603     if (x->op() == Bytecodes::_irem) {
 604       __ irem(left.result(), right.result(), result_reg, tmp, info);
 605     } else if (x->op() == Bytecodes::_idiv) {
 606       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 607     } else {
 608       ShouldNotReachHere();
 609     }
 610 
 611     __ move(result_reg, result);
 612   } else {
 613     // missing test if instr is commutative and if we should swap
 614     LIRItem left(x->x(),  this);
 615     LIRItem right(x->y(), this);
 616     LIRItem* left_arg = &left;
 617     LIRItem* right_arg = &right;
 618     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 619       // swap them if left is real stack (or cached) and right is real register(not cached)
 620       left_arg = &right;
 621       right_arg = &left;
 622     }
 623 
 624     left_arg->load_item();
 625 
 626     // do not need to load right, as we can handle stack and constants
 627     if (x->op() == Bytecodes::_imul ) {
 628       // check if we can use shift instead
 629       bool use_constant = false;
 630       bool use_tmp = false;
 631       if (right_arg->is_constant()) {
 632         jint iconst = right_arg->get_jint_constant();
 633         if (iconst > 0 && iconst < max_jint) {
 634           if (is_power_of_2(iconst)) {
 635             use_constant = true;
 636           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 637             use_constant = true;
 638             use_tmp = true;
 639           }
 640         }
 641       }
 642       if (use_constant) {
 643         right_arg->dont_load_item();
 644       } else {
 645         right_arg->load_item();
 646       }
 647       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 648       if (use_tmp) {
 649         tmp = new_register(T_INT);
 650       }
 651       rlock_result(x);
 652 
 653       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 654     } else {
 655       right_arg->dont_load_item();
 656       rlock_result(x);
 657       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 658       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 659     }
 660   }
 661 }
 662 
 663 
 664 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 665   // when an operand with use count 1 is the left operand, then it is
 666   // likely that no move for 2-operand-LIR-form is necessary
 667   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 668     x->swap_operands();
 669   }
 670 
 671   ValueTag tag = x->type()->tag();
 672   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 673   switch (tag) {
 674     case floatTag:
 675     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 676     case longTag:    do_ArithmeticOp_Long(x); return;
 677     case intTag:     do_ArithmeticOp_Int(x);  return;
 678     default:         ShouldNotReachHere();    return;
 679   }
 680 }
 681 
 682 
 683 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 684 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 685   // count must always be in rcx
 686   LIRItem value(x->x(), this);
 687   LIRItem count(x->y(), this);
 688 
 689   ValueTag elemType = x->type()->tag();
 690   bool must_load_count = !count.is_constant() || elemType == longTag;
 691   if (must_load_count) {
 692     // count for long must be in register
 693     count.load_item_force(shiftCountOpr());
 694   } else {
 695     count.dont_load_item();
 696   }
 697   value.load_item();
 698   LIR_Opr reg = rlock_result(x);
 699 
 700   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 701 }
 702 
 703 
 704 // _iand, _land, _ior, _lor, _ixor, _lxor
 705 void LIRGenerator::do_LogicOp(LogicOp* x) {
 706   // when an operand with use count 1 is the left operand, then it is
 707   // likely that no move for 2-operand-LIR-form is necessary
 708   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 709     x->swap_operands();
 710   }
 711 
 712   LIRItem left(x->x(), this);
 713   LIRItem right(x->y(), this);
 714 
 715   left.load_item();
 716   right.load_nonconstant();
 717   LIR_Opr reg = rlock_result(x);
 718 
 719   logic_op(x->op(), reg, left.result(), right.result());
 720 }
 721 
 722 
 723 
 724 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 725 void LIRGenerator::do_CompareOp(CompareOp* x) {
 726   LIRItem left(x->x(), this);
 727   LIRItem right(x->y(), this);
 728   ValueTag tag = x->x()->type()->tag();
 729   if (tag == longTag) {
 730     left.set_destroys_register();
 731   }
 732   left.load_item();
 733   right.load_item();
 734   LIR_Opr reg = rlock_result(x);
 735 
 736   if (x->x()->type()->is_float_kind()) {
 737     Bytecodes::Code code = x->op();
 738     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 739   } else if (x->x()->type()->tag() == longTag) {
 740     __ lcmp2int(left.result(), right.result(), reg);
 741   } else {
 742     Unimplemented();
 743   }
 744 }
 745 
 746 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 747   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 748   if (type == T_OBJECT || type == T_ARRAY) {
 749     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 750     new_value.load_item();
 751     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 752   } else if (type == T_INT) {
 753     cmp_value.load_item_force(FrameMap::rax_opr);
 754     new_value.load_item();
 755     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 756   } else if (type == T_LONG) {
 757     cmp_value.load_item_force(FrameMap::long0_opr);
 758     new_value.load_item_force(FrameMap::long1_opr);
 759     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 760   } else {
 761     Unimplemented();
 762   }
 763   LIR_Opr result = new_register(T_INT);
 764   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 765            result, T_INT);
 766   return result;
 767 }
 768 
 769 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 770   bool is_oop = type == T_OBJECT || type == T_ARRAY;
 771   LIR_Opr result = new_register(type);
 772   value.load_item();
 773   // Because we want a 2-arg form of xchg and xadd
 774   __ move(value.result(), result);
 775   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 776   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 777   return result;
 778 }
 779 
 780 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 781   LIR_Opr result = new_register(type);
 782   value.load_item();
 783   // Because we want a 2-arg form of xchg and xadd
 784   __ move(value.result(), result);
 785   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 786   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 787   return result;
 788 }
 789 
 790 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 791   assert(x->number_of_arguments() == 3, "wrong type");
 792   assert(UseFMA, "Needs FMA instructions support.");
 793   LIRItem value(x->argument_at(0), this);
 794   LIRItem value1(x->argument_at(1), this);
 795   LIRItem value2(x->argument_at(2), this);
 796 
 797   value2.set_destroys_register();
 798 
 799   value.load_item();
 800   value1.load_item();
 801   value2.load_item();
 802 
 803   LIR_Opr calc_input = value.result();
 804   LIR_Opr calc_input1 = value1.result();
 805   LIR_Opr calc_input2 = value2.result();
 806   LIR_Opr calc_result = rlock_result(x);
 807 
 808   switch (x->id()) {
 809   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 810   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 811   default:                    ShouldNotReachHere();
 812   }
 813 
 814 }
 815 
 816 
 817 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 818   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 819 
 820   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 821       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 822       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 823       x->id() == vmIntrinsics::_dlog10) {
 824     do_LibmIntrinsic(x);
 825     return;
 826   }
 827 
 828   LIRItem value(x->argument_at(0), this);
 829 
 830   bool use_fpu = false;
 831   if (UseSSE < 2) {
 832     value.set_destroys_register();
 833   }
 834   value.load_item();
 835 
 836   LIR_Opr calc_input = value.result();
 837   LIR_Opr calc_result = rlock_result(x);
 838 
 839   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 840 #ifdef _LP64
 841   if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
 842       (x->id() == vmIntrinsics::_dabs)) {
 843     tmp = new_register(T_DOUBLE);
 844     __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 845   }
 846 #endif
 847 
 848   switch(x->id()) {
 849     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, tmp); break;
 850     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 851     default:                    ShouldNotReachHere();
 852   }
 853 
 854   if (use_fpu) {
 855     __ move(calc_result, x->operand());
 856   }
 857 }
 858 
 859 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 860   LIRItem value(x->argument_at(0), this);
 861   value.set_destroys_register();
 862 
 863   LIR_Opr calc_result = rlock_result(x);
 864   LIR_Opr result_reg = result_register_for(x->type());
 865 
 866   CallingConvention* cc = NULL;
 867 
 868   if (x->id() == vmIntrinsics::_dpow) {
 869     LIRItem value1(x->argument_at(1), this);
 870 
 871     value1.set_destroys_register();
 872 
 873     BasicTypeList signature(2);
 874     signature.append(T_DOUBLE);
 875     signature.append(T_DOUBLE);
 876     cc = frame_map()->c_calling_convention(&signature);
 877     value.load_item_force(cc->at(0));
 878     value1.load_item_force(cc->at(1));
 879   } else {
 880     BasicTypeList signature(1);
 881     signature.append(T_DOUBLE);
 882     cc = frame_map()->c_calling_convention(&signature);
 883     value.load_item_force(cc->at(0));
 884   }
 885 
 886 #ifndef _LP64
 887   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 888   result_reg = tmp;
 889   switch(x->id()) {
 890     case vmIntrinsics::_dexp:
 891       if (StubRoutines::dexp() != NULL) {
 892         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 893       } else {
 894         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 895       }
 896       break;
 897     case vmIntrinsics::_dlog:
 898       if (StubRoutines::dlog() != NULL) {
 899         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 900       } else {
 901         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 902       }
 903       break;
 904     case vmIntrinsics::_dlog10:
 905       if (StubRoutines::dlog10() != NULL) {
 906        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 907       } else {
 908         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 909       }
 910       break;
 911     case vmIntrinsics::_dpow:
 912       if (StubRoutines::dpow() != NULL) {
 913         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 914       } else {
 915         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 916       }
 917       break;
 918     case vmIntrinsics::_dsin:
 919       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 920         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 921       } else {
 922         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 923       }
 924       break;
 925     case vmIntrinsics::_dcos:
 926       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 927         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 928       } else {
 929         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 930       }
 931       break;
 932     case vmIntrinsics::_dtan:
 933       if (StubRoutines::dtan() != NULL) {
 934         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 935       } else {
 936         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 937       }
 938       break;
 939     default:  ShouldNotReachHere();
 940   }
 941 #else
 942   switch (x->id()) {
 943     case vmIntrinsics::_dexp:
 944       if (StubRoutines::dexp() != NULL) {
 945         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 946       } else {
 947         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 948       }
 949       break;
 950     case vmIntrinsics::_dlog:
 951       if (StubRoutines::dlog() != NULL) {
 952       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 953       } else {
 954         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 955       }
 956       break;
 957     case vmIntrinsics::_dlog10:
 958       if (StubRoutines::dlog10() != NULL) {
 959       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 960       } else {
 961         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 962       }
 963       break;
 964     case vmIntrinsics::_dpow:
 965        if (StubRoutines::dpow() != NULL) {
 966       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 967       } else {
 968         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 969       }
 970       break;
 971     case vmIntrinsics::_dsin:
 972       if (StubRoutines::dsin() != NULL) {
 973         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 974       } else {
 975         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 976       }
 977       break;
 978     case vmIntrinsics::_dcos:
 979       if (StubRoutines::dcos() != NULL) {
 980         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 981       } else {
 982         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 983       }
 984       break;
 985     case vmIntrinsics::_dtan:
 986        if (StubRoutines::dtan() != NULL) {
 987       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 988       } else {
 989         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 990       }
 991       break;
 992     default:  ShouldNotReachHere();
 993   }
 994 #endif // _LP64
 995   __ move(result_reg, calc_result);
 996 }
 997 
 998 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 999   assert(x->number_of_arguments() == 5, "wrong type");
1000 
1001   // Make all state_for calls early since they can emit code
1002   CodeEmitInfo* info = state_for(x, x->state());
1003 
1004   LIRItem src(x->argument_at(0), this);
1005   LIRItem src_pos(x->argument_at(1), this);
1006   LIRItem dst(x->argument_at(2), this);
1007   LIRItem dst_pos(x->argument_at(3), this);
1008   LIRItem length(x->argument_at(4), this);
1009 
1010   // operands for arraycopy must use fixed registers, otherwise
1011   // LinearScan will fail allocation (because arraycopy always needs a
1012   // call)
1013 
1014 #ifndef _LP64
1015   src.load_item_force     (FrameMap::rcx_oop_opr);
1016   src_pos.load_item_force (FrameMap::rdx_opr);
1017   dst.load_item_force     (FrameMap::rax_oop_opr);
1018   dst_pos.load_item_force (FrameMap::rbx_opr);
1019   length.load_item_force  (FrameMap::rdi_opr);
1020   LIR_Opr tmp =           (FrameMap::rsi_opr);
1021 #else
1022 
1023   // The java calling convention will give us enough registers
1024   // so that on the stub side the args will be perfect already.
1025   // On the other slow/special case side we call C and the arg
1026   // positions are not similar enough to pick one as the best.
1027   // Also because the java calling convention is a "shifted" version
1028   // of the C convention we can process the java args trivially into C
1029   // args without worry of overwriting during the xfer
1030 
1031   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
1032   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1033   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
1034   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1035   length.load_item_force  (FrameMap::as_opr(j_rarg4));
1036 
1037   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
1038 #endif // LP64
1039 
1040   set_no_result(x);
1041 
1042   int flags;
1043   ciArrayKlass* expected_type;
1044   arraycopy_helper(x, &flags, &expected_type);
1045 
1046   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1047 }
1048 
1049 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1050   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1051   // Make all state_for calls early since they can emit code
1052   LIR_Opr result = rlock_result(x);
1053   int flags = 0;
1054   switch (x->id()) {
1055     case vmIntrinsics::_updateCRC32: {
1056       LIRItem crc(x->argument_at(0), this);
1057       LIRItem val(x->argument_at(1), this);
1058       // val is destroyed by update_crc32
1059       val.set_destroys_register();
1060       crc.load_item();
1061       val.load_item();
1062       __ update_crc32(crc.result(), val.result(), result);
1063       break;
1064     }
1065     case vmIntrinsics::_updateBytesCRC32:
1066     case vmIntrinsics::_updateByteBufferCRC32: {
1067       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1068 
1069       LIRItem crc(x->argument_at(0), this);
1070       LIRItem buf(x->argument_at(1), this);
1071       LIRItem off(x->argument_at(2), this);
1072       LIRItem len(x->argument_at(3), this);
1073       buf.load_item();
1074       off.load_nonconstant();
1075 
1076       LIR_Opr index = off.result();
1077       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1078       if(off.result()->is_constant()) {
1079         index = LIR_OprFact::illegalOpr;
1080        offset += off.result()->as_jint();
1081       }
1082       LIR_Opr base_op = buf.result();
1083 
1084 #ifndef _LP64
1085       if (!is_updateBytes) { // long b raw address
1086          base_op = new_register(T_INT);
1087          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1088       }
1089 #else
1090       if (index->is_valid()) {
1091         LIR_Opr tmp = new_register(T_LONG);
1092         __ convert(Bytecodes::_i2l, index, tmp);
1093         index = tmp;
1094       }
1095 #endif
1096 
1097       if (is_updateBytes) {
1098         base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
1099       }
1100 
1101       LIR_Address* a = new LIR_Address(base_op,
1102                                        index,
1103                                        offset,
1104                                        T_BYTE);
1105       BasicTypeList signature(3);
1106       signature.append(T_INT);
1107       signature.append(T_ADDRESS);
1108       signature.append(T_INT);
1109       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1110       const LIR_Opr result_reg = result_register_for(x->type());
1111 
1112       LIR_Opr addr = new_pointer_register();
1113       __ leal(LIR_OprFact::address(a), addr);
1114 
1115       crc.load_item_force(cc->at(0));
1116       __ move(addr, cc->at(1));
1117       len.load_item_force(cc->at(2));
1118 
1119       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1120       __ move(result_reg, result);
1121 
1122       break;
1123     }
1124     default: {
1125       ShouldNotReachHere();
1126     }
1127   }
1128 }
1129 
1130 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1131   Unimplemented();
1132 }
1133 
1134 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1135   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1136 
1137   // Make all state_for calls early since they can emit code
1138   LIR_Opr result = rlock_result(x);
1139 
1140   LIRItem a(x->argument_at(0), this); // Object
1141   LIRItem aOffset(x->argument_at(1), this); // long
1142   LIRItem b(x->argument_at(2), this); // Object
1143   LIRItem bOffset(x->argument_at(3), this); // long
1144   LIRItem length(x->argument_at(4), this); // int
1145   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1146 
1147   a.load_item();
1148   aOffset.load_nonconstant();
1149   b.load_item();
1150   bOffset.load_nonconstant();
1151 
1152   long constant_aOffset = 0;
1153   LIR_Opr result_aOffset = aOffset.result();
1154   if (result_aOffset->is_constant()) {
1155     constant_aOffset = result_aOffset->as_jlong();
1156     result_aOffset = LIR_OprFact::illegalOpr;
1157   }
1158   LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
1159 
1160   long constant_bOffset = 0;
1161   LIR_Opr result_bOffset = bOffset.result();
1162   if (result_bOffset->is_constant()) {
1163     constant_bOffset = result_bOffset->as_jlong();
1164     result_bOffset = LIR_OprFact::illegalOpr;
1165   }
1166   LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
1167 
1168 #ifndef _LP64
1169   result_a = new_register(T_INT);
1170   __ convert(Bytecodes::_l2i, a.result(), result_a);
1171   result_b = new_register(T_INT);
1172   __ convert(Bytecodes::_l2i, b.result(), result_b);
1173 #endif
1174 
1175 
1176   LIR_Address* addr_a = new LIR_Address(result_a,
1177                                         result_aOffset,
1178                                         constant_aOffset,
1179                                         T_BYTE);
1180 
1181   LIR_Address* addr_b = new LIR_Address(result_b,
1182                                         result_bOffset,
1183                                         constant_bOffset,
1184                                         T_BYTE);
1185 
1186   BasicTypeList signature(4);
1187   signature.append(T_ADDRESS);
1188   signature.append(T_ADDRESS);
1189   signature.append(T_INT);
1190   signature.append(T_INT);
1191   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1192   const LIR_Opr result_reg = result_register_for(x->type());
1193 
1194   LIR_Opr ptr_addr_a = new_pointer_register();
1195   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1196 
1197   LIR_Opr ptr_addr_b = new_pointer_register();
1198   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1199 
1200   __ move(ptr_addr_a, cc->at(0));
1201   __ move(ptr_addr_b, cc->at(1));
1202   length.load_item_force(cc->at(2));
1203   log2ArrayIndexScale.load_item_force(cc->at(3));
1204 
1205   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1206   __ move(result_reg, result);
1207 }
1208 
1209 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1210 // _i2b, _i2c, _i2s
1211 LIR_Opr fixed_register_for(BasicType type) {
1212   switch (type) {
1213     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1214     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1215     case T_INT:    return FrameMap::rax_opr;
1216     case T_LONG:   return FrameMap::long0_opr;
1217     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1218   }
1219 }
1220 
1221 void LIRGenerator::do_Convert(Convert* x) {
1222   // flags that vary for the different operations and different SSE-settings
1223   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1224 
1225   switch (x->op()) {
1226     case Bytecodes::_i2l: // fall through
1227     case Bytecodes::_l2i: // fall through
1228     case Bytecodes::_i2b: // fall through
1229     case Bytecodes::_i2c: // fall through
1230     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1231 
1232     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1233     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1234     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1235     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1236     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1237     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1238     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1239     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1240     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1241     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1242     default: ShouldNotReachHere();
1243   }
1244 
1245   LIRItem value(x->value(), this);
1246   value.load_item();
1247   LIR_Opr input = value.result();
1248   LIR_Opr result = rlock(x);
1249 
1250   // arguments of lir_convert
1251   LIR_Opr conv_input = input;
1252   LIR_Opr conv_result = result;
1253   ConversionStub* stub = NULL;
1254 
1255   if (fixed_input) {
1256     conv_input = fixed_register_for(input->type());
1257     __ move(input, conv_input);
1258   }
1259 
1260   assert(fixed_result == false || round_result == false, "cannot set both");
1261   if (fixed_result) {
1262     conv_result = fixed_register_for(result->type());
1263   } else if (round_result) {
1264     result = new_register(result->type());
1265     set_vreg_flag(result, must_start_in_memory);
1266   }
1267 
1268   if (needs_stub) {
1269     stub = new ConversionStub(x->op(), conv_input, conv_result);
1270   }
1271 
1272   __ convert(x->op(), conv_input, conv_result, stub);
1273 
1274   if (result != conv_result) {
1275     __ move(conv_result, result);
1276   }
1277 
1278   assert(result->is_virtual(), "result must be virtual register");
1279   set_result(x, result);
1280 }
1281 
1282 
1283 void LIRGenerator::do_NewInstance(NewInstance* x) {
1284   print_if_not_loaded(x);
1285 
1286   CodeEmitInfo* info = state_for(x, x->state());
1287   LIR_Opr reg = result_register_for(x->type());
1288   new_instance(reg, x->klass(), x->is_unresolved(),
1289                        FrameMap::rcx_oop_opr,
1290                        FrameMap::rdi_oop_opr,
1291                        FrameMap::rsi_oop_opr,
1292                        LIR_OprFact::illegalOpr,
1293                        FrameMap::rdx_metadata_opr, info);
1294   LIR_Opr result = rlock_result(x);
1295   __ move(reg, result);
1296 }
1297 
1298 
1299 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1300   CodeEmitInfo* info = state_for(x, x->state());
1301 
1302   LIRItem length(x->length(), this);
1303   length.load_item_force(FrameMap::rbx_opr);
1304 
1305   LIR_Opr reg = result_register_for(x->type());
1306   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1307   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1308   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1309   LIR_Opr tmp4 = reg;
1310   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1311   LIR_Opr len = length.result();
1312   BasicType elem_type = x->elt_type();
1313 
1314   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1315 
1316   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1317   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1318 
1319   LIR_Opr result = rlock_result(x);
1320   __ move(reg, result);
1321 }
1322 
1323 
1324 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1325   LIRItem length(x->length(), this);
1326   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1327   // and therefore provide the state before the parameters have been consumed
1328   CodeEmitInfo* patching_info = NULL;
1329   if (!x->klass()->is_loaded() || PatchALot) {
1330     patching_info =  state_for(x, x->state_before());
1331   }
1332 
1333   CodeEmitInfo* info = state_for(x, x->state());
1334 
1335   const LIR_Opr reg = result_register_for(x->type());
1336   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1337   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1338   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1339   LIR_Opr tmp4 = reg;
1340   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1341 
1342   length.load_item_force(FrameMap::rbx_opr);
1343   LIR_Opr len = length.result();
1344 
1345   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1346   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1347   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1348     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1349   }
1350   klass2reg_with_patching(klass_reg, obj, patching_info);
1351   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1352 
1353   LIR_Opr result = rlock_result(x);
1354   __ move(reg, result);
1355 }
1356 
1357 
1358 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1359   Values* dims = x->dims();
1360   int i = dims->length();
1361   LIRItemList* items = new LIRItemList(i, i, NULL);
1362   while (i-- > 0) {
1363     LIRItem* size = new LIRItem(dims->at(i), this);
1364     items->at_put(i, size);
1365   }
1366 
1367   // Evaluate state_for early since it may emit code.
1368   CodeEmitInfo* patching_info = NULL;
1369   if (!x->klass()->is_loaded() || PatchALot) {
1370     patching_info = state_for(x, x->state_before());
1371 
1372     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1373     // clone all handlers (NOTE: Usually this is handled transparently
1374     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1375     // is done explicitly here because a stub isn't being used).
1376     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1377   }
1378   CodeEmitInfo* info = state_for(x, x->state());
1379 
1380   i = dims->length();
1381   while (i-- > 0) {
1382     LIRItem* size = items->at(i);
1383     size->load_nonconstant();
1384 
1385     store_stack_parameter(size->result(), in_ByteSize(i*4));
1386   }
1387 
1388   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1389   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1390 
1391   LIR_Opr rank = FrameMap::rbx_opr;
1392   __ move(LIR_OprFact::intConst(x->rank()), rank);
1393   LIR_Opr varargs = FrameMap::rcx_opr;
1394   __ move(FrameMap::rsp_opr, varargs);
1395   LIR_OprList* args = new LIR_OprList(3);
1396   args->append(klass_reg);
1397   args->append(rank);
1398   args->append(varargs);
1399   LIR_Opr reg = result_register_for(x->type());
1400   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1401                   LIR_OprFact::illegalOpr,
1402                   reg, args, info);
1403 
1404   LIR_Opr result = rlock_result(x);
1405   __ move(reg, result);
1406 }
1407 
1408 
1409 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1410   // nothing to do for now
1411 }
1412 
1413 
1414 void LIRGenerator::do_CheckCast(CheckCast* x) {
1415   LIRItem obj(x->obj(), this);
1416 
1417   CodeEmitInfo* patching_info = NULL;
1418   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1419     // must do this before locking the destination register as an oop register,
1420     // and before the obj is loaded (the latter is for deoptimization)
1421     patching_info = state_for(x, x->state_before());
1422   }
1423   obj.load_item();
1424 
1425   // info for exceptions
1426   CodeEmitInfo* info_for_exception =
1427       (x->needs_exception_state() ? state_for(x) :
1428                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1429 
1430   CodeStub* stub;
1431   if (x->is_incompatible_class_change_check()) {
1432     assert(patching_info == NULL, "can't patch this");
1433     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1434   } else if (x->is_invokespecial_receiver_check()) {
1435     assert(patching_info == NULL, "can't patch this");
1436     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1437   } else {
1438     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1439   }
1440   LIR_Opr reg = rlock_result(x);
1441   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1442   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1443     tmp3 = new_register(objectType);
1444   }
1445   __ checkcast(reg, obj.result(), x->klass(),
1446                new_register(objectType), new_register(objectType), tmp3,
1447                x->direct_compare(), info_for_exception, patching_info, stub,
1448                x->profiled_method(), x->profiled_bci());
1449 }
1450 
1451 
1452 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1453   LIRItem obj(x->obj(), this);
1454 
1455   // result and test object may not be in same register
1456   LIR_Opr reg = rlock_result(x);
1457   CodeEmitInfo* patching_info = NULL;
1458   if ((!x->klass()->is_loaded() || PatchALot)) {
1459     // must do this before locking the destination register as an oop register
1460     patching_info = state_for(x, x->state_before());
1461   }
1462   obj.load_item();
1463   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1464   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1465     tmp3 = new_register(objectType);
1466   }
1467   __ instanceof(reg, obj.result(), x->klass(),
1468                 new_register(objectType), new_register(objectType), tmp3,
1469                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1470 }
1471 
1472 
1473 void LIRGenerator::do_If(If* x) {
1474   assert(x->number_of_sux() == 2, "inconsistency");
1475   ValueTag tag = x->x()->type()->tag();
1476   bool is_safepoint = x->is_safepoint();
1477 
1478   If::Condition cond = x->cond();
1479 
1480   LIRItem xitem(x->x(), this);
1481   LIRItem yitem(x->y(), this);
1482   LIRItem* xin = &xitem;
1483   LIRItem* yin = &yitem;
1484 
1485   if (tag == longTag) {
1486     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1487     // mirror for other conditions
1488     if (cond == If::gtr || cond == If::leq) {
1489       cond = Instruction::mirror(cond);
1490       xin = &yitem;
1491       yin = &xitem;
1492     }
1493     xin->set_destroys_register();
1494   }
1495   xin->load_item();
1496   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1497     // inline long zero
1498     yin->dont_load_item();
1499   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1500     // longs cannot handle constants at right side
1501     yin->load_item();
1502   } else {
1503     yin->dont_load_item();
1504   }
1505 
1506   LIR_Opr left = xin->result();
1507   LIR_Opr right = yin->result();
1508 
1509   set_no_result(x);
1510 
1511   // add safepoint before generating condition code so it can be recomputed
1512   if (x->is_safepoint()) {
1513     // increment backedge counter if needed
1514     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1515         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1516     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1517   }
1518 
1519   __ cmp(lir_cond(cond), left, right);
1520   // Generate branch profiling. Profiling code doesn't kill flags.
1521   profile_branch(x, cond);
1522   move_to_phi(x->state());
1523   if (x->x()->type()->is_float_kind()) {
1524     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1525   } else {
1526     __ branch(lir_cond(cond), right->type(), x->tsux());
1527   }
1528   assert(x->default_sux() == x->fsux(), "wrong destination above");
1529   __ jump(x->default_sux());
1530 }
1531 
1532 
1533 LIR_Opr LIRGenerator::getThreadPointer() {
1534 #ifdef _LP64
1535   return FrameMap::as_pointer_opr(r15_thread);
1536 #else
1537   LIR_Opr result = new_register(T_INT);
1538   __ get_thread(result);
1539   return result;
1540 #endif //
1541 }
1542 
1543 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1544   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1545   LIR_OprList* args = new LIR_OprList();
1546   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1547   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1548 }
1549 
1550 
1551 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1552                                         CodeEmitInfo* info) {
1553   if (address->type() == T_LONG) {
1554     address = new LIR_Address(address->base(),
1555                               address->index(), address->scale(),
1556                               address->disp(), T_DOUBLE);
1557     // Transfer the value atomically by using FP moves.  This means
1558     // the value has to be moved between CPU and FPU registers.  It
1559     // always has to be moved through spill slot since there's no
1560     // quick way to pack the value into an SSE register.
1561     LIR_Opr temp_double = new_register(T_DOUBLE);
1562     LIR_Opr spill = new_register(T_LONG);
1563     set_vreg_flag(spill, must_start_in_memory);
1564     __ move(value, spill);
1565     __ volatile_move(spill, temp_double, T_LONG);
1566     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1567   } else {
1568     __ store(value, address, info);
1569   }
1570 }
1571 
1572 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1573                                        CodeEmitInfo* info) {
1574   if (address->type() == T_LONG) {
1575     address = new LIR_Address(address->base(),
1576                               address->index(), address->scale(),
1577                               address->disp(), T_DOUBLE);
1578     // Transfer the value atomically by using FP moves.  This means
1579     // the value has to be moved between CPU and FPU registers.  In
1580     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1581     // SSE2+ mode it can be moved directly.
1582     LIR_Opr temp_double = new_register(T_DOUBLE);
1583     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1584     __ volatile_move(temp_double, result, T_LONG);
1585     if (UseSSE < 2) {
1586       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1587       set_vreg_flag(result, must_start_in_memory);
1588     }
1589   } else {
1590     __ load(address, result, info);
1591   }
1592 }