< prev index next >

src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp

Print this page




 322   LIR_Opr reg = rlock(x);
 323 
 324   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 325 #ifdef _LP64
 326   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
 327     if (x->type()->tag() == doubleTag) {
 328       tmp = new_register(T_DOUBLE);
 329       __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 330     }
 331     else if (x->type()->tag() == floatTag) {
 332       tmp = new_register(T_FLOAT);
 333       __ move(LIR_OprFact::floatConst(-0.0), tmp);
 334     }
 335   }
 336 #endif
 337   __ negate(value.result(), reg, tmp);
 338 
 339   set_result(x, round_item(reg));
 340 }
 341 










































































 342 
 343 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 344 //      _dadd, _dmul, _dsub, _ddiv, _drem
 345 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 346   LIRItem left(x->x(),  this);
 347   LIRItem right(x->y(), this);
 348   LIRItem* left_arg  = &left;
 349   LIRItem* right_arg = &right;
 350   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 351   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 352   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 353     left.load_item();
 354   } else {
 355     left.dont_load_item();
 356   }
 357 
 358   // do not load right operand if it is a constant.  only 0 and 1 are
 359   // loaded because there are special instructions for loading them
 360   // without memory access (not needed for SSE2 instructions)
 361   bool must_load_right = false;




 322   LIR_Opr reg = rlock(x);
 323 
 324   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 325 #ifdef _LP64
 326   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
 327     if (x->type()->tag() == doubleTag) {
 328       tmp = new_register(T_DOUBLE);
 329       __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 330     }
 331     else if (x->type()->tag() == floatTag) {
 332       tmp = new_register(T_FLOAT);
 333       __ move(LIR_OprFact::floatConst(-0.0), tmp);
 334     }
 335   }
 336 #endif
 337   __ negate(value.result(), reg, tmp);
 338 
 339   set_result(x, round_item(reg));
 340 }
 341 
 342 void LIRGenerator::do_continuation_getFP(Intrinsic* x) {
 343   LIR_Opr result_reg = rlock_result(x);
 344   __ getfp(result_reg);
 345 }
 346 
 347 void LIRGenerator::do_continuation_getSP(Intrinsic* x) {
 348   LIR_Address* cont_fastpath_addr = new LIR_Address(getThreadPointer(), in_bytes(JavaThread::cont_fastpath_offset()), T_INT);
 349   __ move(LIR_OprFact::intConst(1), cont_fastpath_addr);
 350   LIR_Opr result_reg = rlock_result(x);
 351   __ getsp(result_reg);
 352 }
 353 
 354 void LIRGenerator::do_continuation_getPC(Intrinsic* x) {
 355   BasicTypeList signature(0);
 356   //signature.append(T_LONG);
 357   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 358 
 359   const LIR_Opr result_reg = result_register_for(x->type());
 360   address entry = StubRoutines::cont_getPC();
 361   LIR_Opr result = rlock_result(x);
 362   __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 363   __ move(result_reg, result);
 364 }
 365 
 366 void LIRGenerator::do_continuation_doContinue(Intrinsic* x) {
 367   BasicTypeList signature(0);
 368   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 369 
 370   //const LIR_Opr result_reg = result_register_for(x->type());
 371   address entry = StubRoutines::cont_thaw();
 372   CodeEmitInfo* info = state_for(x, x->state());
 373   __ call_runtime(entry, getThreadTemp(), getThreadTemp(), cc->args(), info);
 374 }
 375 
 376 void LIRGenerator::do_continuation_doYield(Intrinsic* x) {
 377   BasicTypeList signature(1);
 378   signature.append(T_INT);
 379   CallingConvention* cc = frame_map()->java_calling_convention(&signature, true);
 380 
 381   // LIRItem value(x->argument_at(0), this);
 382   // value.load_item();
 383   // __ move(value.result(), cc->at(0)); // scopes
 384   __ move(LIR_OprFact::intConst(0), cc->at(0)); // from interpreter
 385 
 386   const LIR_Opr result_reg = result_register_for(x->type());
 387   address entry = StubRoutines::cont_doYield();
 388   LIR_Opr result = rlock_result(x);
 389   CodeEmitInfo* info = state_for(x, x->state());
 390   __ call_runtime(entry, LIR_OprFact::illegalOpr, result_reg, cc->args(), info);
 391   __ move(result_reg, result);
 392 }
 393 
 394 void LIRGenerator::do_continuation_jump(Intrinsic* x) {
 395   BasicTypeList signature(3);
 396   signature.append(T_LONG);
 397   signature.append(T_LONG);
 398   signature.append(T_LONG);
 399   CallingConvention* cc = frame_map()->java_calling_convention(&signature, true);
 400 
 401   LIRItem sp(x->argument_at(0), this);
 402   LIRItem fp(x->argument_at(1), this);
 403   LIRItem pc(x->argument_at(2), this);
 404 
 405   sp.load_item();
 406   __ move(sp.result(), cc->at(0));
 407   fp.load_item();
 408   __ move(fp.result(), cc->at(1));
 409   pc.load_item();
 410   __ move(pc.result(), cc->at(2));
 411 
 412   address entry = StubRoutines::cont_jump();
 413   __ call_runtime_leaf(entry, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, cc->args());
 414   // set_no_result(x);
 415 }
 416 
 417 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 418 //      _dadd, _dmul, _dsub, _ddiv, _drem
 419 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 420   LIRItem left(x->x(),  this);
 421   LIRItem right(x->y(), this);
 422   LIRItem* left_arg  = &left;
 423   LIRItem* right_arg = &right;
 424   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 425   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 426   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 427     left.load_item();
 428   } else {
 429     left.dont_load_item();
 430   }
 431 
 432   // do not load right operand if it is a constant.  only 0 and 1 are
 433   // loaded because there are special instructions for loading them
 434   // without memory access (not needed for SSE2 instructions)
 435   bool must_load_right = false;


< prev index next >