1 /*
   2  * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/assembler.hpp"
  27 #include "c1/c1_Defs.hpp"
  28 #include "c1/c1_MacroAssembler.hpp"
  29 #include "c1/c1_Runtime1.hpp"
  30 #include "ci/ciUtilities.hpp"
  31 #include "compiler/oopMap.hpp"
  32 #include "gc/shared/cardTable.hpp"
  33 #include "gc/shared/cardTableBarrierSet.hpp"
  34 #include "gc/shared/collectedHeap.hpp"
  35 #include "gc/shared/tlab_globals.hpp"
  36 #include "interpreter/interpreter.hpp"
  37 #include "memory/universe.hpp"
  38 #include "nativeInst_x86.hpp"
  39 #include "oops/compiledICHolder.hpp"
  40 #include "oops/oop.inline.hpp"
  41 #include "prims/jvmtiExport.hpp"
  42 #include "register_x86.hpp"
  43 #include "runtime/sharedRuntime.hpp"
  44 #include "runtime/signature.hpp"
  45 #include "runtime/stubRoutines.hpp"
  46 #include "runtime/vframeArray.hpp"
  47 #include "utilities/macros.hpp"
  48 #include "vmreg_x86.inline.hpp"
  49 
  50 // Implementation of StubAssembler
  51 
  52 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
  53   // setup registers
  54   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
  55   assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
  56   assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
  57   assert(args_size >= 0, "illegal args_size");
  58   bool align_stack = false;
  59 #ifdef _LP64
  60   // At a method handle call, the stack may not be properly aligned
  61   // when returning with an exception.
  62   align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
  63 #endif
  64 
  65 #ifdef _LP64
  66   mov(c_rarg0, thread);
  67   set_num_rt_args(0); // Nothing on stack
  68 #else
  69   set_num_rt_args(1 + args_size);
  70 
  71   // push java thread (becomes first argument of C function)
  72   get_thread(thread);
  73   push(thread);
  74 #endif // _LP64
  75 
  76   int call_offset = -1;
  77   if (!align_stack) {
  78     set_last_Java_frame(thread, noreg, rbp, NULL);
  79   } else {
  80     address the_pc = pc();
  81     call_offset = offset();
  82     set_last_Java_frame(thread, noreg, rbp, the_pc);
  83     andptr(rsp, -(StackAlignmentInBytes));    // Align stack
  84   }
  85 
  86   // do the call
  87   call(RuntimeAddress(entry));
  88   if (!align_stack) {
  89     call_offset = offset();
  90   }
  91   oopmap_metadata(NULL);
  92 
  93   // verify callee-saved register
  94 #ifdef ASSERT
  95   guarantee(thread != rax, "change this code");
  96   push(rax);
  97   { Label L;
  98     get_thread(rax);
  99     cmpptr(thread, rax);
 100     jcc(Assembler::equal, L);
 101     int3();
 102     stop("StubAssembler::call_RT: rdi not callee saved?");
 103     bind(L);
 104   }
 105   pop(rax);
 106 #endif
 107   reset_last_Java_frame(thread, true);
 108 
 109   // discard thread and arguments
 110   NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
 111 
 112   // check for pending exceptions
 113   { Label L;
 114     cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
 115     jcc(Assembler::equal, L);
 116     // exception pending => remove activation and forward to exception handler
 117     movptr(rax, Address(thread, Thread::pending_exception_offset()));
 118     // make sure that the vm_results are cleared
 119     if (oop_result1->is_valid()) {
 120       movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
 121     }
 122     if (metadata_result->is_valid()) {
 123       movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 124     }
 125     if (frame_size() == no_frame_size) {
 126       leave();
 127       jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
 128     } else if (_stub_id == Runtime1::forward_exception_id) {
 129       should_not_reach_here();
 130     } else {
 131       jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 132     }
 133     bind(L);
 134   }
 135   // get oop results if there are any and reset the values in the thread
 136   if (oop_result1->is_valid()) {
 137     get_vm_result(oop_result1, thread);
 138   }
 139   if (metadata_result->is_valid()) {
 140     get_vm_result_2(metadata_result, thread);
 141   }
 142 
 143   assert(call_offset >= 0, "Should be set");
 144   return call_offset;
 145 }
 146 
 147 
 148 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
 149 #ifdef _LP64
 150   mov(c_rarg1, arg1);
 151 #else
 152   push(arg1);
 153 #endif // _LP64
 154   return call_RT(oop_result1, metadata_result, entry, 1);
 155 }
 156 
 157 
 158 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
 159 #ifdef _LP64
 160   if (c_rarg1 == arg2) {
 161     if (c_rarg2 == arg1) {
 162       xchgq(arg1, arg2);
 163     } else {
 164       mov(c_rarg2, arg2);
 165       mov(c_rarg1, arg1);
 166     }
 167   } else {
 168     mov(c_rarg1, arg1);
 169     mov(c_rarg2, arg2);
 170   }
 171 #else
 172   push(arg2);
 173   push(arg1);
 174 #endif // _LP64
 175   return call_RT(oop_result1, metadata_result, entry, 2);
 176 }
 177 
 178 
 179 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
 180 #ifdef _LP64
 181   // if there is any conflict use the stack
 182   if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
 183       arg2 == c_rarg1 || arg2 == c_rarg3 ||
 184       arg3 == c_rarg1 || arg3 == c_rarg2) {
 185     push(arg3);
 186     push(arg2);
 187     push(arg1);
 188     pop(c_rarg1);
 189     pop(c_rarg2);
 190     pop(c_rarg3);
 191   } else {
 192     mov(c_rarg1, arg1);
 193     mov(c_rarg2, arg2);
 194     mov(c_rarg3, arg3);
 195   }
 196 #else
 197   push(arg3);
 198   push(arg2);
 199   push(arg1);
 200 #endif // _LP64
 201   return call_RT(oop_result1, metadata_result, entry, 3);
 202 }
 203 
 204 
 205 // Implementation of StubFrame
 206 
 207 class StubFrame: public StackObj {
 208  private:
 209   StubAssembler* _sasm;
 210 
 211  public:
 212   StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
 213   void load_argument(int offset_in_words, Register reg);
 214 
 215   ~StubFrame();
 216 };
 217 
 218 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
 219   set_info(name, must_gc_arguments);
 220   enter();
 221 }
 222 
 223 void StubAssembler::epilogue() {
 224   leave();
 225   ret(0);
 226 }
 227 
 228 #define __ _sasm->
 229 
 230 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
 231   _sasm = sasm;
 232   __ prologue(name, must_gc_arguments);
 233 }
 234 
 235 // load parameters that were stored with LIR_Assembler::store_parameter
 236 // Note: offsets for store_parameter and load_argument must match
 237 void StubFrame::load_argument(int offset_in_words, Register reg) {
 238   __ load_parameter(offset_in_words, reg);
 239 }
 240 
 241 
 242 StubFrame::~StubFrame() {
 243   __ epilogue();
 244 }
 245 
 246 #undef __
 247 
 248 
 249 // Implementation of Runtime1
 250 
 251 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
 252 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
 253 
 254 // Stack layout for saving/restoring  all the registers needed during a runtime
 255 // call (this includes deoptimization)
 256 // Note: note that users of this frame may well have arguments to some runtime
 257 // while these values are on the stack. These positions neglect those arguments
 258 // but the code in save_live_registers will take the argument count into
 259 // account.
 260 //
 261 #ifdef _LP64
 262   #define SLOT2(x) x,
 263   #define SLOT_PER_WORD 2
 264 #else
 265   #define SLOT2(x)
 266   #define SLOT_PER_WORD 1
 267 #endif // _LP64
 268 
 269 enum reg_save_layout {
 270   // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
 271   // happen and will assert if the stack size we create is misaligned
 272 #ifdef _LP64
 273   align_dummy_0, align_dummy_1,
 274 #endif // _LP64
 275 #ifdef _WIN64
 276   // Windows always allocates space for it's argument registers (see
 277   // frame::arg_reg_save_area_bytes).
 278   arg_reg_save_1, arg_reg_save_1H,                                                          // 0, 4
 279   arg_reg_save_2, arg_reg_save_2H,                                                          // 8, 12
 280   arg_reg_save_3, arg_reg_save_3H,                                                          // 16, 20
 281   arg_reg_save_4, arg_reg_save_4H,                                                          // 24, 28
 282 #endif // _WIN64
 283   xmm_regs_as_doubles_off,                                                                  // 32
 284   float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots,  // 160
 285   fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots,          // 224
 286   // fpu_state_end_off is exclusive
 287   fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD),                // 352
 288   marker = fpu_state_end_off, SLOT2(markerH)                                                // 352, 356
 289   extra_space_offset,                                                                       // 360
 290 #ifdef _LP64
 291   r15_off = extra_space_offset, r15H_off,                                                   // 360, 364
 292   r14_off, r14H_off,                                                                        // 368, 372
 293   r13_off, r13H_off,                                                                        // 376, 380
 294   r12_off, r12H_off,                                                                        // 384, 388
 295   r11_off, r11H_off,                                                                        // 392, 396
 296   r10_off, r10H_off,                                                                        // 400, 404
 297   r9_off, r9H_off,                                                                          // 408, 412
 298   r8_off, r8H_off,                                                                          // 416, 420
 299   rdi_off, rdiH_off,                                                                        // 424, 428
 300 #else
 301   rdi_off = extra_space_offset,
 302 #endif // _LP64
 303   rsi_off, SLOT2(rsiH_off)                                                                  // 432, 436
 304   rbp_off, SLOT2(rbpH_off)                                                                  // 440, 444
 305   rsp_off, SLOT2(rspH_off)                                                                  // 448, 452
 306   rbx_off, SLOT2(rbxH_off)                                                                  // 456, 460
 307   rdx_off, SLOT2(rdxH_off)                                                                  // 464, 468
 308   rcx_off, SLOT2(rcxH_off)                                                                  // 472, 476
 309   rax_off, SLOT2(raxH_off)                                                                  // 480, 484
 310   saved_rbp_off, SLOT2(saved_rbpH_off)                                                      // 488, 492
 311   return_off, SLOT2(returnH_off)                                                            // 496, 500
 312   reg_save_frame_size   // As noted: neglects any parameters to runtime                     // 504
 313 };
 314 
 315 // Save off registers which might be killed by calls into the runtime.
 316 // Tries to smart of about FP registers.  In particular we separate
 317 // saving and describing the FPU registers for deoptimization since we
 318 // have to save the FPU registers twice if we describe them and on P4
 319 // saving FPU registers which don't contain anything appears
 320 // expensive.  The deopt blob is the only thing which needs to
 321 // describe FPU registers.  In all other cases it should be sufficient
 322 // to simply save their current value.
 323 //
 324 // Register is a class, but it would be assigned numerical value.
 325 // "0" is assigned for rax. Thus we need to ignore -Wnonnull.
 326 PRAGMA_DIAG_PUSH
 327 PRAGMA_NONNULL_IGNORED
 328 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
 329                                 bool save_fpu_registers = true) {
 330 
 331   // In 64bit all the args are in regs so there are no additional stack slots
 332   LP64_ONLY(num_rt_args = 0);
 333   LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
 334   int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
 335   sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
 336 
 337   // record saved value locations in an OopMap
 338   // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
 339   OopMap* map = new OopMap(frame_size_in_slots, 0);
 340   map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
 341   map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
 342   map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
 343   map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
 344   map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
 345   map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
 346 #ifdef _LP64
 347   map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args),  r8->as_VMReg());
 348   map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args),  r9->as_VMReg());
 349   map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
 350   map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
 351   map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
 352   map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
 353   map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
 354   map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
 355 
 356   // This is stupid but needed.
 357   map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
 358   map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
 359   map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
 360   map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
 361   map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
 362   map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
 363 
 364   map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args),  r8->as_VMReg()->next());
 365   map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args),  r9->as_VMReg()->next());
 366   map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
 367   map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
 368   map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
 369   map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
 370   map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
 371   map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
 372 #endif // _LP64
 373 
 374   int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 375 #ifdef _LP64
 376   if (UseAVX < 3) {
 377     xmm_bypass_limit = xmm_bypass_limit / 2;
 378   }
 379 #endif
 380 
 381   if (save_fpu_registers) {
 382 #ifndef _LP64
 383     if (UseSSE < 2) {
 384       int fpu_off = float_regs_as_doubles_off;
 385       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 386         VMReg fpu_name_0 = FrameMap::fpu_regname(n);
 387         map->set_callee_saved(VMRegImpl::stack2reg(fpu_off +     num_rt_args), fpu_name_0);
 388         // %%% This is really a waste but we'll keep things as they were for now
 389         if (true) {
 390           map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
 391         }
 392         fpu_off += 2;
 393       }
 394       assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
 395 
 396       if (UseSSE == 1) {
 397         int xmm_off = xmm_regs_as_doubles_off;
 398         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 399           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 400           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 401           xmm_off += 2;
 402         }
 403         assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 404       }
 405     }
 406 #endif // !LP64
 407 
 408     if (UseSSE >= 2) {
 409       int xmm_off = xmm_regs_as_doubles_off;
 410       for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
 411         if (n < xmm_bypass_limit) {
 412           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 413           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 414           // %%% This is really a waste but we'll keep things as they were for now
 415           if (true) {
 416             map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
 417           }
 418         }
 419         xmm_off += 2;
 420       }
 421       assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 422     }
 423   }
 424 
 425   return map;
 426 }
 427 PRAGMA_DIAG_POP
 428 
 429 #define __ this->
 430 
 431 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
 432   __ block_comment("save_live_registers");
 433 
 434   __ pusha();         // integer registers
 435 
 436   // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
 437   // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
 438 
 439   __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 440 
 441 #ifdef ASSERT
 442   __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 443 #endif
 444 
 445   if (save_fpu_registers) {
 446 #ifndef _LP64
 447     if (UseSSE < 2) {
 448       // save FPU stack
 449       __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 450       __ fwait();
 451 
 452 #ifdef ASSERT
 453       Label ok;
 454       __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 455       __ jccb(Assembler::equal, ok);
 456       __ stop("corrupted control word detected");
 457       __ bind(ok);
 458 #endif
 459 
 460       // Reset the control word to guard against exceptions being unmasked
 461       // since fstp_d can cause FPU stack underflow exceptions.  Write it
 462       // into the on stack copy and then reload that to make sure that the
 463       // current and future values are correct.
 464       __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 465       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 466 
 467       // Save the FPU registers in de-opt-able form
 468       int offset = 0;
 469       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 470         __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 471         offset += 8;
 472       }
 473 
 474       if (UseSSE == 1) {
 475         // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
 476         int offset = 0;
 477         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 478           XMMRegister xmm_name = as_XMMRegister(n);
 479           __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 480           offset += 8;
 481         }
 482       }
 483     }
 484 #endif // !_LP64
 485 
 486     if (UseSSE >= 2) {
 487       // save XMM registers
 488       // XMM registers can contain float or double values, but this is not known here,
 489       // so always save them as doubles.
 490       // note that float values are _not_ converted automatically, so for float values
 491       // the second word contains only garbage data.
 492       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 493       int offset = 0;
 494 #ifdef _LP64
 495       if (UseAVX < 3) {
 496         xmm_bypass_limit = xmm_bypass_limit / 2;
 497       }
 498 #endif
 499       for (int n = 0; n < xmm_bypass_limit; n++) {
 500         XMMRegister xmm_name = as_XMMRegister(n);
 501         __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 502         offset += 8;
 503       }
 504     }
 505   }
 506 
 507   // FPU stack must be empty now
 508   NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
 509 }
 510 
 511 #undef __
 512 #define __ sasm->
 513 
 514 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
 515 #ifdef _LP64
 516   if (restore_fpu_registers) {
 517     // restore XMM registers
 518     int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 519     if (UseAVX < 3) {
 520       xmm_bypass_limit = xmm_bypass_limit / 2;
 521     }
 522     int offset = 0;
 523     for (int n = 0; n < xmm_bypass_limit; n++) {
 524       XMMRegister xmm_name = as_XMMRegister(n);
 525       __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 526       offset += 8;
 527     }
 528   }
 529 #else
 530   if (restore_fpu_registers) {
 531     if (UseSSE >= 2) {
 532       // restore XMM registers
 533       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 534       int offset = 0;
 535       for (int n = 0; n < xmm_bypass_limit; n++) {
 536         XMMRegister xmm_name = as_XMMRegister(n);
 537         __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 538         offset += 8;
 539       }
 540     } else if (UseSSE == 1) {
 541       // restore XMM registers(num MMX == num fpu)
 542       int offset = 0;
 543       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 544         XMMRegister xmm_name = as_XMMRegister(n);
 545         __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 546         offset += 8;
 547       }
 548     }
 549 
 550     if (UseSSE < 2) {
 551       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 552     } else {
 553       // check that FPU stack is really empty
 554       __ verify_FPU(0, "restore_live_registers");
 555     }
 556   } else {
 557     // check that FPU stack is really empty
 558     __ verify_FPU(0, "restore_live_registers");
 559   }
 560 #endif // _LP64
 561 
 562 #ifdef ASSERT
 563   {
 564     Label ok;
 565     __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 566     __ jcc(Assembler::equal, ok);
 567     __ stop("bad offsets in frame");
 568     __ bind(ok);
 569   }
 570 #endif // ASSERT
 571 
 572   __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 573 }
 574 
 575 #undef __
 576 #define __ this->
 577 
 578 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
 579   __ block_comment("restore_live_registers");
 580 
 581   restore_fpu(this, restore_fpu_registers);
 582   __ popa();
 583 }
 584 
 585 
 586 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
 587   __ block_comment("restore_live_registers_except_rax");
 588 
 589   restore_fpu(this, restore_fpu_registers);
 590 
 591 #ifdef _LP64
 592   __ movptr(r15, Address(rsp, 0));
 593   __ movptr(r14, Address(rsp, wordSize));
 594   __ movptr(r13, Address(rsp, 2 * wordSize));
 595   __ movptr(r12, Address(rsp, 3 * wordSize));
 596   __ movptr(r11, Address(rsp, 4 * wordSize));
 597   __ movptr(r10, Address(rsp, 5 * wordSize));
 598   __ movptr(r9,  Address(rsp, 6 * wordSize));
 599   __ movptr(r8,  Address(rsp, 7 * wordSize));
 600   __ movptr(rdi, Address(rsp, 8 * wordSize));
 601   __ movptr(rsi, Address(rsp, 9 * wordSize));
 602   __ movptr(rbp, Address(rsp, 10 * wordSize));
 603   // skip rsp
 604   __ movptr(rbx, Address(rsp, 12 * wordSize));
 605   __ movptr(rdx, Address(rsp, 13 * wordSize));
 606   __ movptr(rcx, Address(rsp, 14 * wordSize));
 607 
 608   __ addptr(rsp, 16 * wordSize);
 609 #else
 610 
 611   __ pop(rdi);
 612   __ pop(rsi);
 613   __ pop(rbp);
 614   __ pop(rbx); // skip this value
 615   __ pop(rbx);
 616   __ pop(rdx);
 617   __ pop(rcx);
 618   __ addptr(rsp, BytesPerWord);
 619 #endif // _LP64
 620 }
 621 
 622 #undef __
 623 #define __ sasm->
 624 
 625 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
 626                                    bool save_fpu_registers = true) {
 627   __ save_live_registers_no_oop_map(save_fpu_registers);
 628   return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
 629 }
 630 
 631 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 632   __ restore_live_registers(restore_fpu_registers);
 633 }
 634 
 635 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
 636   sasm->restore_live_registers_except_rax(restore_fpu_registers);
 637 }
 638 
 639 
 640 void Runtime1::initialize_pd() {
 641   // nothing to do
 642 }
 643 
 644 
 645 // Target: the entry point of the method that creates and posts the exception oop.
 646 // has_argument: true if the exception needs arguments (passed on the stack because
 647 //               registers must be preserved).
 648 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
 649   // Preserve all registers.
 650   int num_rt_args = has_argument ? (2 + 1) : 1;
 651   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 652 
 653   // Now all registers are saved and can be used freely.
 654   // Verify that no old value is used accidentally.
 655   __ invalidate_registers(true, true, true, true, true, true);
 656 
 657   // Registers used by this stub.
 658   const Register temp_reg = rbx;
 659 
 660   // Load arguments for exception that are passed as arguments into the stub.
 661   if (has_argument) {
 662 #ifdef _LP64
 663     __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
 664     __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
 665 #else
 666     __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
 667     __ push(temp_reg);
 668     __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
 669     __ push(temp_reg);
 670 #endif // _LP64
 671   }
 672   int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
 673 
 674   OopMapSet* oop_maps = new OopMapSet();
 675   oop_maps->add_gc_map(call_offset, oop_map);
 676 
 677   __ stop("should not reach here");
 678 
 679   return oop_maps;
 680 }
 681 
 682 
 683 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
 684   __ block_comment("generate_handle_exception");
 685 
 686   // incoming parameters
 687   const Register exception_oop = rax;
 688   const Register exception_pc  = rdx;
 689   // other registers used in this stub
 690   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 691 
 692   // Save registers, if required.
 693   OopMapSet* oop_maps = new OopMapSet();
 694   OopMap* oop_map = NULL;
 695   switch (id) {
 696   case forward_exception_id:
 697     // We're handling an exception in the context of a compiled frame.
 698     // The registers have been saved in the standard places.  Perform
 699     // an exception lookup in the caller and dispatch to the handler
 700     // if found.  Otherwise unwind and dispatch to the callers
 701     // exception handler.
 702     oop_map = generate_oop_map(sasm, 1 /*thread*/);
 703 
 704     // load and clear pending exception oop into RAX
 705     __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
 706     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 707 
 708     // load issuing PC (the return address for this stub) into rdx
 709     __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
 710 
 711     // make sure that the vm_results are cleared (may be unnecessary)
 712     __ movptr(Address(thread, JavaThread::vm_result_offset()),   NULL_WORD);
 713     __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 714     break;
 715   case handle_exception_nofpu_id:
 716   case handle_exception_id:
 717     // At this point all registers MAY be live.
 718     oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
 719     break;
 720   case handle_exception_from_callee_id: {
 721     // At this point all registers except exception oop (RAX) and
 722     // exception pc (RDX) are dead.
 723     const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
 724     oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
 725     sasm->set_frame_size(frame_size);
 726     WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
 727     break;
 728   }
 729   default:  ShouldNotReachHere();
 730   }
 731 
 732 #if !defined(_LP64) && defined(COMPILER2)
 733   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
 734     // C2 can leave the fpu stack dirty
 735     __ empty_FPU_stack();
 736   }
 737 #endif // !_LP64 && COMPILER2
 738 
 739   // verify that only rax, and rdx is valid at this time
 740   __ invalidate_registers(false, true, true, false, true, true);
 741   // verify that rax, contains a valid exception
 742   __ verify_not_null_oop(exception_oop);
 743 
 744   // load address of JavaThread object for thread-local data
 745   NOT_LP64(__ get_thread(thread);)
 746 
 747 #ifdef ASSERT
 748   // check that fields in JavaThread for exception oop and issuing pc are
 749   // empty before writing to them
 750   Label oop_empty;
 751   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
 752   __ jcc(Assembler::equal, oop_empty);
 753   __ stop("exception oop already set");
 754   __ bind(oop_empty);
 755 
 756   Label pc_empty;
 757   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 758   __ jcc(Assembler::equal, pc_empty);
 759   __ stop("exception pc already set");
 760   __ bind(pc_empty);
 761 #endif
 762 
 763   // save exception oop and issuing pc into JavaThread
 764   // (exception handler will load it from here)
 765   __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
 766   __ movptr(Address(thread, JavaThread::exception_pc_offset()),  exception_pc);
 767 
 768   // patch throwing pc into return address (has bci & oop map)
 769   __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
 770 
 771   // compute the exception handler.
 772   // the exception oop and the throwing pc are read from the fields in JavaThread
 773   int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
 774   oop_maps->add_gc_map(call_offset, oop_map);
 775 
 776   // rax: handler address
 777   //      will be the deopt blob if nmethod was deoptimized while we looked up
 778   //      handler regardless of whether handler existed in the nmethod.
 779 
 780   // only rax, is valid at this time, all other registers have been destroyed by the runtime call
 781   __ invalidate_registers(false, true, true, true, true, true);
 782 
 783   // patch the return address, this stub will directly return to the exception handler
 784   __ movptr(Address(rbp, 1*BytesPerWord), rax);
 785 
 786   switch (id) {
 787   case forward_exception_id:
 788   case handle_exception_nofpu_id:
 789   case handle_exception_id:
 790     // Restore the registers that were saved at the beginning.
 791     restore_live_registers(sasm, id != handle_exception_nofpu_id);
 792     break;
 793   case handle_exception_from_callee_id:
 794     // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
 795     // since we do a leave anyway.
 796 
 797     // Pop the return address.
 798     __ leave();
 799     __ pop(rcx);
 800     __ jmp(rcx);  // jump to exception handler
 801     break;
 802   default:  ShouldNotReachHere();
 803   }
 804 
 805   return oop_maps;
 806 }
 807 
 808 
 809 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
 810   // incoming parameters
 811   const Register exception_oop = rax;
 812   // callee-saved copy of exception_oop during runtime call
 813   const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
 814   // other registers used in this stub
 815   const Register exception_pc = rdx;
 816   const Register handler_addr = rbx;
 817   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 818 
 819   // verify that only rax, is valid at this time
 820   __ invalidate_registers(false, true, true, true, true, true);
 821 
 822 #ifdef ASSERT
 823   // check that fields in JavaThread for exception oop and issuing pc are empty
 824   NOT_LP64(__ get_thread(thread);)
 825   Label oop_empty;
 826   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
 827   __ jcc(Assembler::equal, oop_empty);
 828   __ stop("exception oop must be empty");
 829   __ bind(oop_empty);
 830 
 831   Label pc_empty;
 832   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 833   __ jcc(Assembler::equal, pc_empty);
 834   __ stop("exception pc must be empty");
 835   __ bind(pc_empty);
 836 #endif
 837 
 838   // clear the FPU stack in case any FPU results are left behind
 839   NOT_LP64( __ empty_FPU_stack(); )
 840 
 841   // save exception_oop in callee-saved register to preserve it during runtime calls
 842   __ verify_not_null_oop(exception_oop);
 843   __ movptr(exception_oop_callee_saved, exception_oop);
 844 
 845   NOT_LP64(__ get_thread(thread);)
 846   // Get return address (is on top of stack after leave).
 847   __ movptr(exception_pc, Address(rsp, 0));
 848 
 849   // search the exception handler address of the caller (using the return address)
 850   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
 851   // rax: exception handler address of the caller
 852 
 853   // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
 854   __ invalidate_registers(false, true, true, true, false, true);
 855 
 856   // move result of call into correct register
 857   __ movptr(handler_addr, rax);
 858 
 859   // Restore exception oop to RAX (required convention of exception handler).
 860   __ movptr(exception_oop, exception_oop_callee_saved);
 861 
 862   // verify that there is really a valid exception in rax
 863   __ verify_not_null_oop(exception_oop);
 864 
 865   // get throwing pc (= return address).
 866   // rdx has been destroyed by the call, so it must be set again
 867   // the pop is also necessary to simulate the effect of a ret(0)
 868   __ pop(exception_pc);
 869 
 870   // continue at exception handler (return address removed)
 871   // note: do *not* remove arguments when unwinding the
 872   //       activation since the caller assumes having
 873   //       all arguments on the stack when entering the
 874   //       runtime to determine the exception handler
 875   //       (GC happens at call site with arguments!)
 876   // rax: exception oop
 877   // rdx: throwing pc
 878   // rbx: exception handler
 879   __ jmp(handler_addr);
 880 }
 881 
 882 
 883 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
 884   // use the maximum number of runtime-arguments here because it is difficult to
 885   // distinguish each RT-Call.
 886   // Note: This number affects also the RT-Call in generate_handle_exception because
 887   //       the oop-map is shared for all calls.
 888   const int num_rt_args = 2;  // thread + dummy
 889 
 890   DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
 891   assert(deopt_blob != NULL, "deoptimization blob must have been created");
 892 
 893   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 894 
 895 #ifdef _LP64
 896   const Register thread = r15_thread;
 897   // No need to worry about dummy
 898   __ mov(c_rarg0, thread);
 899 #else
 900   __ push(rax); // push dummy
 901 
 902   const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
 903   // push java thread (becomes first argument of C function)
 904   __ get_thread(thread);
 905   __ push(thread);
 906 #endif // _LP64
 907   __ set_last_Java_frame(thread, noreg, rbp, NULL);
 908   // do the call
 909   __ call(RuntimeAddress(target));
 910   OopMapSet* oop_maps = new OopMapSet();
 911   oop_maps->add_gc_map(__ offset(), oop_map);
 912   // verify callee-saved register
 913 #ifdef ASSERT
 914   guarantee(thread != rax, "change this code");
 915   __ push(rax);
 916   { Label L;
 917     __ get_thread(rax);
 918     __ cmpptr(thread, rax);
 919     __ jcc(Assembler::equal, L);
 920     __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
 921     __ bind(L);
 922   }
 923   __ pop(rax);
 924 #endif
 925   __ reset_last_Java_frame(thread, true);
 926 #ifndef _LP64
 927   __ pop(rcx); // discard thread arg
 928   __ pop(rcx); // discard dummy
 929 #endif // _LP64
 930 
 931   // check for pending exceptions
 932   { Label L;
 933     __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
 934     __ jcc(Assembler::equal, L);
 935     // exception pending => remove activation and forward to exception handler
 936 
 937     __ testptr(rax, rax);                                   // have we deoptimized?
 938     __ jump_cc(Assembler::equal,
 939                RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 940 
 941     // the deopt blob expects exceptions in the special fields of
 942     // JavaThread, so copy and clear pending exception.
 943 
 944     // load and clear pending exception
 945     __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
 946     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 947 
 948     // check that there is really a valid exception
 949     __ verify_not_null_oop(rax);
 950 
 951     // load throwing pc: this is the return address of the stub
 952     __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
 953 
 954 #ifdef ASSERT
 955     // check that fields in JavaThread for exception oop and issuing pc are empty
 956     Label oop_empty;
 957     __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
 958     __ jcc(Assembler::equal, oop_empty);
 959     __ stop("exception oop must be empty");
 960     __ bind(oop_empty);
 961 
 962     Label pc_empty;
 963     __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
 964     __ jcc(Assembler::equal, pc_empty);
 965     __ stop("exception pc must be empty");
 966     __ bind(pc_empty);
 967 #endif
 968 
 969     // store exception oop and throwing pc to JavaThread
 970     __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
 971     __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
 972 
 973     restore_live_registers(sasm);
 974 
 975     __ leave();
 976     __ addptr(rsp, BytesPerWord);  // remove return address from stack
 977 
 978     // Forward the exception directly to deopt blob. We can blow no
 979     // registers and must leave throwing pc on the stack.  A patch may
 980     // have values live in registers so the entry point with the
 981     // exception in tls.
 982     __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
 983 
 984     __ bind(L);
 985   }
 986 
 987 
 988   // Runtime will return true if the nmethod has been deoptimized during
 989   // the patching process. In that case we must do a deopt reexecute instead.
 990 
 991   Label cont;
 992 
 993   __ testptr(rax, rax);                                 // have we deoptimized?
 994   __ jcc(Assembler::equal, cont);                       // no
 995 
 996   // Will reexecute. Proper return address is already on the stack we just restore
 997   // registers, pop all of our frame but the return address and jump to the deopt blob
 998   restore_live_registers(sasm);
 999   __ leave();
1000   __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1001 
1002   __ bind(cont);
1003   restore_live_registers(sasm);
1004   __ leave();
1005   __ ret(0);
1006 
1007   return oop_maps;
1008 }
1009 
1010 
1011 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
1012 
1013   // for better readability
1014   const bool must_gc_arguments = true;
1015   const bool dont_gc_arguments = false;
1016 
1017   // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1018   bool save_fpu_registers = true;
1019 
1020   // stub code & info for the different stubs
1021   OopMapSet* oop_maps = NULL;
1022   switch (id) {
1023     case forward_exception_id:
1024       {
1025         oop_maps = generate_handle_exception(id, sasm);
1026         __ leave();
1027         __ ret(0);
1028       }
1029       break;
1030 
1031     case new_instance_id:
1032     case fast_new_instance_id:
1033     case fast_new_instance_init_check_id:
1034       {
1035         Register klass = rdx; // Incoming
1036         Register obj   = rax; // Result
1037 
1038         if (id == new_instance_id) {
1039           __ set_info("new_instance", dont_gc_arguments);
1040         } else if (id == fast_new_instance_id) {
1041           __ set_info("fast new_instance", dont_gc_arguments);
1042         } else {
1043           assert(id == fast_new_instance_init_check_id, "bad StubID");
1044           __ set_info("fast new_instance init check", dont_gc_arguments);
1045         }
1046 
1047         // If TLAB is disabled, see if there is support for inlining contiguous
1048         // allocations.
1049         // Otherwise, just go to the slow path.
1050         if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && !UseTLAB
1051             && Universe::heap()->supports_inline_contig_alloc()) {
1052           Label slow_path;
1053           Register obj_size = rcx;
1054           Register t1       = rbx;
1055           Register t2       = rsi;
1056           assert_different_registers(klass, obj, obj_size, t1, t2);
1057 
1058           __ push(rdi);
1059           __ push(rbx);
1060 
1061           if (id == fast_new_instance_init_check_id) {
1062             // make sure the klass is initialized
1063             __ cmpb(Address(klass, InstanceKlass::init_state_offset()), InstanceKlass::fully_initialized);
1064             __ jcc(Assembler::notEqual, slow_path);
1065           }
1066 
1067 #ifdef ASSERT
1068           // assert object can be fast path allocated
1069           {
1070             Label ok, not_ok;
1071             __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1072             __ cmpl(obj_size, 0);  // make sure it's an instance (LH > 0)
1073             __ jcc(Assembler::lessEqual, not_ok);
1074             __ testl(obj_size, Klass::_lh_instance_slow_path_bit);
1075             __ jcc(Assembler::zero, ok);
1076             __ bind(not_ok);
1077             __ stop("assert(can be fast path allocated)");
1078             __ should_not_reach_here();
1079             __ bind(ok);
1080           }
1081 #endif // ASSERT
1082 
1083           const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
1084           NOT_LP64(__ get_thread(thread));
1085 
1086           // get the instance size (size is postive so movl is fine for 64bit)
1087           __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1088 
1089           __ eden_allocate(thread, obj, obj_size, 0, t1, slow_path);
1090 
1091           __ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ false);
1092           __ verify_oop(obj);
1093           __ pop(rbx);
1094           __ pop(rdi);
1095           __ ret(0);
1096 
1097           __ bind(slow_path);
1098           __ pop(rbx);
1099           __ pop(rdi);
1100         }
1101 
1102         __ enter();
1103         OopMap* map = save_live_registers(sasm, 2);
1104         int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1105         oop_maps = new OopMapSet();
1106         oop_maps->add_gc_map(call_offset, map);
1107         restore_live_registers_except_rax(sasm);
1108         __ verify_oop(obj);
1109         __ leave();
1110         __ ret(0);
1111 
1112         // rax,: new instance
1113       }
1114 
1115       break;
1116 
1117     case counter_overflow_id:
1118       {
1119         Register bci = rax, method = rbx;
1120         __ enter();
1121         OopMap* map = save_live_registers(sasm, 3);
1122         // Retrieve bci
1123         __ movl(bci, Address(rbp, 2*BytesPerWord));
1124         // And a pointer to the Method*
1125         __ movptr(method, Address(rbp, 3*BytesPerWord));
1126         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1127         oop_maps = new OopMapSet();
1128         oop_maps->add_gc_map(call_offset, map);
1129         restore_live_registers(sasm);
1130         __ leave();
1131         __ ret(0);
1132       }
1133       break;
1134 
1135     case new_type_array_id:
1136     case new_object_array_id:
1137       {
1138         Register length   = rbx; // Incoming
1139         Register klass    = rdx; // Incoming
1140         Register obj      = rax; // Result
1141 
1142         if (id == new_type_array_id) {
1143           __ set_info("new_type_array", dont_gc_arguments);
1144         } else {
1145           __ set_info("new_object_array", dont_gc_arguments);
1146         }
1147 
1148 #ifdef ASSERT
1149         // assert object type is really an array of the proper kind
1150         {
1151           Label ok;
1152           Register t0 = obj;
1153           __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1154           __ sarl(t0, Klass::_lh_array_tag_shift);
1155           int tag = ((id == new_type_array_id)
1156                      ? Klass::_lh_array_tag_type_value
1157                      : Klass::_lh_array_tag_obj_value);
1158           __ cmpl(t0, tag);
1159           __ jcc(Assembler::equal, ok);
1160           __ stop("assert(is an array klass)");
1161           __ should_not_reach_here();
1162           __ bind(ok);
1163         }
1164 #endif // ASSERT
1165 
1166         // If TLAB is disabled, see if there is support for inlining contiguous
1167         // allocations.
1168         // Otherwise, just go to the slow path.
1169         if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
1170           Register arr_size = rsi;
1171           Register t1       = rcx;  // must be rcx for use as shift count
1172           Register t2       = rdi;
1173           Label slow_path;
1174 
1175           // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1176           // since size is positive movl does right thing on 64bit
1177           __ movl(t1, Address(klass, Klass::layout_helper_offset()));
1178           // since size is postive movl does right thing on 64bit
1179           __ movl(arr_size, length);
1180           assert(t1 == rcx, "fixed register usage");
1181           __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1182           __ shrptr(t1, Klass::_lh_header_size_shift);
1183           __ andptr(t1, Klass::_lh_header_size_mask);
1184           __ addptr(arr_size, t1);
1185           __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1186           __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1187 
1188           // Using t2 for non 64-bit.
1189           const Register thread = NOT_LP64(t2) LP64_ONLY(r15_thread);
1190           NOT_LP64(__ get_thread(thread));
1191           __ eden_allocate(thread, obj, arr_size, 0, t1, slow_path);  // preserves arr_size
1192 
1193           __ initialize_header(obj, klass, length, t1, t2);
1194           __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
1195           assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1196           assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1197           __ andptr(t1, Klass::_lh_header_size_mask);
1198           __ subptr(arr_size, t1);  // body length
1199           __ addptr(t1, obj);       // body start
1200           __ initialize_body(t1, arr_size, 0, t2);
1201           __ verify_oop(obj);
1202           __ ret(0);
1203 
1204           __ bind(slow_path);
1205         }
1206 
1207         __ enter();
1208         OopMap* map = save_live_registers(sasm, 3);
1209         int call_offset;
1210         if (id == new_type_array_id) {
1211           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1212         } else {
1213           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1214         }
1215 
1216         oop_maps = new OopMapSet();
1217         oop_maps->add_gc_map(call_offset, map);
1218         restore_live_registers_except_rax(sasm);
1219 
1220         __ verify_oop(obj);
1221         __ leave();
1222         __ ret(0);
1223 
1224         // rax,: new array
1225       }
1226       break;
1227 
1228     case new_multi_array_id:
1229       { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1230         // rax,: klass
1231         // rbx,: rank
1232         // rcx: address of 1st dimension
1233         OopMap* map = save_live_registers(sasm, 4);
1234         int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1235 
1236         oop_maps = new OopMapSet();
1237         oop_maps->add_gc_map(call_offset, map);
1238         restore_live_registers_except_rax(sasm);
1239 
1240         // rax,: new multi array
1241         __ verify_oop(rax);
1242       }
1243       break;
1244 
1245     case register_finalizer_id:
1246       {
1247         __ set_info("register_finalizer", dont_gc_arguments);
1248 
1249         // This is called via call_runtime so the arguments
1250         // will be place in C abi locations
1251 
1252 #ifdef _LP64
1253         __ verify_oop(c_rarg0);
1254         __ mov(rax, c_rarg0);
1255 #else
1256         // The object is passed on the stack and we haven't pushed a
1257         // frame yet so it's one work away from top of stack.
1258         __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1259         __ verify_oop(rax);
1260 #endif // _LP64
1261 
1262         // load the klass and check the has finalizer flag
1263         Label register_finalizer;
1264         Register tmp_load_klass = LP64_ONLY(rscratch1) NOT_LP64(noreg);
1265         Register t = rsi;
1266         __ load_klass(t, rax, tmp_load_klass);
1267         __ movl(t, Address(t, Klass::access_flags_offset()));
1268         __ testl(t, JVM_ACC_HAS_FINALIZER);
1269         __ jcc(Assembler::notZero, register_finalizer);
1270         __ ret(0);
1271 
1272         __ bind(register_finalizer);
1273         __ enter();
1274         OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1275         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1276         oop_maps = new OopMapSet();
1277         oop_maps->add_gc_map(call_offset, oop_map);
1278 
1279         // Now restore all the live registers
1280         restore_live_registers(sasm);
1281 
1282         __ leave();
1283         __ ret(0);
1284       }
1285       break;
1286 
1287     case throw_range_check_failed_id:
1288       { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1289         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1290       }
1291       break;
1292 
1293     case throw_index_exception_id:
1294       { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1295         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1296       }
1297       break;
1298 
1299     case throw_div0_exception_id:
1300       { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1301         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1302       }
1303       break;
1304 
1305     case throw_null_pointer_exception_id:
1306       { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1307         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1308       }
1309       break;
1310 
1311     case handle_exception_nofpu_id:
1312     case handle_exception_id:
1313       { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1314         oop_maps = generate_handle_exception(id, sasm);
1315       }
1316       break;
1317 
1318     case handle_exception_from_callee_id:
1319       { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1320         oop_maps = generate_handle_exception(id, sasm);
1321       }
1322       break;
1323 
1324     case unwind_exception_id:
1325       { __ set_info("unwind_exception", dont_gc_arguments);
1326         // note: no stubframe since we are about to leave the current
1327         //       activation and we are calling a leaf VM function only.
1328         generate_unwind_exception(sasm);
1329       }
1330       break;
1331 
1332     case throw_array_store_exception_id:
1333       { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1334         // tos + 0: link
1335         //     + 1: return address
1336         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1337       }
1338       break;
1339 
1340     case throw_class_cast_exception_id:
1341       { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1342         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1343       }
1344       break;
1345 
1346     case throw_incompatible_class_change_error_id:
1347       { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1348         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1349       }
1350       break;
1351 
1352     case slow_subtype_check_id:
1353       {
1354         // Typical calling sequence:
1355         // __ push(klass_RInfo);  // object klass or other subclass
1356         // __ push(sup_k_RInfo);  // array element klass or other superclass
1357         // __ call(slow_subtype_check);
1358         // Note that the subclass is pushed first, and is therefore deepest.
1359         // Previous versions of this code reversed the names 'sub' and 'super'.
1360         // This was operationally harmless but made the code unreadable.
1361         enum layout {
1362           rax_off, SLOT2(raxH_off)
1363           rcx_off, SLOT2(rcxH_off)
1364           rsi_off, SLOT2(rsiH_off)
1365           rdi_off, SLOT2(rdiH_off)
1366           // saved_rbp_off, SLOT2(saved_rbpH_off)
1367           return_off, SLOT2(returnH_off)
1368           sup_k_off, SLOT2(sup_kH_off)
1369           klass_off, SLOT2(superH_off)
1370           framesize,
1371           result_off = klass_off  // deepest argument is also the return value
1372         };
1373 
1374         __ set_info("slow_subtype_check", dont_gc_arguments);
1375         __ push(rdi);
1376         __ push(rsi);
1377         __ push(rcx);
1378         __ push(rax);
1379 
1380         // This is called by pushing args and not with C abi
1381         __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1382         __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1383 
1384         Label miss;
1385         __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
1386 
1387         // fallthrough on success:
1388         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1389         __ pop(rax);
1390         __ pop(rcx);
1391         __ pop(rsi);
1392         __ pop(rdi);
1393         __ ret(0);
1394 
1395         __ bind(miss);
1396         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1397         __ pop(rax);
1398         __ pop(rcx);
1399         __ pop(rsi);
1400         __ pop(rdi);
1401         __ ret(0);
1402       }
1403       break;
1404 
1405     case monitorenter_nofpu_id:
1406       save_fpu_registers = false;
1407       // fall through
1408     case monitorenter_id:
1409       {
1410         StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1411         OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1412 
1413         // Called with store_parameter and not C abi
1414 
1415         f.load_argument(1, rax); // rax,: object
1416         f.load_argument(0, rbx); // rbx,: lock address
1417 
1418         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1419 
1420         oop_maps = new OopMapSet();
1421         oop_maps->add_gc_map(call_offset, map);
1422         restore_live_registers(sasm, save_fpu_registers);
1423       }
1424       break;
1425 
1426     case monitorexit_nofpu_id:
1427       save_fpu_registers = false;
1428       // fall through
1429     case monitorexit_id:
1430       {
1431         StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1432         OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1433 
1434         // Called with store_parameter and not C abi
1435 
1436         f.load_argument(0, rax); // rax,: lock address
1437 
1438         // note: really a leaf routine but must setup last java sp
1439         //       => use call_RT for now (speed can be improved by
1440         //       doing last java sp setup manually)
1441         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1442 
1443         oop_maps = new OopMapSet();
1444         oop_maps->add_gc_map(call_offset, map);
1445         restore_live_registers(sasm, save_fpu_registers);
1446       }
1447       break;
1448 
1449     case deoptimize_id:
1450       {
1451         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1452         const int num_rt_args = 2;  // thread, trap_request
1453         OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1454         f.load_argument(0, rax);
1455         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1456         oop_maps = new OopMapSet();
1457         oop_maps->add_gc_map(call_offset, oop_map);
1458         restore_live_registers(sasm);
1459         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1460         assert(deopt_blob != NULL, "deoptimization blob must have been created");
1461         __ leave();
1462         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1463       }
1464       break;
1465 
1466     case access_field_patching_id:
1467       { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1468         // we should set up register map
1469         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1470       }
1471       break;
1472 
1473     case load_klass_patching_id:
1474       { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1475         // we should set up register map
1476         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1477       }
1478       break;
1479 
1480     case load_mirror_patching_id:
1481       { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1482         // we should set up register map
1483         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1484       }
1485       break;
1486 
1487     case load_appendix_patching_id:
1488       { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1489         // we should set up register map
1490         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1491       }
1492       break;
1493 
1494     case dtrace_object_alloc_id:
1495       { // rax,: object
1496         StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1497         // we can't gc here so skip the oopmap but make sure that all
1498         // the live registers get saved.
1499         save_live_registers(sasm, 1);
1500 
1501         __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1502         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
1503         NOT_LP64(__ pop(rax));
1504 
1505         restore_live_registers(sasm);
1506       }
1507       break;
1508 
1509     case fpu2long_stub_id:
1510       {
1511 #ifdef _LP64
1512         Label done;
1513         __ cvttsd2siq(rax, Address(rsp, wordSize));
1514         __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1515         __ jccb(Assembler::notEqual, done);
1516         __ movq(rax, Address(rsp, wordSize));
1517         __ subptr(rsp, 8);
1518         __ movq(Address(rsp, 0), rax);
1519         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1520         __ pop(rax);
1521         __ bind(done);
1522         __ ret(0);
1523 #else
1524         // rax, and rdx are destroyed, but should be free since the result is returned there
1525         // preserve rsi,ecx
1526         __ push(rsi);
1527         __ push(rcx);
1528 
1529         // check for NaN
1530         Label return0, do_return, return_min_jlong, do_convert;
1531 
1532         Address value_high_word(rsp, wordSize + 4);
1533         Address value_low_word(rsp, wordSize);
1534         Address result_high_word(rsp, 3*wordSize + 4);
1535         Address result_low_word(rsp, 3*wordSize);
1536 
1537         __ subptr(rsp, 32);                    // more than enough on 32bit
1538         __ fst_d(value_low_word);
1539         __ movl(rax, value_high_word);
1540         __ andl(rax, 0x7ff00000);
1541         __ cmpl(rax, 0x7ff00000);
1542         __ jcc(Assembler::notEqual, do_convert);
1543         __ movl(rax, value_high_word);
1544         __ andl(rax, 0xfffff);
1545         __ orl(rax, value_low_word);
1546         __ jcc(Assembler::notZero, return0);
1547 
1548         __ bind(do_convert);
1549         __ fnstcw(Address(rsp, 0));
1550         __ movzwl(rax, Address(rsp, 0));
1551         __ orl(rax, 0xc00);
1552         __ movw(Address(rsp, 2), rax);
1553         __ fldcw(Address(rsp, 2));
1554         __ fwait();
1555         __ fistp_d(result_low_word);
1556         __ fldcw(Address(rsp, 0));
1557         __ fwait();
1558         // This gets the entire long in rax on 64bit
1559         __ movptr(rax, result_low_word);
1560         // testing of high bits
1561         __ movl(rdx, result_high_word);
1562         __ mov(rcx, rax);
1563         // What the heck is the point of the next instruction???
1564         __ xorl(rcx, 0x0);
1565         __ movl(rsi, 0x80000000);
1566         __ xorl(rsi, rdx);
1567         __ orl(rcx, rsi);
1568         __ jcc(Assembler::notEqual, do_return);
1569         __ fldz();
1570         __ fcomp_d(value_low_word);
1571         __ fnstsw_ax();
1572         __ sahf();
1573         __ jcc(Assembler::above, return_min_jlong);
1574         // return max_jlong
1575         __ movl(rdx, 0x7fffffff);
1576         __ movl(rax, 0xffffffff);
1577         __ jmp(do_return);
1578 
1579         __ bind(return_min_jlong);
1580         __ movl(rdx, 0x80000000);
1581         __ xorl(rax, rax);
1582         __ jmp(do_return);
1583 
1584         __ bind(return0);
1585         __ fpop();
1586         __ xorptr(rdx,rdx);
1587         __ xorptr(rax,rax);
1588 
1589         __ bind(do_return);
1590         __ addptr(rsp, 32);
1591         __ pop(rcx);
1592         __ pop(rsi);
1593         __ ret(0);
1594 #endif // _LP64
1595       }
1596       break;
1597 
1598     case predicate_failed_trap_id:
1599       {
1600         StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1601 
1602         OopMap* map = save_live_registers(sasm, 1);
1603 
1604         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1605         oop_maps = new OopMapSet();
1606         oop_maps->add_gc_map(call_offset, map);
1607         restore_live_registers(sasm);
1608         __ leave();
1609         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1610         assert(deopt_blob != NULL, "deoptimization blob must have been created");
1611 
1612         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1613       }
1614       break;
1615 
1616     default:
1617       { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1618         __ movptr(rax, (int)id);
1619         __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1620         __ should_not_reach_here();
1621       }
1622       break;
1623   }
1624   return oop_maps;
1625 }
1626 
1627 #undef __
1628 
1629 const char *Runtime1::pd_name_for_address(address entry) {
1630   return "<unknown function>";
1631 }