1 /*
   2  * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/assembler.hpp"
  27 #include "c1/c1_Defs.hpp"
  28 #include "c1/c1_MacroAssembler.hpp"
  29 #include "c1/c1_Runtime1.hpp"
  30 #include "ci/ciUtilities.hpp"
  31 #include "gc/shared/cardTable.hpp"
  32 #include "gc/shared/cardTableBarrierSet.hpp"
  33 #include "interpreter/interpreter.hpp"
  34 #include "memory/universe.hpp"
  35 #include "nativeInst_x86.hpp"
  36 #include "oops/compiledICHolder.hpp"
  37 #include "oops/oop.inline.hpp"
  38 #include "prims/jvmtiExport.hpp"
  39 #include "register_x86.hpp"
  40 #include "runtime/sharedRuntime.hpp"
  41 #include "runtime/signature.hpp"
  42 #include "runtime/vframeArray.hpp"
  43 #include "utilities/macros.hpp"
  44 #include "vmreg_x86.inline.hpp"
  45 
  46 // Implementation of StubAssembler
  47 
  48 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
  49   // setup registers
  50   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
  51   assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
  52   assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
  53   assert(args_size >= 0, "illegal args_size");
  54   bool align_stack = false;
  55 #ifdef _LP64
  56   // At a method handle call, the stack may not be properly aligned
  57   // when returning with an exception.
  58   align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
  59 #endif
  60 
  61 #ifdef _LP64
  62   mov(c_rarg0, thread);
  63   set_num_rt_args(0); // Nothing on stack
  64 #else
  65   set_num_rt_args(1 + args_size);
  66 
  67   // push java thread (becomes first argument of C function)
  68   get_thread(thread);
  69   push(thread);
  70 #endif // _LP64
  71 
  72   int call_offset;
  73   if (!align_stack) {
  74     set_last_Java_frame(thread, noreg, rbp, NULL);
  75   } else {
  76     address the_pc = pc();
  77     call_offset = offset();
  78     set_last_Java_frame(thread, noreg, rbp, the_pc);
  79     andptr(rsp, -(StackAlignmentInBytes));    // Align stack
  80   }
  81 
  82   // do the call
  83   call(RuntimeAddress(entry));
  84   if (!align_stack) {
  85     call_offset = offset();
  86   }
  87   oopmap_metadata(NULL);
  88 
  89   // verify callee-saved register
  90 #ifdef ASSERT
  91   guarantee(thread != rax, "change this code");
  92   push(rax);
  93   { Label L;
  94     get_thread(rax);
  95     cmpptr(thread, rax);
  96     jcc(Assembler::equal, L);
  97     int3();
  98     stop("StubAssembler::call_RT: rdi not callee saved?");
  99     bind(L);
 100   }
 101   pop(rax);
 102 #endif
 103   reset_last_Java_frame(thread, true);
 104 
 105   // discard thread and arguments
 106   NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
 107 
 108   // check for pending exceptions
 109   { Label L;
 110     cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
 111     jcc(Assembler::equal, L);
 112     // exception pending => remove activation and forward to exception handler
 113     movptr(rax, Address(thread, Thread::pending_exception_offset()));
 114     // make sure that the vm_results are cleared
 115     if (oop_result1->is_valid()) {
 116       movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
 117     }
 118     if (metadata_result->is_valid()) {
 119       movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 120     }
 121     if (frame_size() == no_frame_size) {
 122       leave();
 123       jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
 124     } else if (_stub_id == Runtime1::forward_exception_id) {
 125       should_not_reach_here();
 126     } else {
 127       jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 128     }
 129     bind(L);
 130   }
 131   // get oop results if there are any and reset the values in the thread
 132   if (oop_result1->is_valid()) {
 133     get_vm_result(oop_result1, thread);
 134   }
 135   if (metadata_result->is_valid()) {
 136     get_vm_result_2(metadata_result, thread);
 137   }
 138   return call_offset;
 139 }
 140 
 141 
 142 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
 143 #ifdef _LP64
 144   mov(c_rarg1, arg1);
 145 #else
 146   push(arg1);
 147 #endif // _LP64
 148   return call_RT(oop_result1, metadata_result, entry, 1);
 149 }
 150 
 151 
 152 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
 153 #ifdef _LP64
 154   if (c_rarg1 == arg2) {
 155     if (c_rarg2 == arg1) {
 156       xchgq(arg1, arg2);
 157     } else {
 158       mov(c_rarg2, arg2);
 159       mov(c_rarg1, arg1);
 160     }
 161   } else {
 162     mov(c_rarg1, arg1);
 163     mov(c_rarg2, arg2);
 164   }
 165 #else
 166   push(arg2);
 167   push(arg1);
 168 #endif // _LP64
 169   return call_RT(oop_result1, metadata_result, entry, 2);
 170 }
 171 
 172 
 173 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
 174 #ifdef _LP64
 175   // if there is any conflict use the stack
 176   if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
 177       arg2 == c_rarg1 || arg1 == c_rarg3 ||
 178       arg3 == c_rarg1 || arg1 == c_rarg2) {
 179     push(arg3);
 180     push(arg2);
 181     push(arg1);
 182     pop(c_rarg1);
 183     pop(c_rarg2);
 184     pop(c_rarg3);
 185   } else {
 186     mov(c_rarg1, arg1);
 187     mov(c_rarg2, arg2);
 188     mov(c_rarg3, arg3);
 189   }
 190 #else
 191   push(arg3);
 192   push(arg2);
 193   push(arg1);
 194 #endif // _LP64
 195   return call_RT(oop_result1, metadata_result, entry, 3);
 196 }
 197 
 198 
 199 // Implementation of StubFrame
 200 
 201 class StubFrame: public StackObj {
 202  private:
 203   StubAssembler* _sasm;
 204 
 205  public:
 206   StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
 207   void load_argument(int offset_in_words, Register reg);
 208 
 209   ~StubFrame();
 210 };
 211 
 212 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
 213   set_info(name, must_gc_arguments);
 214   enter();
 215 }
 216 
 217 void StubAssembler::epilogue() {
 218   leave();
 219   ret(0);
 220 }
 221 
 222 #define __ _sasm->
 223 
 224 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
 225   _sasm = sasm;
 226   __ prologue(name, must_gc_arguments);
 227 }
 228 
 229 // load parameters that were stored with LIR_Assembler::store_parameter
 230 // Note: offsets for store_parameter and load_argument must match
 231 void StubFrame::load_argument(int offset_in_words, Register reg) {
 232   __ load_parameter(offset_in_words, reg);
 233 }
 234 
 235 
 236 StubFrame::~StubFrame() {
 237   __ epilogue();
 238 }
 239 
 240 #undef __
 241 
 242 
 243 // Implementation of Runtime1
 244 
 245 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
 246 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
 247 
 248 // Stack layout for saving/restoring  all the registers needed during a runtime
 249 // call (this includes deoptimization)
 250 // Note: note that users of this frame may well have arguments to some runtime
 251 // while these values are on the stack. These positions neglect those arguments
 252 // but the code in save_live_registers will take the argument count into
 253 // account.
 254 //
 255 #ifdef _LP64
 256   #define SLOT2(x) x,
 257   #define SLOT_PER_WORD 2
 258 #else
 259   #define SLOT2(x)
 260   #define SLOT_PER_WORD 1
 261 #endif // _LP64
 262 
 263 enum reg_save_layout {
 264   // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
 265   // happen and will assert if the stack size we create is misaligned
 266 #ifdef _LP64
 267   align_dummy_0, align_dummy_1,
 268 #endif // _LP64
 269 #ifdef _WIN64
 270   // Windows always allocates space for it's argument registers (see
 271   // frame::arg_reg_save_area_bytes).
 272   arg_reg_save_1, arg_reg_save_1H,                                                          // 0, 4
 273   arg_reg_save_2, arg_reg_save_2H,                                                          // 8, 12
 274   arg_reg_save_3, arg_reg_save_3H,                                                          // 16, 20
 275   arg_reg_save_4, arg_reg_save_4H,                                                          // 24, 28
 276 #endif // _WIN64
 277   xmm_regs_as_doubles_off,                                                                  // 32
 278   float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots,  // 160
 279   fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots,          // 224
 280   // fpu_state_end_off is exclusive
 281   fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD),                // 352
 282   marker = fpu_state_end_off, SLOT2(markerH)                                                // 352, 356
 283   extra_space_offset,                                                                       // 360
 284 #ifdef _LP64
 285   r15_off = extra_space_offset, r15H_off,                                                   // 360, 364
 286   r14_off, r14H_off,                                                                        // 368, 372
 287   r13_off, r13H_off,                                                                        // 376, 380
 288   r12_off, r12H_off,                                                                        // 384, 388
 289   r11_off, r11H_off,                                                                        // 392, 396
 290   r10_off, r10H_off,                                                                        // 400, 404
 291   r9_off, r9H_off,                                                                          // 408, 412
 292   r8_off, r8H_off,                                                                          // 416, 420
 293   rdi_off, rdiH_off,                                                                        // 424, 428
 294 #else
 295   rdi_off = extra_space_offset,
 296 #endif // _LP64
 297   rsi_off, SLOT2(rsiH_off)                                                                  // 432, 436
 298   rbp_off, SLOT2(rbpH_off)                                                                  // 440, 444
 299   rsp_off, SLOT2(rspH_off)                                                                  // 448, 452
 300   rbx_off, SLOT2(rbxH_off)                                                                  // 456, 460
 301   rdx_off, SLOT2(rdxH_off)                                                                  // 464, 468
 302   rcx_off, SLOT2(rcxH_off)                                                                  // 472, 476
 303   rax_off, SLOT2(raxH_off)                                                                  // 480, 484
 304   saved_rbp_off, SLOT2(saved_rbpH_off)                                                      // 488, 492
 305   return_off, SLOT2(returnH_off)                                                            // 496, 500
 306   reg_save_frame_size   // As noted: neglects any parameters to runtime                     // 504
 307 };
 308 
 309 // Save off registers which might be killed by calls into the runtime.
 310 // Tries to smart of about FP registers.  In particular we separate
 311 // saving and describing the FPU registers for deoptimization since we
 312 // have to save the FPU registers twice if we describe them and on P4
 313 // saving FPU registers which don't contain anything appears
 314 // expensive.  The deopt blob is the only thing which needs to
 315 // describe FPU registers.  In all other cases it should be sufficient
 316 // to simply save their current value.
 317 
 318 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
 319                                 bool save_fpu_registers = true) {
 320 
 321   // In 64bit all the args are in regs so there are no additional stack slots
 322   LP64_ONLY(num_rt_args = 0);
 323   LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
 324   int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
 325   sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
 326 
 327   // record saved value locations in an OopMap
 328   // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
 329   OopMap* map = new OopMap(frame_size_in_slots, 0);
 330   map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
 331   map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
 332   map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
 333   map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
 334   map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
 335   map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
 336 #ifdef _LP64
 337   map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args),  r8->as_VMReg());
 338   map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args),  r9->as_VMReg());
 339   map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
 340   map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
 341   map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
 342   map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
 343   map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
 344   map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
 345 
 346   // This is stupid but needed.
 347   map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
 348   map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
 349   map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
 350   map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
 351   map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
 352   map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
 353 
 354   map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args),  r8->as_VMReg()->next());
 355   map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args),  r9->as_VMReg()->next());
 356   map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
 357   map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
 358   map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
 359   map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
 360   map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
 361   map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
 362 #endif // _LP64
 363 
 364   int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 365 #ifdef _LP64
 366   if (UseAVX < 3) {
 367     xmm_bypass_limit = xmm_bypass_limit / 2;
 368   }
 369 #endif
 370 
 371   if (save_fpu_registers) {
 372     if (UseSSE < 2) {
 373       int fpu_off = float_regs_as_doubles_off;
 374       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 375         VMReg fpu_name_0 = FrameMap::fpu_regname(n);
 376         map->set_callee_saved(VMRegImpl::stack2reg(fpu_off +     num_rt_args), fpu_name_0);
 377         // %%% This is really a waste but we'll keep things as they were for now
 378         if (true) {
 379           map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
 380         }
 381         fpu_off += 2;
 382       }
 383       assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
 384     }
 385 
 386     if (UseSSE >= 2) {
 387       int xmm_off = xmm_regs_as_doubles_off;
 388       for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
 389         if (n < xmm_bypass_limit) {
 390           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 391           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 392           // %%% This is really a waste but we'll keep things as they were for now
 393           if (true) {
 394             map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
 395           }
 396         }
 397         xmm_off += 2;
 398       }
 399       assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 400 
 401     } else if (UseSSE == 1) {
 402       int xmm_off = xmm_regs_as_doubles_off;
 403       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 404         VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 405         map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 406         xmm_off += 2;
 407       }
 408       assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 409     }
 410   }
 411 
 412   return map;
 413 }
 414 
 415 #define __ this->
 416 
 417 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
 418   __ block_comment("save_live_registers");
 419 
 420   __ pusha();         // integer registers
 421 
 422   // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
 423   // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
 424 
 425   __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 426 
 427 #ifdef ASSERT
 428   __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 429 #endif
 430 
 431   if (save_fpu_registers) {
 432     if (UseSSE < 2) {
 433       // save FPU stack
 434       __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 435       __ fwait();
 436 
 437 #ifdef ASSERT
 438       Label ok;
 439       __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
 440       __ jccb(Assembler::equal, ok);
 441       __ stop("corrupted control word detected");
 442       __ bind(ok);
 443 #endif
 444 
 445       // Reset the control word to guard against exceptions being unmasked
 446       // since fstp_d can cause FPU stack underflow exceptions.  Write it
 447       // into the on stack copy and then reload that to make sure that the
 448       // current and future values are correct.
 449       __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
 450       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 451 
 452       // Save the FPU registers in de-opt-able form
 453       int offset = 0;
 454       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 455         __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 456         offset += 8;
 457       }
 458     }
 459 
 460     if (UseSSE >= 2) {
 461       // save XMM registers
 462       // XMM registers can contain float or double values, but this is not known here,
 463       // so always save them as doubles.
 464       // note that float values are _not_ converted automatically, so for float values
 465       // the second word contains only garbage data.
 466       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 467       int offset = 0;
 468 #ifdef _LP64
 469       if (UseAVX < 3) {
 470         xmm_bypass_limit = xmm_bypass_limit / 2;
 471       }
 472 #endif
 473       for (int n = 0; n < xmm_bypass_limit; n++) {
 474         XMMRegister xmm_name = as_XMMRegister(n);
 475         __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 476         offset += 8;
 477       }
 478     } else if (UseSSE == 1) {
 479       // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
 480       int offset = 0;
 481       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 482         XMMRegister xmm_name = as_XMMRegister(n);
 483         __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 484         offset += 8;
 485       }
 486     }
 487   }
 488 
 489   // FPU stack must be empty now
 490   __ verify_FPU(0, "save_live_registers");
 491 }
 492 
 493 #undef __
 494 #define __ sasm->
 495 
 496 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
 497   if (restore_fpu_registers) {
 498     if (UseSSE >= 2) {
 499       // restore XMM registers
 500       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 501 #ifdef _LP64
 502       if (UseAVX < 3) {
 503         xmm_bypass_limit = xmm_bypass_limit / 2;
 504       }
 505 #endif
 506       int offset = 0;
 507       for (int n = 0; n < xmm_bypass_limit; n++) {
 508         XMMRegister xmm_name = as_XMMRegister(n);
 509         __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 510         offset += 8;
 511       }
 512     } else if (UseSSE == 1) {
 513       // restore XMM registers(num MMX == num fpu)
 514       int offset = 0;
 515       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 516         XMMRegister xmm_name = as_XMMRegister(n);
 517         __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 518         offset += 8;
 519       }
 520     }
 521 
 522     if (UseSSE < 2) {
 523       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 524     } else {
 525       // check that FPU stack is really empty
 526       __ verify_FPU(0, "restore_live_registers");
 527     }
 528 
 529   } else {
 530     // check that FPU stack is really empty
 531     __ verify_FPU(0, "restore_live_registers");
 532   }
 533 
 534 #ifdef ASSERT
 535   {
 536     Label ok;
 537     __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 538     __ jcc(Assembler::equal, ok);
 539     __ stop("bad offsets in frame");
 540     __ bind(ok);
 541   }
 542 #endif // ASSERT
 543 
 544   __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 545 }
 546 
 547 #undef __
 548 #define __ this->
 549 
 550 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
 551   __ block_comment("restore_live_registers");
 552 
 553   restore_fpu(this, restore_fpu_registers);
 554   __ popa();
 555 }
 556 
 557 
 558 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
 559   __ block_comment("restore_live_registers_except_rax");
 560 
 561   restore_fpu(this, restore_fpu_registers);
 562 
 563 #ifdef _LP64
 564   __ movptr(r15, Address(rsp, 0));
 565   __ movptr(r14, Address(rsp, wordSize));
 566   __ movptr(r13, Address(rsp, 2 * wordSize));
 567   __ movptr(r12, Address(rsp, 3 * wordSize));
 568   __ movptr(r11, Address(rsp, 4 * wordSize));
 569   __ movptr(r10, Address(rsp, 5 * wordSize));
 570   __ movptr(r9,  Address(rsp, 6 * wordSize));
 571   __ movptr(r8,  Address(rsp, 7 * wordSize));
 572   __ movptr(rdi, Address(rsp, 8 * wordSize));
 573   __ movptr(rsi, Address(rsp, 9 * wordSize));
 574   __ movptr(rbp, Address(rsp, 10 * wordSize));
 575   // skip rsp
 576   __ movptr(rbx, Address(rsp, 12 * wordSize));
 577   __ movptr(rdx, Address(rsp, 13 * wordSize));
 578   __ movptr(rcx, Address(rsp, 14 * wordSize));
 579 
 580   __ addptr(rsp, 16 * wordSize);
 581 #else
 582 
 583   __ pop(rdi);
 584   __ pop(rsi);
 585   __ pop(rbp);
 586   __ pop(rbx); // skip this value
 587   __ pop(rbx);
 588   __ pop(rdx);
 589   __ pop(rcx);
 590   __ addptr(rsp, BytesPerWord);
 591 #endif // _LP64
 592 }
 593 
 594 #undef __
 595 #define __ sasm->
 596 
 597 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
 598                                    bool save_fpu_registers = true) {
 599   __ save_live_registers_no_oop_map(save_fpu_registers);
 600   return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
 601 }
 602 
 603 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 604   __ restore_live_registers(restore_fpu_registers);
 605 }
 606 
 607 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
 608   sasm->restore_live_registers_except_rax(restore_fpu_registers);
 609 }
 610 
 611 
 612 void Runtime1::initialize_pd() {
 613   // nothing to do
 614 }
 615 
 616 
 617 // Target: the entry point of the method that creates and posts the exception oop.
 618 // has_argument: true if the exception needs arguments (passed on the stack because
 619 //               registers must be preserved).
 620 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
 621   // Preserve all registers.
 622   int num_rt_args = has_argument ? (2 + 1) : 1;
 623   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 624 
 625   // Now all registers are saved and can be used freely.
 626   // Verify that no old value is used accidentally.
 627   __ invalidate_registers(true, true, true, true, true, true);
 628 
 629   // Registers used by this stub.
 630   const Register temp_reg = rbx;
 631 
 632   // Load arguments for exception that are passed as arguments into the stub.
 633   if (has_argument) {
 634 #ifdef _LP64
 635     __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
 636     __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
 637 #else
 638     __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
 639     __ push(temp_reg);
 640     __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
 641     __ push(temp_reg);
 642 #endif // _LP64
 643   }
 644   int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
 645 
 646   OopMapSet* oop_maps = new OopMapSet();
 647   oop_maps->add_gc_map(call_offset, oop_map);
 648 
 649   __ stop("should not reach here");
 650 
 651   return oop_maps;
 652 }
 653 
 654 
 655 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
 656   __ block_comment("generate_handle_exception");
 657 
 658   // incoming parameters
 659   const Register exception_oop = rax;
 660   const Register exception_pc  = rdx;
 661   // other registers used in this stub
 662   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 663 
 664   // Save registers, if required.
 665   OopMapSet* oop_maps = new OopMapSet();
 666   OopMap* oop_map = NULL;
 667   switch (id) {
 668   case forward_exception_id:
 669     // We're handling an exception in the context of a compiled frame.
 670     // The registers have been saved in the standard places.  Perform
 671     // an exception lookup in the caller and dispatch to the handler
 672     // if found.  Otherwise unwind and dispatch to the callers
 673     // exception handler.
 674     oop_map = generate_oop_map(sasm, 1 /*thread*/);
 675 
 676     // load and clear pending exception oop into RAX
 677     __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
 678     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 679 
 680     // load issuing PC (the return address for this stub) into rdx
 681     __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
 682 
 683     // make sure that the vm_results are cleared (may be unnecessary)
 684     __ movptr(Address(thread, JavaThread::vm_result_offset()),   NULL_WORD);
 685     __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 686     break;
 687   case handle_exception_nofpu_id:
 688   case handle_exception_id:
 689     // At this point all registers MAY be live.
 690     oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
 691     break;
 692   case handle_exception_from_callee_id: {
 693     // At this point all registers except exception oop (RAX) and
 694     // exception pc (RDX) are dead.
 695     const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
 696     oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
 697     sasm->set_frame_size(frame_size);
 698     WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
 699     break;
 700   }
 701   default:  ShouldNotReachHere();
 702   }
 703 
 704 #ifdef TIERED
 705   // C2 can leave the fpu stack dirty
 706   if (UseSSE < 2) {
 707     __ empty_FPU_stack();
 708   }
 709 #endif // TIERED
 710 
 711   // verify that only rax, and rdx is valid at this time
 712   __ invalidate_registers(false, true, true, false, true, true);
 713   // verify that rax, contains a valid exception
 714   __ verify_not_null_oop(exception_oop);
 715 
 716   // load address of JavaThread object for thread-local data
 717   NOT_LP64(__ get_thread(thread);)
 718 
 719 #ifdef ASSERT
 720   // check that fields in JavaThread for exception oop and issuing pc are
 721   // empty before writing to them
 722   Label oop_empty;
 723   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
 724   __ jcc(Assembler::equal, oop_empty);
 725   __ stop("exception oop already set");
 726   __ bind(oop_empty);
 727 
 728   Label pc_empty;
 729   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 730   __ jcc(Assembler::equal, pc_empty);
 731   __ stop("exception pc already set");
 732   __ bind(pc_empty);
 733 #endif
 734 
 735   // save exception oop and issuing pc into JavaThread
 736   // (exception handler will load it from here)
 737   __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
 738   __ movptr(Address(thread, JavaThread::exception_pc_offset()),  exception_pc);
 739 
 740   // patch throwing pc into return address (has bci & oop map)
 741   __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
 742 
 743   // compute the exception handler.
 744   // the exception oop and the throwing pc are read from the fields in JavaThread
 745   int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
 746   oop_maps->add_gc_map(call_offset, oop_map);
 747 
 748   // rax: handler address
 749   //      will be the deopt blob if nmethod was deoptimized while we looked up
 750   //      handler regardless of whether handler existed in the nmethod.
 751 
 752   // only rax, is valid at this time, all other registers have been destroyed by the runtime call
 753   __ invalidate_registers(false, true, true, true, true, true);
 754 
 755   // patch the return address, this stub will directly return to the exception handler
 756   __ movptr(Address(rbp, 1*BytesPerWord), rax);
 757 
 758   switch (id) {
 759   case forward_exception_id:
 760   case handle_exception_nofpu_id:
 761   case handle_exception_id:
 762     // Restore the registers that were saved at the beginning.
 763     restore_live_registers(sasm, id != handle_exception_nofpu_id);
 764     break;
 765   case handle_exception_from_callee_id:
 766     // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
 767     // since we do a leave anyway.
 768 
 769     // Pop the return address.
 770     __ leave();
 771     __ pop(rcx);
 772     __ jmp(rcx);  // jump to exception handler
 773     break;
 774   default:  ShouldNotReachHere();
 775   }
 776 
 777   return oop_maps;
 778 }
 779 
 780 
 781 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
 782   // incoming parameters
 783   const Register exception_oop = rax;
 784   // callee-saved copy of exception_oop during runtime call
 785   const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
 786   // other registers used in this stub
 787   const Register exception_pc = rdx;
 788   const Register handler_addr = rbx;
 789   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 790 
 791   // verify that only rax, is valid at this time
 792   __ invalidate_registers(false, true, true, true, true, true);
 793 
 794 #ifdef ASSERT
 795   // check that fields in JavaThread for exception oop and issuing pc are empty
 796   NOT_LP64(__ get_thread(thread);)
 797   Label oop_empty;
 798   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
 799   __ jcc(Assembler::equal, oop_empty);
 800   __ stop("exception oop must be empty");
 801   __ bind(oop_empty);
 802 
 803   Label pc_empty;
 804   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 805   __ jcc(Assembler::equal, pc_empty);
 806   __ stop("exception pc must be empty");
 807   __ bind(pc_empty);
 808 #endif
 809 
 810   // clear the FPU stack in case any FPU results are left behind
 811   __ empty_FPU_stack();
 812 
 813   // save exception_oop in callee-saved register to preserve it during runtime calls
 814   __ verify_not_null_oop(exception_oop);
 815   __ movptr(exception_oop_callee_saved, exception_oop);
 816 
 817   NOT_LP64(__ get_thread(thread);)
 818   // Get return address (is on top of stack after leave).
 819   __ movptr(exception_pc, Address(rsp, 0));
 820 
 821   // search the exception handler address of the caller (using the return address)
 822   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
 823   // rax: exception handler address of the caller
 824 
 825   // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
 826   __ invalidate_registers(false, true, true, true, false, true);
 827 
 828   // move result of call into correct register
 829   __ movptr(handler_addr, rax);
 830 
 831   // Restore exception oop to RAX (required convention of exception handler).
 832   __ movptr(exception_oop, exception_oop_callee_saved);
 833 
 834   // verify that there is really a valid exception in rax
 835   __ verify_not_null_oop(exception_oop);
 836 
 837   // get throwing pc (= return address).
 838   // rdx has been destroyed by the call, so it must be set again
 839   // the pop is also necessary to simulate the effect of a ret(0)
 840   __ pop(exception_pc);
 841 
 842   // continue at exception handler (return address removed)
 843   // note: do *not* remove arguments when unwinding the
 844   //       activation since the caller assumes having
 845   //       all arguments on the stack when entering the
 846   //       runtime to determine the exception handler
 847   //       (GC happens at call site with arguments!)
 848   // rax: exception oop
 849   // rdx: throwing pc
 850   // rbx: exception handler
 851   __ jmp(handler_addr);
 852 }
 853 
 854 
 855 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
 856   // use the maximum number of runtime-arguments here because it is difficult to
 857   // distinguish each RT-Call.
 858   // Note: This number affects also the RT-Call in generate_handle_exception because
 859   //       the oop-map is shared for all calls.
 860   const int num_rt_args = 2;  // thread + dummy
 861 
 862   DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
 863   assert(deopt_blob != NULL, "deoptimization blob must have been created");
 864 
 865   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 866 
 867 #ifdef _LP64
 868   const Register thread = r15_thread;
 869   // No need to worry about dummy
 870   __ mov(c_rarg0, thread);
 871 #else
 872   __ push(rax); // push dummy
 873 
 874   const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
 875   // push java thread (becomes first argument of C function)
 876   __ get_thread(thread);
 877   __ push(thread);
 878 #endif // _LP64
 879   __ set_last_Java_frame(thread, noreg, rbp, NULL);
 880   // do the call
 881   __ call(RuntimeAddress(target));
 882   OopMapSet* oop_maps = new OopMapSet();
 883   oop_maps->add_gc_map(__ offset(), oop_map);
 884   // verify callee-saved register
 885 #ifdef ASSERT
 886   guarantee(thread != rax, "change this code");
 887   __ push(rax);
 888   { Label L;
 889     __ get_thread(rax);
 890     __ cmpptr(thread, rax);
 891     __ jcc(Assembler::equal, L);
 892     __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
 893     __ bind(L);
 894   }
 895   __ pop(rax);
 896 #endif
 897   __ reset_last_Java_frame(thread, true);
 898 #ifndef _LP64
 899   __ pop(rcx); // discard thread arg
 900   __ pop(rcx); // discard dummy
 901 #endif // _LP64
 902 
 903   // check for pending exceptions
 904   { Label L;
 905     __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
 906     __ jcc(Assembler::equal, L);
 907     // exception pending => remove activation and forward to exception handler
 908 
 909     __ testptr(rax, rax);                                   // have we deoptimized?
 910     __ jump_cc(Assembler::equal,
 911                RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 912 
 913     // the deopt blob expects exceptions in the special fields of
 914     // JavaThread, so copy and clear pending exception.
 915 
 916     // load and clear pending exception
 917     __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
 918     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 919 
 920     // check that there is really a valid exception
 921     __ verify_not_null_oop(rax);
 922 
 923     // load throwing pc: this is the return address of the stub
 924     __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
 925 
 926 #ifdef ASSERT
 927     // check that fields in JavaThread for exception oop and issuing pc are empty
 928     Label oop_empty;
 929     __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
 930     __ jcc(Assembler::equal, oop_empty);
 931     __ stop("exception oop must be empty");
 932     __ bind(oop_empty);
 933 
 934     Label pc_empty;
 935     __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
 936     __ jcc(Assembler::equal, pc_empty);
 937     __ stop("exception pc must be empty");
 938     __ bind(pc_empty);
 939 #endif
 940 
 941     // store exception oop and throwing pc to JavaThread
 942     __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
 943     __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
 944 
 945     restore_live_registers(sasm);
 946 
 947     __ leave();
 948     __ addptr(rsp, BytesPerWord);  // remove return address from stack
 949 
 950     // Forward the exception directly to deopt blob. We can blow no
 951     // registers and must leave throwing pc on the stack.  A patch may
 952     // have values live in registers so the entry point with the
 953     // exception in tls.
 954     __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
 955 
 956     __ bind(L);
 957   }
 958 
 959 
 960   // Runtime will return true if the nmethod has been deoptimized during
 961   // the patching process. In that case we must do a deopt reexecute instead.
 962 
 963   Label cont;
 964 
 965   __ testptr(rax, rax);                                 // have we deoptimized?
 966   __ jcc(Assembler::equal, cont);                       // no
 967 
 968   // Will reexecute. Proper return address is already on the stack we just restore
 969   // registers, pop all of our frame but the return address and jump to the deopt blob
 970   restore_live_registers(sasm);
 971   __ leave();
 972   __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
 973 
 974   __ bind(cont);
 975   restore_live_registers(sasm);
 976   __ leave();
 977   __ ret(0);
 978 
 979   return oop_maps;
 980 }
 981 
 982 
 983 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
 984 
 985   // for better readability
 986   const bool must_gc_arguments = true;
 987   const bool dont_gc_arguments = false;
 988 
 989   // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
 990   bool save_fpu_registers = true;
 991 
 992   // stub code & info for the different stubs
 993   OopMapSet* oop_maps = NULL;
 994   switch (id) {
 995     case forward_exception_id:
 996       {
 997         oop_maps = generate_handle_exception(id, sasm);
 998         __ leave();
 999         __ ret(0);
1000       }
1001       break;
1002 
1003     case new_instance_id:
1004     case fast_new_instance_id:
1005     case fast_new_instance_init_check_id:
1006       {
1007         Register klass = rdx; // Incoming
1008         Register obj   = rax; // Result
1009 
1010         if (id == new_instance_id) {
1011           __ set_info("new_instance", dont_gc_arguments);
1012         } else if (id == fast_new_instance_id) {
1013           __ set_info("fast new_instance", dont_gc_arguments);
1014         } else {
1015           assert(id == fast_new_instance_init_check_id, "bad StubID");
1016           __ set_info("fast new_instance init check", dont_gc_arguments);
1017         }
1018 
1019         // If TLAB is disabled, see if there is support for inlining contiguous
1020         // allocations.
1021         // Otherwise, just go to the slow path.
1022         if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && !UseTLAB
1023             && Universe::heap()->supports_inline_contig_alloc()) {
1024           Label slow_path;
1025           Register obj_size = rcx;
1026           Register t1       = rbx;
1027           Register t2       = rsi;
1028           assert_different_registers(klass, obj, obj_size, t1, t2);
1029 
1030           __ push(rdi);
1031           __ push(rbx);
1032 
1033           if (id == fast_new_instance_init_check_id) {
1034             // make sure the klass is initialized
1035             __ cmpb(Address(klass, InstanceKlass::init_state_offset()), InstanceKlass::fully_initialized);
1036             __ jcc(Assembler::notEqual, slow_path);
1037           }
1038 
1039 #ifdef ASSERT
1040           // assert object can be fast path allocated
1041           {
1042             Label ok, not_ok;
1043             __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1044             __ cmpl(obj_size, 0);  // make sure it's an instance (LH > 0)
1045             __ jcc(Assembler::lessEqual, not_ok);
1046             __ testl(obj_size, Klass::_lh_instance_slow_path_bit);
1047             __ jcc(Assembler::zero, ok);
1048             __ bind(not_ok);
1049             __ stop("assert(can be fast path allocated)");
1050             __ should_not_reach_here();
1051             __ bind(ok);
1052           }
1053 #endif // ASSERT
1054 
1055           const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
1056           NOT_LP64(__ get_thread(thread));
1057 
1058           // get the instance size (size is postive so movl is fine for 64bit)
1059           __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1060 
1061           __ eden_allocate(thread, obj, obj_size, 0, t1, slow_path);
1062 
1063           __ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ false);
1064           __ verify_oop(obj);
1065           __ pop(rbx);
1066           __ pop(rdi);
1067           __ ret(0);
1068 
1069           __ bind(slow_path);
1070           __ pop(rbx);
1071           __ pop(rdi);
1072         }
1073 
1074         __ enter();
1075         OopMap* map = save_live_registers(sasm, 2);
1076         int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1077         oop_maps = new OopMapSet();
1078         oop_maps->add_gc_map(call_offset, map);
1079         restore_live_registers_except_rax(sasm);
1080         __ verify_oop(obj);
1081         __ leave();
1082         __ ret(0);
1083 
1084         // rax,: new instance
1085       }
1086 
1087       break;
1088 
1089     case counter_overflow_id:
1090       {
1091         Register bci = rax, method = rbx;
1092         __ enter();
1093         OopMap* map = save_live_registers(sasm, 3);
1094         // Retrieve bci
1095         __ movl(bci, Address(rbp, 2*BytesPerWord));
1096         // And a pointer to the Method*
1097         __ movptr(method, Address(rbp, 3*BytesPerWord));
1098         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1099         oop_maps = new OopMapSet();
1100         oop_maps->add_gc_map(call_offset, map);
1101         restore_live_registers(sasm);
1102         __ leave();
1103         __ ret(0);
1104       }
1105       break;
1106 
1107     case new_type_array_id:
1108     case new_object_array_id:
1109       {
1110         Register length   = rbx; // Incoming
1111         Register klass    = rdx; // Incoming
1112         Register obj      = rax; // Result
1113 
1114         if (id == new_type_array_id) {
1115           __ set_info("new_type_array", dont_gc_arguments);
1116         } else {
1117           __ set_info("new_object_array", dont_gc_arguments);
1118         }
1119 
1120 #ifdef ASSERT
1121         // assert object type is really an array of the proper kind
1122         {
1123           Label ok;
1124           Register t0 = obj;
1125           __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1126           __ sarl(t0, Klass::_lh_array_tag_shift);
1127           int tag = ((id == new_type_array_id)
1128                      ? Klass::_lh_array_tag_type_value
1129                      : Klass::_lh_array_tag_obj_value);
1130           __ cmpl(t0, tag);
1131           __ jcc(Assembler::equal, ok);
1132           __ stop("assert(is an array klass)");
1133           __ should_not_reach_here();
1134           __ bind(ok);
1135         }
1136 #endif // ASSERT
1137 
1138         // If TLAB is disabled, see if there is support for inlining contiguous
1139         // allocations.
1140         // Otherwise, just go to the slow path.
1141         if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
1142           Register arr_size = rsi;
1143           Register t1       = rcx;  // must be rcx for use as shift count
1144           Register t2       = rdi;
1145           Label slow_path;
1146 
1147           // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1148           // since size is positive movl does right thing on 64bit
1149           __ movl(t1, Address(klass, Klass::layout_helper_offset()));
1150           // since size is postive movl does right thing on 64bit
1151           __ movl(arr_size, length);
1152           assert(t1 == rcx, "fixed register usage");
1153           __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1154           __ shrptr(t1, Klass::_lh_header_size_shift);
1155           __ andptr(t1, Klass::_lh_header_size_mask);
1156           __ addptr(arr_size, t1);
1157           __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1158           __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1159 
1160           // Using t2 for non 64-bit.
1161           const Register thread = NOT_LP64(t2) LP64_ONLY(r15_thread);
1162           NOT_LP64(__ get_thread(thread));
1163           __ eden_allocate(thread, obj, arr_size, 0, t1, slow_path);  // preserves arr_size
1164 
1165           __ initialize_header(obj, klass, length, t1, t2);
1166           __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
1167           assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1168           assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1169           __ andptr(t1, Klass::_lh_header_size_mask);
1170           __ subptr(arr_size, t1);  // body length
1171           __ addptr(t1, obj);       // body start
1172           __ initialize_body(t1, arr_size, 0, t2);
1173           __ verify_oop(obj);
1174           __ ret(0);
1175 
1176           __ bind(slow_path);
1177         }
1178 
1179         __ enter();
1180         OopMap* map = save_live_registers(sasm, 3);
1181         int call_offset;
1182         if (id == new_type_array_id) {
1183           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1184         } else {
1185           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1186         }
1187 
1188         oop_maps = new OopMapSet();
1189         oop_maps->add_gc_map(call_offset, map);
1190         restore_live_registers_except_rax(sasm);
1191 
1192         __ verify_oop(obj);
1193         __ leave();
1194         __ ret(0);
1195 
1196         // rax,: new array
1197       }
1198       break;
1199 
1200     case new_multi_array_id:
1201       { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1202         // rax,: klass
1203         // rbx,: rank
1204         // rcx: address of 1st dimension
1205         OopMap* map = save_live_registers(sasm, 4);
1206         int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1207 
1208         oop_maps = new OopMapSet();
1209         oop_maps->add_gc_map(call_offset, map);
1210         restore_live_registers_except_rax(sasm);
1211 
1212         // rax,: new multi array
1213         __ verify_oop(rax);
1214       }
1215       break;
1216 
1217     case register_finalizer_id:
1218       {
1219         __ set_info("register_finalizer", dont_gc_arguments);
1220 
1221         // This is called via call_runtime so the arguments
1222         // will be place in C abi locations
1223 
1224 #ifdef _LP64
1225         __ verify_oop(c_rarg0);
1226         __ mov(rax, c_rarg0);
1227 #else
1228         // The object is passed on the stack and we haven't pushed a
1229         // frame yet so it's one work away from top of stack.
1230         __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1231         __ verify_oop(rax);
1232 #endif // _LP64
1233 
1234         // load the klass and check the has finalizer flag
1235         Label register_finalizer;
1236         Register t = rsi;
1237         __ load_klass(t, rax);
1238         __ movl(t, Address(t, Klass::access_flags_offset()));
1239         __ testl(t, JVM_ACC_HAS_FINALIZER);
1240         __ jcc(Assembler::notZero, register_finalizer);
1241         __ ret(0);
1242 
1243         __ bind(register_finalizer);
1244         __ enter();
1245         OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1246         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1247         oop_maps = new OopMapSet();
1248         oop_maps->add_gc_map(call_offset, oop_map);
1249 
1250         // Now restore all the live registers
1251         restore_live_registers(sasm);
1252 
1253         __ leave();
1254         __ ret(0);
1255       }
1256       break;
1257 
1258     case throw_range_check_failed_id:
1259       { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1260         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1261       }
1262       break;
1263 
1264     case throw_index_exception_id:
1265       { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1266         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1267       }
1268       break;
1269 
1270     case throw_div0_exception_id:
1271       { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1272         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1273       }
1274       break;
1275 
1276     case throw_null_pointer_exception_id:
1277       { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1278         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1279       }
1280       break;
1281 
1282     case handle_exception_nofpu_id:
1283     case handle_exception_id:
1284       { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1285         oop_maps = generate_handle_exception(id, sasm);
1286       }
1287       break;
1288 
1289     case handle_exception_from_callee_id:
1290       { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1291         oop_maps = generate_handle_exception(id, sasm);
1292       }
1293       break;
1294 
1295     case unwind_exception_id:
1296       { __ set_info("unwind_exception", dont_gc_arguments);
1297         // note: no stubframe since we are about to leave the current
1298         //       activation and we are calling a leaf VM function only.
1299         generate_unwind_exception(sasm);
1300       }
1301       break;
1302 
1303     case throw_array_store_exception_id:
1304       { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1305         // tos + 0: link
1306         //     + 1: return address
1307         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1308       }
1309       break;
1310 
1311     case throw_class_cast_exception_id:
1312       { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1313         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1314       }
1315       break;
1316 
1317     case throw_incompatible_class_change_error_id:
1318       { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1319         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1320       }
1321       break;
1322 
1323     case slow_subtype_check_id:
1324       {
1325         // Typical calling sequence:
1326         // __ push(klass_RInfo);  // object klass or other subclass
1327         // __ push(sup_k_RInfo);  // array element klass or other superclass
1328         // __ call(slow_subtype_check);
1329         // Note that the subclass is pushed first, and is therefore deepest.
1330         // Previous versions of this code reversed the names 'sub' and 'super'.
1331         // This was operationally harmless but made the code unreadable.
1332         enum layout {
1333           rax_off, SLOT2(raxH_off)
1334           rcx_off, SLOT2(rcxH_off)
1335           rsi_off, SLOT2(rsiH_off)
1336           rdi_off, SLOT2(rdiH_off)
1337           // saved_rbp_off, SLOT2(saved_rbpH_off)
1338           return_off, SLOT2(returnH_off)
1339           sup_k_off, SLOT2(sup_kH_off)
1340           klass_off, SLOT2(superH_off)
1341           framesize,
1342           result_off = klass_off  // deepest argument is also the return value
1343         };
1344 
1345         __ set_info("slow_subtype_check", dont_gc_arguments);
1346         __ push(rdi);
1347         __ push(rsi);
1348         __ push(rcx);
1349         __ push(rax);
1350 
1351         // This is called by pushing args and not with C abi
1352         __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1353         __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1354 
1355         Label miss;
1356         __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
1357 
1358         // fallthrough on success:
1359         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1360         __ pop(rax);
1361         __ pop(rcx);
1362         __ pop(rsi);
1363         __ pop(rdi);
1364         __ ret(0);
1365 
1366         __ bind(miss);
1367         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1368         __ pop(rax);
1369         __ pop(rcx);
1370         __ pop(rsi);
1371         __ pop(rdi);
1372         __ ret(0);
1373       }
1374       break;
1375 
1376     case monitorenter_nofpu_id:
1377       save_fpu_registers = false;
1378       // fall through
1379     case monitorenter_id:
1380       {
1381         StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1382         OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1383 
1384         // Called with store_parameter and not C abi
1385 
1386         f.load_argument(1, rax); // rax,: object
1387         f.load_argument(0, rbx); // rbx,: lock address
1388 
1389         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1390 
1391         oop_maps = new OopMapSet();
1392         oop_maps->add_gc_map(call_offset, map);
1393         restore_live_registers(sasm, save_fpu_registers);
1394       }
1395       break;
1396 
1397     case monitorexit_nofpu_id:
1398       save_fpu_registers = false;
1399       // fall through
1400     case monitorexit_id:
1401       {
1402         StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1403         OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1404 
1405         // Called with store_parameter and not C abi
1406 
1407         f.load_argument(0, rax); // rax,: lock address
1408 
1409         // note: really a leaf routine but must setup last java sp
1410         //       => use call_RT for now (speed can be improved by
1411         //       doing last java sp setup manually)
1412         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1413 
1414         oop_maps = new OopMapSet();
1415         oop_maps->add_gc_map(call_offset, map);
1416         restore_live_registers(sasm, save_fpu_registers);
1417       }
1418       break;
1419 
1420     case deoptimize_id:
1421       {
1422         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1423         const int num_rt_args = 2;  // thread, trap_request
1424         OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1425         f.load_argument(0, rax);
1426         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1427         oop_maps = new OopMapSet();
1428         oop_maps->add_gc_map(call_offset, oop_map);
1429         restore_live_registers(sasm);
1430         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1431         assert(deopt_blob != NULL, "deoptimization blob must have been created");
1432         __ leave();
1433         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1434       }
1435       break;
1436 
1437     case access_field_patching_id:
1438       { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1439         // we should set up register map
1440         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1441       }
1442       break;
1443 
1444     case load_klass_patching_id:
1445       { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1446         // we should set up register map
1447         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1448       }
1449       break;
1450 
1451     case load_mirror_patching_id:
1452       { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1453         // we should set up register map
1454         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1455       }
1456       break;
1457 
1458     case load_appendix_patching_id:
1459       { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1460         // we should set up register map
1461         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1462       }
1463       break;
1464 
1465     case dtrace_object_alloc_id:
1466       { // rax,: object
1467         StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1468         // we can't gc here so skip the oopmap but make sure that all
1469         // the live registers get saved.
1470         save_live_registers(sasm, 1);
1471 
1472         __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1473         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
1474         NOT_LP64(__ pop(rax));
1475 
1476         restore_live_registers(sasm);
1477       }
1478       break;
1479 
1480     case fpu2long_stub_id:
1481       {
1482         // rax, and rdx are destroyed, but should be free since the result is returned there
1483         // preserve rsi,ecx
1484         __ push(rsi);
1485         __ push(rcx);
1486         LP64_ONLY(__ push(rdx);)
1487 
1488         // check for NaN
1489         Label return0, do_return, return_min_jlong, do_convert;
1490 
1491         Address value_high_word(rsp, wordSize + 4);
1492         Address value_low_word(rsp, wordSize);
1493         Address result_high_word(rsp, 3*wordSize + 4);
1494         Address result_low_word(rsp, 3*wordSize);
1495 
1496         __ subptr(rsp, 32);                    // more than enough on 32bit
1497         __ fst_d(value_low_word);
1498         __ movl(rax, value_high_word);
1499         __ andl(rax, 0x7ff00000);
1500         __ cmpl(rax, 0x7ff00000);
1501         __ jcc(Assembler::notEqual, do_convert);
1502         __ movl(rax, value_high_word);
1503         __ andl(rax, 0xfffff);
1504         __ orl(rax, value_low_word);
1505         __ jcc(Assembler::notZero, return0);
1506 
1507         __ bind(do_convert);
1508         __ fnstcw(Address(rsp, 0));
1509         __ movzwl(rax, Address(rsp, 0));
1510         __ orl(rax, 0xc00);
1511         __ movw(Address(rsp, 2), rax);
1512         __ fldcw(Address(rsp, 2));
1513         __ fwait();
1514         __ fistp_d(result_low_word);
1515         __ fldcw(Address(rsp, 0));
1516         __ fwait();
1517         // This gets the entire long in rax on 64bit
1518         __ movptr(rax, result_low_word);
1519         // testing of high bits
1520         __ movl(rdx, result_high_word);
1521         __ mov(rcx, rax);
1522         // What the heck is the point of the next instruction???
1523         __ xorl(rcx, 0x0);
1524         __ movl(rsi, 0x80000000);
1525         __ xorl(rsi, rdx);
1526         __ orl(rcx, rsi);
1527         __ jcc(Assembler::notEqual, do_return);
1528         __ fldz();
1529         __ fcomp_d(value_low_word);
1530         __ fnstsw_ax();
1531 #ifdef _LP64
1532         __ testl(rax, 0x4100);  // ZF & CF == 0
1533         __ jcc(Assembler::equal, return_min_jlong);
1534 #else
1535         __ sahf();
1536         __ jcc(Assembler::above, return_min_jlong);
1537 #endif // _LP64
1538         // return max_jlong
1539 #ifndef _LP64
1540         __ movl(rdx, 0x7fffffff);
1541         __ movl(rax, 0xffffffff);
1542 #else
1543         __ mov64(rax, CONST64(0x7fffffffffffffff));
1544 #endif // _LP64
1545         __ jmp(do_return);
1546 
1547         __ bind(return_min_jlong);
1548 #ifndef _LP64
1549         __ movl(rdx, 0x80000000);
1550         __ xorl(rax, rax);
1551 #else
1552         __ mov64(rax, UCONST64(0x8000000000000000));
1553 #endif // _LP64
1554         __ jmp(do_return);
1555 
1556         __ bind(return0);
1557         __ fpop();
1558 #ifndef _LP64
1559         __ xorptr(rdx,rdx);
1560         __ xorptr(rax,rax);
1561 #else
1562         __ xorptr(rax, rax);
1563 #endif // _LP64
1564 
1565         __ bind(do_return);
1566         __ addptr(rsp, 32);
1567         LP64_ONLY(__ pop(rdx);)
1568         __ pop(rcx);
1569         __ pop(rsi);
1570         __ ret(0);
1571       }
1572       break;
1573 
1574     case predicate_failed_trap_id:
1575       {
1576         StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1577 
1578         OopMap* map = save_live_registers(sasm, 1);
1579 
1580         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1581         oop_maps = new OopMapSet();
1582         oop_maps->add_gc_map(call_offset, map);
1583         restore_live_registers(sasm);
1584         __ leave();
1585         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1586         assert(deopt_blob != NULL, "deoptimization blob must have been created");
1587 
1588         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1589       }
1590       break;
1591 
1592     default:
1593       { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1594         __ movptr(rax, (int)id);
1595         __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1596         __ should_not_reach_here();
1597       }
1598       break;
1599   }
1600   return oop_maps;
1601 }
1602 
1603 #undef __
1604 
1605 const char *Runtime1::pd_name_for_address(address entry) {
1606   return "<unknown function>";
1607 }