1 /*
2 * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "ci/ciUtilities.hpp"
32 #include "compiler/compilerDefinitions.inline.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/cardTable.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/collectedHeap.hpp"
37 #include "gc/shared/tlab_globals.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "memory/universe.hpp"
40 #include "nativeInst_x86.hpp"
41 #include "oops/oop.inline.hpp"
42 #include "prims/jvmtiExport.hpp"
43 #include "register_x86.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/signature.hpp"
46 #include "runtime/stubRoutines.hpp"
47 #include "runtime/vframeArray.hpp"
48 #include "utilities/macros.hpp"
49 #include "vmreg_x86.inline.hpp"
50
51 // Implementation of StubAssembler
52
53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
54 // setup registers
55 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
56 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
57 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
58 assert(args_size >= 0, "illegal args_size");
59 bool align_stack = false;
60 #ifdef _LP64
61 // At a method handle call, the stack may not be properly aligned
62 // when returning with an exception.
63 align_stack = (stub_id() == (int)C1StubId::handle_exception_from_callee_id);
64 #endif
65
66 #ifdef _LP64
67 mov(c_rarg0, thread);
68 set_num_rt_args(0); // Nothing on stack
69 #else
70 set_num_rt_args(1 + args_size);
71
72 // push java thread (becomes first argument of C function)
73 get_thread(thread);
74 push(thread);
75 #endif // _LP64
76
77 int call_offset = -1;
78 if (!align_stack) {
79 set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
80 } else {
81 address the_pc = pc();
82 call_offset = offset();
83 set_last_Java_frame(thread, noreg, rbp, the_pc, rscratch1);
84 andptr(rsp, -(StackAlignmentInBytes)); // Align stack
85 }
86
87 // do the call
88 call(RuntimeAddress(entry));
89 if (!align_stack) {
90 call_offset = offset();
91 }
92 // verify callee-saved register
93 #ifdef ASSERT
94 guarantee(thread != rax, "change this code");
95 push(rax);
96 { Label L;
97 get_thread(rax);
98 cmpptr(thread, rax);
99 jcc(Assembler::equal, L);
100 int3();
101 stop("StubAssembler::call_RT: rdi not callee saved?");
102 bind(L);
103 }
104 pop(rax);
105 #endif
106 reset_last_Java_frame(thread, true);
107
108 // discard thread and arguments
109 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
110
111 // check for pending exceptions
112 { Label L;
113 cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
114 jcc(Assembler::equal, L);
115 // exception pending => remove activation and forward to exception handler
116 movptr(rax, Address(thread, Thread::pending_exception_offset()));
117 // make sure that the vm_results are cleared
118 if (oop_result1->is_valid()) {
119 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
120 }
121 if (metadata_result->is_valid()) {
122 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
123 }
124 if (frame_size() == no_frame_size) {
125 leave();
126 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
127 } else if (_stub_id == (int)C1StubId::forward_exception_id) {
128 should_not_reach_here();
129 } else {
130 jump(RuntimeAddress(Runtime1::entry_for(C1StubId::forward_exception_id)));
131 }
132 bind(L);
133 }
134 // get oop results if there are any and reset the values in the thread
135 if (oop_result1->is_valid()) {
136 get_vm_result(oop_result1, thread);
137 }
138 if (metadata_result->is_valid()) {
139 get_vm_result_2(metadata_result, thread);
140 }
141
142 assert(call_offset >= 0, "Should be set");
143 return call_offset;
144 }
145
146
147 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
148 #ifdef _LP64
149 mov(c_rarg1, arg1);
150 #else
151 push(arg1);
152 #endif // _LP64
153 return call_RT(oop_result1, metadata_result, entry, 1);
154 }
155
156
157 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
158 #ifdef _LP64
159 if (c_rarg1 == arg2) {
160 if (c_rarg2 == arg1) {
161 xchgq(arg1, arg2);
162 } else {
163 mov(c_rarg2, arg2);
164 mov(c_rarg1, arg1);
165 }
166 } else {
167 mov(c_rarg1, arg1);
168 mov(c_rarg2, arg2);
169 }
170 #else
171 push(arg2);
172 push(arg1);
173 #endif // _LP64
174 return call_RT(oop_result1, metadata_result, entry, 2);
175 }
176
177
178 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
179 #ifdef _LP64
180 // if there is any conflict use the stack
181 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
182 arg2 == c_rarg1 || arg2 == c_rarg3 ||
183 arg3 == c_rarg1 || arg3 == c_rarg2) {
184 push(arg3);
185 push(arg2);
186 push(arg1);
187 pop(c_rarg1);
188 pop(c_rarg2);
189 pop(c_rarg3);
190 } else {
191 mov(c_rarg1, arg1);
192 mov(c_rarg2, arg2);
193 mov(c_rarg3, arg3);
194 }
195 #else
196 push(arg3);
197 push(arg2);
198 push(arg1);
199 #endif // _LP64
200 return call_RT(oop_result1, metadata_result, entry, 3);
201 }
202
203
204 // Implementation of StubFrame
205
206 class StubFrame: public StackObj {
207 private:
208 StubAssembler* _sasm;
209 bool _use_pop_on_epilog;
210
211 public:
212 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog = false);
213 void load_argument(int offset_in_words, Register reg);
214
215 ~StubFrame();
216 };
217
218 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
219 set_info(name, must_gc_arguments);
220 enter();
221 }
222
223 void StubAssembler::epilogue(bool use_pop) {
224 // Avoid using a leave instruction when this frame may
225 // have been frozen, since the current value of rbp
226 // restored from the stub would be invalid. We still
227 // must restore the rbp value saved on enter though.
228 use_pop ? pop(rbp) : leave();
229 ret(0);
230 }
231
232 #define __ _sasm->
233
234 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog) {
235 _sasm = sasm;
236 _use_pop_on_epilog = use_pop_on_epilog;
237 __ prologue(name, must_gc_arguments);
238 }
239
240 // load parameters that were stored with LIR_Assembler::store_parameter
241 // Note: offsets for store_parameter and load_argument must match
242 void StubFrame::load_argument(int offset_in_words, Register reg) {
243 __ load_parameter(offset_in_words, reg);
244 }
245
246
247 StubFrame::~StubFrame() {
248 __ epilogue(_use_pop_on_epilog);
249 }
250
251 #undef __
252
253
254 // Implementation of Runtime1
255
256 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
257 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
258
259 // Stack layout for saving/restoring all the registers needed during a runtime
260 // call (this includes deoptimization)
261 // Note: note that users of this frame may well have arguments to some runtime
262 // while these values are on the stack. These positions neglect those arguments
263 // but the code in save_live_registers will take the argument count into
264 // account.
265 //
266 #ifdef _LP64
267 #define SLOT2(x) x,
268 #define SLOT_PER_WORD 2
269 #else
270 #define SLOT2(x)
271 #define SLOT_PER_WORD 1
272 #endif // _LP64
273
274 enum reg_save_layout {
275 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
276 // happen and will assert if the stack size we create is misaligned
277 #ifdef _LP64
278 align_dummy_0, align_dummy_1,
279 #endif // _LP64
280 #ifdef _WIN64
281 // Windows always allocates space for it's argument registers (see
282 // frame::arg_reg_save_area_bytes).
283 arg_reg_save_1, arg_reg_save_1H, // 0, 4
284 arg_reg_save_2, arg_reg_save_2H, // 8, 12
285 arg_reg_save_3, arg_reg_save_3H, // 16, 20
286 arg_reg_save_4, arg_reg_save_4H, // 24, 28
287 #endif // _WIN64
288 xmm_regs_as_doubles_off, // 32
289 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
290 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
291 // fpu_state_end_off is exclusive
292 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
293 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
294 extra_space_offset, // 360
295 #ifdef _LP64
296 r15_off = extra_space_offset, r15H_off, // 360, 364
297 r14_off, r14H_off, // 368, 372
298 r13_off, r13H_off, // 376, 380
299 r12_off, r12H_off, // 384, 388
300 r11_off, r11H_off, // 392, 396
301 r10_off, r10H_off, // 400, 404
302 r9_off, r9H_off, // 408, 412
303 r8_off, r8H_off, // 416, 420
304 rdi_off, rdiH_off, // 424, 428
305 #else
306 rdi_off = extra_space_offset,
307 #endif // _LP64
308 rsi_off, SLOT2(rsiH_off) // 432, 436
309 rbp_off, SLOT2(rbpH_off) // 440, 444
310 rsp_off, SLOT2(rspH_off) // 448, 452
311 rbx_off, SLOT2(rbxH_off) // 456, 460
312 rdx_off, SLOT2(rdxH_off) // 464, 468
313 rcx_off, SLOT2(rcxH_off) // 472, 476
314 rax_off, SLOT2(raxH_off) // 480, 484
315 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
316 return_off, SLOT2(returnH_off) // 496, 500
317 reg_save_frame_size // As noted: neglects any parameters to runtime // 504
318 };
319
320 // Save off registers which might be killed by calls into the runtime.
321 // Tries to smart of about FP registers. In particular we separate
322 // saving and describing the FPU registers for deoptimization since we
323 // have to save the FPU registers twice if we describe them and on P4
324 // saving FPU registers which don't contain anything appears
325 // expensive. The deopt blob is the only thing which needs to
326 // describe FPU registers. In all other cases it should be sufficient
327 // to simply save their current value.
328 //
329 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
330 bool save_fpu_registers = true) {
331
332 // In 64bit all the args are in regs so there are no additional stack slots
333 LP64_ONLY(num_rt_args = 0);
334 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
335 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
336 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
337
338 // record saved value locations in an OopMap
339 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
340 OopMap* map = new OopMap(frame_size_in_slots, 0);
341 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
342 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
343 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
344 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
345 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
346 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
347 #ifdef _LP64
348 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
349 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
350 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
351 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
352 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
353 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
354 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
355 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
356
357 // This is stupid but needed.
358 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
359 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
360 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
361 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
362 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
363 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
364
365 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
366 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
367 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
368 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
369 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
370 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
371 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
372 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
373 #endif // _LP64
374
375 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
376
377 if (save_fpu_registers) {
378 #ifndef _LP64
379 if (UseSSE < 2) {
380 int fpu_off = float_regs_as_doubles_off;
381 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
382 VMReg fpu_name_0 = FrameMap::fpu_regname(n);
383 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
384 // %%% This is really a waste but we'll keep things as they were for now
385 if (true) {
386 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
387 }
388 fpu_off += 2;
389 }
390 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
391
392 if (UseSSE == 1) {
393 int xmm_off = xmm_regs_as_doubles_off;
394 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
395 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
396 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
397 xmm_off += 2;
398 }
399 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
400 }
401 }
402 #endif // !LP64
403
404 if (UseSSE >= 2) {
405 int xmm_off = xmm_regs_as_doubles_off;
406 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
407 if (n < xmm_bypass_limit) {
408 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
409 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
410 // %%% This is really a waste but we'll keep things as they were for now
411 if (true) {
412 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
413 }
414 }
415 xmm_off += 2;
416 }
417 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
418 }
419 }
420
421 return map;
422 }
423
424 #define __ this->
425
426 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
427 __ block_comment("save_live_registers");
428
429 // Push CPU state in multiple of 16 bytes
430 #ifdef _LP64
431 __ save_legacy_gprs();
432 #else
433 __ pusha();
434 #endif
435
436 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
437 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
438
439 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
440
441 #ifdef ASSERT
442 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
443 #endif
444
445 if (save_fpu_registers) {
446 #ifndef _LP64
447 if (UseSSE < 2) {
448 // save FPU stack
449 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
450 __ fwait();
451
452 #ifdef ASSERT
453 Label ok;
454 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
455 __ jccb(Assembler::equal, ok);
456 __ stop("corrupted control word detected");
457 __ bind(ok);
458 #endif
459
460 // Reset the control word to guard against exceptions being unmasked
461 // since fstp_d can cause FPU stack underflow exceptions. Write it
462 // into the on stack copy and then reload that to make sure that the
463 // current and future values are correct.
464 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
465 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
466
467 // Save the FPU registers in de-opt-able form
468 int offset = 0;
469 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
470 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
471 offset += 8;
472 }
473
474 if (UseSSE == 1) {
475 // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
476 int offset = 0;
477 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
478 XMMRegister xmm_name = as_XMMRegister(n);
479 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
480 offset += 8;
481 }
482 }
483 }
484 #endif // !_LP64
485
486 if (UseSSE >= 2) {
487 // save XMM registers
488 // XMM registers can contain float or double values, but this is not known here,
489 // so always save them as doubles.
490 // note that float values are _not_ converted automatically, so for float values
491 // the second word contains only garbage data.
492 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
493 int offset = 0;
494 for (int n = 0; n < xmm_bypass_limit; n++) {
495 XMMRegister xmm_name = as_XMMRegister(n);
496 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
497 offset += 8;
498 }
499 }
500 }
501
502 // FPU stack must be empty now
503 NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
504 }
505
506 #undef __
507 #define __ sasm->
508
509 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
510 #ifdef _LP64
511 if (restore_fpu_registers) {
512 // restore XMM registers
513 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
514 int offset = 0;
515 for (int n = 0; n < xmm_bypass_limit; n++) {
516 XMMRegister xmm_name = as_XMMRegister(n);
517 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
518 offset += 8;
519 }
520 }
521 #else
522 if (restore_fpu_registers) {
523 if (UseSSE >= 2) {
524 // restore XMM registers
525 int xmm_bypass_limit = FrameMap::nof_xmm_regs;
526 int offset = 0;
527 for (int n = 0; n < xmm_bypass_limit; n++) {
528 XMMRegister xmm_name = as_XMMRegister(n);
529 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
530 offset += 8;
531 }
532 } else if (UseSSE == 1) {
533 // restore XMM registers(num MMX == num fpu)
534 int offset = 0;
535 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
536 XMMRegister xmm_name = as_XMMRegister(n);
537 __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
538 offset += 8;
539 }
540 }
541
542 if (UseSSE < 2) {
543 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
544 } else {
545 // check that FPU stack is really empty
546 __ verify_FPU(0, "restore_live_registers");
547 }
548 } else {
549 // check that FPU stack is really empty
550 __ verify_FPU(0, "restore_live_registers");
551 }
552 #endif // _LP64
553
554 #ifdef ASSERT
555 {
556 Label ok;
557 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
558 __ jcc(Assembler::equal, ok);
559 __ stop("bad offsets in frame");
560 __ bind(ok);
561 }
562 #endif // ASSERT
563
564 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
565 }
566
567 #undef __
568 #define __ this->
569
570 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
571 __ block_comment("restore_live_registers");
572
573 restore_fpu(this, restore_fpu_registers);
574 #ifdef _LP64
575 __ restore_legacy_gprs();
576 #else
577 __ popa();
578 #endif
579
580 }
581
582
583 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
584 __ block_comment("restore_live_registers_except_rax");
585
586 restore_fpu(this, restore_fpu_registers);
587
588 #ifdef _LP64
589 __ movptr(r15, Address(rsp, 0));
590 __ movptr(r14, Address(rsp, wordSize));
591 __ movptr(r13, Address(rsp, 2 * wordSize));
592 __ movptr(r12, Address(rsp, 3 * wordSize));
593 __ movptr(r11, Address(rsp, 4 * wordSize));
594 __ movptr(r10, Address(rsp, 5 * wordSize));
595 __ movptr(r9, Address(rsp, 6 * wordSize));
596 __ movptr(r8, Address(rsp, 7 * wordSize));
597 __ movptr(rdi, Address(rsp, 8 * wordSize));
598 __ movptr(rsi, Address(rsp, 9 * wordSize));
599 __ movptr(rbp, Address(rsp, 10 * wordSize));
600 // skip rsp
601 __ movptr(rbx, Address(rsp, 12 * wordSize));
602 __ movptr(rdx, Address(rsp, 13 * wordSize));
603 __ movptr(rcx, Address(rsp, 14 * wordSize));
604
605 __ addptr(rsp, 16 * wordSize);
606 #else
607
608 __ pop(rdi);
609 __ pop(rsi);
610 __ pop(rbp);
611 __ pop(rbx); // skip this value
612 __ pop(rbx);
613 __ pop(rdx);
614 __ pop(rcx);
615 __ addptr(rsp, BytesPerWord);
616 #endif // _LP64
617 }
618
619 #undef __
620 #define __ sasm->
621
622 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
623 bool save_fpu_registers = true) {
624 __ save_live_registers_no_oop_map(save_fpu_registers);
625 return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
626 }
627
628 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
629 __ restore_live_registers(restore_fpu_registers);
630 }
631
632 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
633 sasm->restore_live_registers_except_rax(restore_fpu_registers);
634 }
635
636
637 void Runtime1::initialize_pd() {
638 // nothing to do
639 }
640
641 uint Runtime1::runtime_blob_current_thread_offset(frame f) {
642 #ifdef _LP64
643 return r15_off / 2;
644 #else
645 Unimplemented();
646 return 0;
647 #endif
648 }
649
650 // Target: the entry point of the method that creates and posts the exception oop.
651 // has_argument: true if the exception needs arguments (passed on the stack because
652 // registers must be preserved).
653 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
654 // Preserve all registers.
655 int num_rt_args = has_argument ? (2 + 1) : 1;
656 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
657
658 // Now all registers are saved and can be used freely.
659 // Verify that no old value is used accidentally.
660 __ invalidate_registers(true, true, true, true, true, true);
661
662 // Registers used by this stub.
663 const Register temp_reg = rbx;
664
665 // Load arguments for exception that are passed as arguments into the stub.
666 if (has_argument) {
667 #ifdef _LP64
668 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
669 __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
670 #else
671 __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
672 __ push(temp_reg);
673 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
674 __ push(temp_reg);
675 #endif // _LP64
676 }
677 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
678
679 OopMapSet* oop_maps = new OopMapSet();
680 oop_maps->add_gc_map(call_offset, oop_map);
681
682 __ stop("should not reach here");
683
684 return oop_maps;
685 }
686
687
688 OopMapSet* Runtime1::generate_handle_exception(C1StubId id, StubAssembler *sasm) {
689 __ block_comment("generate_handle_exception");
690
691 // incoming parameters
692 const Register exception_oop = rax;
693 const Register exception_pc = rdx;
694 // other registers used in this stub
695 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
696
697 // Save registers, if required.
698 OopMapSet* oop_maps = new OopMapSet();
699 OopMap* oop_map = nullptr;
700 switch (id) {
701 case C1StubId::forward_exception_id:
702 // We're handling an exception in the context of a compiled frame.
703 // The registers have been saved in the standard places. Perform
704 // an exception lookup in the caller and dispatch to the handler
705 // if found. Otherwise unwind and dispatch to the callers
706 // exception handler.
707 oop_map = generate_oop_map(sasm, 1 /*thread*/);
708
709 // load and clear pending exception oop into RAX
710 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
711 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
712
713 // load issuing PC (the return address for this stub) into rdx
714 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
715
716 // make sure that the vm_results are cleared (may be unnecessary)
717 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
718 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
719 break;
720 case C1StubId::handle_exception_nofpu_id:
721 case C1StubId::handle_exception_id:
722 // At this point all registers MAY be live.
723 oop_map = save_live_registers(sasm, 1 /*thread*/, id != C1StubId::handle_exception_nofpu_id);
724 break;
725 case C1StubId::handle_exception_from_callee_id: {
726 // At this point all registers except exception oop (RAX) and
727 // exception pc (RDX) are dead.
728 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
729 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
730 sasm->set_frame_size(frame_size);
731 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
732 break;
733 }
734 default: ShouldNotReachHere();
735 }
736
737 #if !defined(_LP64) && defined(COMPILER2)
738 if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
739 // C2 can leave the fpu stack dirty
740 __ empty_FPU_stack();
741 }
742 #endif // !_LP64 && COMPILER2
743
744 // verify that only rax, and rdx is valid at this time
745 __ invalidate_registers(false, true, true, false, true, true);
746 // verify that rax, contains a valid exception
747 __ verify_not_null_oop(exception_oop);
748
749 // load address of JavaThread object for thread-local data
750 NOT_LP64(__ get_thread(thread);)
751
752 #ifdef ASSERT
753 // check that fields in JavaThread for exception oop and issuing pc are
754 // empty before writing to them
755 Label oop_empty;
756 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
757 __ jcc(Assembler::equal, oop_empty);
758 __ stop("exception oop already set");
759 __ bind(oop_empty);
760
761 Label pc_empty;
762 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
763 __ jcc(Assembler::equal, pc_empty);
764 __ stop("exception pc already set");
765 __ bind(pc_empty);
766 #endif
767
768 // save exception oop and issuing pc into JavaThread
769 // (exception handler will load it from here)
770 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
771 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
772
773 // patch throwing pc into return address (has bci & oop map)
774 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
775
776 // compute the exception handler.
777 // the exception oop and the throwing pc are read from the fields in JavaThread
778 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
779 oop_maps->add_gc_map(call_offset, oop_map);
780
781 // rax: handler address
782 // will be the deopt blob if nmethod was deoptimized while we looked up
783 // handler regardless of whether handler existed in the nmethod.
784
785 // only rax, is valid at this time, all other registers have been destroyed by the runtime call
786 __ invalidate_registers(false, true, true, true, true, true);
787
788 // patch the return address, this stub will directly return to the exception handler
789 __ movptr(Address(rbp, 1*BytesPerWord), rax);
790
791 switch (id) {
792 case C1StubId::forward_exception_id:
793 case C1StubId::handle_exception_nofpu_id:
794 case C1StubId::handle_exception_id:
795 // Restore the registers that were saved at the beginning.
796 restore_live_registers(sasm, id != C1StubId::handle_exception_nofpu_id);
797 break;
798 case C1StubId::handle_exception_from_callee_id:
799 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
800 // since we do a leave anyway.
801
802 // Pop the return address.
803 __ leave();
804 __ pop(rcx);
805 __ jmp(rcx); // jump to exception handler
806 break;
807 default: ShouldNotReachHere();
808 }
809
810 return oop_maps;
811 }
812
813
814 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
815 // incoming parameters
816 const Register exception_oop = rax;
817 // callee-saved copy of exception_oop during runtime call
818 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
819 // other registers used in this stub
820 const Register exception_pc = rdx;
821 const Register handler_addr = rbx;
822 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
823
824 if (AbortVMOnException) {
825 __ enter();
826 save_live_registers(sasm, 2);
827 __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), rax);
828 restore_live_registers(sasm);
829 __ leave();
830 }
831
832 // verify that only rax, is valid at this time
833 __ invalidate_registers(false, true, true, true, true, true);
834
835 #ifdef ASSERT
836 // check that fields in JavaThread for exception oop and issuing pc are empty
837 NOT_LP64(__ get_thread(thread);)
838 Label oop_empty;
839 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
840 __ jcc(Assembler::equal, oop_empty);
841 __ stop("exception oop must be empty");
842 __ bind(oop_empty);
843
844 Label pc_empty;
845 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
846 __ jcc(Assembler::equal, pc_empty);
847 __ stop("exception pc must be empty");
848 __ bind(pc_empty);
849 #endif
850
851 // clear the FPU stack in case any FPU results are left behind
852 NOT_LP64( __ empty_FPU_stack(); )
853
854 // save exception_oop in callee-saved register to preserve it during runtime calls
855 __ verify_not_null_oop(exception_oop);
856 __ movptr(exception_oop_callee_saved, exception_oop);
857
858 NOT_LP64(__ get_thread(thread);)
859 // Get return address (is on top of stack after leave).
860 __ movptr(exception_pc, Address(rsp, 0));
861
862 // search the exception handler address of the caller (using the return address)
863 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
864 // rax: exception handler address of the caller
865
866 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
867 __ invalidate_registers(false, true, true, true, false, true);
868
869 // move result of call into correct register
870 __ movptr(handler_addr, rax);
871
872 // Restore exception oop to RAX (required convention of exception handler).
873 __ movptr(exception_oop, exception_oop_callee_saved);
874
875 // verify that there is really a valid exception in rax
876 __ verify_not_null_oop(exception_oop);
877
878 // get throwing pc (= return address).
879 // rdx has been destroyed by the call, so it must be set again
880 // the pop is also necessary to simulate the effect of a ret(0)
881 __ pop(exception_pc);
882
883 // continue at exception handler (return address removed)
884 // note: do *not* remove arguments when unwinding the
885 // activation since the caller assumes having
886 // all arguments on the stack when entering the
887 // runtime to determine the exception handler
888 // (GC happens at call site with arguments!)
889 // rax: exception oop
890 // rdx: throwing pc
891 // rbx: exception handler
892 __ jmp(handler_addr);
893 }
894
895
896 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
897 // use the maximum number of runtime-arguments here because it is difficult to
898 // distinguish each RT-Call.
899 // Note: This number affects also the RT-Call in generate_handle_exception because
900 // the oop-map is shared for all calls.
901 const int num_rt_args = 2; // thread + dummy
902
903 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
904 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
905
906 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
907
908 #ifdef _LP64
909 const Register thread = r15_thread;
910 // No need to worry about dummy
911 __ mov(c_rarg0, thread);
912 #else
913 __ push(rax); // push dummy
914
915 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
916 // push java thread (becomes first argument of C function)
917 __ get_thread(thread);
918 __ push(thread);
919 #endif // _LP64
920 __ set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
921 // do the call
922 __ call(RuntimeAddress(target));
923 OopMapSet* oop_maps = new OopMapSet();
924 oop_maps->add_gc_map(__ offset(), oop_map);
925 // verify callee-saved register
926 #ifdef ASSERT
927 guarantee(thread != rax, "change this code");
928 __ push(rax);
929 { Label L;
930 __ get_thread(rax);
931 __ cmpptr(thread, rax);
932 __ jcc(Assembler::equal, L);
933 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
934 __ bind(L);
935 }
936 __ pop(rax);
937 #endif
938 __ reset_last_Java_frame(thread, true);
939 #ifndef _LP64
940 __ pop(rcx); // discard thread arg
941 __ pop(rcx); // discard dummy
942 #endif // _LP64
943
944 // check for pending exceptions
945 { Label L;
946 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
947 __ jcc(Assembler::equal, L);
948 // exception pending => remove activation and forward to exception handler
949
950 __ testptr(rax, rax); // have we deoptimized?
951 __ jump_cc(Assembler::equal,
952 RuntimeAddress(Runtime1::entry_for(C1StubId::forward_exception_id)));
953
954 // the deopt blob expects exceptions in the special fields of
955 // JavaThread, so copy and clear pending exception.
956
957 // load and clear pending exception
958 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
959 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
960
961 // check that there is really a valid exception
962 __ verify_not_null_oop(rax);
963
964 // load throwing pc: this is the return address of the stub
965 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
966
967 #ifdef ASSERT
968 // check that fields in JavaThread for exception oop and issuing pc are empty
969 Label oop_empty;
970 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
971 __ jcc(Assembler::equal, oop_empty);
972 __ stop("exception oop must be empty");
973 __ bind(oop_empty);
974
975 Label pc_empty;
976 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
977 __ jcc(Assembler::equal, pc_empty);
978 __ stop("exception pc must be empty");
979 __ bind(pc_empty);
980 #endif
981
982 // store exception oop and throwing pc to JavaThread
983 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
984 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
985
986 restore_live_registers(sasm);
987
988 __ leave();
989 __ addptr(rsp, BytesPerWord); // remove return address from stack
990
991 // Forward the exception directly to deopt blob. We can blow no
992 // registers and must leave throwing pc on the stack. A patch may
993 // have values live in registers so the entry point with the
994 // exception in tls.
995 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
996
997 __ bind(L);
998 }
999
1000
1001 // Runtime will return true if the nmethod has been deoptimized during
1002 // the patching process. In that case we must do a deopt reexecute instead.
1003
1004 Label cont;
1005
1006 __ testptr(rax, rax); // have we deoptimized?
1007 __ jcc(Assembler::equal, cont); // no
1008
1009 // Will reexecute. Proper return address is already on the stack we just restore
1010 // registers, pop all of our frame but the return address and jump to the deopt blob
1011 restore_live_registers(sasm);
1012 __ leave();
1013 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1014
1015 __ bind(cont);
1016 restore_live_registers(sasm);
1017 __ leave();
1018 __ ret(0);
1019
1020 return oop_maps;
1021 }
1022
1023
1024 OopMapSet* Runtime1::generate_code_for(C1StubId id, StubAssembler* sasm) {
1025
1026 // for better readability
1027 const bool must_gc_arguments = true;
1028 const bool dont_gc_arguments = false;
1029
1030 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1031 bool save_fpu_registers = true;
1032
1033 // stub code & info for the different stubs
1034 OopMapSet* oop_maps = nullptr;
1035 switch (id) {
1036 case C1StubId::forward_exception_id:
1037 {
1038 oop_maps = generate_handle_exception(id, sasm);
1039 __ leave();
1040 __ ret(0);
1041 }
1042 break;
1043
1044 case C1StubId::new_instance_id:
1045 case C1StubId::fast_new_instance_id:
1046 case C1StubId::fast_new_instance_init_check_id:
1047 {
1048 Register klass = rdx; // Incoming
1049 Register obj = rax; // Result
1050
1051 if (id == C1StubId::new_instance_id) {
1052 __ set_info("new_instance", dont_gc_arguments);
1053 } else if (id == C1StubId::fast_new_instance_id) {
1054 __ set_info("fast new_instance", dont_gc_arguments);
1055 } else {
1056 assert(id == C1StubId::fast_new_instance_init_check_id, "bad C1StubId");
1057 __ set_info("fast new_instance init check", dont_gc_arguments);
1058 }
1059
1060 __ enter();
1061 OopMap* map = save_live_registers(sasm, 2);
1062 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1063 oop_maps = new OopMapSet();
1064 oop_maps->add_gc_map(call_offset, map);
1065 restore_live_registers_except_rax(sasm);
1066 __ verify_oop(obj);
1067 __ leave();
1068 __ ret(0);
1069
1070 // rax,: new instance
1071 }
1072
1073 break;
1074
1075 case C1StubId::counter_overflow_id:
1076 {
1077 Register bci = rax, method = rbx;
1078 __ enter();
1079 OopMap* map = save_live_registers(sasm, 3);
1080 // Retrieve bci
1081 __ movl(bci, Address(rbp, 2*BytesPerWord));
1082 // And a pointer to the Method*
1083 __ movptr(method, Address(rbp, 3*BytesPerWord));
1084 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1085 oop_maps = new OopMapSet();
1086 oop_maps->add_gc_map(call_offset, map);
1087 restore_live_registers(sasm);
1088 __ leave();
1089 __ ret(0);
1090 }
1091 break;
1092
1093 case C1StubId::new_type_array_id:
1094 case C1StubId::new_object_array_id:
1095 {
1096 Register length = rbx; // Incoming
1097 Register klass = rdx; // Incoming
1098 Register obj = rax; // Result
1099
1100 if (id == C1StubId::new_type_array_id) {
1101 __ set_info("new_type_array", dont_gc_arguments);
1102 } else {
1103 __ set_info("new_object_array", dont_gc_arguments);
1104 }
1105
1106 #ifdef ASSERT
1107 // assert object type is really an array of the proper kind
1108 {
1109 Label ok;
1110 Register t0 = obj;
1111 __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1112 __ sarl(t0, Klass::_lh_array_tag_shift);
1113 int tag = ((id == C1StubId::new_type_array_id)
1114 ? Klass::_lh_array_tag_type_value
1115 : Klass::_lh_array_tag_obj_value);
1116 __ cmpl(t0, tag);
1117 __ jcc(Assembler::equal, ok);
1118 __ stop("assert(is an array klass)");
1119 __ should_not_reach_here();
1120 __ bind(ok);
1121 }
1122 #endif // ASSERT
1123
1124 __ enter();
1125 OopMap* map = save_live_registers(sasm, 3);
1126 int call_offset;
1127 if (id == C1StubId::new_type_array_id) {
1128 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1129 } else {
1130 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1131 }
1132
1133 oop_maps = new OopMapSet();
1134 oop_maps->add_gc_map(call_offset, map);
1135 restore_live_registers_except_rax(sasm);
1136
1137 __ verify_oop(obj);
1138 __ leave();
1139 __ ret(0);
1140
1141 // rax,: new array
1142 }
1143 break;
1144
1145 case C1StubId::new_multi_array_id:
1146 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1147 // rax,: klass
1148 // rbx,: rank
1149 // rcx: address of 1st dimension
1150 OopMap* map = save_live_registers(sasm, 4);
1151 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1152
1153 oop_maps = new OopMapSet();
1154 oop_maps->add_gc_map(call_offset, map);
1155 restore_live_registers_except_rax(sasm);
1156
1157 // rax,: new multi array
1158 __ verify_oop(rax);
1159 }
1160 break;
1161
1162 case C1StubId::register_finalizer_id:
1163 {
1164 __ set_info("register_finalizer", dont_gc_arguments);
1165
1166 // This is called via call_runtime so the arguments
1167 // will be place in C abi locations
1168
1169 #ifdef _LP64
1170 __ verify_oop(c_rarg0);
1171 __ mov(rax, c_rarg0);
1172 #else
1173 // The object is passed on the stack and we haven't pushed a
1174 // frame yet so it's one work away from top of stack.
1175 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1176 __ verify_oop(rax);
1177 #endif // _LP64
1178
1179 // load the klass and check the has finalizer flag
1180 Label register_finalizer;
1181 Register t = rsi;
1182 __ load_klass(t, rax, rscratch1);
1183 __ testb(Address(t, Klass::misc_flags_offset()), KlassFlags::_misc_has_finalizer);
1184 __ jcc(Assembler::notZero, register_finalizer);
1185 __ ret(0);
1186
1187 __ bind(register_finalizer);
1188 __ enter();
1189 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1190 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1191 oop_maps = new OopMapSet();
1192 oop_maps->add_gc_map(call_offset, oop_map);
1193
1194 // Now restore all the live registers
1195 restore_live_registers(sasm);
1196
1197 __ leave();
1198 __ ret(0);
1199 }
1200 break;
1201
1202 case C1StubId::throw_range_check_failed_id:
1203 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1204 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1205 }
1206 break;
1207
1208 case C1StubId::throw_index_exception_id:
1209 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1210 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1211 }
1212 break;
1213
1214 case C1StubId::throw_div0_exception_id:
1215 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1216 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1217 }
1218 break;
1219
1220 case C1StubId::throw_null_pointer_exception_id:
1221 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1222 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1223 }
1224 break;
1225
1226 case C1StubId::handle_exception_nofpu_id:
1227 case C1StubId::handle_exception_id:
1228 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1229 oop_maps = generate_handle_exception(id, sasm);
1230 }
1231 break;
1232
1233 case C1StubId::handle_exception_from_callee_id:
1234 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1235 oop_maps = generate_handle_exception(id, sasm);
1236 }
1237 break;
1238
1239 case C1StubId::unwind_exception_id:
1240 { __ set_info("unwind_exception", dont_gc_arguments);
1241 // note: no stubframe since we are about to leave the current
1242 // activation and we are calling a leaf VM function only.
1243 generate_unwind_exception(sasm);
1244 }
1245 break;
1246
1247 case C1StubId::throw_array_store_exception_id:
1248 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1249 // tos + 0: link
1250 // + 1: return address
1251 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1252 }
1253 break;
1254
1255 case C1StubId::throw_class_cast_exception_id:
1256 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1257 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1258 }
1259 break;
1260
1261 case C1StubId::throw_incompatible_class_change_error_id:
1262 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1263 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1264 }
1265 break;
1266
1267 case C1StubId::slow_subtype_check_id:
1268 {
1269 // Typical calling sequence:
1270 // __ push(klass_RInfo); // object klass or other subclass
1271 // __ push(sup_k_RInfo); // array element klass or other superclass
1272 // __ call(slow_subtype_check);
1273 // Note that the subclass is pushed first, and is therefore deepest.
1274 // Previous versions of this code reversed the names 'sub' and 'super'.
1275 // This was operationally harmless but made the code unreadable.
1276 enum layout {
1277 rax_off, SLOT2(raxH_off)
1278 rcx_off, SLOT2(rcxH_off)
1279 rsi_off, SLOT2(rsiH_off)
1280 rdi_off, SLOT2(rdiH_off)
1281 // saved_rbp_off, SLOT2(saved_rbpH_off)
1282 return_off, SLOT2(returnH_off)
1283 sup_k_off, SLOT2(sup_kH_off)
1284 klass_off, SLOT2(superH_off)
1285 framesize,
1286 result_off = klass_off // deepest argument is also the return value
1287 };
1288
1289 __ set_info("slow_subtype_check", dont_gc_arguments);
1290 __ push(rdi);
1291 __ push(rsi);
1292 __ push(rcx);
1293 __ push(rax);
1294
1295 // This is called by pushing args and not with C abi
1296 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1297 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1298
1299 Label miss;
1300 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, nullptr, &miss);
1301
1302 // fallthrough on success:
1303 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1304 __ pop(rax);
1305 __ pop(rcx);
1306 __ pop(rsi);
1307 __ pop(rdi);
1308 __ ret(0);
1309
1310 __ bind(miss);
1311 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1312 __ pop(rax);
1313 __ pop(rcx);
1314 __ pop(rsi);
1315 __ pop(rdi);
1316 __ ret(0);
1317 }
1318 break;
1319
1320 case C1StubId::monitorenter_nofpu_id:
1321 save_fpu_registers = false;
1322 // fall through
1323 case C1StubId::monitorenter_id:
1324 {
1325 StubFrame f(sasm, "monitorenter", dont_gc_arguments, true /* use_pop_on_epilog */);
1326 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1327
1328 // Called with store_parameter and not C abi
1329
1330 f.load_argument(1, rax); // rax,: object
1331 f.load_argument(0, rbx); // rbx,: lock address
1332
1333 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1334
1335 oop_maps = new OopMapSet();
1336 oop_maps->add_gc_map(call_offset, map);
1337 restore_live_registers(sasm, save_fpu_registers);
1338 }
1339 break;
1340
1341 case C1StubId::monitorexit_nofpu_id:
1342 save_fpu_registers = false;
1343 // fall through
1344 case C1StubId::monitorexit_id:
1345 {
1346 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1347 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1348
1349 // Called with store_parameter and not C abi
1350
1351 f.load_argument(0, rax); // rax,: lock address
1352
1353 // note: really a leaf routine but must setup last java sp
1354 // => use call_RT for now (speed can be improved by
1355 // doing last java sp setup manually)
1356 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1357
1358 oop_maps = new OopMapSet();
1359 oop_maps->add_gc_map(call_offset, map);
1360 restore_live_registers(sasm, save_fpu_registers);
1361 }
1362 break;
1363
1364 case C1StubId::deoptimize_id:
1365 {
1366 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1367 const int num_rt_args = 2; // thread, trap_request
1368 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1369 f.load_argument(0, rax);
1370 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1371 oop_maps = new OopMapSet();
1372 oop_maps->add_gc_map(call_offset, oop_map);
1373 restore_live_registers(sasm);
1374 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1375 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1376 __ leave();
1377 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1378 }
1379 break;
1380
1381 case C1StubId::access_field_patching_id:
1382 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1383 // we should set up register map
1384 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1385 }
1386 break;
1387
1388 case C1StubId::load_klass_patching_id:
1389 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1390 // we should set up register map
1391 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1392 }
1393 break;
1394
1395 case C1StubId::load_mirror_patching_id:
1396 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1397 // we should set up register map
1398 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1399 }
1400 break;
1401
1402 case C1StubId::load_appendix_patching_id:
1403 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1404 // we should set up register map
1405 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1406 }
1407 break;
1408
1409 case C1StubId::dtrace_object_alloc_id:
1410 { // rax,: object
1411 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1412 // we can't gc here so skip the oopmap but make sure that all
1413 // the live registers get saved.
1414 save_live_registers(sasm, 1);
1415
1416 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1417 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc))));
1418 NOT_LP64(__ pop(rax));
1419
1420 restore_live_registers(sasm);
1421 }
1422 break;
1423
1424 case C1StubId::fpu2long_stub_id:
1425 {
1426 #ifdef _LP64
1427 Label done;
1428 __ cvttsd2siq(rax, Address(rsp, wordSize));
1429 __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1430 __ jccb(Assembler::notEqual, done);
1431 __ movq(rax, Address(rsp, wordSize));
1432 __ subptr(rsp, 8);
1433 __ movq(Address(rsp, 0), rax);
1434 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1435 __ pop(rax);
1436 __ bind(done);
1437 __ ret(0);
1438 #else
1439 // rax, and rdx are destroyed, but should be free since the result is returned there
1440 // preserve rsi,ecx
1441 __ push(rsi);
1442 __ push(rcx);
1443
1444 // check for NaN
1445 Label return0, do_return, return_min_jlong, do_convert;
1446
1447 Address value_high_word(rsp, wordSize + 4);
1448 Address value_low_word(rsp, wordSize);
1449 Address result_high_word(rsp, 3*wordSize + 4);
1450 Address result_low_word(rsp, 3*wordSize);
1451
1452 __ subptr(rsp, 32); // more than enough on 32bit
1453 __ fst_d(value_low_word);
1454 __ movl(rax, value_high_word);
1455 __ andl(rax, 0x7ff00000);
1456 __ cmpl(rax, 0x7ff00000);
1457 __ jcc(Assembler::notEqual, do_convert);
1458 __ movl(rax, value_high_word);
1459 __ andl(rax, 0xfffff);
1460 __ orl(rax, value_low_word);
1461 __ jcc(Assembler::notZero, return0);
1462
1463 __ bind(do_convert);
1464 __ fnstcw(Address(rsp, 0));
1465 __ movzwl(rax, Address(rsp, 0));
1466 __ orl(rax, 0xc00);
1467 __ movw(Address(rsp, 2), rax);
1468 __ fldcw(Address(rsp, 2));
1469 __ fwait();
1470 __ fistp_d(result_low_word);
1471 __ fldcw(Address(rsp, 0));
1472 __ fwait();
1473 // This gets the entire long in rax on 64bit
1474 __ movptr(rax, result_low_word);
1475 // testing of high bits
1476 __ movl(rdx, result_high_word);
1477 __ mov(rcx, rax);
1478 // What the heck is the point of the next instruction???
1479 __ xorl(rcx, 0x0);
1480 __ movl(rsi, 0x80000000);
1481 __ xorl(rsi, rdx);
1482 __ orl(rcx, rsi);
1483 __ jcc(Assembler::notEqual, do_return);
1484 __ fldz();
1485 __ fcomp_d(value_low_word);
1486 __ fnstsw_ax();
1487 __ sahf();
1488 __ jcc(Assembler::above, return_min_jlong);
1489 // return max_jlong
1490 __ movl(rdx, 0x7fffffff);
1491 __ movl(rax, 0xffffffff);
1492 __ jmp(do_return);
1493
1494 __ bind(return_min_jlong);
1495 __ movl(rdx, 0x80000000);
1496 __ xorl(rax, rax);
1497 __ jmp(do_return);
1498
1499 __ bind(return0);
1500 __ fpop();
1501 __ xorptr(rdx,rdx);
1502 __ xorptr(rax,rax);
1503
1504 __ bind(do_return);
1505 __ addptr(rsp, 32);
1506 __ pop(rcx);
1507 __ pop(rsi);
1508 __ ret(0);
1509 #endif // _LP64
1510 }
1511 break;
1512
1513 case C1StubId::predicate_failed_trap_id:
1514 {
1515 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1516
1517 OopMap* map = save_live_registers(sasm, 1);
1518
1519 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1520 oop_maps = new OopMapSet();
1521 oop_maps->add_gc_map(call_offset, map);
1522 restore_live_registers(sasm);
1523 __ leave();
1524 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1525 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1526
1527 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1528 }
1529 break;
1530
1531 default:
1532 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1533 __ movptr(rax, (int)id);
1534 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1535 __ should_not_reach_here();
1536 }
1537 break;
1538 }
1539 return oop_maps;
1540 }
1541
1542 #undef __
1543
1544 const char *Runtime1::pd_name_for_address(address entry) {
1545 return "<unknown function>";
1546 }