1 /*
   2  * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/assembler.hpp"
  27 #include "c1/c1_Defs.hpp"
  28 #include "c1/c1_FrameMap.hpp"
  29 #include "c1/c1_MacroAssembler.hpp"
  30 #include "c1/c1_Runtime1.hpp"
  31 #include "ci/ciUtilities.hpp"
  32 #include "compiler/compilerDefinitions.inline.hpp"
  33 #include "compiler/oopMap.hpp"
  34 #include "gc/shared/cardTable.hpp"
  35 #include "gc/shared/cardTableBarrierSet.hpp"
  36 #include "gc/shared/collectedHeap.hpp"
  37 #include "gc/shared/tlab_globals.hpp"
  38 #include "interpreter/interpreter.hpp"
  39 #include "memory/universe.hpp"
  40 #include "nativeInst_x86.hpp"
  41 #include "oops/oop.inline.hpp"
  42 #include "prims/jvmtiExport.hpp"
  43 #include "register_x86.hpp"
  44 #include "runtime/sharedRuntime.hpp"
  45 #include "runtime/signature.hpp"
  46 #include "runtime/stubRoutines.hpp"
  47 #include "runtime/vframeArray.hpp"
  48 #include "utilities/macros.hpp"
  49 #include "vmreg_x86.inline.hpp"
  50 
  51 // Implementation of StubAssembler
  52 
  53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
  54   // setup registers
  55   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
  56   assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
  57   assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
  58   assert(args_size >= 0, "illegal args_size");
  59   bool align_stack = false;
  60 #ifdef _LP64
  61   // At a method handle call, the stack may not be properly aligned
  62   // when returning with an exception.
  63   align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
  64 #endif
  65 
  66 #ifdef _LP64
  67   mov(c_rarg0, thread);
  68   set_num_rt_args(0); // Nothing on stack
  69 #else
  70   set_num_rt_args(1 + args_size);
  71 
  72   // push java thread (becomes first argument of C function)
  73   get_thread(thread);
  74   push(thread);
  75 #endif // _LP64
  76 
  77   int call_offset = -1;
  78   if (!align_stack) {
  79     set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
  80   } else {
  81     address the_pc = pc();
  82     call_offset = offset();
  83     set_last_Java_frame(thread, noreg, rbp, the_pc, rscratch1);
  84     andptr(rsp, -(StackAlignmentInBytes));    // Align stack
  85   }
  86 
  87   // do the call
  88   call(RuntimeAddress(entry));
  89   if (!align_stack) {
  90     call_offset = offset();
  91   }
  92   // verify callee-saved register
  93 #ifdef ASSERT
  94   guarantee(thread != rax, "change this code");
  95   push(rax);
  96   { Label L;
  97     get_thread(rax);
  98     cmpptr(thread, rax);
  99     jcc(Assembler::equal, L);
 100     int3();
 101     stop("StubAssembler::call_RT: rdi not callee saved?");
 102     bind(L);
 103   }
 104   pop(rax);
 105 #endif
 106   reset_last_Java_frame(thread, true);
 107 
 108   // discard thread and arguments
 109   NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
 110 
 111   // check for pending exceptions
 112   { Label L;
 113     cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 114     jcc(Assembler::equal, L);
 115     // exception pending => remove activation and forward to exception handler
 116     movptr(rax, Address(thread, Thread::pending_exception_offset()));
 117     // make sure that the vm_results are cleared
 118     if (oop_result1->is_valid()) {
 119       movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
 120     }
 121     if (metadata_result->is_valid()) {
 122       movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 123     }
 124     if (frame_size() == no_frame_size) {
 125       leave();
 126       jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
 127     } else if (_stub_id == Runtime1::forward_exception_id) {
 128       should_not_reach_here();
 129     } else {
 130       jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 131     }
 132     bind(L);
 133   }
 134   // get oop results if there are any and reset the values in the thread
 135   if (oop_result1->is_valid()) {
 136     get_vm_result(oop_result1, thread);
 137   }
 138   if (metadata_result->is_valid()) {
 139     get_vm_result_2(metadata_result, thread);
 140   }
 141 
 142   assert(call_offset >= 0, "Should be set");
 143   return call_offset;
 144 }
 145 
 146 
 147 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
 148 #ifdef _LP64
 149   mov(c_rarg1, arg1);
 150 #else
 151   push(arg1);
 152 #endif // _LP64
 153   return call_RT(oop_result1, metadata_result, entry, 1);
 154 }
 155 
 156 
 157 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
 158 #ifdef _LP64
 159   if (c_rarg1 == arg2) {
 160     if (c_rarg2 == arg1) {
 161       xchgq(arg1, arg2);
 162     } else {
 163       mov(c_rarg2, arg2);
 164       mov(c_rarg1, arg1);
 165     }
 166   } else {
 167     mov(c_rarg1, arg1);
 168     mov(c_rarg2, arg2);
 169   }
 170 #else
 171   push(arg2);
 172   push(arg1);
 173 #endif // _LP64
 174   return call_RT(oop_result1, metadata_result, entry, 2);
 175 }
 176 
 177 
 178 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
 179 #ifdef _LP64
 180   // if there is any conflict use the stack
 181   if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
 182       arg2 == c_rarg1 || arg2 == c_rarg3 ||
 183       arg3 == c_rarg1 || arg3 == c_rarg2) {
 184     push(arg3);
 185     push(arg2);
 186     push(arg1);
 187     pop(c_rarg1);
 188     pop(c_rarg2);
 189     pop(c_rarg3);
 190   } else {
 191     mov(c_rarg1, arg1);
 192     mov(c_rarg2, arg2);
 193     mov(c_rarg3, arg3);
 194   }
 195 #else
 196   push(arg3);
 197   push(arg2);
 198   push(arg1);
 199 #endif // _LP64
 200   return call_RT(oop_result1, metadata_result, entry, 3);
 201 }
 202 
 203 
 204 // Implementation of StubFrame
 205 
 206 class StubFrame: public StackObj {
 207  private:
 208   StubAssembler* _sasm;

 209 
 210  public:
 211   StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
 212   void load_argument(int offset_in_words, Register reg);
 213 
 214   ~StubFrame();
 215 };
 216 
 217 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
 218   set_info(name, must_gc_arguments);
 219   enter();
 220 }
 221 
 222 void StubAssembler::epilogue() {
 223   leave();
 224   ret(0);
 225 }
 226 
 227 #define __ _sasm->
 228 
 229 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
 230   _sasm = sasm;

 231   __ prologue(name, must_gc_arguments);
 232 }
 233 
 234 // load parameters that were stored with LIR_Assembler::store_parameter
 235 // Note: offsets for store_parameter and load_argument must match
 236 void StubFrame::load_argument(int offset_in_words, Register reg) {
 237   __ load_parameter(offset_in_words, reg);
 238 }
 239 
 240 
 241 StubFrame::~StubFrame() {
 242   __ epilogue();
 243 }
 244 
 245 #undef __
 246 
 247 
 248 // Implementation of Runtime1
 249 
 250 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
 251 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
 252 
 253 // Stack layout for saving/restoring  all the registers needed during a runtime
 254 // call (this includes deoptimization)
 255 // Note: note that users of this frame may well have arguments to some runtime
 256 // while these values are on the stack. These positions neglect those arguments
 257 // but the code in save_live_registers will take the argument count into
 258 // account.
 259 //
 260 #ifdef _LP64
 261   #define SLOT2(x) x,
 262   #define SLOT_PER_WORD 2
 263 #else
 264   #define SLOT2(x)
 265   #define SLOT_PER_WORD 1
 266 #endif // _LP64
 267 
 268 enum reg_save_layout {
 269   // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
 270   // happen and will assert if the stack size we create is misaligned
 271 #ifdef _LP64
 272   align_dummy_0, align_dummy_1,
 273 #endif // _LP64
 274 #ifdef _WIN64
 275   // Windows always allocates space for it's argument registers (see
 276   // frame::arg_reg_save_area_bytes).
 277   arg_reg_save_1, arg_reg_save_1H,                                                          // 0, 4
 278   arg_reg_save_2, arg_reg_save_2H,                                                          // 8, 12
 279   arg_reg_save_3, arg_reg_save_3H,                                                          // 16, 20
 280   arg_reg_save_4, arg_reg_save_4H,                                                          // 24, 28
 281 #endif // _WIN64
 282   xmm_regs_as_doubles_off,                                                                  // 32
 283   float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots,  // 160
 284   fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots,          // 224
 285   // fpu_state_end_off is exclusive
 286   fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD),                // 352
 287   marker = fpu_state_end_off, SLOT2(markerH)                                                // 352, 356
 288   extra_space_offset,                                                                       // 360
 289 #ifdef _LP64
 290   r15_off = extra_space_offset, r15H_off,                                                   // 360, 364
 291   r14_off, r14H_off,                                                                        // 368, 372
 292   r13_off, r13H_off,                                                                        // 376, 380
 293   r12_off, r12H_off,                                                                        // 384, 388
 294   r11_off, r11H_off,                                                                        // 392, 396
 295   r10_off, r10H_off,                                                                        // 400, 404
 296   r9_off, r9H_off,                                                                          // 408, 412
 297   r8_off, r8H_off,                                                                          // 416, 420
 298   rdi_off, rdiH_off,                                                                        // 424, 428
 299 #else
 300   rdi_off = extra_space_offset,
 301 #endif // _LP64
 302   rsi_off, SLOT2(rsiH_off)                                                                  // 432, 436
 303   rbp_off, SLOT2(rbpH_off)                                                                  // 440, 444
 304   rsp_off, SLOT2(rspH_off)                                                                  // 448, 452
 305   rbx_off, SLOT2(rbxH_off)                                                                  // 456, 460
 306   rdx_off, SLOT2(rdxH_off)                                                                  // 464, 468
 307   rcx_off, SLOT2(rcxH_off)                                                                  // 472, 476
 308   rax_off, SLOT2(raxH_off)                                                                  // 480, 484
 309   saved_rbp_off, SLOT2(saved_rbpH_off)                                                      // 488, 492
 310   return_off, SLOT2(returnH_off)                                                            // 496, 500
 311   reg_save_frame_size   // As noted: neglects any parameters to runtime                     // 504
 312 };
 313 
 314 // Save off registers which might be killed by calls into the runtime.
 315 // Tries to smart of about FP registers.  In particular we separate
 316 // saving and describing the FPU registers for deoptimization since we
 317 // have to save the FPU registers twice if we describe them and on P4
 318 // saving FPU registers which don't contain anything appears
 319 // expensive.  The deopt blob is the only thing which needs to
 320 // describe FPU registers.  In all other cases it should be sufficient
 321 // to simply save their current value.
 322 //
 323 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
 324                                 bool save_fpu_registers = true) {
 325 
 326   // In 64bit all the args are in regs so there are no additional stack slots
 327   LP64_ONLY(num_rt_args = 0);
 328   LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
 329   int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
 330   sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
 331 
 332   // record saved value locations in an OopMap
 333   // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
 334   OopMap* map = new OopMap(frame_size_in_slots, 0);
 335   map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
 336   map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
 337   map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
 338   map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
 339   map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
 340   map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
 341 #ifdef _LP64
 342   map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args),  r8->as_VMReg());
 343   map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args),  r9->as_VMReg());
 344   map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
 345   map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
 346   map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
 347   map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
 348   map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
 349   map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
 350 
 351   // This is stupid but needed.
 352   map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
 353   map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
 354   map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
 355   map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
 356   map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
 357   map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
 358 
 359   map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args),  r8->as_VMReg()->next());
 360   map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args),  r9->as_VMReg()->next());
 361   map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
 362   map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
 363   map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
 364   map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
 365   map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
 366   map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
 367 #endif // _LP64
 368 
 369   int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 370 
 371   if (save_fpu_registers) {
 372 #ifndef _LP64
 373     if (UseSSE < 2) {
 374       int fpu_off = float_regs_as_doubles_off;
 375       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 376         VMReg fpu_name_0 = FrameMap::fpu_regname(n);
 377         map->set_callee_saved(VMRegImpl::stack2reg(fpu_off +     num_rt_args), fpu_name_0);
 378         // %%% This is really a waste but we'll keep things as they were for now
 379         if (true) {
 380           map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
 381         }
 382         fpu_off += 2;
 383       }
 384       assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
 385 
 386       if (UseSSE == 1) {
 387         int xmm_off = xmm_regs_as_doubles_off;
 388         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 389           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 390           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 391           xmm_off += 2;
 392         }
 393         assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 394       }
 395     }
 396 #endif // !LP64
 397 
 398     if (UseSSE >= 2) {
 399       int xmm_off = xmm_regs_as_doubles_off;
 400       for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
 401         if (n < xmm_bypass_limit) {
 402           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 403           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 404           // %%% This is really a waste but we'll keep things as they were for now
 405           if (true) {
 406             map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
 407           }
 408         }
 409         xmm_off += 2;
 410       }
 411       assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 412     }
 413   }
 414 
 415   return map;
 416 }
 417 
 418 #define __ this->
 419 
 420 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
 421   __ block_comment("save_live_registers");
 422 
 423   __ pusha();         // integer registers
 424 
 425   // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
 426   // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
 427 
 428   __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 429 
 430 #ifdef ASSERT
 431   __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 432 #endif
 433 
 434   if (save_fpu_registers) {
 435 #ifndef _LP64
 436     if (UseSSE < 2) {
 437       // save FPU stack
 438       __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 439       __ fwait();
 440 
 441 #ifdef ASSERT
 442       Label ok;
 443       __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 444       __ jccb(Assembler::equal, ok);
 445       __ stop("corrupted control word detected");
 446       __ bind(ok);
 447 #endif
 448 
 449       // Reset the control word to guard against exceptions being unmasked
 450       // since fstp_d can cause FPU stack underflow exceptions.  Write it
 451       // into the on stack copy and then reload that to make sure that the
 452       // current and future values are correct.
 453       __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 454       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 455 
 456       // Save the FPU registers in de-opt-able form
 457       int offset = 0;
 458       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 459         __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 460         offset += 8;
 461       }
 462 
 463       if (UseSSE == 1) {
 464         // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
 465         int offset = 0;
 466         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 467           XMMRegister xmm_name = as_XMMRegister(n);
 468           __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 469           offset += 8;
 470         }
 471       }
 472     }
 473 #endif // !_LP64
 474 
 475     if (UseSSE >= 2) {
 476       // save XMM registers
 477       // XMM registers can contain float or double values, but this is not known here,
 478       // so always save them as doubles.
 479       // note that float values are _not_ converted automatically, so for float values
 480       // the second word contains only garbage data.
 481       int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 482       int offset = 0;
 483       for (int n = 0; n < xmm_bypass_limit; n++) {
 484         XMMRegister xmm_name = as_XMMRegister(n);
 485         __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 486         offset += 8;
 487       }
 488     }
 489   }
 490 
 491   // FPU stack must be empty now
 492   NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
 493 }
 494 
 495 #undef __
 496 #define __ sasm->
 497 
 498 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
 499 #ifdef _LP64
 500   if (restore_fpu_registers) {
 501     // restore XMM registers
 502     int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 503     int offset = 0;
 504     for (int n = 0; n < xmm_bypass_limit; n++) {
 505       XMMRegister xmm_name = as_XMMRegister(n);
 506       __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 507       offset += 8;
 508     }
 509   }
 510 #else
 511   if (restore_fpu_registers) {
 512     if (UseSSE >= 2) {
 513       // restore XMM registers
 514       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 515       int offset = 0;
 516       for (int n = 0; n < xmm_bypass_limit; n++) {
 517         XMMRegister xmm_name = as_XMMRegister(n);
 518         __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 519         offset += 8;
 520       }
 521     } else if (UseSSE == 1) {
 522       // restore XMM registers(num MMX == num fpu)
 523       int offset = 0;
 524       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 525         XMMRegister xmm_name = as_XMMRegister(n);
 526         __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 527         offset += 8;
 528       }
 529     }
 530 
 531     if (UseSSE < 2) {
 532       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 533     } else {
 534       // check that FPU stack is really empty
 535       __ verify_FPU(0, "restore_live_registers");
 536     }
 537   } else {
 538     // check that FPU stack is really empty
 539     __ verify_FPU(0, "restore_live_registers");
 540   }
 541 #endif // _LP64
 542 
 543 #ifdef ASSERT
 544   {
 545     Label ok;
 546     __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 547     __ jcc(Assembler::equal, ok);
 548     __ stop("bad offsets in frame");
 549     __ bind(ok);
 550   }
 551 #endif // ASSERT
 552 
 553   __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 554 }
 555 
 556 #undef __
 557 #define __ this->
 558 
 559 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
 560   __ block_comment("restore_live_registers");
 561 
 562   restore_fpu(this, restore_fpu_registers);
 563   __ popa();
 564 }
 565 
 566 
 567 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
 568   __ block_comment("restore_live_registers_except_rax");
 569 
 570   restore_fpu(this, restore_fpu_registers);
 571 
 572 #ifdef _LP64
 573   __ movptr(r15, Address(rsp, 0));
 574   __ movptr(r14, Address(rsp, wordSize));
 575   __ movptr(r13, Address(rsp, 2 * wordSize));
 576   __ movptr(r12, Address(rsp, 3 * wordSize));
 577   __ movptr(r11, Address(rsp, 4 * wordSize));
 578   __ movptr(r10, Address(rsp, 5 * wordSize));
 579   __ movptr(r9,  Address(rsp, 6 * wordSize));
 580   __ movptr(r8,  Address(rsp, 7 * wordSize));
 581   __ movptr(rdi, Address(rsp, 8 * wordSize));
 582   __ movptr(rsi, Address(rsp, 9 * wordSize));
 583   __ movptr(rbp, Address(rsp, 10 * wordSize));
 584   // skip rsp
 585   __ movptr(rbx, Address(rsp, 12 * wordSize));
 586   __ movptr(rdx, Address(rsp, 13 * wordSize));
 587   __ movptr(rcx, Address(rsp, 14 * wordSize));
 588 
 589   __ addptr(rsp, 16 * wordSize);
 590 #else
 591 
 592   __ pop(rdi);
 593   __ pop(rsi);
 594   __ pop(rbp);
 595   __ pop(rbx); // skip this value
 596   __ pop(rbx);
 597   __ pop(rdx);
 598   __ pop(rcx);
 599   __ addptr(rsp, BytesPerWord);
 600 #endif // _LP64
 601 }
 602 
 603 #undef __
 604 #define __ sasm->
 605 
 606 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
 607                                    bool save_fpu_registers = true) {
 608   __ save_live_registers_no_oop_map(save_fpu_registers);
 609   return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
 610 }
 611 
 612 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 613   __ restore_live_registers(restore_fpu_registers);
 614 }
 615 
 616 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
 617   sasm->restore_live_registers_except_rax(restore_fpu_registers);
 618 }
 619 
 620 
 621 void Runtime1::initialize_pd() {
 622   // nothing to do
 623 }
 624 



 625 
 626 // Target: the entry point of the method that creates and posts the exception oop.
 627 // has_argument: true if the exception needs arguments (passed on the stack because
 628 //               registers must be preserved).
 629 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
 630   // Preserve all registers.
 631   int num_rt_args = has_argument ? (2 + 1) : 1;
 632   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 633 
 634   // Now all registers are saved and can be used freely.
 635   // Verify that no old value is used accidentally.
 636   __ invalidate_registers(true, true, true, true, true, true);
 637 
 638   // Registers used by this stub.
 639   const Register temp_reg = rbx;
 640 
 641   // Load arguments for exception that are passed as arguments into the stub.
 642   if (has_argument) {
 643 #ifdef _LP64
 644     __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
 645     __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
 646 #else
 647     __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
 648     __ push(temp_reg);
 649     __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
 650     __ push(temp_reg);
 651 #endif // _LP64
 652   }
 653   int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
 654 
 655   OopMapSet* oop_maps = new OopMapSet();
 656   oop_maps->add_gc_map(call_offset, oop_map);
 657 
 658   __ stop("should not reach here");
 659 
 660   return oop_maps;
 661 }
 662 
 663 
 664 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
 665   __ block_comment("generate_handle_exception");
 666 
 667   // incoming parameters
 668   const Register exception_oop = rax;
 669   const Register exception_pc  = rdx;
 670   // other registers used in this stub
 671   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 672 
 673   // Save registers, if required.
 674   OopMapSet* oop_maps = new OopMapSet();
 675   OopMap* oop_map = nullptr;
 676   switch (id) {
 677   case forward_exception_id:
 678     // We're handling an exception in the context of a compiled frame.
 679     // The registers have been saved in the standard places.  Perform
 680     // an exception lookup in the caller and dispatch to the handler
 681     // if found.  Otherwise unwind and dispatch to the callers
 682     // exception handler.
 683     oop_map = generate_oop_map(sasm, 1 /*thread*/);
 684 
 685     // load and clear pending exception oop into RAX
 686     __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
 687     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 688 
 689     // load issuing PC (the return address for this stub) into rdx
 690     __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
 691 
 692     // make sure that the vm_results are cleared (may be unnecessary)
 693     __ movptr(Address(thread, JavaThread::vm_result_offset()),   NULL_WORD);
 694     __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 695     break;
 696   case handle_exception_nofpu_id:
 697   case handle_exception_id:
 698     // At this point all registers MAY be live.
 699     oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
 700     break;
 701   case handle_exception_from_callee_id: {
 702     // At this point all registers except exception oop (RAX) and
 703     // exception pc (RDX) are dead.
 704     const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
 705     oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
 706     sasm->set_frame_size(frame_size);
 707     WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
 708     break;
 709   }
 710   default:  ShouldNotReachHere();
 711   }
 712 
 713 #if !defined(_LP64) && defined(COMPILER2)
 714   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
 715     // C2 can leave the fpu stack dirty
 716     __ empty_FPU_stack();
 717   }
 718 #endif // !_LP64 && COMPILER2
 719 
 720   // verify that only rax, and rdx is valid at this time
 721   __ invalidate_registers(false, true, true, false, true, true);
 722   // verify that rax, contains a valid exception
 723   __ verify_not_null_oop(exception_oop);
 724 
 725   // load address of JavaThread object for thread-local data
 726   NOT_LP64(__ get_thread(thread);)
 727 
 728 #ifdef ASSERT
 729   // check that fields in JavaThread for exception oop and issuing pc are
 730   // empty before writing to them
 731   Label oop_empty;
 732   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
 733   __ jcc(Assembler::equal, oop_empty);
 734   __ stop("exception oop already set");
 735   __ bind(oop_empty);
 736 
 737   Label pc_empty;
 738   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 739   __ jcc(Assembler::equal, pc_empty);
 740   __ stop("exception pc already set");
 741   __ bind(pc_empty);
 742 #endif
 743 
 744   // save exception oop and issuing pc into JavaThread
 745   // (exception handler will load it from here)
 746   __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
 747   __ movptr(Address(thread, JavaThread::exception_pc_offset()),  exception_pc);
 748 
 749   // patch throwing pc into return address (has bci & oop map)
 750   __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
 751 
 752   // compute the exception handler.
 753   // the exception oop and the throwing pc are read from the fields in JavaThread
 754   int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
 755   oop_maps->add_gc_map(call_offset, oop_map);
 756 
 757   // rax: handler address
 758   //      will be the deopt blob if nmethod was deoptimized while we looked up
 759   //      handler regardless of whether handler existed in the nmethod.
 760 
 761   // only rax, is valid at this time, all other registers have been destroyed by the runtime call
 762   __ invalidate_registers(false, true, true, true, true, true);
 763 
 764   // patch the return address, this stub will directly return to the exception handler
 765   __ movptr(Address(rbp, 1*BytesPerWord), rax);
 766 
 767   switch (id) {
 768   case forward_exception_id:
 769   case handle_exception_nofpu_id:
 770   case handle_exception_id:
 771     // Restore the registers that were saved at the beginning.
 772     restore_live_registers(sasm, id != handle_exception_nofpu_id);
 773     break;
 774   case handle_exception_from_callee_id:
 775     // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
 776     // since we do a leave anyway.
 777 
 778     // Pop the return address.
 779     __ leave();
 780     __ pop(rcx);
 781     __ jmp(rcx);  // jump to exception handler
 782     break;
 783   default:  ShouldNotReachHere();
 784   }
 785 
 786   return oop_maps;
 787 }
 788 
 789 
 790 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
 791   // incoming parameters
 792   const Register exception_oop = rax;
 793   // callee-saved copy of exception_oop during runtime call
 794   const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
 795   // other registers used in this stub
 796   const Register exception_pc = rdx;
 797   const Register handler_addr = rbx;
 798   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 799 
 800   if (AbortVMOnException) {
 801     __ enter();
 802     save_live_registers(sasm, 2);
 803     __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), rax);
 804     restore_live_registers(sasm);
 805     __ leave();
 806   }
 807 
 808   // verify that only rax, is valid at this time
 809   __ invalidate_registers(false, true, true, true, true, true);
 810 
 811 #ifdef ASSERT
 812   // check that fields in JavaThread for exception oop and issuing pc are empty
 813   NOT_LP64(__ get_thread(thread);)
 814   Label oop_empty;
 815   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
 816   __ jcc(Assembler::equal, oop_empty);
 817   __ stop("exception oop must be empty");
 818   __ bind(oop_empty);
 819 
 820   Label pc_empty;
 821   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 822   __ jcc(Assembler::equal, pc_empty);
 823   __ stop("exception pc must be empty");
 824   __ bind(pc_empty);
 825 #endif
 826 
 827   // clear the FPU stack in case any FPU results are left behind
 828   NOT_LP64( __ empty_FPU_stack(); )
 829 
 830   // save exception_oop in callee-saved register to preserve it during runtime calls
 831   __ verify_not_null_oop(exception_oop);
 832   __ movptr(exception_oop_callee_saved, exception_oop);
 833 
 834   NOT_LP64(__ get_thread(thread);)
 835   // Get return address (is on top of stack after leave).
 836   __ movptr(exception_pc, Address(rsp, 0));
 837 
 838   // search the exception handler address of the caller (using the return address)
 839   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
 840   // rax: exception handler address of the caller
 841 
 842   // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
 843   __ invalidate_registers(false, true, true, true, false, true);
 844 
 845   // move result of call into correct register
 846   __ movptr(handler_addr, rax);
 847 
 848   // Restore exception oop to RAX (required convention of exception handler).
 849   __ movptr(exception_oop, exception_oop_callee_saved);
 850 
 851   // verify that there is really a valid exception in rax
 852   __ verify_not_null_oop(exception_oop);
 853 
 854   // get throwing pc (= return address).
 855   // rdx has been destroyed by the call, so it must be set again
 856   // the pop is also necessary to simulate the effect of a ret(0)
 857   __ pop(exception_pc);
 858 
 859   // continue at exception handler (return address removed)
 860   // note: do *not* remove arguments when unwinding the
 861   //       activation since the caller assumes having
 862   //       all arguments on the stack when entering the
 863   //       runtime to determine the exception handler
 864   //       (GC happens at call site with arguments!)
 865   // rax: exception oop
 866   // rdx: throwing pc
 867   // rbx: exception handler
 868   __ jmp(handler_addr);
 869 }
 870 
 871 
 872 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
 873   // use the maximum number of runtime-arguments here because it is difficult to
 874   // distinguish each RT-Call.
 875   // Note: This number affects also the RT-Call in generate_handle_exception because
 876   //       the oop-map is shared for all calls.
 877   const int num_rt_args = 2;  // thread + dummy
 878 
 879   DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
 880   assert(deopt_blob != nullptr, "deoptimization blob must have been created");
 881 
 882   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 883 
 884 #ifdef _LP64
 885   const Register thread = r15_thread;
 886   // No need to worry about dummy
 887   __ mov(c_rarg0, thread);
 888 #else
 889   __ push(rax); // push dummy
 890 
 891   const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
 892   // push java thread (becomes first argument of C function)
 893   __ get_thread(thread);
 894   __ push(thread);
 895 #endif // _LP64
 896   __ set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
 897   // do the call
 898   __ call(RuntimeAddress(target));
 899   OopMapSet* oop_maps = new OopMapSet();
 900   oop_maps->add_gc_map(__ offset(), oop_map);
 901   // verify callee-saved register
 902 #ifdef ASSERT
 903   guarantee(thread != rax, "change this code");
 904   __ push(rax);
 905   { Label L;
 906     __ get_thread(rax);
 907     __ cmpptr(thread, rax);
 908     __ jcc(Assembler::equal, L);
 909     __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
 910     __ bind(L);
 911   }
 912   __ pop(rax);
 913 #endif
 914   __ reset_last_Java_frame(thread, true);
 915 #ifndef _LP64
 916   __ pop(rcx); // discard thread arg
 917   __ pop(rcx); // discard dummy
 918 #endif // _LP64
 919 
 920   // check for pending exceptions
 921   { Label L;
 922     __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 923     __ jcc(Assembler::equal, L);
 924     // exception pending => remove activation and forward to exception handler
 925 
 926     __ testptr(rax, rax);                                   // have we deoptimized?
 927     __ jump_cc(Assembler::equal,
 928                RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 929 
 930     // the deopt blob expects exceptions in the special fields of
 931     // JavaThread, so copy and clear pending exception.
 932 
 933     // load and clear pending exception
 934     __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
 935     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 936 
 937     // check that there is really a valid exception
 938     __ verify_not_null_oop(rax);
 939 
 940     // load throwing pc: this is the return address of the stub
 941     __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
 942 
 943 #ifdef ASSERT
 944     // check that fields in JavaThread for exception oop and issuing pc are empty
 945     Label oop_empty;
 946     __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
 947     __ jcc(Assembler::equal, oop_empty);
 948     __ stop("exception oop must be empty");
 949     __ bind(oop_empty);
 950 
 951     Label pc_empty;
 952     __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
 953     __ jcc(Assembler::equal, pc_empty);
 954     __ stop("exception pc must be empty");
 955     __ bind(pc_empty);
 956 #endif
 957 
 958     // store exception oop and throwing pc to JavaThread
 959     __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
 960     __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
 961 
 962     restore_live_registers(sasm);
 963 
 964     __ leave();
 965     __ addptr(rsp, BytesPerWord);  // remove return address from stack
 966 
 967     // Forward the exception directly to deopt blob. We can blow no
 968     // registers and must leave throwing pc on the stack.  A patch may
 969     // have values live in registers so the entry point with the
 970     // exception in tls.
 971     __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
 972 
 973     __ bind(L);
 974   }
 975 
 976 
 977   // Runtime will return true if the nmethod has been deoptimized during
 978   // the patching process. In that case we must do a deopt reexecute instead.
 979 
 980   Label cont;
 981 
 982   __ testptr(rax, rax);                                 // have we deoptimized?
 983   __ jcc(Assembler::equal, cont);                       // no
 984 
 985   // Will reexecute. Proper return address is already on the stack we just restore
 986   // registers, pop all of our frame but the return address and jump to the deopt blob
 987   restore_live_registers(sasm);
 988   __ leave();
 989   __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
 990 
 991   __ bind(cont);
 992   restore_live_registers(sasm);
 993   __ leave();
 994   __ ret(0);
 995 
 996   return oop_maps;
 997 }
 998 
 999 
1000 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
1001 
1002   // for better readability
1003   const bool must_gc_arguments = true;
1004   const bool dont_gc_arguments = false;
1005 
1006   // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1007   bool save_fpu_registers = true;
1008 
1009   // stub code & info for the different stubs
1010   OopMapSet* oop_maps = nullptr;
1011   switch (id) {
1012     case forward_exception_id:
1013       {
1014         oop_maps = generate_handle_exception(id, sasm);
1015         __ leave();
1016         __ ret(0);
1017       }
1018       break;
1019 
1020     case new_instance_id:
1021     case fast_new_instance_id:
1022     case fast_new_instance_init_check_id:
1023       {
1024         Register klass = rdx; // Incoming
1025         Register obj   = rax; // Result
1026 
1027         if (id == new_instance_id) {
1028           __ set_info("new_instance", dont_gc_arguments);
1029         } else if (id == fast_new_instance_id) {
1030           __ set_info("fast new_instance", dont_gc_arguments);
1031         } else {
1032           assert(id == fast_new_instance_init_check_id, "bad StubID");
1033           __ set_info("fast new_instance init check", dont_gc_arguments);
1034         }
1035 
1036         __ enter();
1037         OopMap* map = save_live_registers(sasm, 2);
1038         int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1039         oop_maps = new OopMapSet();
1040         oop_maps->add_gc_map(call_offset, map);
1041         restore_live_registers_except_rax(sasm);
1042         __ verify_oop(obj);
1043         __ leave();
1044         __ ret(0);
1045 
1046         // rax,: new instance
1047       }
1048 
1049       break;
1050 
1051     case counter_overflow_id:
1052       {
1053         Register bci = rax, method = rbx;
1054         __ enter();
1055         OopMap* map = save_live_registers(sasm, 3);
1056         // Retrieve bci
1057         __ movl(bci, Address(rbp, 2*BytesPerWord));
1058         // And a pointer to the Method*
1059         __ movptr(method, Address(rbp, 3*BytesPerWord));
1060         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1061         oop_maps = new OopMapSet();
1062         oop_maps->add_gc_map(call_offset, map);
1063         restore_live_registers(sasm);
1064         __ leave();
1065         __ ret(0);
1066       }
1067       break;
1068 
1069     case new_type_array_id:
1070     case new_object_array_id:
1071       {
1072         Register length   = rbx; // Incoming
1073         Register klass    = rdx; // Incoming
1074         Register obj      = rax; // Result
1075 
1076         if (id == new_type_array_id) {
1077           __ set_info("new_type_array", dont_gc_arguments);
1078         } else {
1079           __ set_info("new_object_array", dont_gc_arguments);
1080         }
1081 
1082 #ifdef ASSERT
1083         // assert object type is really an array of the proper kind
1084         {
1085           Label ok;
1086           Register t0 = obj;
1087           __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1088           __ sarl(t0, Klass::_lh_array_tag_shift);
1089           int tag = ((id == new_type_array_id)
1090                      ? Klass::_lh_array_tag_type_value
1091                      : Klass::_lh_array_tag_obj_value);
1092           __ cmpl(t0, tag);
1093           __ jcc(Assembler::equal, ok);
1094           __ stop("assert(is an array klass)");
1095           __ should_not_reach_here();
1096           __ bind(ok);
1097         }
1098 #endif // ASSERT
1099 
1100         __ enter();
1101         OopMap* map = save_live_registers(sasm, 3);
1102         int call_offset;
1103         if (id == new_type_array_id) {
1104           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1105         } else {
1106           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1107         }
1108 
1109         oop_maps = new OopMapSet();
1110         oop_maps->add_gc_map(call_offset, map);
1111         restore_live_registers_except_rax(sasm);
1112 
1113         __ verify_oop(obj);
1114         __ leave();
1115         __ ret(0);
1116 
1117         // rax,: new array
1118       }
1119       break;
1120 
1121     case new_multi_array_id:
1122       { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1123         // rax,: klass
1124         // rbx,: rank
1125         // rcx: address of 1st dimension
1126         OopMap* map = save_live_registers(sasm, 4);
1127         int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1128 
1129         oop_maps = new OopMapSet();
1130         oop_maps->add_gc_map(call_offset, map);
1131         restore_live_registers_except_rax(sasm);
1132 
1133         // rax,: new multi array
1134         __ verify_oop(rax);
1135       }
1136       break;
1137 
1138     case register_finalizer_id:
1139       {
1140         __ set_info("register_finalizer", dont_gc_arguments);
1141 
1142         // This is called via call_runtime so the arguments
1143         // will be place in C abi locations
1144 
1145 #ifdef _LP64
1146         __ verify_oop(c_rarg0);
1147         __ mov(rax, c_rarg0);
1148 #else
1149         // The object is passed on the stack and we haven't pushed a
1150         // frame yet so it's one work away from top of stack.
1151         __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1152         __ verify_oop(rax);
1153 #endif // _LP64
1154 
1155         // load the klass and check the has finalizer flag
1156         Label register_finalizer;
1157         Register t = rsi;
1158         __ load_klass(t, rax, rscratch1);
1159         __ movl(t, Address(t, Klass::access_flags_offset()));
1160         __ testl(t, JVM_ACC_HAS_FINALIZER);
1161         __ jcc(Assembler::notZero, register_finalizer);
1162         __ ret(0);
1163 
1164         __ bind(register_finalizer);
1165         __ enter();
1166         OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1167         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1168         oop_maps = new OopMapSet();
1169         oop_maps->add_gc_map(call_offset, oop_map);
1170 
1171         // Now restore all the live registers
1172         restore_live_registers(sasm);
1173 
1174         __ leave();
1175         __ ret(0);
1176       }
1177       break;
1178 
1179     case throw_range_check_failed_id:
1180       { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1181         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1182       }
1183       break;
1184 
1185     case throw_index_exception_id:
1186       { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1187         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1188       }
1189       break;
1190 
1191     case throw_div0_exception_id:
1192       { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1193         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1194       }
1195       break;
1196 
1197     case throw_null_pointer_exception_id:
1198       { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1199         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1200       }
1201       break;
1202 
1203     case handle_exception_nofpu_id:
1204     case handle_exception_id:
1205       { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1206         oop_maps = generate_handle_exception(id, sasm);
1207       }
1208       break;
1209 
1210     case handle_exception_from_callee_id:
1211       { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1212         oop_maps = generate_handle_exception(id, sasm);
1213       }
1214       break;
1215 
1216     case unwind_exception_id:
1217       { __ set_info("unwind_exception", dont_gc_arguments);
1218         // note: no stubframe since we are about to leave the current
1219         //       activation and we are calling a leaf VM function only.
1220         generate_unwind_exception(sasm);
1221       }
1222       break;
1223 
1224     case throw_array_store_exception_id:
1225       { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1226         // tos + 0: link
1227         //     + 1: return address
1228         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1229       }
1230       break;
1231 
1232     case throw_class_cast_exception_id:
1233       { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1234         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1235       }
1236       break;
1237 
1238     case throw_incompatible_class_change_error_id:
1239       { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1240         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1241       }
1242       break;
1243 
1244     case slow_subtype_check_id:
1245       {
1246         // Typical calling sequence:
1247         // __ push(klass_RInfo);  // object klass or other subclass
1248         // __ push(sup_k_RInfo);  // array element klass or other superclass
1249         // __ call(slow_subtype_check);
1250         // Note that the subclass is pushed first, and is therefore deepest.
1251         // Previous versions of this code reversed the names 'sub' and 'super'.
1252         // This was operationally harmless but made the code unreadable.
1253         enum layout {
1254           rax_off, SLOT2(raxH_off)
1255           rcx_off, SLOT2(rcxH_off)
1256           rsi_off, SLOT2(rsiH_off)
1257           rdi_off, SLOT2(rdiH_off)
1258           // saved_rbp_off, SLOT2(saved_rbpH_off)
1259           return_off, SLOT2(returnH_off)
1260           sup_k_off, SLOT2(sup_kH_off)
1261           klass_off, SLOT2(superH_off)
1262           framesize,
1263           result_off = klass_off  // deepest argument is also the return value
1264         };
1265 
1266         __ set_info("slow_subtype_check", dont_gc_arguments);
1267         __ push(rdi);
1268         __ push(rsi);
1269         __ push(rcx);
1270         __ push(rax);
1271 
1272         // This is called by pushing args and not with C abi
1273         __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1274         __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1275 
1276         Label miss;
1277         __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, nullptr, &miss);
1278 
1279         // fallthrough on success:
1280         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1281         __ pop(rax);
1282         __ pop(rcx);
1283         __ pop(rsi);
1284         __ pop(rdi);
1285         __ ret(0);
1286 
1287         __ bind(miss);
1288         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1289         __ pop(rax);
1290         __ pop(rcx);
1291         __ pop(rsi);
1292         __ pop(rdi);
1293         __ ret(0);
1294       }
1295       break;
1296 
1297     case monitorenter_nofpu_id:
1298       save_fpu_registers = false;
1299       // fall through
1300     case monitorenter_id:
1301       {
1302         StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1303         OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1304 
1305         // Called with store_parameter and not C abi
1306 
1307         f.load_argument(1, rax); // rax,: object
1308         f.load_argument(0, rbx); // rbx,: lock address
1309 
1310         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1311 
1312         oop_maps = new OopMapSet();
1313         oop_maps->add_gc_map(call_offset, map);
1314         restore_live_registers(sasm, save_fpu_registers);
1315       }
1316       break;
1317 
1318     case monitorexit_nofpu_id:
1319       save_fpu_registers = false;
1320       // fall through
1321     case monitorexit_id:
1322       {
1323         StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1324         OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1325 
1326         // Called with store_parameter and not C abi
1327 
1328         f.load_argument(0, rax); // rax,: lock address
1329 
1330         // note: really a leaf routine but must setup last java sp
1331         //       => use call_RT for now (speed can be improved by
1332         //       doing last java sp setup manually)
1333         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1334 
1335         oop_maps = new OopMapSet();
1336         oop_maps->add_gc_map(call_offset, map);
1337         restore_live_registers(sasm, save_fpu_registers);
1338       }
1339       break;
1340 
1341     case deoptimize_id:
1342       {
1343         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1344         const int num_rt_args = 2;  // thread, trap_request
1345         OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1346         f.load_argument(0, rax);
1347         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1348         oop_maps = new OopMapSet();
1349         oop_maps->add_gc_map(call_offset, oop_map);
1350         restore_live_registers(sasm);
1351         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1352         assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1353         __ leave();
1354         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1355       }
1356       break;
1357 
1358     case access_field_patching_id:
1359       { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1360         // we should set up register map
1361         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1362       }
1363       break;
1364 
1365     case load_klass_patching_id:
1366       { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1367         // we should set up register map
1368         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1369       }
1370       break;
1371 
1372     case load_mirror_patching_id:
1373       { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1374         // we should set up register map
1375         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1376       }
1377       break;
1378 
1379     case load_appendix_patching_id:
1380       { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1381         // we should set up register map
1382         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1383       }
1384       break;
1385 
1386     case dtrace_object_alloc_id:
1387       { // rax,: object
1388         StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1389         // we can't gc here so skip the oopmap but make sure that all
1390         // the live registers get saved.
1391         save_live_registers(sasm, 1);
1392 
1393         __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1394         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc))));
1395         NOT_LP64(__ pop(rax));
1396 
1397         restore_live_registers(sasm);
1398       }
1399       break;
1400 
1401     case fpu2long_stub_id:
1402       {
1403 #ifdef _LP64
1404         Label done;
1405         __ cvttsd2siq(rax, Address(rsp, wordSize));
1406         __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1407         __ jccb(Assembler::notEqual, done);
1408         __ movq(rax, Address(rsp, wordSize));
1409         __ subptr(rsp, 8);
1410         __ movq(Address(rsp, 0), rax);
1411         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1412         __ pop(rax);
1413         __ bind(done);
1414         __ ret(0);
1415 #else
1416         // rax, and rdx are destroyed, but should be free since the result is returned there
1417         // preserve rsi,ecx
1418         __ push(rsi);
1419         __ push(rcx);
1420 
1421         // check for NaN
1422         Label return0, do_return, return_min_jlong, do_convert;
1423 
1424         Address value_high_word(rsp, wordSize + 4);
1425         Address value_low_word(rsp, wordSize);
1426         Address result_high_word(rsp, 3*wordSize + 4);
1427         Address result_low_word(rsp, 3*wordSize);
1428 
1429         __ subptr(rsp, 32);                    // more than enough on 32bit
1430         __ fst_d(value_low_word);
1431         __ movl(rax, value_high_word);
1432         __ andl(rax, 0x7ff00000);
1433         __ cmpl(rax, 0x7ff00000);
1434         __ jcc(Assembler::notEqual, do_convert);
1435         __ movl(rax, value_high_word);
1436         __ andl(rax, 0xfffff);
1437         __ orl(rax, value_low_word);
1438         __ jcc(Assembler::notZero, return0);
1439 
1440         __ bind(do_convert);
1441         __ fnstcw(Address(rsp, 0));
1442         __ movzwl(rax, Address(rsp, 0));
1443         __ orl(rax, 0xc00);
1444         __ movw(Address(rsp, 2), rax);
1445         __ fldcw(Address(rsp, 2));
1446         __ fwait();
1447         __ fistp_d(result_low_word);
1448         __ fldcw(Address(rsp, 0));
1449         __ fwait();
1450         // This gets the entire long in rax on 64bit
1451         __ movptr(rax, result_low_word);
1452         // testing of high bits
1453         __ movl(rdx, result_high_word);
1454         __ mov(rcx, rax);
1455         // What the heck is the point of the next instruction???
1456         __ xorl(rcx, 0x0);
1457         __ movl(rsi, 0x80000000);
1458         __ xorl(rsi, rdx);
1459         __ orl(rcx, rsi);
1460         __ jcc(Assembler::notEqual, do_return);
1461         __ fldz();
1462         __ fcomp_d(value_low_word);
1463         __ fnstsw_ax();
1464         __ sahf();
1465         __ jcc(Assembler::above, return_min_jlong);
1466         // return max_jlong
1467         __ movl(rdx, 0x7fffffff);
1468         __ movl(rax, 0xffffffff);
1469         __ jmp(do_return);
1470 
1471         __ bind(return_min_jlong);
1472         __ movl(rdx, 0x80000000);
1473         __ xorl(rax, rax);
1474         __ jmp(do_return);
1475 
1476         __ bind(return0);
1477         __ fpop();
1478         __ xorptr(rdx,rdx);
1479         __ xorptr(rax,rax);
1480 
1481         __ bind(do_return);
1482         __ addptr(rsp, 32);
1483         __ pop(rcx);
1484         __ pop(rsi);
1485         __ ret(0);
1486 #endif // _LP64
1487       }
1488       break;
1489 
1490     case predicate_failed_trap_id:
1491       {
1492         StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1493 
1494         OopMap* map = save_live_registers(sasm, 1);
1495 
1496         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1497         oop_maps = new OopMapSet();
1498         oop_maps->add_gc_map(call_offset, map);
1499         restore_live_registers(sasm);
1500         __ leave();
1501         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1502         assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1503 
1504         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1505       }
1506       break;
1507 
1508     default:
1509       { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1510         __ movptr(rax, (int)id);
1511         __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1512         __ should_not_reach_here();
1513       }
1514       break;
1515   }
1516   return oop_maps;
1517 }
1518 
1519 #undef __
1520 
1521 const char *Runtime1::pd_name_for_address(address entry) {
1522   return "<unknown function>";
1523 }
--- EOF ---