1 /*
2 * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "ci/ciUtilities.hpp"
32 #include "compiler/compilerDefinitions.inline.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/cardTable.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/collectedHeap.hpp"
37 #include "gc/shared/tlab_globals.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "memory/universe.hpp"
40 #include "nativeInst_x86.hpp"
41 #include "oops/oop.inline.hpp"
42 #include "prims/jvmtiExport.hpp"
43 #include "register_x86.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/signature.hpp"
46 #include "runtime/stubRoutines.hpp"
47 #include "runtime/vframeArray.hpp"
48 #include "utilities/macros.hpp"
49 #include "vmreg_x86.inline.hpp"
50
51 // Implementation of StubAssembler
52
53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
54 // setup registers
55 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
56 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
57 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
58 assert(args_size >= 0, "illegal args_size");
59 bool align_stack = false;
60 #ifdef _LP64
61 // At a method handle call, the stack may not be properly aligned
62 // when returning with an exception.
63 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
64 #endif
65
66 #ifdef _LP64
67 mov(c_rarg0, thread);
68 set_num_rt_args(0); // Nothing on stack
69 #else
70 set_num_rt_args(1 + args_size);
71
72 // push java thread (becomes first argument of C function)
73 get_thread(thread);
74 push(thread);
75 #endif // _LP64
76
77 int call_offset = -1;
78 if (!align_stack) {
79 set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
80 } else {
81 address the_pc = pc();
82 call_offset = offset();
83 set_last_Java_frame(thread, noreg, rbp, the_pc, rscratch1);
84 andptr(rsp, -(StackAlignmentInBytes)); // Align stack
85 }
86
87 // do the call
88 call(RuntimeAddress(entry));
89 if (!align_stack) {
90 call_offset = offset();
91 }
92 // verify callee-saved register
93 #ifdef ASSERT
94 guarantee(thread != rax, "change this code");
95 push(rax);
96 { Label L;
97 get_thread(rax);
98 cmpptr(thread, rax);
99 jcc(Assembler::equal, L);
100 int3();
101 stop("StubAssembler::call_RT: rdi not callee saved?");
102 bind(L);
103 }
104 pop(rax);
105 #endif
106 reset_last_Java_frame(thread, true);
107
108 // discard thread and arguments
109 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
110
111 // check for pending exceptions
112 { Label L;
113 cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
114 jcc(Assembler::equal, L);
115 // exception pending => remove activation and forward to exception handler
116 movptr(rax, Address(thread, Thread::pending_exception_offset()));
117 // make sure that the vm_results are cleared
118 if (oop_result1->is_valid()) {
119 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
120 }
121 if (metadata_result->is_valid()) {
122 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
123 }
124 if (frame_size() == no_frame_size) {
125 leave();
126 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
127 } else if (_stub_id == Runtime1::forward_exception_id) {
128 should_not_reach_here();
129 } else {
130 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
131 }
132 bind(L);
133 }
134 // get oop results if there are any and reset the values in the thread
135 if (oop_result1->is_valid()) {
136 get_vm_result(oop_result1, thread);
137 }
138 if (metadata_result->is_valid()) {
139 get_vm_result_2(metadata_result, thread);
140 }
141
142 assert(call_offset >= 0, "Should be set");
143 return call_offset;
144 }
145
146
147 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
148 #ifdef _LP64
149 mov(c_rarg1, arg1);
150 #else
151 push(arg1);
152 #endif // _LP64
153 return call_RT(oop_result1, metadata_result, entry, 1);
154 }
155
156
157 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
158 #ifdef _LP64
159 if (c_rarg1 == arg2) {
160 if (c_rarg2 == arg1) {
161 xchgq(arg1, arg2);
162 } else {
163 mov(c_rarg2, arg2);
164 mov(c_rarg1, arg1);
165 }
166 } else {
167 mov(c_rarg1, arg1);
168 mov(c_rarg2, arg2);
169 }
170 #else
171 push(arg2);
172 push(arg1);
173 #endif // _LP64
174 return call_RT(oop_result1, metadata_result, entry, 2);
175 }
176
177
178 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
179 #ifdef _LP64
180 // if there is any conflict use the stack
181 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
182 arg2 == c_rarg1 || arg2 == c_rarg3 ||
183 arg3 == c_rarg1 || arg3 == c_rarg2) {
184 push(arg3);
185 push(arg2);
186 push(arg1);
187 pop(c_rarg1);
188 pop(c_rarg2);
189 pop(c_rarg3);
190 } else {
191 mov(c_rarg1, arg1);
192 mov(c_rarg2, arg2);
193 mov(c_rarg3, arg3);
194 }
195 #else
196 push(arg3);
197 push(arg2);
198 push(arg1);
199 #endif // _LP64
200 return call_RT(oop_result1, metadata_result, entry, 3);
201 }
202
203
204 // Implementation of StubFrame
205
206 class StubFrame: public StackObj {
207 private:
208 StubAssembler* _sasm;
209 bool _use_pop_on_epilog;
210
211 public:
212 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog = false);
213 void load_argument(int offset_in_words, Register reg);
214
215 ~StubFrame();
216 };
217
218 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
219 set_info(name, must_gc_arguments);
220 enter();
221 }
222
223 void StubAssembler::epilogue(bool use_pop) {
224 use_pop ? pop(rbp) : leave();
225 ret(0);
226 }
227
228 #define __ _sasm->
229
230 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog) {
231 _sasm = sasm;
232 _use_pop_on_epilog = use_pop_on_epilog;
233 __ prologue(name, must_gc_arguments);
234 }
235
236 // load parameters that were stored with LIR_Assembler::store_parameter
237 // Note: offsets for store_parameter and load_argument must match
238 void StubFrame::load_argument(int offset_in_words, Register reg) {
239 __ load_parameter(offset_in_words, reg);
240 }
241
242
243 StubFrame::~StubFrame() {
244 __ epilogue(_use_pop_on_epilog);
245 }
246
247 #undef __
248
249
250 // Implementation of Runtime1
251
252 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
253 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
254
255 // Stack layout for saving/restoring all the registers needed during a runtime
256 // call (this includes deoptimization)
257 // Note: note that users of this frame may well have arguments to some runtime
258 // while these values are on the stack. These positions neglect those arguments
259 // but the code in save_live_registers will take the argument count into
260 // account.
261 //
262 #ifdef _LP64
263 #define SLOT2(x) x,
264 #define SLOT_PER_WORD 2
265 #else
266 #define SLOT2(x)
267 #define SLOT_PER_WORD 1
268 #endif // _LP64
269
270 enum reg_save_layout {
271 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
272 // happen and will assert if the stack size we create is misaligned
273 #ifdef _LP64
274 align_dummy_0, align_dummy_1,
275 #endif // _LP64
276 #ifdef _WIN64
277 // Windows always allocates space for it's argument registers (see
278 // frame::arg_reg_save_area_bytes).
279 arg_reg_save_1, arg_reg_save_1H, // 0, 4
280 arg_reg_save_2, arg_reg_save_2H, // 8, 12
281 arg_reg_save_3, arg_reg_save_3H, // 16, 20
282 arg_reg_save_4, arg_reg_save_4H, // 24, 28
283 #endif // _WIN64
284 xmm_regs_as_doubles_off, // 32
285 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
286 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
287 // fpu_state_end_off is exclusive
288 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
289 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
290 extra_space_offset, // 360
291 #ifdef _LP64
292 r15_off = extra_space_offset, r15H_off, // 360, 364
293 r14_off, r14H_off, // 368, 372
294 r13_off, r13H_off, // 376, 380
295 r12_off, r12H_off, // 384, 388
296 r11_off, r11H_off, // 392, 396
297 r10_off, r10H_off, // 400, 404
298 r9_off, r9H_off, // 408, 412
299 r8_off, r8H_off, // 416, 420
300 rdi_off, rdiH_off, // 424, 428
301 #else
302 rdi_off = extra_space_offset,
303 #endif // _LP64
304 rsi_off, SLOT2(rsiH_off) // 432, 436
305 rbp_off, SLOT2(rbpH_off) // 440, 444
306 rsp_off, SLOT2(rspH_off) // 448, 452
307 rbx_off, SLOT2(rbxH_off) // 456, 460
308 rdx_off, SLOT2(rdxH_off) // 464, 468
309 rcx_off, SLOT2(rcxH_off) // 472, 476
310 rax_off, SLOT2(raxH_off) // 480, 484
311 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
312 return_off, SLOT2(returnH_off) // 496, 500
313 reg_save_frame_size // As noted: neglects any parameters to runtime // 504
314 };
315
316 // Save off registers which might be killed by calls into the runtime.
317 // Tries to smart of about FP registers. In particular we separate
318 // saving and describing the FPU registers for deoptimization since we
319 // have to save the FPU registers twice if we describe them and on P4
320 // saving FPU registers which don't contain anything appears
321 // expensive. The deopt blob is the only thing which needs to
322 // describe FPU registers. In all other cases it should be sufficient
323 // to simply save their current value.
324 //
325 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
326 bool save_fpu_registers = true) {
327
328 // In 64bit all the args are in regs so there are no additional stack slots
329 LP64_ONLY(num_rt_args = 0);
330 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
331 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
332 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
333
334 // record saved value locations in an OopMap
335 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
336 OopMap* map = new OopMap(frame_size_in_slots, 0);
337 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
338 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
339 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
340 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
341 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
342 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
343 #ifdef _LP64
344 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
345 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
346 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
347 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
348 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
349 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
350 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
351 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
352
353 // This is stupid but needed.
354 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
355 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
356 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
357 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
358 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
359 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
360
361 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
362 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
363 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
364 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
365 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
366 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
367 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
368 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
369 #endif // _LP64
370
371 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
372
373 if (save_fpu_registers) {
374 #ifndef _LP64
375 if (UseSSE < 2) {
376 int fpu_off = float_regs_as_doubles_off;
377 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
378 VMReg fpu_name_0 = FrameMap::fpu_regname(n);
379 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
380 // %%% This is really a waste but we'll keep things as they were for now
381 if (true) {
382 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
383 }
384 fpu_off += 2;
385 }
386 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
387
388 if (UseSSE == 1) {
389 int xmm_off = xmm_regs_as_doubles_off;
390 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
391 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
392 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
393 xmm_off += 2;
394 }
395 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
396 }
397 }
398 #endif // !LP64
399
400 if (UseSSE >= 2) {
401 int xmm_off = xmm_regs_as_doubles_off;
402 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
403 if (n < xmm_bypass_limit) {
404 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
405 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
406 // %%% This is really a waste but we'll keep things as they were for now
407 if (true) {
408 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
409 }
410 }
411 xmm_off += 2;
412 }
413 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
414 }
415 }
416
417 return map;
418 }
419
420 #define __ this->
421
422 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
423 __ block_comment("save_live_registers");
424
425 // Push CPU state in multiple of 16 bytes
426 #ifdef _LP64
427 __ save_legacy_gprs();
428 #else
429 __ pusha();
430 #endif
431
432 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
433 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
434
435 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
436
437 #ifdef ASSERT
438 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
439 #endif
440
441 if (save_fpu_registers) {
442 #ifndef _LP64
443 if (UseSSE < 2) {
444 // save FPU stack
445 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
446 __ fwait();
447
448 #ifdef ASSERT
449 Label ok;
450 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
451 __ jccb(Assembler::equal, ok);
452 __ stop("corrupted control word detected");
453 __ bind(ok);
454 #endif
455
456 // Reset the control word to guard against exceptions being unmasked
457 // since fstp_d can cause FPU stack underflow exceptions. Write it
458 // into the on stack copy and then reload that to make sure that the
459 // current and future values are correct.
460 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
461 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
462
463 // Save the FPU registers in de-opt-able form
464 int offset = 0;
465 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
466 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
467 offset += 8;
468 }
469
470 if (UseSSE == 1) {
471 // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
472 int offset = 0;
473 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
474 XMMRegister xmm_name = as_XMMRegister(n);
475 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
476 offset += 8;
477 }
478 }
479 }
480 #endif // !_LP64
481
482 if (UseSSE >= 2) {
483 // save XMM registers
484 // XMM registers can contain float or double values, but this is not known here,
485 // so always save them as doubles.
486 // note that float values are _not_ converted automatically, so for float values
487 // the second word contains only garbage data.
488 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
489 int offset = 0;
490 for (int n = 0; n < xmm_bypass_limit; n++) {
491 XMMRegister xmm_name = as_XMMRegister(n);
492 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
493 offset += 8;
494 }
495 }
496 }
497
498 // FPU stack must be empty now
499 NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
500 }
501
502 #undef __
503 #define __ sasm->
504
505 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
506 #ifdef _LP64
507 if (restore_fpu_registers) {
508 // restore XMM registers
509 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
510 int offset = 0;
511 for (int n = 0; n < xmm_bypass_limit; n++) {
512 XMMRegister xmm_name = as_XMMRegister(n);
513 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
514 offset += 8;
515 }
516 }
517 #else
518 if (restore_fpu_registers) {
519 if (UseSSE >= 2) {
520 // restore XMM registers
521 int xmm_bypass_limit = FrameMap::nof_xmm_regs;
522 int offset = 0;
523 for (int n = 0; n < xmm_bypass_limit; n++) {
524 XMMRegister xmm_name = as_XMMRegister(n);
525 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
526 offset += 8;
527 }
528 } else if (UseSSE == 1) {
529 // restore XMM registers(num MMX == num fpu)
530 int offset = 0;
531 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
532 XMMRegister xmm_name = as_XMMRegister(n);
533 __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
534 offset += 8;
535 }
536 }
537
538 if (UseSSE < 2) {
539 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
540 } else {
541 // check that FPU stack is really empty
542 __ verify_FPU(0, "restore_live_registers");
543 }
544 } else {
545 // check that FPU stack is really empty
546 __ verify_FPU(0, "restore_live_registers");
547 }
548 #endif // _LP64
549
550 #ifdef ASSERT
551 {
552 Label ok;
553 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
554 __ jcc(Assembler::equal, ok);
555 __ stop("bad offsets in frame");
556 __ bind(ok);
557 }
558 #endif // ASSERT
559
560 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
561 }
562
563 #undef __
564 #define __ this->
565
566 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
567 __ block_comment("restore_live_registers");
568
569 restore_fpu(this, restore_fpu_registers);
570 #ifdef _LP64
571 __ restore_legacy_gprs();
572 #else
573 __ popa();
574 #endif
575
576 }
577
578
579 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
580 __ block_comment("restore_live_registers_except_rax");
581
582 restore_fpu(this, restore_fpu_registers);
583
584 #ifdef _LP64
585 __ movptr(r15, Address(rsp, 0));
586 __ movptr(r14, Address(rsp, wordSize));
587 __ movptr(r13, Address(rsp, 2 * wordSize));
588 __ movptr(r12, Address(rsp, 3 * wordSize));
589 __ movptr(r11, Address(rsp, 4 * wordSize));
590 __ movptr(r10, Address(rsp, 5 * wordSize));
591 __ movptr(r9, Address(rsp, 6 * wordSize));
592 __ movptr(r8, Address(rsp, 7 * wordSize));
593 __ movptr(rdi, Address(rsp, 8 * wordSize));
594 __ movptr(rsi, Address(rsp, 9 * wordSize));
595 __ movptr(rbp, Address(rsp, 10 * wordSize));
596 // skip rsp
597 __ movptr(rbx, Address(rsp, 12 * wordSize));
598 __ movptr(rdx, Address(rsp, 13 * wordSize));
599 __ movptr(rcx, Address(rsp, 14 * wordSize));
600
601 __ addptr(rsp, 16 * wordSize);
602 #else
603
604 __ pop(rdi);
605 __ pop(rsi);
606 __ pop(rbp);
607 __ pop(rbx); // skip this value
608 __ pop(rbx);
609 __ pop(rdx);
610 __ pop(rcx);
611 __ addptr(rsp, BytesPerWord);
612 #endif // _LP64
613 }
614
615 #undef __
616 #define __ sasm->
617
618 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
619 bool save_fpu_registers = true) {
620 __ save_live_registers_no_oop_map(save_fpu_registers);
621 return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
622 }
623
624 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
625 __ restore_live_registers(restore_fpu_registers);
626 }
627
628 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
629 sasm->restore_live_registers_except_rax(restore_fpu_registers);
630 }
631
632
633 void Runtime1::initialize_pd() {
634 // nothing to do
635 }
636
637 uint Runtime1::runtime_blob_current_thread_offset(frame f) {
638 return r15_off / 2;
639 }
640
641 // Target: the entry point of the method that creates and posts the exception oop.
642 // has_argument: true if the exception needs arguments (passed on the stack because
643 // registers must be preserved).
644 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
645 // Preserve all registers.
646 int num_rt_args = has_argument ? (2 + 1) : 1;
647 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
648
649 // Now all registers are saved and can be used freely.
650 // Verify that no old value is used accidentally.
651 __ invalidate_registers(true, true, true, true, true, true);
652
653 // Registers used by this stub.
654 const Register temp_reg = rbx;
655
656 // Load arguments for exception that are passed as arguments into the stub.
657 if (has_argument) {
658 #ifdef _LP64
659 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
660 __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
661 #else
662 __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
663 __ push(temp_reg);
664 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
665 __ push(temp_reg);
666 #endif // _LP64
667 }
668 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
669
670 OopMapSet* oop_maps = new OopMapSet();
671 oop_maps->add_gc_map(call_offset, oop_map);
672
673 __ stop("should not reach here");
674
675 return oop_maps;
676 }
677
678
679 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
680 __ block_comment("generate_handle_exception");
681
682 // incoming parameters
683 const Register exception_oop = rax;
684 const Register exception_pc = rdx;
685 // other registers used in this stub
686 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
687
688 // Save registers, if required.
689 OopMapSet* oop_maps = new OopMapSet();
690 OopMap* oop_map = nullptr;
691 switch (id) {
692 case forward_exception_id:
693 // We're handling an exception in the context of a compiled frame.
694 // The registers have been saved in the standard places. Perform
695 // an exception lookup in the caller and dispatch to the handler
696 // if found. Otherwise unwind and dispatch to the callers
697 // exception handler.
698 oop_map = generate_oop_map(sasm, 1 /*thread*/);
699
700 // load and clear pending exception oop into RAX
701 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
702 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
703
704 // load issuing PC (the return address for this stub) into rdx
705 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
706
707 // make sure that the vm_results are cleared (may be unnecessary)
708 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
709 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
710 break;
711 case handle_exception_nofpu_id:
712 case handle_exception_id:
713 // At this point all registers MAY be live.
714 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
715 break;
716 case handle_exception_from_callee_id: {
717 // At this point all registers except exception oop (RAX) and
718 // exception pc (RDX) are dead.
719 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
720 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
721 sasm->set_frame_size(frame_size);
722 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
723 break;
724 }
725 default: ShouldNotReachHere();
726 }
727
728 #if !defined(_LP64) && defined(COMPILER2)
729 if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
730 // C2 can leave the fpu stack dirty
731 __ empty_FPU_stack();
732 }
733 #endif // !_LP64 && COMPILER2
734
735 // verify that only rax, and rdx is valid at this time
736 __ invalidate_registers(false, true, true, false, true, true);
737 // verify that rax, contains a valid exception
738 __ verify_not_null_oop(exception_oop);
739
740 // load address of JavaThread object for thread-local data
741 NOT_LP64(__ get_thread(thread);)
742
743 #ifdef ASSERT
744 // check that fields in JavaThread for exception oop and issuing pc are
745 // empty before writing to them
746 Label oop_empty;
747 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
748 __ jcc(Assembler::equal, oop_empty);
749 __ stop("exception oop already set");
750 __ bind(oop_empty);
751
752 Label pc_empty;
753 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
754 __ jcc(Assembler::equal, pc_empty);
755 __ stop("exception pc already set");
756 __ bind(pc_empty);
757 #endif
758
759 // save exception oop and issuing pc into JavaThread
760 // (exception handler will load it from here)
761 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
762 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
763
764 // patch throwing pc into return address (has bci & oop map)
765 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
766
767 // compute the exception handler.
768 // the exception oop and the throwing pc are read from the fields in JavaThread
769 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
770 oop_maps->add_gc_map(call_offset, oop_map);
771
772 // rax: handler address
773 // will be the deopt blob if nmethod was deoptimized while we looked up
774 // handler regardless of whether handler existed in the nmethod.
775
776 // only rax, is valid at this time, all other registers have been destroyed by the runtime call
777 __ invalidate_registers(false, true, true, true, true, true);
778
779 // patch the return address, this stub will directly return to the exception handler
780 __ movptr(Address(rbp, 1*BytesPerWord), rax);
781
782 switch (id) {
783 case forward_exception_id:
784 case handle_exception_nofpu_id:
785 case handle_exception_id:
786 // Restore the registers that were saved at the beginning.
787 restore_live_registers(sasm, id != handle_exception_nofpu_id);
788 break;
789 case handle_exception_from_callee_id:
790 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
791 // since we do a leave anyway.
792
793 // Pop the return address.
794 __ leave();
795 __ pop(rcx);
796 __ jmp(rcx); // jump to exception handler
797 break;
798 default: ShouldNotReachHere();
799 }
800
801 return oop_maps;
802 }
803
804
805 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
806 // incoming parameters
807 const Register exception_oop = rax;
808 // callee-saved copy of exception_oop during runtime call
809 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
810 // other registers used in this stub
811 const Register exception_pc = rdx;
812 const Register handler_addr = rbx;
813 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
814
815 if (AbortVMOnException) {
816 __ enter();
817 save_live_registers(sasm, 2);
818 __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), rax);
819 restore_live_registers(sasm);
820 __ leave();
821 }
822
823 // verify that only rax, is valid at this time
824 __ invalidate_registers(false, true, true, true, true, true);
825
826 #ifdef ASSERT
827 // check that fields in JavaThread for exception oop and issuing pc are empty
828 NOT_LP64(__ get_thread(thread);)
829 Label oop_empty;
830 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
831 __ jcc(Assembler::equal, oop_empty);
832 __ stop("exception oop must be empty");
833 __ bind(oop_empty);
834
835 Label pc_empty;
836 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
837 __ jcc(Assembler::equal, pc_empty);
838 __ stop("exception pc must be empty");
839 __ bind(pc_empty);
840 #endif
841
842 // clear the FPU stack in case any FPU results are left behind
843 NOT_LP64( __ empty_FPU_stack(); )
844
845 // save exception_oop in callee-saved register to preserve it during runtime calls
846 __ verify_not_null_oop(exception_oop);
847 __ movptr(exception_oop_callee_saved, exception_oop);
848
849 NOT_LP64(__ get_thread(thread);)
850 // Get return address (is on top of stack after leave).
851 __ movptr(exception_pc, Address(rsp, 0));
852
853 // search the exception handler address of the caller (using the return address)
854 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
855 // rax: exception handler address of the caller
856
857 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
858 __ invalidate_registers(false, true, true, true, false, true);
859
860 // move result of call into correct register
861 __ movptr(handler_addr, rax);
862
863 // Restore exception oop to RAX (required convention of exception handler).
864 __ movptr(exception_oop, exception_oop_callee_saved);
865
866 // verify that there is really a valid exception in rax
867 __ verify_not_null_oop(exception_oop);
868
869 // get throwing pc (= return address).
870 // rdx has been destroyed by the call, so it must be set again
871 // the pop is also necessary to simulate the effect of a ret(0)
872 __ pop(exception_pc);
873
874 // continue at exception handler (return address removed)
875 // note: do *not* remove arguments when unwinding the
876 // activation since the caller assumes having
877 // all arguments on the stack when entering the
878 // runtime to determine the exception handler
879 // (GC happens at call site with arguments!)
880 // rax: exception oop
881 // rdx: throwing pc
882 // rbx: exception handler
883 __ jmp(handler_addr);
884 }
885
886
887 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
888 // use the maximum number of runtime-arguments here because it is difficult to
889 // distinguish each RT-Call.
890 // Note: This number affects also the RT-Call in generate_handle_exception because
891 // the oop-map is shared for all calls.
892 const int num_rt_args = 2; // thread + dummy
893
894 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
895 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
896
897 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
898
899 #ifdef _LP64
900 const Register thread = r15_thread;
901 // No need to worry about dummy
902 __ mov(c_rarg0, thread);
903 #else
904 __ push(rax); // push dummy
905
906 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
907 // push java thread (becomes first argument of C function)
908 __ get_thread(thread);
909 __ push(thread);
910 #endif // _LP64
911 __ set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
912 // do the call
913 __ call(RuntimeAddress(target));
914 OopMapSet* oop_maps = new OopMapSet();
915 oop_maps->add_gc_map(__ offset(), oop_map);
916 // verify callee-saved register
917 #ifdef ASSERT
918 guarantee(thread != rax, "change this code");
919 __ push(rax);
920 { Label L;
921 __ get_thread(rax);
922 __ cmpptr(thread, rax);
923 __ jcc(Assembler::equal, L);
924 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
925 __ bind(L);
926 }
927 __ pop(rax);
928 #endif
929 __ reset_last_Java_frame(thread, true);
930 #ifndef _LP64
931 __ pop(rcx); // discard thread arg
932 __ pop(rcx); // discard dummy
933 #endif // _LP64
934
935 // check for pending exceptions
936 { Label L;
937 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
938 __ jcc(Assembler::equal, L);
939 // exception pending => remove activation and forward to exception handler
940
941 __ testptr(rax, rax); // have we deoptimized?
942 __ jump_cc(Assembler::equal,
943 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
944
945 // the deopt blob expects exceptions in the special fields of
946 // JavaThread, so copy and clear pending exception.
947
948 // load and clear pending exception
949 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
950 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
951
952 // check that there is really a valid exception
953 __ verify_not_null_oop(rax);
954
955 // load throwing pc: this is the return address of the stub
956 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
957
958 #ifdef ASSERT
959 // check that fields in JavaThread for exception oop and issuing pc are empty
960 Label oop_empty;
961 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
962 __ jcc(Assembler::equal, oop_empty);
963 __ stop("exception oop must be empty");
964 __ bind(oop_empty);
965
966 Label pc_empty;
967 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
968 __ jcc(Assembler::equal, pc_empty);
969 __ stop("exception pc must be empty");
970 __ bind(pc_empty);
971 #endif
972
973 // store exception oop and throwing pc to JavaThread
974 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
975 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
976
977 restore_live_registers(sasm);
978
979 __ leave();
980 __ addptr(rsp, BytesPerWord); // remove return address from stack
981
982 // Forward the exception directly to deopt blob. We can blow no
983 // registers and must leave throwing pc on the stack. A patch may
984 // have values live in registers so the entry point with the
985 // exception in tls.
986 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
987
988 __ bind(L);
989 }
990
991
992 // Runtime will return true if the nmethod has been deoptimized during
993 // the patching process. In that case we must do a deopt reexecute instead.
994
995 Label cont;
996
997 __ testptr(rax, rax); // have we deoptimized?
998 __ jcc(Assembler::equal, cont); // no
999
1000 // Will reexecute. Proper return address is already on the stack we just restore
1001 // registers, pop all of our frame but the return address and jump to the deopt blob
1002 restore_live_registers(sasm);
1003 __ leave();
1004 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1005
1006 __ bind(cont);
1007 restore_live_registers(sasm);
1008 __ leave();
1009 __ ret(0);
1010
1011 return oop_maps;
1012 }
1013
1014
1015 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
1016
1017 // for better readability
1018 const bool must_gc_arguments = true;
1019 const bool dont_gc_arguments = false;
1020
1021 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1022 bool save_fpu_registers = true;
1023
1024 // stub code & info for the different stubs
1025 OopMapSet* oop_maps = nullptr;
1026 switch (id) {
1027 case forward_exception_id:
1028 {
1029 oop_maps = generate_handle_exception(id, sasm);
1030 __ leave();
1031 __ ret(0);
1032 }
1033 break;
1034
1035 case new_instance_id:
1036 case fast_new_instance_id:
1037 case fast_new_instance_init_check_id:
1038 {
1039 Register klass = rdx; // Incoming
1040 Register obj = rax; // Result
1041
1042 if (id == new_instance_id) {
1043 __ set_info("new_instance", dont_gc_arguments);
1044 } else if (id == fast_new_instance_id) {
1045 __ set_info("fast new_instance", dont_gc_arguments);
1046 } else {
1047 assert(id == fast_new_instance_init_check_id, "bad StubID");
1048 __ set_info("fast new_instance init check", dont_gc_arguments);
1049 }
1050
1051 __ enter();
1052 OopMap* map = save_live_registers(sasm, 2);
1053 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1054 oop_maps = new OopMapSet();
1055 oop_maps->add_gc_map(call_offset, map);
1056 restore_live_registers_except_rax(sasm);
1057 __ verify_oop(obj);
1058 __ leave();
1059 __ ret(0);
1060
1061 // rax,: new instance
1062 }
1063
1064 break;
1065
1066 case counter_overflow_id:
1067 {
1068 Register bci = rax, method = rbx;
1069 __ enter();
1070 OopMap* map = save_live_registers(sasm, 3);
1071 // Retrieve bci
1072 __ movl(bci, Address(rbp, 2*BytesPerWord));
1073 // And a pointer to the Method*
1074 __ movptr(method, Address(rbp, 3*BytesPerWord));
1075 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1076 oop_maps = new OopMapSet();
1077 oop_maps->add_gc_map(call_offset, map);
1078 restore_live_registers(sasm);
1079 __ leave();
1080 __ ret(0);
1081 }
1082 break;
1083
1084 case new_type_array_id:
1085 case new_object_array_id:
1086 {
1087 Register length = rbx; // Incoming
1088 Register klass = rdx; // Incoming
1089 Register obj = rax; // Result
1090
1091 if (id == new_type_array_id) {
1092 __ set_info("new_type_array", dont_gc_arguments);
1093 } else {
1094 __ set_info("new_object_array", dont_gc_arguments);
1095 }
1096
1097 #ifdef ASSERT
1098 // assert object type is really an array of the proper kind
1099 {
1100 Label ok;
1101 Register t0 = obj;
1102 __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1103 __ sarl(t0, Klass::_lh_array_tag_shift);
1104 int tag = ((id == new_type_array_id)
1105 ? Klass::_lh_array_tag_type_value
1106 : Klass::_lh_array_tag_obj_value);
1107 __ cmpl(t0, tag);
1108 __ jcc(Assembler::equal, ok);
1109 __ stop("assert(is an array klass)");
1110 __ should_not_reach_here();
1111 __ bind(ok);
1112 }
1113 #endif // ASSERT
1114
1115 __ enter();
1116 OopMap* map = save_live_registers(sasm, 3);
1117 int call_offset;
1118 if (id == new_type_array_id) {
1119 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1120 } else {
1121 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1122 }
1123
1124 oop_maps = new OopMapSet();
1125 oop_maps->add_gc_map(call_offset, map);
1126 restore_live_registers_except_rax(sasm);
1127
1128 __ verify_oop(obj);
1129 __ leave();
1130 __ ret(0);
1131
1132 // rax,: new array
1133 }
1134 break;
1135
1136 case new_multi_array_id:
1137 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1138 // rax,: klass
1139 // rbx,: rank
1140 // rcx: address of 1st dimension
1141 OopMap* map = save_live_registers(sasm, 4);
1142 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1143
1144 oop_maps = new OopMapSet();
1145 oop_maps->add_gc_map(call_offset, map);
1146 restore_live_registers_except_rax(sasm);
1147
1148 // rax,: new multi array
1149 __ verify_oop(rax);
1150 }
1151 break;
1152
1153 case register_finalizer_id:
1154 {
1155 __ set_info("register_finalizer", dont_gc_arguments);
1156
1157 // This is called via call_runtime so the arguments
1158 // will be place in C abi locations
1159
1160 #ifdef _LP64
1161 __ verify_oop(c_rarg0);
1162 __ mov(rax, c_rarg0);
1163 #else
1164 // The object is passed on the stack and we haven't pushed a
1165 // frame yet so it's one work away from top of stack.
1166 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1167 __ verify_oop(rax);
1168 #endif // _LP64
1169
1170 // load the klass and check the has finalizer flag
1171 Label register_finalizer;
1172 Register t = rsi;
1173 __ load_klass(t, rax, rscratch1);
1174 __ movl(t, Address(t, Klass::access_flags_offset()));
1175 __ testl(t, JVM_ACC_HAS_FINALIZER);
1176 __ jcc(Assembler::notZero, register_finalizer);
1177 __ ret(0);
1178
1179 __ bind(register_finalizer);
1180 __ enter();
1181 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1182 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1183 oop_maps = new OopMapSet();
1184 oop_maps->add_gc_map(call_offset, oop_map);
1185
1186 // Now restore all the live registers
1187 restore_live_registers(sasm);
1188
1189 __ leave();
1190 __ ret(0);
1191 }
1192 break;
1193
1194 case throw_range_check_failed_id:
1195 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1196 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1197 }
1198 break;
1199
1200 case throw_index_exception_id:
1201 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1202 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1203 }
1204 break;
1205
1206 case throw_div0_exception_id:
1207 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1208 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1209 }
1210 break;
1211
1212 case throw_null_pointer_exception_id:
1213 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1214 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1215 }
1216 break;
1217
1218 case handle_exception_nofpu_id:
1219 case handle_exception_id:
1220 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1221 oop_maps = generate_handle_exception(id, sasm);
1222 }
1223 break;
1224
1225 case handle_exception_from_callee_id:
1226 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1227 oop_maps = generate_handle_exception(id, sasm);
1228 }
1229 break;
1230
1231 case unwind_exception_id:
1232 { __ set_info("unwind_exception", dont_gc_arguments);
1233 // note: no stubframe since we are about to leave the current
1234 // activation and we are calling a leaf VM function only.
1235 generate_unwind_exception(sasm);
1236 }
1237 break;
1238
1239 case throw_array_store_exception_id:
1240 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1241 // tos + 0: link
1242 // + 1: return address
1243 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1244 }
1245 break;
1246
1247 case throw_class_cast_exception_id:
1248 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1249 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1250 }
1251 break;
1252
1253 case throw_incompatible_class_change_error_id:
1254 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1255 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1256 }
1257 break;
1258
1259 case slow_subtype_check_id:
1260 {
1261 // Typical calling sequence:
1262 // __ push(klass_RInfo); // object klass or other subclass
1263 // __ push(sup_k_RInfo); // array element klass or other superclass
1264 // __ call(slow_subtype_check);
1265 // Note that the subclass is pushed first, and is therefore deepest.
1266 // Previous versions of this code reversed the names 'sub' and 'super'.
1267 // This was operationally harmless but made the code unreadable.
1268 enum layout {
1269 rax_off, SLOT2(raxH_off)
1270 rcx_off, SLOT2(rcxH_off)
1271 rsi_off, SLOT2(rsiH_off)
1272 rdi_off, SLOT2(rdiH_off)
1273 // saved_rbp_off, SLOT2(saved_rbpH_off)
1274 return_off, SLOT2(returnH_off)
1275 sup_k_off, SLOT2(sup_kH_off)
1276 klass_off, SLOT2(superH_off)
1277 framesize,
1278 result_off = klass_off // deepest argument is also the return value
1279 };
1280
1281 __ set_info("slow_subtype_check", dont_gc_arguments);
1282 __ push(rdi);
1283 __ push(rsi);
1284 __ push(rcx);
1285 __ push(rax);
1286
1287 // This is called by pushing args and not with C abi
1288 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1289 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1290
1291 Label miss;
1292 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, nullptr, &miss);
1293
1294 // fallthrough on success:
1295 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1296 __ pop(rax);
1297 __ pop(rcx);
1298 __ pop(rsi);
1299 __ pop(rdi);
1300 __ ret(0);
1301
1302 __ bind(miss);
1303 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1304 __ pop(rax);
1305 __ pop(rcx);
1306 __ pop(rsi);
1307 __ pop(rdi);
1308 __ ret(0);
1309 }
1310 break;
1311
1312 case monitorenter_nofpu_id:
1313 save_fpu_registers = false;
1314 // fall through
1315 case monitorenter_id:
1316 {
1317 StubFrame f(sasm, "monitorenter", dont_gc_arguments, true /* use_pop_on_epilog */);
1318 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1319
1320 // Called with store_parameter and not C abi
1321
1322 f.load_argument(1, rax); // rax,: object
1323 f.load_argument(0, rbx); // rbx,: lock address
1324
1325 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1326
1327 oop_maps = new OopMapSet();
1328 oop_maps->add_gc_map(call_offset, map);
1329 restore_live_registers(sasm, save_fpu_registers);
1330 }
1331 break;
1332
1333 case monitorexit_nofpu_id:
1334 save_fpu_registers = false;
1335 // fall through
1336 case monitorexit_id:
1337 {
1338 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1339 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1340
1341 // Called with store_parameter and not C abi
1342
1343 f.load_argument(0, rax); // rax,: lock address
1344
1345 // note: really a leaf routine but must setup last java sp
1346 // => use call_RT for now (speed can be improved by
1347 // doing last java sp setup manually)
1348 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1349
1350 oop_maps = new OopMapSet();
1351 oop_maps->add_gc_map(call_offset, map);
1352 restore_live_registers(sasm, save_fpu_registers);
1353 }
1354 break;
1355
1356 case deoptimize_id:
1357 {
1358 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1359 const int num_rt_args = 2; // thread, trap_request
1360 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1361 f.load_argument(0, rax);
1362 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1363 oop_maps = new OopMapSet();
1364 oop_maps->add_gc_map(call_offset, oop_map);
1365 restore_live_registers(sasm);
1366 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1367 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1368 __ leave();
1369 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1370 }
1371 break;
1372
1373 case access_field_patching_id:
1374 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1375 // we should set up register map
1376 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1377 }
1378 break;
1379
1380 case load_klass_patching_id:
1381 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1382 // we should set up register map
1383 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1384 }
1385 break;
1386
1387 case load_mirror_patching_id:
1388 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1389 // we should set up register map
1390 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1391 }
1392 break;
1393
1394 case load_appendix_patching_id:
1395 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1396 // we should set up register map
1397 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1398 }
1399 break;
1400
1401 case dtrace_object_alloc_id:
1402 { // rax,: object
1403 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1404 // we can't gc here so skip the oopmap but make sure that all
1405 // the live registers get saved.
1406 save_live_registers(sasm, 1);
1407
1408 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1409 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc))));
1410 NOT_LP64(__ pop(rax));
1411
1412 restore_live_registers(sasm);
1413 }
1414 break;
1415
1416 case fpu2long_stub_id:
1417 {
1418 #ifdef _LP64
1419 Label done;
1420 __ cvttsd2siq(rax, Address(rsp, wordSize));
1421 __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1422 __ jccb(Assembler::notEqual, done);
1423 __ movq(rax, Address(rsp, wordSize));
1424 __ subptr(rsp, 8);
1425 __ movq(Address(rsp, 0), rax);
1426 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1427 __ pop(rax);
1428 __ bind(done);
1429 __ ret(0);
1430 #else
1431 // rax, and rdx are destroyed, but should be free since the result is returned there
1432 // preserve rsi,ecx
1433 __ push(rsi);
1434 __ push(rcx);
1435
1436 // check for NaN
1437 Label return0, do_return, return_min_jlong, do_convert;
1438
1439 Address value_high_word(rsp, wordSize + 4);
1440 Address value_low_word(rsp, wordSize);
1441 Address result_high_word(rsp, 3*wordSize + 4);
1442 Address result_low_word(rsp, 3*wordSize);
1443
1444 __ subptr(rsp, 32); // more than enough on 32bit
1445 __ fst_d(value_low_word);
1446 __ movl(rax, value_high_word);
1447 __ andl(rax, 0x7ff00000);
1448 __ cmpl(rax, 0x7ff00000);
1449 __ jcc(Assembler::notEqual, do_convert);
1450 __ movl(rax, value_high_word);
1451 __ andl(rax, 0xfffff);
1452 __ orl(rax, value_low_word);
1453 __ jcc(Assembler::notZero, return0);
1454
1455 __ bind(do_convert);
1456 __ fnstcw(Address(rsp, 0));
1457 __ movzwl(rax, Address(rsp, 0));
1458 __ orl(rax, 0xc00);
1459 __ movw(Address(rsp, 2), rax);
1460 __ fldcw(Address(rsp, 2));
1461 __ fwait();
1462 __ fistp_d(result_low_word);
1463 __ fldcw(Address(rsp, 0));
1464 __ fwait();
1465 // This gets the entire long in rax on 64bit
1466 __ movptr(rax, result_low_word);
1467 // testing of high bits
1468 __ movl(rdx, result_high_word);
1469 __ mov(rcx, rax);
1470 // What the heck is the point of the next instruction???
1471 __ xorl(rcx, 0x0);
1472 __ movl(rsi, 0x80000000);
1473 __ xorl(rsi, rdx);
1474 __ orl(rcx, rsi);
1475 __ jcc(Assembler::notEqual, do_return);
1476 __ fldz();
1477 __ fcomp_d(value_low_word);
1478 __ fnstsw_ax();
1479 __ sahf();
1480 __ jcc(Assembler::above, return_min_jlong);
1481 // return max_jlong
1482 __ movl(rdx, 0x7fffffff);
1483 __ movl(rax, 0xffffffff);
1484 __ jmp(do_return);
1485
1486 __ bind(return_min_jlong);
1487 __ movl(rdx, 0x80000000);
1488 __ xorl(rax, rax);
1489 __ jmp(do_return);
1490
1491 __ bind(return0);
1492 __ fpop();
1493 __ xorptr(rdx,rdx);
1494 __ xorptr(rax,rax);
1495
1496 __ bind(do_return);
1497 __ addptr(rsp, 32);
1498 __ pop(rcx);
1499 __ pop(rsi);
1500 __ ret(0);
1501 #endif // _LP64
1502 }
1503 break;
1504
1505 case predicate_failed_trap_id:
1506 {
1507 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1508
1509 OopMap* map = save_live_registers(sasm, 1);
1510
1511 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1512 oop_maps = new OopMapSet();
1513 oop_maps->add_gc_map(call_offset, map);
1514 restore_live_registers(sasm);
1515 __ leave();
1516 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1517 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1518
1519 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1520 }
1521 break;
1522
1523 default:
1524 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1525 __ movptr(rax, (int)id);
1526 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1527 __ should_not_reach_here();
1528 }
1529 break;
1530 }
1531 return oop_maps;
1532 }
1533
1534 #undef __
1535
1536 const char *Runtime1::pd_name_for_address(address entry) {
1537 return "<unknown function>";
1538 }
--- EOF ---