1 /*
   2  * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/assembler.hpp"
  27 #include "c1/c1_Defs.hpp"
  28 #include "c1/c1_FrameMap.hpp"
  29 #include "c1/c1_MacroAssembler.hpp"
  30 #include "c1/c1_Runtime1.hpp"
  31 #include "ci/ciUtilities.hpp"
  32 #include "compiler/compilerDefinitions.inline.hpp"
  33 #include "compiler/oopMap.hpp"
  34 #include "gc/shared/cardTable.hpp"
  35 #include "gc/shared/cardTableBarrierSet.hpp"
  36 #include "gc/shared/collectedHeap.hpp"
  37 #include "gc/shared/tlab_globals.hpp"
  38 #include "interpreter/interpreter.hpp"
  39 #include "memory/universe.hpp"
  40 #include "nativeInst_x86.hpp"
  41 #include "oops/oop.inline.hpp"
  42 #include "prims/jvmtiExport.hpp"
  43 #include "register_x86.hpp"
  44 #include "runtime/sharedRuntime.hpp"
  45 #include "runtime/signature.hpp"
  46 #include "runtime/stubRoutines.hpp"
  47 #include "runtime/vframeArray.hpp"
  48 #include "utilities/macros.hpp"
  49 #include "vmreg_x86.inline.hpp"
  50 
  51 // Implementation of StubAssembler
  52 
  53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
  54   // setup registers
  55   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
  56   assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
  57   assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
  58   assert(args_size >= 0, "illegal args_size");
  59   bool align_stack = false;
  60 #ifdef _LP64
  61   // At a method handle call, the stack may not be properly aligned
  62   // when returning with an exception.
  63   align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
  64 #endif
  65 
  66 #ifdef _LP64
  67   mov(c_rarg0, thread);
  68   set_num_rt_args(0); // Nothing on stack
  69 #else
  70   set_num_rt_args(1 + args_size);
  71 
  72   // push java thread (becomes first argument of C function)
  73   get_thread(thread);
  74   push(thread);
  75 #endif // _LP64
  76 
  77   int call_offset = -1;
  78   if (!align_stack) {
  79     set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
  80   } else {
  81     address the_pc = pc();
  82     call_offset = offset();
  83     set_last_Java_frame(thread, noreg, rbp, the_pc, rscratch1);
  84     andptr(rsp, -(StackAlignmentInBytes));    // Align stack
  85   }
  86 
  87   // do the call
  88   call(RuntimeAddress(entry));
  89   if (!align_stack) {
  90     call_offset = offset();
  91   }
  92   // verify callee-saved register
  93 #ifdef ASSERT
  94   guarantee(thread != rax, "change this code");
  95   push(rax);
  96   { Label L;
  97     get_thread(rax);
  98     cmpptr(thread, rax);
  99     jcc(Assembler::equal, L);
 100     int3();
 101     stop("StubAssembler::call_RT: rdi not callee saved?");
 102     bind(L);
 103   }
 104   pop(rax);
 105 #endif
 106   reset_last_Java_frame(thread, true);
 107 
 108   // discard thread and arguments
 109   NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
 110 
 111   // check for pending exceptions
 112   { Label L;
 113     cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 114     jcc(Assembler::equal, L);
 115     // exception pending => remove activation and forward to exception handler
 116     movptr(rax, Address(thread, Thread::pending_exception_offset()));
 117     // make sure that the vm_results are cleared
 118     if (oop_result1->is_valid()) {
 119       movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
 120     }
 121     if (metadata_result->is_valid()) {
 122       movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 123     }
 124     if (frame_size() == no_frame_size) {
 125       leave();
 126       jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
 127     } else if (_stub_id == Runtime1::forward_exception_id) {
 128       should_not_reach_here();
 129     } else {
 130       jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 131     }
 132     bind(L);
 133   }
 134   // get oop results if there are any and reset the values in the thread
 135   if (oop_result1->is_valid()) {
 136     get_vm_result(oop_result1, thread);
 137   }
 138   if (metadata_result->is_valid()) {
 139     get_vm_result_2(metadata_result, thread);
 140   }
 141 
 142   assert(call_offset >= 0, "Should be set");
 143   return call_offset;
 144 }
 145 
 146 
 147 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
 148 #ifdef _LP64
 149   mov(c_rarg1, arg1);
 150 #else
 151   push(arg1);
 152 #endif // _LP64
 153   return call_RT(oop_result1, metadata_result, entry, 1);
 154 }
 155 
 156 
 157 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
 158 #ifdef _LP64
 159   if (c_rarg1 == arg2) {
 160     if (c_rarg2 == arg1) {
 161       xchgq(arg1, arg2);
 162     } else {
 163       mov(c_rarg2, arg2);
 164       mov(c_rarg1, arg1);
 165     }
 166   } else {
 167     mov(c_rarg1, arg1);
 168     mov(c_rarg2, arg2);
 169   }
 170 #else
 171   push(arg2);
 172   push(arg1);
 173 #endif // _LP64
 174   return call_RT(oop_result1, metadata_result, entry, 2);
 175 }
 176 
 177 
 178 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
 179 #ifdef _LP64
 180   // if there is any conflict use the stack
 181   if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
 182       arg2 == c_rarg1 || arg2 == c_rarg3 ||
 183       arg3 == c_rarg1 || arg3 == c_rarg2) {
 184     push(arg3);
 185     push(arg2);
 186     push(arg1);
 187     pop(c_rarg1);
 188     pop(c_rarg2);
 189     pop(c_rarg3);
 190   } else {
 191     mov(c_rarg1, arg1);
 192     mov(c_rarg2, arg2);
 193     mov(c_rarg3, arg3);
 194   }
 195 #else
 196   push(arg3);
 197   push(arg2);
 198   push(arg1);
 199 #endif // _LP64
 200   return call_RT(oop_result1, metadata_result, entry, 3);
 201 }
 202 
 203 
 204 // Implementation of StubFrame
 205 
 206 class StubFrame: public StackObj {
 207  private:
 208   StubAssembler* _sasm;
 209   bool _use_pop_on_epilog;
 210 
 211  public:
 212   StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog = false);
 213   void load_argument(int offset_in_words, Register reg);
 214 
 215   ~StubFrame();
 216 };
 217 
 218 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
 219   set_info(name, must_gc_arguments);
 220   enter();
 221 }
 222 
 223 void StubAssembler::epilogue(bool use_pop) {
 224   use_pop ? pop(rbp) : leave();
 225   ret(0);
 226 }
 227 
 228 #define __ _sasm->
 229 
 230 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog) {
 231   _sasm = sasm;
 232   _use_pop_on_epilog = use_pop_on_epilog;
 233   __ prologue(name, must_gc_arguments);
 234 }
 235 
 236 // load parameters that were stored with LIR_Assembler::store_parameter
 237 // Note: offsets for store_parameter and load_argument must match
 238 void StubFrame::load_argument(int offset_in_words, Register reg) {
 239   __ load_parameter(offset_in_words, reg);
 240 }
 241 
 242 
 243 StubFrame::~StubFrame() {
 244   __ epilogue(_use_pop_on_epilog);
 245 }
 246 
 247 #undef __
 248 
 249 
 250 // Implementation of Runtime1
 251 
 252 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
 253 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
 254 
 255 // Stack layout for saving/restoring  all the registers needed during a runtime
 256 // call (this includes deoptimization)
 257 // Note: note that users of this frame may well have arguments to some runtime
 258 // while these values are on the stack. These positions neglect those arguments
 259 // but the code in save_live_registers will take the argument count into
 260 // account.
 261 //
 262 #ifdef _LP64
 263   #define SLOT2(x) x,
 264   #define SLOT_PER_WORD 2
 265 #else
 266   #define SLOT2(x)
 267   #define SLOT_PER_WORD 1
 268 #endif // _LP64
 269 
 270 enum reg_save_layout {
 271   // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
 272   // happen and will assert if the stack size we create is misaligned
 273 #ifdef _LP64
 274   align_dummy_0, align_dummy_1,
 275 #endif // _LP64
 276 #ifdef _WIN64
 277   // Windows always allocates space for it's argument registers (see
 278   // frame::arg_reg_save_area_bytes).
 279   arg_reg_save_1, arg_reg_save_1H,                                                          // 0, 4
 280   arg_reg_save_2, arg_reg_save_2H,                                                          // 8, 12
 281   arg_reg_save_3, arg_reg_save_3H,                                                          // 16, 20
 282   arg_reg_save_4, arg_reg_save_4H,                                                          // 24, 28
 283 #endif // _WIN64
 284   xmm_regs_as_doubles_off,                                                                  // 32
 285   float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots,  // 160
 286   fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots,          // 224
 287   // fpu_state_end_off is exclusive
 288   fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD),                // 352
 289   marker = fpu_state_end_off, SLOT2(markerH)                                                // 352, 356
 290   extra_space_offset,                                                                       // 360
 291 #ifdef _LP64
 292   r15_off = extra_space_offset, r15H_off,                                                   // 360, 364
 293   r14_off, r14H_off,                                                                        // 368, 372
 294   r13_off, r13H_off,                                                                        // 376, 380
 295   r12_off, r12H_off,                                                                        // 384, 388
 296   r11_off, r11H_off,                                                                        // 392, 396
 297   r10_off, r10H_off,                                                                        // 400, 404
 298   r9_off, r9H_off,                                                                          // 408, 412
 299   r8_off, r8H_off,                                                                          // 416, 420
 300   rdi_off, rdiH_off,                                                                        // 424, 428
 301 #else
 302   rdi_off = extra_space_offset,
 303 #endif // _LP64
 304   rsi_off, SLOT2(rsiH_off)                                                                  // 432, 436
 305   rbp_off, SLOT2(rbpH_off)                                                                  // 440, 444
 306   rsp_off, SLOT2(rspH_off)                                                                  // 448, 452
 307   rbx_off, SLOT2(rbxH_off)                                                                  // 456, 460
 308   rdx_off, SLOT2(rdxH_off)                                                                  // 464, 468
 309   rcx_off, SLOT2(rcxH_off)                                                                  // 472, 476
 310   rax_off, SLOT2(raxH_off)                                                                  // 480, 484
 311   saved_rbp_off, SLOT2(saved_rbpH_off)                                                      // 488, 492
 312   return_off, SLOT2(returnH_off)                                                            // 496, 500
 313   reg_save_frame_size   // As noted: neglects any parameters to runtime                     // 504
 314 };
 315 
 316 // Save off registers which might be killed by calls into the runtime.
 317 // Tries to smart of about FP registers.  In particular we separate
 318 // saving and describing the FPU registers for deoptimization since we
 319 // have to save the FPU registers twice if we describe them and on P4
 320 // saving FPU registers which don't contain anything appears
 321 // expensive.  The deopt blob is the only thing which needs to
 322 // describe FPU registers.  In all other cases it should be sufficient
 323 // to simply save their current value.
 324 //
 325 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
 326                                 bool save_fpu_registers = true) {
 327 
 328   // In 64bit all the args are in regs so there are no additional stack slots
 329   LP64_ONLY(num_rt_args = 0);
 330   LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
 331   int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
 332   sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
 333 
 334   // record saved value locations in an OopMap
 335   // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
 336   OopMap* map = new OopMap(frame_size_in_slots, 0);
 337   map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
 338   map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
 339   map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
 340   map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
 341   map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
 342   map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
 343 #ifdef _LP64
 344   map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args),  r8->as_VMReg());
 345   map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args),  r9->as_VMReg());
 346   map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
 347   map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
 348   map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
 349   map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
 350   map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
 351   map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
 352 
 353   // This is stupid but needed.
 354   map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
 355   map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
 356   map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
 357   map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
 358   map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
 359   map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
 360 
 361   map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args),  r8->as_VMReg()->next());
 362   map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args),  r9->as_VMReg()->next());
 363   map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
 364   map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
 365   map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
 366   map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
 367   map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
 368   map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
 369 #endif // _LP64
 370 
 371   int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 372 
 373   if (save_fpu_registers) {
 374 #ifndef _LP64
 375     if (UseSSE < 2) {
 376       int fpu_off = float_regs_as_doubles_off;
 377       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 378         VMReg fpu_name_0 = FrameMap::fpu_regname(n);
 379         map->set_callee_saved(VMRegImpl::stack2reg(fpu_off +     num_rt_args), fpu_name_0);
 380         // %%% This is really a waste but we'll keep things as they were for now
 381         if (true) {
 382           map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
 383         }
 384         fpu_off += 2;
 385       }
 386       assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
 387 
 388       if (UseSSE == 1) {
 389         int xmm_off = xmm_regs_as_doubles_off;
 390         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 391           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 392           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 393           xmm_off += 2;
 394         }
 395         assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 396       }
 397     }
 398 #endif // !LP64
 399 
 400     if (UseSSE >= 2) {
 401       int xmm_off = xmm_regs_as_doubles_off;
 402       for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
 403         if (n < xmm_bypass_limit) {
 404           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 405           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 406           // %%% This is really a waste but we'll keep things as they were for now
 407           if (true) {
 408             map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
 409           }
 410         }
 411         xmm_off += 2;
 412       }
 413       assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 414     }
 415   }
 416 
 417   return map;
 418 }
 419 
 420 #define __ this->
 421 
 422 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
 423   __ block_comment("save_live_registers");
 424 
 425   __ pusha();         // integer registers
 426 
 427   // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
 428   // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
 429 
 430   __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 431 
 432 #ifdef ASSERT
 433   __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 434 #endif
 435 
 436   if (save_fpu_registers) {
 437 #ifndef _LP64
 438     if (UseSSE < 2) {
 439       // save FPU stack
 440       __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 441       __ fwait();
 442 
 443 #ifdef ASSERT
 444       Label ok;
 445       __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 446       __ jccb(Assembler::equal, ok);
 447       __ stop("corrupted control word detected");
 448       __ bind(ok);
 449 #endif
 450 
 451       // Reset the control word to guard against exceptions being unmasked
 452       // since fstp_d can cause FPU stack underflow exceptions.  Write it
 453       // into the on stack copy and then reload that to make sure that the
 454       // current and future values are correct.
 455       __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 456       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 457 
 458       // Save the FPU registers in de-opt-able form
 459       int offset = 0;
 460       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 461         __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 462         offset += 8;
 463       }
 464 
 465       if (UseSSE == 1) {
 466         // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
 467         int offset = 0;
 468         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 469           XMMRegister xmm_name = as_XMMRegister(n);
 470           __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 471           offset += 8;
 472         }
 473       }
 474     }
 475 #endif // !_LP64
 476 
 477     if (UseSSE >= 2) {
 478       // save XMM registers
 479       // XMM registers can contain float or double values, but this is not known here,
 480       // so always save them as doubles.
 481       // note that float values are _not_ converted automatically, so for float values
 482       // the second word contains only garbage data.
 483       int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 484       int offset = 0;
 485       for (int n = 0; n < xmm_bypass_limit; n++) {
 486         XMMRegister xmm_name = as_XMMRegister(n);
 487         __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 488         offset += 8;
 489       }
 490     }
 491   }
 492 
 493   // FPU stack must be empty now
 494   NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
 495 }
 496 
 497 #undef __
 498 #define __ sasm->
 499 
 500 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
 501 #ifdef _LP64
 502   if (restore_fpu_registers) {
 503     // restore XMM registers
 504     int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 505     int offset = 0;
 506     for (int n = 0; n < xmm_bypass_limit; n++) {
 507       XMMRegister xmm_name = as_XMMRegister(n);
 508       __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 509       offset += 8;
 510     }
 511   }
 512 #else
 513   if (restore_fpu_registers) {
 514     if (UseSSE >= 2) {
 515       // restore XMM registers
 516       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 517       int offset = 0;
 518       for (int n = 0; n < xmm_bypass_limit; n++) {
 519         XMMRegister xmm_name = as_XMMRegister(n);
 520         __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 521         offset += 8;
 522       }
 523     } else if (UseSSE == 1) {
 524       // restore XMM registers(num MMX == num fpu)
 525       int offset = 0;
 526       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 527         XMMRegister xmm_name = as_XMMRegister(n);
 528         __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 529         offset += 8;
 530       }
 531     }
 532 
 533     if (UseSSE < 2) {
 534       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 535     } else {
 536       // check that FPU stack is really empty
 537       __ verify_FPU(0, "restore_live_registers");
 538     }
 539   } else {
 540     // check that FPU stack is really empty
 541     __ verify_FPU(0, "restore_live_registers");
 542   }
 543 #endif // _LP64
 544 
 545 #ifdef ASSERT
 546   {
 547     Label ok;
 548     __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 549     __ jcc(Assembler::equal, ok);
 550     __ stop("bad offsets in frame");
 551     __ bind(ok);
 552   }
 553 #endif // ASSERT
 554 
 555   __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 556 }
 557 
 558 #undef __
 559 #define __ this->
 560 
 561 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
 562   __ block_comment("restore_live_registers");
 563 
 564   restore_fpu(this, restore_fpu_registers);
 565   __ popa();
 566 }
 567 
 568 
 569 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
 570   __ block_comment("restore_live_registers_except_rax");
 571 
 572   restore_fpu(this, restore_fpu_registers);
 573 
 574 #ifdef _LP64
 575   __ movptr(r15, Address(rsp, 0));
 576   __ movptr(r14, Address(rsp, wordSize));
 577   __ movptr(r13, Address(rsp, 2 * wordSize));
 578   __ movptr(r12, Address(rsp, 3 * wordSize));
 579   __ movptr(r11, Address(rsp, 4 * wordSize));
 580   __ movptr(r10, Address(rsp, 5 * wordSize));
 581   __ movptr(r9,  Address(rsp, 6 * wordSize));
 582   __ movptr(r8,  Address(rsp, 7 * wordSize));
 583   __ movptr(rdi, Address(rsp, 8 * wordSize));
 584   __ movptr(rsi, Address(rsp, 9 * wordSize));
 585   __ movptr(rbp, Address(rsp, 10 * wordSize));
 586   // skip rsp
 587   __ movptr(rbx, Address(rsp, 12 * wordSize));
 588   __ movptr(rdx, Address(rsp, 13 * wordSize));
 589   __ movptr(rcx, Address(rsp, 14 * wordSize));
 590 
 591   __ addptr(rsp, 16 * wordSize);
 592 #else
 593 
 594   __ pop(rdi);
 595   __ pop(rsi);
 596   __ pop(rbp);
 597   __ pop(rbx); // skip this value
 598   __ pop(rbx);
 599   __ pop(rdx);
 600   __ pop(rcx);
 601   __ addptr(rsp, BytesPerWord);
 602 #endif // _LP64
 603 }
 604 
 605 #undef __
 606 #define __ sasm->
 607 
 608 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
 609                                    bool save_fpu_registers = true) {
 610   __ save_live_registers_no_oop_map(save_fpu_registers);
 611   return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
 612 }
 613 
 614 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 615   __ restore_live_registers(restore_fpu_registers);
 616 }
 617 
 618 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
 619   sasm->restore_live_registers_except_rax(restore_fpu_registers);
 620 }
 621 
 622 
 623 void Runtime1::initialize_pd() {
 624   // nothing to do
 625 }
 626 
 627 uint Runtime1::runtime_blob_current_thread_offset(frame f) {
 628   return r15_off / 2;
 629 }
 630 
 631 // Target: the entry point of the method that creates and posts the exception oop.
 632 // has_argument: true if the exception needs arguments (passed on the stack because
 633 //               registers must be preserved).
 634 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
 635   // Preserve all registers.
 636   int num_rt_args = has_argument ? (2 + 1) : 1;
 637   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 638 
 639   // Now all registers are saved and can be used freely.
 640   // Verify that no old value is used accidentally.
 641   __ invalidate_registers(true, true, true, true, true, true);
 642 
 643   // Registers used by this stub.
 644   const Register temp_reg = rbx;
 645 
 646   // Load arguments for exception that are passed as arguments into the stub.
 647   if (has_argument) {
 648 #ifdef _LP64
 649     __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
 650     __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
 651 #else
 652     __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
 653     __ push(temp_reg);
 654     __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
 655     __ push(temp_reg);
 656 #endif // _LP64
 657   }
 658   int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
 659 
 660   OopMapSet* oop_maps = new OopMapSet();
 661   oop_maps->add_gc_map(call_offset, oop_map);
 662 
 663   __ stop("should not reach here");
 664 
 665   return oop_maps;
 666 }
 667 
 668 
 669 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
 670   __ block_comment("generate_handle_exception");
 671 
 672   // incoming parameters
 673   const Register exception_oop = rax;
 674   const Register exception_pc  = rdx;
 675   // other registers used in this stub
 676   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 677 
 678   // Save registers, if required.
 679   OopMapSet* oop_maps = new OopMapSet();
 680   OopMap* oop_map = nullptr;
 681   switch (id) {
 682   case forward_exception_id:
 683     // We're handling an exception in the context of a compiled frame.
 684     // The registers have been saved in the standard places.  Perform
 685     // an exception lookup in the caller and dispatch to the handler
 686     // if found.  Otherwise unwind and dispatch to the callers
 687     // exception handler.
 688     oop_map = generate_oop_map(sasm, 1 /*thread*/);
 689 
 690     // load and clear pending exception oop into RAX
 691     __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
 692     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 693 
 694     // load issuing PC (the return address for this stub) into rdx
 695     __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
 696 
 697     // make sure that the vm_results are cleared (may be unnecessary)
 698     __ movptr(Address(thread, JavaThread::vm_result_offset()),   NULL_WORD);
 699     __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 700     break;
 701   case handle_exception_nofpu_id:
 702   case handle_exception_id:
 703     // At this point all registers MAY be live.
 704     oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
 705     break;
 706   case handle_exception_from_callee_id: {
 707     // At this point all registers except exception oop (RAX) and
 708     // exception pc (RDX) are dead.
 709     const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
 710     oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
 711     sasm->set_frame_size(frame_size);
 712     WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
 713     break;
 714   }
 715   default:  ShouldNotReachHere();
 716   }
 717 
 718 #if !defined(_LP64) && defined(COMPILER2)
 719   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
 720     // C2 can leave the fpu stack dirty
 721     __ empty_FPU_stack();
 722   }
 723 #endif // !_LP64 && COMPILER2
 724 
 725   // verify that only rax, and rdx is valid at this time
 726   __ invalidate_registers(false, true, true, false, true, true);
 727   // verify that rax, contains a valid exception
 728   __ verify_not_null_oop(exception_oop);
 729 
 730   // load address of JavaThread object for thread-local data
 731   NOT_LP64(__ get_thread(thread);)
 732 
 733 #ifdef ASSERT
 734   // check that fields in JavaThread for exception oop and issuing pc are
 735   // empty before writing to them
 736   Label oop_empty;
 737   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
 738   __ jcc(Assembler::equal, oop_empty);
 739   __ stop("exception oop already set");
 740   __ bind(oop_empty);
 741 
 742   Label pc_empty;
 743   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 744   __ jcc(Assembler::equal, pc_empty);
 745   __ stop("exception pc already set");
 746   __ bind(pc_empty);
 747 #endif
 748 
 749   // save exception oop and issuing pc into JavaThread
 750   // (exception handler will load it from here)
 751   __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
 752   __ movptr(Address(thread, JavaThread::exception_pc_offset()),  exception_pc);
 753 
 754   // patch throwing pc into return address (has bci & oop map)
 755   __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
 756 
 757   // compute the exception handler.
 758   // the exception oop and the throwing pc are read from the fields in JavaThread
 759   int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
 760   oop_maps->add_gc_map(call_offset, oop_map);
 761 
 762   // rax: handler address
 763   //      will be the deopt blob if nmethod was deoptimized while we looked up
 764   //      handler regardless of whether handler existed in the nmethod.
 765 
 766   // only rax, is valid at this time, all other registers have been destroyed by the runtime call
 767   __ invalidate_registers(false, true, true, true, true, true);
 768 
 769   // patch the return address, this stub will directly return to the exception handler
 770   __ movptr(Address(rbp, 1*BytesPerWord), rax);
 771 
 772   switch (id) {
 773   case forward_exception_id:
 774   case handle_exception_nofpu_id:
 775   case handle_exception_id:
 776     // Restore the registers that were saved at the beginning.
 777     restore_live_registers(sasm, id != handle_exception_nofpu_id);
 778     break;
 779   case handle_exception_from_callee_id:
 780     // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
 781     // since we do a leave anyway.
 782 
 783     // Pop the return address.
 784     __ leave();
 785     __ pop(rcx);
 786     __ jmp(rcx);  // jump to exception handler
 787     break;
 788   default:  ShouldNotReachHere();
 789   }
 790 
 791   return oop_maps;
 792 }
 793 
 794 
 795 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
 796   // incoming parameters
 797   const Register exception_oop = rax;
 798   // callee-saved copy of exception_oop during runtime call
 799   const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
 800   // other registers used in this stub
 801   const Register exception_pc = rdx;
 802   const Register handler_addr = rbx;
 803   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 804 
 805   if (AbortVMOnException) {
 806     __ enter();
 807     save_live_registers(sasm, 2);
 808     __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), rax);
 809     restore_live_registers(sasm);
 810     __ leave();
 811   }
 812 
 813   // verify that only rax, is valid at this time
 814   __ invalidate_registers(false, true, true, true, true, true);
 815 
 816 #ifdef ASSERT
 817   // check that fields in JavaThread for exception oop and issuing pc are empty
 818   NOT_LP64(__ get_thread(thread);)
 819   Label oop_empty;
 820   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
 821   __ jcc(Assembler::equal, oop_empty);
 822   __ stop("exception oop must be empty");
 823   __ bind(oop_empty);
 824 
 825   Label pc_empty;
 826   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 827   __ jcc(Assembler::equal, pc_empty);
 828   __ stop("exception pc must be empty");
 829   __ bind(pc_empty);
 830 #endif
 831 
 832   // clear the FPU stack in case any FPU results are left behind
 833   NOT_LP64( __ empty_FPU_stack(); )
 834 
 835   // save exception_oop in callee-saved register to preserve it during runtime calls
 836   __ verify_not_null_oop(exception_oop);
 837   __ movptr(exception_oop_callee_saved, exception_oop);
 838 
 839   NOT_LP64(__ get_thread(thread);)
 840   // Get return address (is on top of stack after leave).
 841   __ movptr(exception_pc, Address(rsp, 0));
 842 
 843   // search the exception handler address of the caller (using the return address)
 844   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
 845   // rax: exception handler address of the caller
 846 
 847   // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
 848   __ invalidate_registers(false, true, true, true, false, true);
 849 
 850   // move result of call into correct register
 851   __ movptr(handler_addr, rax);
 852 
 853   // Restore exception oop to RAX (required convention of exception handler).
 854   __ movptr(exception_oop, exception_oop_callee_saved);
 855 
 856   // verify that there is really a valid exception in rax
 857   __ verify_not_null_oop(exception_oop);
 858 
 859   // get throwing pc (= return address).
 860   // rdx has been destroyed by the call, so it must be set again
 861   // the pop is also necessary to simulate the effect of a ret(0)
 862   __ pop(exception_pc);
 863 
 864   // continue at exception handler (return address removed)
 865   // note: do *not* remove arguments when unwinding the
 866   //       activation since the caller assumes having
 867   //       all arguments on the stack when entering the
 868   //       runtime to determine the exception handler
 869   //       (GC happens at call site with arguments!)
 870   // rax: exception oop
 871   // rdx: throwing pc
 872   // rbx: exception handler
 873   __ jmp(handler_addr);
 874 }
 875 
 876 
 877 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
 878   // use the maximum number of runtime-arguments here because it is difficult to
 879   // distinguish each RT-Call.
 880   // Note: This number affects also the RT-Call in generate_handle_exception because
 881   //       the oop-map is shared for all calls.
 882   const int num_rt_args = 2;  // thread + dummy
 883 
 884   DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
 885   assert(deopt_blob != nullptr, "deoptimization blob must have been created");
 886 
 887   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 888 
 889 #ifdef _LP64
 890   const Register thread = r15_thread;
 891   // No need to worry about dummy
 892   __ mov(c_rarg0, thread);
 893 #else
 894   __ push(rax); // push dummy
 895 
 896   const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
 897   // push java thread (becomes first argument of C function)
 898   __ get_thread(thread);
 899   __ push(thread);
 900 #endif // _LP64
 901   __ set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
 902   // do the call
 903   __ call(RuntimeAddress(target));
 904   OopMapSet* oop_maps = new OopMapSet();
 905   oop_maps->add_gc_map(__ offset(), oop_map);
 906   // verify callee-saved register
 907 #ifdef ASSERT
 908   guarantee(thread != rax, "change this code");
 909   __ push(rax);
 910   { Label L;
 911     __ get_thread(rax);
 912     __ cmpptr(thread, rax);
 913     __ jcc(Assembler::equal, L);
 914     __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
 915     __ bind(L);
 916   }
 917   __ pop(rax);
 918 #endif
 919   __ reset_last_Java_frame(thread, true);
 920 #ifndef _LP64
 921   __ pop(rcx); // discard thread arg
 922   __ pop(rcx); // discard dummy
 923 #endif // _LP64
 924 
 925   // check for pending exceptions
 926   { Label L;
 927     __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 928     __ jcc(Assembler::equal, L);
 929     // exception pending => remove activation and forward to exception handler
 930 
 931     __ testptr(rax, rax);                                   // have we deoptimized?
 932     __ jump_cc(Assembler::equal,
 933                RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
 934 
 935     // the deopt blob expects exceptions in the special fields of
 936     // JavaThread, so copy and clear pending exception.
 937 
 938     // load and clear pending exception
 939     __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
 940     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 941 
 942     // check that there is really a valid exception
 943     __ verify_not_null_oop(rax);
 944 
 945     // load throwing pc: this is the return address of the stub
 946     __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
 947 
 948 #ifdef ASSERT
 949     // check that fields in JavaThread for exception oop and issuing pc are empty
 950     Label oop_empty;
 951     __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
 952     __ jcc(Assembler::equal, oop_empty);
 953     __ stop("exception oop must be empty");
 954     __ bind(oop_empty);
 955 
 956     Label pc_empty;
 957     __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
 958     __ jcc(Assembler::equal, pc_empty);
 959     __ stop("exception pc must be empty");
 960     __ bind(pc_empty);
 961 #endif
 962 
 963     // store exception oop and throwing pc to JavaThread
 964     __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
 965     __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
 966 
 967     restore_live_registers(sasm);
 968 
 969     __ leave();
 970     __ addptr(rsp, BytesPerWord);  // remove return address from stack
 971 
 972     // Forward the exception directly to deopt blob. We can blow no
 973     // registers and must leave throwing pc on the stack.  A patch may
 974     // have values live in registers so the entry point with the
 975     // exception in tls.
 976     __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
 977 
 978     __ bind(L);
 979   }
 980 
 981 
 982   // Runtime will return true if the nmethod has been deoptimized during
 983   // the patching process. In that case we must do a deopt reexecute instead.
 984 
 985   Label cont;
 986 
 987   __ testptr(rax, rax);                                 // have we deoptimized?
 988   __ jcc(Assembler::equal, cont);                       // no
 989 
 990   // Will reexecute. Proper return address is already on the stack we just restore
 991   // registers, pop all of our frame but the return address and jump to the deopt blob
 992   restore_live_registers(sasm);
 993   __ leave();
 994   __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
 995 
 996   __ bind(cont);
 997   restore_live_registers(sasm);
 998   __ leave();
 999   __ ret(0);
1000 
1001   return oop_maps;
1002 }
1003 
1004 
1005 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
1006 
1007   // for better readability
1008   const bool must_gc_arguments = true;
1009   const bool dont_gc_arguments = false;
1010 
1011   // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1012   bool save_fpu_registers = true;
1013 
1014   // stub code & info for the different stubs
1015   OopMapSet* oop_maps = nullptr;
1016   switch (id) {
1017     case forward_exception_id:
1018       {
1019         oop_maps = generate_handle_exception(id, sasm);
1020         __ leave();
1021         __ ret(0);
1022       }
1023       break;
1024 
1025     case new_instance_id:
1026     case fast_new_instance_id:
1027     case fast_new_instance_init_check_id:
1028       {
1029         Register klass = rdx; // Incoming
1030         Register obj   = rax; // Result
1031 
1032         if (id == new_instance_id) {
1033           __ set_info("new_instance", dont_gc_arguments);
1034         } else if (id == fast_new_instance_id) {
1035           __ set_info("fast new_instance", dont_gc_arguments);
1036         } else {
1037           assert(id == fast_new_instance_init_check_id, "bad StubID");
1038           __ set_info("fast new_instance init check", dont_gc_arguments);
1039         }
1040 
1041         __ enter();
1042         OopMap* map = save_live_registers(sasm, 2);
1043         int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1044         oop_maps = new OopMapSet();
1045         oop_maps->add_gc_map(call_offset, map);
1046         restore_live_registers_except_rax(sasm);
1047         __ verify_oop(obj);
1048         __ leave();
1049         __ ret(0);
1050 
1051         // rax,: new instance
1052       }
1053 
1054       break;
1055 
1056     case counter_overflow_id:
1057       {
1058         Register bci = rax, method = rbx;
1059         __ enter();
1060         OopMap* map = save_live_registers(sasm, 3);
1061         // Retrieve bci
1062         __ movl(bci, Address(rbp, 2*BytesPerWord));
1063         // And a pointer to the Method*
1064         __ movptr(method, Address(rbp, 3*BytesPerWord));
1065         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1066         oop_maps = new OopMapSet();
1067         oop_maps->add_gc_map(call_offset, map);
1068         restore_live_registers(sasm);
1069         __ leave();
1070         __ ret(0);
1071       }
1072       break;
1073 
1074     case new_type_array_id:
1075     case new_object_array_id:
1076       {
1077         Register length   = rbx; // Incoming
1078         Register klass    = rdx; // Incoming
1079         Register obj      = rax; // Result
1080 
1081         if (id == new_type_array_id) {
1082           __ set_info("new_type_array", dont_gc_arguments);
1083         } else {
1084           __ set_info("new_object_array", dont_gc_arguments);
1085         }
1086 
1087 #ifdef ASSERT
1088         // assert object type is really an array of the proper kind
1089         {
1090           Label ok;
1091           Register t0 = obj;
1092           __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1093           __ sarl(t0, Klass::_lh_array_tag_shift);
1094           int tag = ((id == new_type_array_id)
1095                      ? Klass::_lh_array_tag_type_value
1096                      : Klass::_lh_array_tag_obj_value);
1097           __ cmpl(t0, tag);
1098           __ jcc(Assembler::equal, ok);
1099           __ stop("assert(is an array klass)");
1100           __ should_not_reach_here();
1101           __ bind(ok);
1102         }
1103 #endif // ASSERT
1104 
1105         __ enter();
1106         OopMap* map = save_live_registers(sasm, 3);
1107         int call_offset;
1108         if (id == new_type_array_id) {
1109           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1110         } else {
1111           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1112         }
1113 
1114         oop_maps = new OopMapSet();
1115         oop_maps->add_gc_map(call_offset, map);
1116         restore_live_registers_except_rax(sasm);
1117 
1118         __ verify_oop(obj);
1119         __ leave();
1120         __ ret(0);
1121 
1122         // rax,: new array
1123       }
1124       break;
1125 
1126     case new_multi_array_id:
1127       { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1128         // rax,: klass
1129         // rbx,: rank
1130         // rcx: address of 1st dimension
1131         OopMap* map = save_live_registers(sasm, 4);
1132         int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1133 
1134         oop_maps = new OopMapSet();
1135         oop_maps->add_gc_map(call_offset, map);
1136         restore_live_registers_except_rax(sasm);
1137 
1138         // rax,: new multi array
1139         __ verify_oop(rax);
1140       }
1141       break;
1142 
1143     case register_finalizer_id:
1144       {
1145         __ set_info("register_finalizer", dont_gc_arguments);
1146 
1147         // This is called via call_runtime so the arguments
1148         // will be place in C abi locations
1149 
1150 #ifdef _LP64
1151         __ verify_oop(c_rarg0);
1152         __ mov(rax, c_rarg0);
1153 #else
1154         // The object is passed on the stack and we haven't pushed a
1155         // frame yet so it's one work away from top of stack.
1156         __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1157         __ verify_oop(rax);
1158 #endif // _LP64
1159 
1160         // load the klass and check the has finalizer flag
1161         Label register_finalizer;
1162         Register t = rsi;
1163         __ load_klass(t, rax, rscratch1);
1164         __ movl(t, Address(t, Klass::access_flags_offset()));
1165         __ testl(t, JVM_ACC_HAS_FINALIZER);
1166         __ jcc(Assembler::notZero, register_finalizer);
1167         __ ret(0);
1168 
1169         __ bind(register_finalizer);
1170         __ enter();
1171         OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1172         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1173         oop_maps = new OopMapSet();
1174         oop_maps->add_gc_map(call_offset, oop_map);
1175 
1176         // Now restore all the live registers
1177         restore_live_registers(sasm);
1178 
1179         __ leave();
1180         __ ret(0);
1181       }
1182       break;
1183 
1184     case throw_range_check_failed_id:
1185       { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1186         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1187       }
1188       break;
1189 
1190     case throw_index_exception_id:
1191       { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1192         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1193       }
1194       break;
1195 
1196     case throw_div0_exception_id:
1197       { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1198         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1199       }
1200       break;
1201 
1202     case throw_null_pointer_exception_id:
1203       { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1204         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1205       }
1206       break;
1207 
1208     case handle_exception_nofpu_id:
1209     case handle_exception_id:
1210       { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1211         oop_maps = generate_handle_exception(id, sasm);
1212       }
1213       break;
1214 
1215     case handle_exception_from_callee_id:
1216       { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1217         oop_maps = generate_handle_exception(id, sasm);
1218       }
1219       break;
1220 
1221     case unwind_exception_id:
1222       { __ set_info("unwind_exception", dont_gc_arguments);
1223         // note: no stubframe since we are about to leave the current
1224         //       activation and we are calling a leaf VM function only.
1225         generate_unwind_exception(sasm);
1226       }
1227       break;
1228 
1229     case throw_array_store_exception_id:
1230       { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1231         // tos + 0: link
1232         //     + 1: return address
1233         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1234       }
1235       break;
1236 
1237     case throw_class_cast_exception_id:
1238       { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1239         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1240       }
1241       break;
1242 
1243     case throw_incompatible_class_change_error_id:
1244       { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1245         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1246       }
1247       break;
1248 
1249     case slow_subtype_check_id:
1250       {
1251         // Typical calling sequence:
1252         // __ push(klass_RInfo);  // object klass or other subclass
1253         // __ push(sup_k_RInfo);  // array element klass or other superclass
1254         // __ call(slow_subtype_check);
1255         // Note that the subclass is pushed first, and is therefore deepest.
1256         // Previous versions of this code reversed the names 'sub' and 'super'.
1257         // This was operationally harmless but made the code unreadable.
1258         enum layout {
1259           rax_off, SLOT2(raxH_off)
1260           rcx_off, SLOT2(rcxH_off)
1261           rsi_off, SLOT2(rsiH_off)
1262           rdi_off, SLOT2(rdiH_off)
1263           // saved_rbp_off, SLOT2(saved_rbpH_off)
1264           return_off, SLOT2(returnH_off)
1265           sup_k_off, SLOT2(sup_kH_off)
1266           klass_off, SLOT2(superH_off)
1267           framesize,
1268           result_off = klass_off  // deepest argument is also the return value
1269         };
1270 
1271         __ set_info("slow_subtype_check", dont_gc_arguments);
1272         __ push(rdi);
1273         __ push(rsi);
1274         __ push(rcx);
1275         __ push(rax);
1276 
1277         // This is called by pushing args and not with C abi
1278         __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1279         __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1280 
1281         Label miss;
1282         __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, nullptr, &miss);
1283 
1284         // fallthrough on success:
1285         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1286         __ pop(rax);
1287         __ pop(rcx);
1288         __ pop(rsi);
1289         __ pop(rdi);
1290         __ ret(0);
1291 
1292         __ bind(miss);
1293         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1294         __ pop(rax);
1295         __ pop(rcx);
1296         __ pop(rsi);
1297         __ pop(rdi);
1298         __ ret(0);
1299       }
1300       break;
1301 
1302     case monitorenter_nofpu_id:
1303       save_fpu_registers = false;
1304       // fall through
1305     case monitorenter_id:
1306       {
1307         StubFrame f(sasm, "monitorenter", dont_gc_arguments, true /* use_pop_on_epilog */);
1308         OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1309 
1310         // Called with store_parameter and not C abi
1311 
1312         f.load_argument(1, rax); // rax,: object
1313         f.load_argument(0, rbx); // rbx,: lock address
1314 
1315         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1316 
1317         oop_maps = new OopMapSet();
1318         oop_maps->add_gc_map(call_offset, map);
1319         restore_live_registers(sasm, save_fpu_registers);
1320       }
1321       break;
1322 
1323     case monitorexit_nofpu_id:
1324       save_fpu_registers = false;
1325       // fall through
1326     case monitorexit_id:
1327       {
1328         StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1329         OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1330 
1331         // Called with store_parameter and not C abi
1332 
1333         f.load_argument(0, rax); // rax,: lock address
1334 
1335         // note: really a leaf routine but must setup last java sp
1336         //       => use call_RT for now (speed can be improved by
1337         //       doing last java sp setup manually)
1338         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1339 
1340         oop_maps = new OopMapSet();
1341         oop_maps->add_gc_map(call_offset, map);
1342         restore_live_registers(sasm, save_fpu_registers);
1343       }
1344       break;
1345 
1346     case deoptimize_id:
1347       {
1348         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1349         const int num_rt_args = 2;  // thread, trap_request
1350         OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1351         f.load_argument(0, rax);
1352         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1353         oop_maps = new OopMapSet();
1354         oop_maps->add_gc_map(call_offset, oop_map);
1355         restore_live_registers(sasm);
1356         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1357         assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1358         __ leave();
1359         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1360       }
1361       break;
1362 
1363     case access_field_patching_id:
1364       { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1365         // we should set up register map
1366         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1367       }
1368       break;
1369 
1370     case load_klass_patching_id:
1371       { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1372         // we should set up register map
1373         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1374       }
1375       break;
1376 
1377     case load_mirror_patching_id:
1378       { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1379         // we should set up register map
1380         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1381       }
1382       break;
1383 
1384     case load_appendix_patching_id:
1385       { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1386         // we should set up register map
1387         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1388       }
1389       break;
1390 
1391     case dtrace_object_alloc_id:
1392       { // rax,: object
1393         StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1394         // we can't gc here so skip the oopmap but make sure that all
1395         // the live registers get saved.
1396         save_live_registers(sasm, 1);
1397 
1398         __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1399         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc))));
1400         NOT_LP64(__ pop(rax));
1401 
1402         restore_live_registers(sasm);
1403       }
1404       break;
1405 
1406     case fpu2long_stub_id:
1407       {
1408 #ifdef _LP64
1409         Label done;
1410         __ cvttsd2siq(rax, Address(rsp, wordSize));
1411         __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1412         __ jccb(Assembler::notEqual, done);
1413         __ movq(rax, Address(rsp, wordSize));
1414         __ subptr(rsp, 8);
1415         __ movq(Address(rsp, 0), rax);
1416         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1417         __ pop(rax);
1418         __ bind(done);
1419         __ ret(0);
1420 #else
1421         // rax, and rdx are destroyed, but should be free since the result is returned there
1422         // preserve rsi,ecx
1423         __ push(rsi);
1424         __ push(rcx);
1425 
1426         // check for NaN
1427         Label return0, do_return, return_min_jlong, do_convert;
1428 
1429         Address value_high_word(rsp, wordSize + 4);
1430         Address value_low_word(rsp, wordSize);
1431         Address result_high_word(rsp, 3*wordSize + 4);
1432         Address result_low_word(rsp, 3*wordSize);
1433 
1434         __ subptr(rsp, 32);                    // more than enough on 32bit
1435         __ fst_d(value_low_word);
1436         __ movl(rax, value_high_word);
1437         __ andl(rax, 0x7ff00000);
1438         __ cmpl(rax, 0x7ff00000);
1439         __ jcc(Assembler::notEqual, do_convert);
1440         __ movl(rax, value_high_word);
1441         __ andl(rax, 0xfffff);
1442         __ orl(rax, value_low_word);
1443         __ jcc(Assembler::notZero, return0);
1444 
1445         __ bind(do_convert);
1446         __ fnstcw(Address(rsp, 0));
1447         __ movzwl(rax, Address(rsp, 0));
1448         __ orl(rax, 0xc00);
1449         __ movw(Address(rsp, 2), rax);
1450         __ fldcw(Address(rsp, 2));
1451         __ fwait();
1452         __ fistp_d(result_low_word);
1453         __ fldcw(Address(rsp, 0));
1454         __ fwait();
1455         // This gets the entire long in rax on 64bit
1456         __ movptr(rax, result_low_word);
1457         // testing of high bits
1458         __ movl(rdx, result_high_word);
1459         __ mov(rcx, rax);
1460         // What the heck is the point of the next instruction???
1461         __ xorl(rcx, 0x0);
1462         __ movl(rsi, 0x80000000);
1463         __ xorl(rsi, rdx);
1464         __ orl(rcx, rsi);
1465         __ jcc(Assembler::notEqual, do_return);
1466         __ fldz();
1467         __ fcomp_d(value_low_word);
1468         __ fnstsw_ax();
1469         __ sahf();
1470         __ jcc(Assembler::above, return_min_jlong);
1471         // return max_jlong
1472         __ movl(rdx, 0x7fffffff);
1473         __ movl(rax, 0xffffffff);
1474         __ jmp(do_return);
1475 
1476         __ bind(return_min_jlong);
1477         __ movl(rdx, 0x80000000);
1478         __ xorl(rax, rax);
1479         __ jmp(do_return);
1480 
1481         __ bind(return0);
1482         __ fpop();
1483         __ xorptr(rdx,rdx);
1484         __ xorptr(rax,rax);
1485 
1486         __ bind(do_return);
1487         __ addptr(rsp, 32);
1488         __ pop(rcx);
1489         __ pop(rsi);
1490         __ ret(0);
1491 #endif // _LP64
1492       }
1493       break;
1494 
1495     case predicate_failed_trap_id:
1496       {
1497         StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1498 
1499         OopMap* map = save_live_registers(sasm, 1);
1500 
1501         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1502         oop_maps = new OopMapSet();
1503         oop_maps->add_gc_map(call_offset, map);
1504         restore_live_registers(sasm);
1505         __ leave();
1506         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1507         assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1508 
1509         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1510       }
1511       break;
1512 
1513     default:
1514       { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1515         __ movptr(rax, (int)id);
1516         __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1517         __ should_not_reach_here();
1518       }
1519       break;
1520   }
1521   return oop_maps;
1522 }
1523 
1524 #undef __
1525 
1526 const char *Runtime1::pd_name_for_address(address entry) {
1527   return "<unknown function>";
1528 }
--- EOF ---