1 /*
   2  * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "code/vmreg.inline.hpp"
  30 #include "compiler/oopMap.hpp"
  31 #include "utilities/macros.hpp"
  32 #include "runtime/rtmLocking.hpp"
  33 #include "runtime/vm_version.hpp"
  34 
  35 // MacroAssembler extends Assembler by frequently used macros.
  36 //
  37 // Instructions for which a 'better' code sequence exists depending
  38 // on arguments should also go in here.
  39 
  40 class MacroAssembler: public Assembler {
  41   friend class LIR_Assembler;
  42   friend class Runtime1;      // as_Address()
  43 
  44  public:
  45   // Support for VM calls
  46   //
  47   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  48   // may customize this version by overriding it for its purposes (e.g., to save/restore
  49   // additional registers when doing a VM call).
  50 
  51   virtual void call_VM_leaf_base(
  52     address entry_point,               // the entry point
  53     int     number_of_arguments        // the number of arguments to pop after the call
  54   );
  55 
  56  protected:
  57   // This is the base routine called by the different versions of call_VM. The interpreter
  58   // may customize this version by overriding it for its purposes (e.g., to save/restore
  59   // additional registers when doing a VM call).
  60   //
  61   // If no java_thread register is specified (noreg) than rdi will be used instead. call_VM_base
  62   // returns the register which contains the thread upon return. If a thread register has been
  63   // specified, the return value will correspond to that register. If no last_java_sp is specified
  64   // (noreg) than rsp will be used instead.
  65   virtual void call_VM_base(           // returns the register containing the thread upon return
  66     Register oop_result,               // where an oop-result ends up if any; use noreg otherwise
  67     Register java_thread,              // the thread if computed before     ; use noreg otherwise
  68     Register last_java_sp,             // to set up last_Java_frame in stubs; use noreg otherwise
  69     address  entry_point,              // the entry point
  70     int      number_of_arguments,      // the number of arguments (w/o thread) to pop after the call
  71     bool     check_exceptions          // whether to check for pending exceptions after return
  72   );
  73 
  74   void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions = true);
  75 
  76   // helpers for FPU flag access
  77   // tmp is a temporary register, if none is available use noreg
  78   void save_rax   (Register tmp);
  79   void restore_rax(Register tmp);
  80 
  81  public:
  82   MacroAssembler(CodeBuffer* code) : Assembler(code) {}
  83 
  84  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  85  // The implementation is only non-empty for the InterpreterMacroAssembler,
  86  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  87  virtual void check_and_handle_popframe(Register java_thread);
  88  virtual void check_and_handle_earlyret(Register java_thread);
  89 
  90   Address as_Address(AddressLiteral adr);
  91   Address as_Address(ArrayAddress adr);
  92 
  93   // Support for NULL-checks
  94   //
  95   // Generates code that causes a NULL OS exception if the content of reg is NULL.
  96   // If the accessed location is M[reg + offset] and the offset is known, provide the
  97   // offset. No explicit code generation is needed if the offset is within a certain
  98   // range (0 <= offset <= page_size).
  99 
 100   void null_check(Register reg, int offset = -1);
 101   static bool needs_explicit_null_check(intptr_t offset);
 102   static bool uses_implicit_null_check(void* address);
 103 
 104   // Required platform-specific helpers for Label::patch_instructions.
 105   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 106   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 107     unsigned char op = branch[0];
 108     assert(op == 0xE8 /* call */ ||
 109         op == 0xE9 /* jmp */ ||
 110         op == 0xEB /* short jmp */ ||
 111         (op & 0xF0) == 0x70 /* short jcc */ ||
 112         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
 113         op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
 114         "Invalid opcode at patch point");
 115 
 116     if (op == 0xEB || (op & 0xF0) == 0x70) {
 117       // short offset operators (jmp and jcc)
 118       char* disp = (char*) &branch[1];
 119       int imm8 = target - (address) &disp[1];
 120       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
 121                 file == NULL ? "<NULL>" : file, line);
 122       *disp = imm8;
 123     } else {
 124       int* disp = (int*) &branch[(op == 0x0F || op == 0xC7)? 2: 1];
 125       int imm32 = target - (address) &disp[1];
 126       *disp = imm32;
 127     }
 128   }
 129 
 130   // The following 4 methods return the offset of the appropriate move instruction
 131 
 132   // Support for fast byte/short loading with zero extension (depending on particular CPU)
 133   int load_unsigned_byte(Register dst, Address src);
 134   int load_unsigned_short(Register dst, Address src);
 135 
 136   // Support for fast byte/short loading with sign extension (depending on particular CPU)
 137   int load_signed_byte(Register dst, Address src);
 138   int load_signed_short(Register dst, Address src);
 139 
 140   // Support for sign-extension (hi:lo = extend_sign(lo))
 141   void extend_sign(Register hi, Register lo);
 142 
 143   // Load and store values by size and signed-ness
 144   void load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed, Register dst2 = noreg);
 145   void store_sized_value(Address dst, Register src, size_t size_in_bytes, Register src2 = noreg);
 146 
 147   // Support for inc/dec with optimal instruction selection depending on value
 148 
 149   void increment(Register reg, int value = 1) { LP64_ONLY(incrementq(reg, value)) NOT_LP64(incrementl(reg, value)) ; }
 150   void decrement(Register reg, int value = 1) { LP64_ONLY(decrementq(reg, value)) NOT_LP64(decrementl(reg, value)) ; }
 151 
 152   void decrementl(Address dst, int value = 1);
 153   void decrementl(Register reg, int value = 1);
 154 
 155   void decrementq(Register reg, int value = 1);
 156   void decrementq(Address dst, int value = 1);
 157 
 158   void incrementl(Address dst, int value = 1);
 159   void incrementl(Register reg, int value = 1);
 160 
 161   void incrementq(Register reg, int value = 1);
 162   void incrementq(Address dst, int value = 1);
 163 
 164   // Support optimal SSE move instructions.
 165   void movflt(XMMRegister dst, XMMRegister src) {
 166     if (dst-> encoding() == src->encoding()) return;
 167     if (UseXmmRegToRegMoveAll) { movaps(dst, src); return; }
 168     else                       { movss (dst, src); return; }
 169   }
 170   void movflt(XMMRegister dst, Address src) { movss(dst, src); }
 171   void movflt(XMMRegister dst, AddressLiteral src);
 172   void movflt(Address dst, XMMRegister src) { movss(dst, src); }
 173 
 174   // Move with zero extension
 175   void movfltz(XMMRegister dst, XMMRegister src) { movss(dst, src); }
 176 
 177   void movdbl(XMMRegister dst, XMMRegister src) {
 178     if (dst-> encoding() == src->encoding()) return;
 179     if (UseXmmRegToRegMoveAll) { movapd(dst, src); return; }
 180     else                       { movsd (dst, src); return; }
 181   }
 182 
 183   void movdbl(XMMRegister dst, AddressLiteral src);
 184 
 185   void movdbl(XMMRegister dst, Address src) {
 186     if (UseXmmLoadAndClearUpper) { movsd (dst, src); return; }
 187     else                         { movlpd(dst, src); return; }
 188   }
 189   void movdbl(Address dst, XMMRegister src) { movsd(dst, src); }
 190 
 191   void incrementl(AddressLiteral dst);
 192   void incrementl(ArrayAddress dst);
 193 
 194   void incrementq(AddressLiteral dst);
 195 
 196   // Alignment
 197   void align32();
 198   void align64();
 199   void align(int modulus);
 200   void align(int modulus, int target);
 201 
 202   void post_call_nop();
 203   // A 5 byte nop that is safe for patching (see patch_verified_entry)
 204   void fat_nop();
 205 
 206   // Stack frame creation/removal
 207   void enter();
 208   void leave();
 209 
 210   // Support for getting the JavaThread pointer (i.e.; a reference to thread-local information)
 211   // The pointer will be loaded into the thread register.
 212   void get_thread(Register thread);
 213 
 214 #ifdef _LP64
 215   // Support for argument shuffling
 216 
 217   void move32_64(VMRegPair src, VMRegPair dst);
 218   void long_move(VMRegPair src, VMRegPair dst);
 219   void float_move(VMRegPair src, VMRegPair dst);
 220   void double_move(VMRegPair src, VMRegPair dst);
 221   void move_ptr(VMRegPair src, VMRegPair dst);
 222   void object_move(OopMap* map,
 223                    int oop_handle_offset,
 224                    int framesize_in_slots,
 225                    VMRegPair src,
 226                    VMRegPair dst,
 227                    bool is_receiver,
 228                    int* receiver_offset);
 229 #endif // _LP64
 230 
 231   // Support for VM calls
 232   //
 233   // It is imperative that all calls into the VM are handled via the call_VM macros.
 234   // They make sure that the stack linkage is setup correctly. call_VM's correspond
 235   // to ENTRY/ENTRY_X entry points while call_VM_leaf's correspond to LEAF entry points.
 236 
 237 
 238   void call_VM(Register oop_result,
 239                address entry_point,
 240                bool check_exceptions = true);
 241   void call_VM(Register oop_result,
 242                address entry_point,
 243                Register arg_1,
 244                bool check_exceptions = true);
 245   void call_VM(Register oop_result,
 246                address entry_point,
 247                Register arg_1, Register arg_2,
 248                bool check_exceptions = true);
 249   void call_VM(Register oop_result,
 250                address entry_point,
 251                Register arg_1, Register arg_2, Register arg_3,
 252                bool check_exceptions = true);
 253 
 254   // Overloadings with last_Java_sp
 255   void call_VM(Register oop_result,
 256                Register last_java_sp,
 257                address entry_point,
 258                int number_of_arguments = 0,
 259                bool check_exceptions = true);
 260   void call_VM(Register oop_result,
 261                Register last_java_sp,
 262                address entry_point,
 263                Register arg_1, bool
 264                check_exceptions = true);
 265   void call_VM(Register oop_result,
 266                Register last_java_sp,
 267                address entry_point,
 268                Register arg_1, Register arg_2,
 269                bool check_exceptions = true);
 270   void call_VM(Register oop_result,
 271                Register last_java_sp,
 272                address entry_point,
 273                Register arg_1, Register arg_2, Register arg_3,
 274                bool check_exceptions = true);
 275 
 276   void get_vm_result  (Register oop_result, Register thread);
 277   void get_vm_result_2(Register metadata_result, Register thread);
 278 
 279   // These always tightly bind to MacroAssembler::call_VM_base
 280   // bypassing the virtual implementation
 281   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, int number_of_arguments = 0, bool check_exceptions = true);
 282   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, bool check_exceptions = true);
 283   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
 284   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions = true);
 285   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, Register arg_4, bool check_exceptions = true);
 286 
 287   void call_VM_leaf0(address entry_point);
 288   void call_VM_leaf(address entry_point,
 289                     int number_of_arguments = 0);
 290   void call_VM_leaf(address entry_point,
 291                     Register arg_1);
 292   void call_VM_leaf(address entry_point,
 293                     Register arg_1, Register arg_2);
 294   void call_VM_leaf(address entry_point,
 295                     Register arg_1, Register arg_2, Register arg_3);
 296 
 297   void call_VM_leaf(address entry_point,
 298                     Register arg_1, Register arg_2, Register arg_3, Register arg_4);
 299 
 300   // These always tightly bind to MacroAssembler::call_VM_leaf_base
 301   // bypassing the virtual implementation
 302   void super_call_VM_leaf(address entry_point);
 303   void super_call_VM_leaf(address entry_point, Register arg_1);
 304   void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2);
 305   void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3);
 306   void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3, Register arg_4);
 307 
 308   // last Java Frame (fills frame anchor)
 309   void set_last_Java_frame(Register thread,
 310                            Register last_java_sp,
 311                            Register last_java_fp,
 312                            address last_java_pc);
 313 
 314   // thread in the default location (r15_thread on 64bit)
 315   void set_last_Java_frame(Register last_java_sp,
 316                            Register last_java_fp,
 317                            address last_java_pc);
 318 
 319   void reset_last_Java_frame(Register thread, bool clear_fp);
 320 
 321   // thread in the default location (r15_thread on 64bit)
 322   void reset_last_Java_frame(bool clear_fp);
 323 
 324   void oopmap_metadata(int index);
 325 
 326   // jobjects
 327   void clear_jweak_tag(Register possibly_jweak);
 328   void resolve_jobject(Register value, Register thread, Register tmp);
 329 
 330   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 331   void c2bool(Register x);
 332 
 333   // C++ bool manipulation
 334 
 335   void movbool(Register dst, Address src);
 336   void movbool(Address dst, bool boolconst);
 337   void movbool(Address dst, Register src);
 338   void testbool(Register dst);
 339 
 340   void resolve_oop_handle(Register result, Register tmp = rscratch2);
 341   void resolve_weak_handle(Register result, Register tmp);
 342   void load_mirror(Register mirror, Register method, Register tmp = rscratch2);
 343   void load_method_holder_cld(Register rresult, Register rmethod);
 344 
 345   void load_method_holder(Register holder, Register method);
 346 
 347   // oop manipulations
 348   void load_klass(Register dst, Register src, Register tmp);
 349   void store_klass(Register dst, Register src, Register tmp);
 350 
 351   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 352                       Register tmp1, Register thread_tmp);
 353   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 354                        Register tmp1, Register tmp2);
 355 
 356   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 357                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 358   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 359                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 360   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 361                       Register tmp2 = noreg, DecoratorSet decorators = 0);
 362 
 363   // Used for storing NULL. All other oop constants should be
 364   // stored using routines that take a jobject.
 365   void store_heap_oop_null(Address dst);
 366 
 367 #ifdef _LP64
 368   void store_klass_gap(Register dst, Register src);
 369 
 370   // This dummy is to prevent a call to store_heap_oop from
 371   // converting a zero (like NULL) into a Register by giving
 372   // the compiler two choices it can't resolve
 373 
 374   void store_heap_oop(Address dst, void* dummy);
 375 
 376   void encode_heap_oop(Register r);
 377   void decode_heap_oop(Register r);
 378   void encode_heap_oop_not_null(Register r);
 379   void decode_heap_oop_not_null(Register r);
 380   void encode_heap_oop_not_null(Register dst, Register src);
 381   void decode_heap_oop_not_null(Register dst, Register src);
 382 
 383   void set_narrow_oop(Register dst, jobject obj);
 384   void set_narrow_oop(Address dst, jobject obj);
 385   void cmp_narrow_oop(Register dst, jobject obj);
 386   void cmp_narrow_oop(Address dst, jobject obj);
 387 
 388   void encode_klass_not_null(Register r, Register tmp);
 389   void decode_klass_not_null(Register r, Register tmp);
 390   void encode_and_move_klass_not_null(Register dst, Register src);
 391   void decode_and_move_klass_not_null(Register dst, Register src);
 392   void set_narrow_klass(Register dst, Klass* k);
 393   void set_narrow_klass(Address dst, Klass* k);
 394   void cmp_narrow_klass(Register dst, Klass* k);
 395   void cmp_narrow_klass(Address dst, Klass* k);
 396 
 397   // if heap base register is used - reinit it with the correct value
 398   void reinit_heapbase();
 399 
 400   DEBUG_ONLY(void verify_heapbase(const char* msg);)
 401 
 402 #endif // _LP64
 403 
 404   // Int division/remainder for Java
 405   // (as idivl, but checks for special case as described in JVM spec.)
 406   // returns idivl instruction offset for implicit exception handling
 407   int corrected_idivl(Register reg);
 408 
 409   // Long division/remainder for Java
 410   // (as idivq, but checks for special case as described in JVM spec.)
 411   // returns idivq instruction offset for implicit exception handling
 412   int corrected_idivq(Register reg);
 413 
 414   void int3();
 415 
 416   // Long operation macros for a 32bit cpu
 417   // Long negation for Java
 418   void lneg(Register hi, Register lo);
 419 
 420   // Long multiplication for Java
 421   // (destroys contents of eax, ebx, ecx and edx)
 422   void lmul(int x_rsp_offset, int y_rsp_offset); // rdx:rax = x * y
 423 
 424   // Long shifts for Java
 425   // (semantics as described in JVM spec.)
 426   void lshl(Register hi, Register lo);                               // hi:lo << (rcx & 0x3f)
 427   void lshr(Register hi, Register lo, bool sign_extension = false);  // hi:lo >> (rcx & 0x3f)
 428 
 429   // Long compare for Java
 430   // (semantics as described in JVM spec.)
 431   void lcmp2int(Register x_hi, Register x_lo, Register y_hi, Register y_lo); // x_hi = lcmp(x, y)
 432 
 433 
 434   // misc
 435 
 436   // Sign extension
 437   void sign_extend_short(Register reg);
 438   void sign_extend_byte(Register reg);
 439 
 440   // Division by power of 2, rounding towards 0
 441   void division_with_shift(Register reg, int shift_value);
 442 
 443 #ifndef _LP64
 444   // Compares the top-most stack entries on the FPU stack and sets the eflags as follows:
 445   //
 446   // CF (corresponds to C0) if x < y
 447   // PF (corresponds to C2) if unordered
 448   // ZF (corresponds to C3) if x = y
 449   //
 450   // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
 451   // tmp is a temporary register, if none is available use noreg (only matters for non-P6 code)
 452   void fcmp(Register tmp);
 453   // Variant of the above which allows y to be further down the stack
 454   // and which only pops x and y if specified. If pop_right is
 455   // specified then pop_left must also be specified.
 456   void fcmp(Register tmp, int index, bool pop_left, bool pop_right);
 457 
 458   // Floating-point comparison for Java
 459   // Compares the top-most stack entries on the FPU stack and stores the result in dst.
 460   // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
 461   // (semantics as described in JVM spec.)
 462   void fcmp2int(Register dst, bool unordered_is_less);
 463   // Variant of the above which allows y to be further down the stack
 464   // and which only pops x and y if specified. If pop_right is
 465   // specified then pop_left must also be specified.
 466   void fcmp2int(Register dst, bool unordered_is_less, int index, bool pop_left, bool pop_right);
 467 
 468   // Floating-point remainder for Java (ST0 = ST0 fremr ST1, ST1 is empty afterwards)
 469   // tmp is a temporary register, if none is available use noreg
 470   void fremr(Register tmp);
 471 
 472   // only if +VerifyFPU
 473   void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
 474 #endif // !LP64
 475 
 476   // dst = c = a * b + c
 477   void fmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
 478   void fmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
 479 
 480   void vfmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
 481   void vfmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
 482   void vfmad(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
 483   void vfmaf(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
 484 
 485 
 486   // same as fcmp2int, but using SSE2
 487   void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
 488   void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
 489 
 490   // branch to L if FPU flag C2 is set/not set
 491   // tmp is a temporary register, if none is available use noreg
 492   void jC2 (Register tmp, Label& L);
 493   void jnC2(Register tmp, Label& L);
 494 
 495   // Load float value from 'address'. If UseSSE >= 1, the value is loaded into
 496   // register xmm0. Otherwise, the value is loaded onto the FPU stack.
 497   void load_float(Address src);
 498 
 499   // Store float value to 'address'. If UseSSE >= 1, the value is stored
 500   // from register xmm0. Otherwise, the value is stored from the FPU stack.
 501   void store_float(Address dst);
 502 
 503   // Load double value from 'address'. If UseSSE >= 2, the value is loaded into
 504   // register xmm0. Otherwise, the value is loaded onto the FPU stack.
 505   void load_double(Address src);
 506 
 507   // Store double value to 'address'. If UseSSE >= 2, the value is stored
 508   // from register xmm0. Otherwise, the value is stored from the FPU stack.
 509   void store_double(Address dst);
 510 
 511 #ifndef _LP64
 512   // Pop ST (ffree & fincstp combined)
 513   void fpop();
 514 
 515   void empty_FPU_stack();
 516 #endif // !_LP64
 517 
 518   void push_IU_state();
 519   void pop_IU_state();
 520 
 521   void push_FPU_state();
 522   void pop_FPU_state();
 523 
 524   void push_CPU_state();
 525   void pop_CPU_state();
 526 
 527   void push_cont_fastpath(Register java_thread);
 528   void pop_cont_fastpath(Register java_thread);
 529   void inc_held_monitor_count(Register java_thread);
 530   void dec_held_monitor_count(Register java_thread);
 531   void reset_held_monitor_count(Register java_thread);
 532   DEBUG_ONLY(void stop_if_in_cont(Register cont_reg, const char* name);)
 533 
 534   // Round up to a power of two
 535   void round_to(Register reg, int modulus);
 536 
 537   // Callee saved registers handling
 538   void push_callee_saved_registers();
 539   void pop_callee_saved_registers();
 540 
 541   // allocation
 542   void eden_allocate(
 543     Register thread,                   // Current thread
 544     Register obj,                      // result: pointer to object after successful allocation
 545     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 546     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 547     Register t1,                       // temp register
 548     Label&   slow_case                 // continuation point if fast allocation fails
 549   );
 550   void tlab_allocate(
 551     Register thread,                   // Current thread
 552     Register obj,                      // result: pointer to object after successful allocation
 553     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 554     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 555     Register t1,                       // temp register
 556     Register t2,                       // temp register
 557     Label&   slow_case                 // continuation point if fast allocation fails
 558   );
 559   void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
 560 
 561   // interface method calling
 562   void lookup_interface_method(Register recv_klass,
 563                                Register intf_klass,
 564                                RegisterOrConstant itable_index,
 565                                Register method_result,
 566                                Register scan_temp,
 567                                Label& no_such_interface,
 568                                bool return_method = true);
 569 
 570   // virtual method calling
 571   void lookup_virtual_method(Register recv_klass,
 572                              RegisterOrConstant vtable_index,
 573                              Register method_result);
 574 
 575   // Test sub_klass against super_klass, with fast and slow paths.
 576 
 577   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 578   // One of the three labels can be NULL, meaning take the fall-through.
 579   // If super_check_offset is -1, the value is loaded up from super_klass.
 580   // No registers are killed, except temp_reg.
 581   void check_klass_subtype_fast_path(Register sub_klass,
 582                                      Register super_klass,
 583                                      Register temp_reg,
 584                                      Label* L_success,
 585                                      Label* L_failure,
 586                                      Label* L_slow_path,
 587                 RegisterOrConstant super_check_offset = RegisterOrConstant(-1));
 588 
 589   // The rest of the type check; must be wired to a corresponding fast path.
 590   // It does not repeat the fast path logic, so don't use it standalone.
 591   // The temp_reg and temp2_reg can be noreg, if no temps are available.
 592   // Updates the sub's secondary super cache as necessary.
 593   // If set_cond_codes, condition codes will be Z on success, NZ on failure.
 594   void check_klass_subtype_slow_path(Register sub_klass,
 595                                      Register super_klass,
 596                                      Register temp_reg,
 597                                      Register temp2_reg,
 598                                      Label* L_success,
 599                                      Label* L_failure,
 600                                      bool set_cond_codes = false);
 601 
 602   // Simplified, combined version, good for typical uses.
 603   // Falls through on failure.
 604   void check_klass_subtype(Register sub_klass,
 605                            Register super_klass,
 606                            Register temp_reg,
 607                            Label& L_success);
 608 
 609   void clinit_barrier(Register klass,
 610                       Register thread,
 611                       Label* L_fast_path = NULL,
 612                       Label* L_slow_path = NULL);
 613 
 614   // method handles (JSR 292)
 615   Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
 616 
 617   // Debugging
 618 
 619   // only if +VerifyOops
 620   void _verify_oop(Register reg, const char* s, const char* file, int line);
 621   void _verify_oop_addr(Address addr, const char* s, const char* file, int line);
 622 
 623   void _verify_oop_checked(Register reg, const char* s, const char* file, int line) {
 624     if (VerifyOops) {
 625       _verify_oop(reg, s, file, line);
 626     }
 627   }
 628   void _verify_oop_addr_checked(Address reg, const char* s, const char* file, int line) {
 629     if (VerifyOops) {
 630       _verify_oop_addr(reg, s, file, line);
 631     }
 632   }
 633 
 634   // TODO: verify method and klass metadata (compare against vptr?)
 635   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
 636   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
 637 
 638 #define verify_oop(reg) _verify_oop_checked(reg, "broken oop " #reg, __FILE__, __LINE__)
 639 #define verify_oop_msg(reg, msg) _verify_oop_checked(reg, "broken oop " #reg ", " #msg, __FILE__, __LINE__)
 640 #define verify_oop_addr(addr) _verify_oop_addr_checked(addr, "broken oop addr " #addr, __FILE__, __LINE__)
 641 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 642 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 643 
 644   // Verify or restore cpu control state after JNI call
 645   void restore_cpu_control_state_after_jni();
 646 
 647   // prints msg, dumps registers and stops execution
 648   void stop(const char* msg);
 649 
 650   // prints msg and continues
 651   void warn(const char* msg);
 652 
 653   void _assert_asm(Condition cc, const char* msg);
 654 #define assert_asm0(cc, msg) _assert_asm(cc, FILE_AND_LINE ": " msg)
 655 #define assert_asm(masm, command, cc, msg) DEBUG_ONLY((masm)->command; (masm)->_assert_asm(cc, FILE_AND_LINE ": " #command " " #cc ": " msg))
 656 
 657   // dumps registers and other state
 658   void print_state();
 659 
 660   static void debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg);
 661   static void debug64(char* msg, int64_t pc, int64_t regs[]);
 662   static void print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip);
 663   static void print_state64(int64_t pc, int64_t regs[]);
 664 
 665   void os_breakpoint();
 666 
 667   void untested()                                { stop("untested"); }
 668 
 669   void unimplemented(const char* what = "");
 670 
 671   void should_not_reach_here()                   { stop("should not reach here"); }
 672 
 673   void print_CPU_state();
 674 
 675   // Stack overflow checking
 676   void bang_stack_with_offset(int offset) {
 677     // stack grows down, caller passes positive offset
 678     assert(offset > 0, "must bang with negative offset");
 679     movl(Address(rsp, (-offset)), rax);
 680   }
 681 
 682   // Writes to stack successive pages until offset reached to check for
 683   // stack overflow + shadow pages.  Also, clobbers tmp
 684   void bang_stack_size(Register size, Register tmp);
 685 
 686   // Check for reserved stack access in method being exited (for JIT)
 687   void reserved_stack_check();
 688 
 689   void safepoint_poll(Label& slow_path, Register thread_reg, bool at_return, bool in_nmethod);
 690 
 691   void verify_tlab();
 692 
 693   Condition negate_condition(Condition cond);
 694 
 695   // Instructions that use AddressLiteral operands. These instruction can handle 32bit/64bit
 696   // operands. In general the names are modified to avoid hiding the instruction in Assembler
 697   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
 698   // here in MacroAssembler. The major exception to this rule is call
 699 
 700   // Arithmetics
 701 
 702 
 703   void addptr(Address dst, int32_t src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)) ; }
 704   void addptr(Address dst, Register src);
 705 
 706   void addptr(Register dst, Address src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)); }
 707   void addptr(Register dst, int32_t src);
 708   void addptr(Register dst, Register src);
 709   void addptr(Register dst, RegisterOrConstant src) {
 710     if (src.is_constant()) addptr(dst, (int) src.as_constant());
 711     else                   addptr(dst,       src.as_register());
 712   }
 713 
 714   void andptr(Register dst, int32_t src);
 715   void andptr(Register src1, Register src2) { LP64_ONLY(andq(src1, src2)) NOT_LP64(andl(src1, src2)) ; }
 716 
 717   void cmp8(AddressLiteral src1, int imm);
 718 
 719   // renamed to drag out the casting of address to int32_t/intptr_t
 720   void cmp32(Register src1, int32_t imm);
 721 
 722   void cmp32(AddressLiteral src1, int32_t imm);
 723   // compare reg - mem, or reg - &mem
 724   void cmp32(Register src1, AddressLiteral src2);
 725 
 726   void cmp32(Register src1, Address src2);
 727 
 728 #ifndef _LP64
 729   void cmpklass(Address dst, Metadata* obj);
 730   void cmpklass(Register dst, Metadata* obj);
 731   void cmpoop(Address dst, jobject obj);
 732 #endif // _LP64
 733 
 734   void cmpoop(Register src1, Register src2);
 735   void cmpoop(Register src1, Address src2);
 736   void cmpoop(Register dst, jobject obj);
 737 
 738   // NOTE src2 must be the lval. This is NOT an mem-mem compare
 739   void cmpptr(Address src1, AddressLiteral src2);
 740 
 741   void cmpptr(Register src1, AddressLiteral src2);
 742 
 743   void cmpptr(Register src1, Register src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 744   void cmpptr(Register src1, Address src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 745   // void cmpptr(Address src1, Register src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 746 
 747   void cmpptr(Register src1, int32_t src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 748   void cmpptr(Address src1, int32_t src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 749 
 750   // cmp64 to avoild hiding cmpq
 751   void cmp64(Register src1, AddressLiteral src);
 752 
 753   void cmpxchgptr(Register reg, Address adr);
 754 
 755   void locked_cmpxchgptr(Register reg, AddressLiteral adr);
 756 
 757 
 758   void imulptr(Register dst, Register src) { LP64_ONLY(imulq(dst, src)) NOT_LP64(imull(dst, src)); }
 759   void imulptr(Register dst, Register src, int imm32) { LP64_ONLY(imulq(dst, src, imm32)) NOT_LP64(imull(dst, src, imm32)); }
 760 
 761 
 762   void negptr(Register dst) { LP64_ONLY(negq(dst)) NOT_LP64(negl(dst)); }
 763 
 764   void notptr(Register dst) { LP64_ONLY(notq(dst)) NOT_LP64(notl(dst)); }
 765 
 766   void shlptr(Register dst, int32_t shift);
 767   void shlptr(Register dst) { LP64_ONLY(shlq(dst)) NOT_LP64(shll(dst)); }
 768 
 769   void shrptr(Register dst, int32_t shift);
 770   void shrptr(Register dst) { LP64_ONLY(shrq(dst)) NOT_LP64(shrl(dst)); }
 771 
 772   void sarptr(Register dst) { LP64_ONLY(sarq(dst)) NOT_LP64(sarl(dst)); }
 773   void sarptr(Register dst, int32_t src) { LP64_ONLY(sarq(dst, src)) NOT_LP64(sarl(dst, src)); }
 774 
 775   void subptr(Address dst, int32_t src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
 776 
 777   void subptr(Register dst, Address src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
 778   void subptr(Register dst, int32_t src);
 779   // Force generation of a 4 byte immediate value even if it fits into 8bit
 780   void subptr_imm32(Register dst, int32_t src);
 781   void subptr(Register dst, Register src);
 782   void subptr(Register dst, RegisterOrConstant src) {
 783     if (src.is_constant()) subptr(dst, (int) src.as_constant());
 784     else                   subptr(dst,       src.as_register());
 785   }
 786 
 787   void sbbptr(Address dst, int32_t src) { LP64_ONLY(sbbq(dst, src)) NOT_LP64(sbbl(dst, src)); }
 788   void sbbptr(Register dst, int32_t src) { LP64_ONLY(sbbq(dst, src)) NOT_LP64(sbbl(dst, src)); }
 789 
 790   void xchgptr(Register src1, Register src2) { LP64_ONLY(xchgq(src1, src2)) NOT_LP64(xchgl(src1, src2)) ; }
 791   void xchgptr(Register src1, Address src2) { LP64_ONLY(xchgq(src1, src2)) NOT_LP64(xchgl(src1, src2)) ; }
 792 
 793   void xaddptr(Address src1, Register src2) { LP64_ONLY(xaddq(src1, src2)) NOT_LP64(xaddl(src1, src2)) ; }
 794 
 795 
 796 
 797   // Helper functions for statistics gathering.
 798   // Conditionally (atomically, on MPs) increments passed counter address, preserving condition codes.
 799   void cond_inc32(Condition cond, AddressLiteral counter_addr);
 800   // Unconditional atomic increment.
 801   void atomic_incl(Address counter_addr);
 802   void atomic_incl(AddressLiteral counter_addr, Register scr = rscratch1);
 803 #ifdef _LP64
 804   void atomic_incq(Address counter_addr);
 805   void atomic_incq(AddressLiteral counter_addr, Register scr = rscratch1);
 806 #endif
 807   void atomic_incptr(AddressLiteral counter_addr, Register scr = rscratch1) { LP64_ONLY(atomic_incq(counter_addr, scr)) NOT_LP64(atomic_incl(counter_addr, scr)) ; }
 808   void atomic_incptr(Address counter_addr) { LP64_ONLY(atomic_incq(counter_addr)) NOT_LP64(atomic_incl(counter_addr)) ; }
 809 
 810   void lea(Register dst, AddressLiteral adr);
 811   void lea(Address dst, AddressLiteral adr);
 812   void lea(Register dst, Address adr) { Assembler::lea(dst, adr); }
 813 
 814   void leal32(Register dst, Address src) { leal(dst, src); }
 815 
 816   // Import other testl() methods from the parent class or else
 817   // they will be hidden by the following overriding declaration.
 818   using Assembler::testl;
 819   void testl(Register dst, AddressLiteral src);
 820 
 821   void orptr(Register dst, Address src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
 822   void orptr(Register dst, Register src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
 823   void orptr(Register dst, int32_t src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
 824   void orptr(Address dst, int32_t imm32) { LP64_ONLY(orq(dst, imm32)) NOT_LP64(orl(dst, imm32)); }
 825 
 826   void testptr(Register src, int32_t imm32) {  LP64_ONLY(testq(src, imm32)) NOT_LP64(testl(src, imm32)); }
 827   void testptr(Register src1, Address src2) { LP64_ONLY(testq(src1, src2)) NOT_LP64(testl(src1, src2)); }
 828   void testptr(Register src1, Register src2);
 829 
 830   void xorptr(Register dst, Register src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }
 831   void xorptr(Register dst, Address src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }
 832 
 833   // Calls
 834 
 835   void call(Label& L, relocInfo::relocType rtype);
 836   void call(Register entry);
 837   void call(Address addr) { Assembler::call(addr); }
 838 
 839   // NOTE: this call transfers to the effective address of entry NOT
 840   // the address contained by entry. This is because this is more natural
 841   // for jumps/calls.
 842   void call(AddressLiteral entry);
 843 
 844   // Emit the CompiledIC call idiom
 845   void ic_call(address entry, jint method_index = 0);
 846 
 847   // Jumps
 848 
 849   // NOTE: these jumps tranfer to the effective address of dst NOT
 850   // the address contained by dst. This is because this is more natural
 851   // for jumps/calls.
 852   void jump(AddressLiteral dst);
 853   void jump_cc(Condition cc, AddressLiteral dst);
 854 
 855   // 32bit can do a case table jump in one instruction but we no longer allow the base
 856   // to be installed in the Address class. This jump will tranfers to the address
 857   // contained in the location described by entry (not the address of entry)
 858   void jump(ArrayAddress entry);
 859 
 860   // Floating
 861 
 862   void push_f(XMMRegister r);
 863   void pop_f(XMMRegister r);
 864   void push_d(XMMRegister r);
 865   void pop_d(XMMRegister r);
 866 
 867   void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
 868   void andpd(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
 869   void andpd(XMMRegister dst, XMMRegister src) { Assembler::andpd(dst, src); }
 870 
 871   void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
 872   void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
 873   void andps(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
 874 
 875   void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
 876   void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
 877   void comiss(XMMRegister dst, AddressLiteral src);
 878 
 879   void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
 880   void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
 881   void comisd(XMMRegister dst, AddressLiteral src);
 882 
 883 #ifndef _LP64
 884   void fadd_s(Address src)        { Assembler::fadd_s(src); }
 885   void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
 886 
 887   void fldcw(Address src) { Assembler::fldcw(src); }
 888   void fldcw(AddressLiteral src);
 889 
 890   void fld_s(int index)   { Assembler::fld_s(index); }
 891   void fld_s(Address src) { Assembler::fld_s(src); }
 892   void fld_s(AddressLiteral src);
 893 
 894   void fld_d(Address src) { Assembler::fld_d(src); }
 895   void fld_d(AddressLiteral src);
 896 
 897   void fmul_s(Address src)        { Assembler::fmul_s(src); }
 898   void fmul_s(AddressLiteral src) { Assembler::fmul_s(as_Address(src)); }
 899 #endif // _LP64
 900 
 901   void fld_x(Address src) { Assembler::fld_x(src); }
 902   void fld_x(AddressLiteral src);
 903 
 904   void ldmxcsr(Address src) { Assembler::ldmxcsr(src); }
 905   void ldmxcsr(AddressLiteral src);
 906 
 907 #ifdef _LP64
 908  private:
 909   void sha256_AVX2_one_round_compute(
 910     Register  reg_old_h,
 911     Register  reg_a,
 912     Register  reg_b,
 913     Register  reg_c,
 914     Register  reg_d,
 915     Register  reg_e,
 916     Register  reg_f,
 917     Register  reg_g,
 918     Register  reg_h,
 919     int iter);
 920   void sha256_AVX2_four_rounds_compute_first(int start);
 921   void sha256_AVX2_four_rounds_compute_last(int start);
 922   void sha256_AVX2_one_round_and_sched(
 923         XMMRegister xmm_0,     /* == ymm4 on 0, 1, 2, 3 iterations, then rotate 4 registers left on 4, 8, 12 iterations */
 924         XMMRegister xmm_1,     /* ymm5 */  /* full cycle is 16 iterations */
 925         XMMRegister xmm_2,     /* ymm6 */
 926         XMMRegister xmm_3,     /* ymm7 */
 927         Register    reg_a,      /* == eax on 0 iteration, then rotate 8 register right on each next iteration */
 928         Register    reg_b,      /* ebx */    /* full cycle is 8 iterations */
 929         Register    reg_c,      /* edi */
 930         Register    reg_d,      /* esi */
 931         Register    reg_e,      /* r8d */
 932         Register    reg_f,      /* r9d */
 933         Register    reg_g,      /* r10d */
 934         Register    reg_h,      /* r11d */
 935         int iter);
 936 
 937   void addm(int disp, Register r1, Register r2);
 938   void gfmul(XMMRegister tmp0, XMMRegister t);
 939   void schoolbookAAD(int i, Register subkeyH, XMMRegister data, XMMRegister tmp0,
 940                      XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3);
 941   void generateHtbl_one_block(Register htbl);
 942   void generateHtbl_eight_blocks(Register htbl);
 943  public:
 944   void sha256_AVX2(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 945                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 946                    Register buf, Register state, Register ofs, Register limit, Register rsp,
 947                    bool multi_block, XMMRegister shuf_mask);
 948   void avx_ghash(Register state, Register htbl, Register data, Register blocks);
 949 #endif
 950 
 951 #ifdef _LP64
 952  private:
 953   void sha512_AVX2_one_round_compute(Register old_h, Register a, Register b, Register c, Register d,
 954                                      Register e, Register f, Register g, Register h, int iteration);
 955 
 956   void sha512_AVX2_one_round_and_schedule(XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
 957                                           Register a, Register b, Register c, Register d, Register e, Register f,
 958                                           Register g, Register h, int iteration);
 959 
 960   void addmq(int disp, Register r1, Register r2);
 961  public:
 962   void sha512_AVX2(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 963                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 964                    Register buf, Register state, Register ofs, Register limit, Register rsp, bool multi_block,
 965                    XMMRegister shuf_mask);
 966 private:
 967   void roundEnc(XMMRegister key, int rnum);
 968   void lastroundEnc(XMMRegister key, int rnum);
 969   void roundDec(XMMRegister key, int rnum);
 970   void lastroundDec(XMMRegister key, int rnum);
 971   void ev_load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask);
 972   void gfmul_avx512(XMMRegister ghash, XMMRegister hkey);
 973   void generateHtbl_48_block_zmm(Register htbl, Register avx512_subkeyHtbl);
 974   void ghash16_encrypt16_parallel(Register key, Register subkeyHtbl, XMMRegister ctr_blockx,
 975                                   XMMRegister aad_hashx, Register in, Register out, Register data, Register pos, bool reduction,
 976                                   XMMRegister addmask, bool no_ghash_input, Register rounds, Register ghash_pos,
 977                                   bool final_reduction, int index, XMMRegister counter_inc_mask);
 978 public:
 979   void aesecb_encrypt(Register source_addr, Register dest_addr, Register key, Register len);
 980   void aesecb_decrypt(Register source_addr, Register dest_addr, Register key, Register len);
 981   void aesctr_encrypt(Register src_addr, Register dest_addr, Register key, Register counter,
 982                       Register len_reg, Register used, Register used_addr, Register saved_encCounter_start);
 983   void aesgcm_encrypt(Register in, Register len, Register ct, Register out, Register key,
 984                       Register state, Register subkeyHtbl, Register avx512_subkeyHtbl, Register counter);
 985 
 986 #endif
 987 
 988   void fast_md5(Register buf, Address state, Address ofs, Address limit,
 989                 bool multi_block);
 990 
 991   void fast_sha1(XMMRegister abcd, XMMRegister e0, XMMRegister e1, XMMRegister msg0,
 992                  XMMRegister msg1, XMMRegister msg2, XMMRegister msg3, XMMRegister shuf_mask,
 993                  Register buf, Register state, Register ofs, Register limit, Register rsp,
 994                  bool multi_block);
 995 
 996 #ifdef _LP64
 997   void fast_sha256(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 998                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 999                    Register buf, Register state, Register ofs, Register limit, Register rsp,
1000                    bool multi_block, XMMRegister shuf_mask);
1001 #else
1002   void fast_sha256(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
1003                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
1004                    Register buf, Register state, Register ofs, Register limit, Register rsp,
1005                    bool multi_block);
1006 #endif
1007 
1008   void fast_exp(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1009                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1010                 Register rax, Register rcx, Register rdx, Register tmp);
1011 
1012 #ifdef _LP64
1013   void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1014                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1015                 Register rax, Register rcx, Register rdx, Register tmp1, Register tmp2);
1016 
1017   void fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1018                   XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1019                   Register rax, Register rcx, Register rdx, Register r11);
1020 
1021   void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
1022                 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
1023                 Register rdx, Register tmp1, Register tmp2, Register tmp3, Register tmp4);
1024 
1025   void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1026                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1027                 Register rax, Register rbx, Register rcx, Register rdx, Register tmp1, Register tmp2,
1028                 Register tmp3, Register tmp4);
1029 
1030   void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1031                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1032                 Register rax, Register rcx, Register rdx, Register tmp1,
1033                 Register tmp2, Register tmp3, Register tmp4);
1034   void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1035                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1036                 Register rax, Register rcx, Register rdx, Register tmp1,
1037                 Register tmp2, Register tmp3, Register tmp4);
1038 #else
1039   void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1040                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1041                 Register rax, Register rcx, Register rdx, Register tmp1);
1042 
1043   void fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1044                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1045                 Register rax, Register rcx, Register rdx, Register tmp);
1046 
1047   void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
1048                 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
1049                 Register rdx, Register tmp);
1050 
1051   void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1052                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1053                 Register rax, Register rbx, Register rdx);
1054 
1055   void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1056                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1057                 Register rax, Register rcx, Register rdx, Register tmp);
1058 
1059   void libm_sincos_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1060                         Register edx, Register ebx, Register esi, Register edi,
1061                         Register ebp, Register esp);
1062 
1063   void libm_reduce_pi04l(Register eax, Register ecx, Register edx, Register ebx,
1064                          Register esi, Register edi, Register ebp, Register esp);
1065 
1066   void libm_tancot_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1067                         Register edx, Register ebx, Register esi, Register edi,
1068                         Register ebp, Register esp);
1069 
1070   void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1071                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1072                 Register rax, Register rcx, Register rdx, Register tmp);
1073 #endif
1074 
1075 private:
1076 
1077   // these are private because users should be doing movflt/movdbl
1078 
1079   void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
1080   void movss(Address dst, XMMRegister src)     { Assembler::movss(dst, src); }
1081   void movss(XMMRegister dst, Address src)     { Assembler::movss(dst, src); }
1082   void movss(XMMRegister dst, AddressLiteral src);
1083 
1084   void movlpd(XMMRegister dst, Address src)    {Assembler::movlpd(dst, src); }
1085   void movlpd(XMMRegister dst, AddressLiteral src);
1086 
1087 public:
1088 
1089   void addsd(XMMRegister dst, XMMRegister src)    { Assembler::addsd(dst, src); }
1090   void addsd(XMMRegister dst, Address src)        { Assembler::addsd(dst, src); }
1091   void addsd(XMMRegister dst, AddressLiteral src);
1092 
1093   void addss(XMMRegister dst, XMMRegister src)    { Assembler::addss(dst, src); }
1094   void addss(XMMRegister dst, Address src)        { Assembler::addss(dst, src); }
1095   void addss(XMMRegister dst, AddressLiteral src);
1096 
1097   void addpd(XMMRegister dst, XMMRegister src)    { Assembler::addpd(dst, src); }
1098   void addpd(XMMRegister dst, Address src)        { Assembler::addpd(dst, src); }
1099   void addpd(XMMRegister dst, AddressLiteral src);
1100 
1101   void divsd(XMMRegister dst, XMMRegister src)    { Assembler::divsd(dst, src); }
1102   void divsd(XMMRegister dst, Address src)        { Assembler::divsd(dst, src); }
1103   void divsd(XMMRegister dst, AddressLiteral src);
1104 
1105   void divss(XMMRegister dst, XMMRegister src)    { Assembler::divss(dst, src); }
1106   void divss(XMMRegister dst, Address src)        { Assembler::divss(dst, src); }
1107   void divss(XMMRegister dst, AddressLiteral src);
1108 
1109   // Move Unaligned Double Quadword
1110   void movdqu(Address     dst, XMMRegister src);
1111   void movdqu(XMMRegister dst, Address src);
1112   void movdqu(XMMRegister dst, XMMRegister src);
1113   void movdqu(XMMRegister dst, AddressLiteral src, Register scratchReg = rscratch1);
1114 
1115   void kmovwl(KRegister dst, Register src) { Assembler::kmovwl(dst, src); }
1116   void kmovwl(Register dst, KRegister src) { Assembler::kmovwl(dst, src); }
1117   void kmovwl(KRegister dst, Address src) { Assembler::kmovwl(dst, src); }
1118   void kmovwl(KRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1119   void kmovwl(Address dst,  KRegister src) { Assembler::kmovwl(dst, src); }
1120   void kmovwl(KRegister dst, KRegister src) { Assembler::kmovwl(dst, src); }
1121 
1122   void kmovql(KRegister dst, KRegister src) { Assembler::kmovql(dst, src); }
1123   void kmovql(KRegister dst, Register src) { Assembler::kmovql(dst, src); }
1124   void kmovql(Register dst, KRegister src) { Assembler::kmovql(dst, src); }
1125   void kmovql(KRegister dst, Address src) { Assembler::kmovql(dst, src); }
1126   void kmovql(Address  dst, KRegister src) { Assembler::kmovql(dst, src); }
1127   void kmovql(KRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1128 
1129   // Safe move operation, lowers down to 16bit moves for targets supporting
1130   // AVX512F feature and 64bit moves for targets supporting AVX512BW feature.
1131   void kmov(Address  dst, KRegister src);
1132   void kmov(KRegister dst, Address src);
1133   void kmov(KRegister dst, KRegister src);
1134   void kmov(Register dst, KRegister src);
1135   void kmov(KRegister dst, Register src);
1136 
1137   // AVX Unaligned forms
1138   void vmovdqu(Address     dst, XMMRegister src);
1139   void vmovdqu(XMMRegister dst, Address src);
1140   void vmovdqu(XMMRegister dst, XMMRegister src);
1141   void vmovdqu(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1142   void vmovdqu(XMMRegister dst, AddressLiteral src, Register scratch_reg, int vector_len);
1143 
1144 
1145   // AVX512 Unaligned
1146   void evmovdqu(BasicType type, KRegister kmask, Address dst, XMMRegister src, int vector_len);
1147   void evmovdqu(BasicType type, KRegister kmask, XMMRegister dst, Address src, int vector_len);
1148 
1149   void evmovdqub(Address dst, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqub(dst, src, merge, vector_len); }
1150   void evmovdqub(XMMRegister dst, Address src, bool merge, int vector_len) { Assembler::evmovdqub(dst, src, merge, vector_len); }
1151   void evmovdqub(XMMRegister dst, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqub(dst, src, merge, vector_len); }
1152   void evmovdqub(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdqub(dst, mask, src, merge, vector_len); }
1153   void evmovdqub(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqub(dst, mask, src, merge, vector_len); }
1154   void evmovdqub(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1155 
1156   void evmovdquw(Address dst, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdquw(dst, src, merge, vector_len); }
1157   void evmovdquw(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdquw(dst, mask, src, merge, vector_len); }
1158   void evmovdquw(XMMRegister dst, Address src, bool merge, int vector_len) { Assembler::evmovdquw(dst, src, merge, vector_len); }
1159   void evmovdquw(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdquw(dst, mask, src, merge, vector_len); }
1160   void evmovdquw(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1161 
1162   void evmovdqul(Address dst, XMMRegister src, int vector_len) { Assembler::evmovdqul(dst, src, vector_len); }
1163   void evmovdqul(XMMRegister dst, Address src, int vector_len) { Assembler::evmovdqul(dst, src, vector_len); }
1164   void evmovdqul(XMMRegister dst, XMMRegister src, int vector_len) {
1165      if (dst->encoding() == src->encoding()) return;
1166      Assembler::evmovdqul(dst, src, vector_len);
1167   }
1168   void evmovdqul(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqul(dst, mask, src, merge, vector_len); }
1169   void evmovdqul(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdqul(dst, mask, src, merge, vector_len); }
1170   void evmovdqul(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len) {
1171     if (dst->encoding() == src->encoding() && mask == k0) return;
1172     Assembler::evmovdqul(dst, mask, src, merge, vector_len);
1173    }
1174   void evmovdqul(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1175 
1176   void evmovdquq(XMMRegister dst, Address src, int vector_len) { Assembler::evmovdquq(dst, src, vector_len); }
1177   void evmovdquq(Address dst, XMMRegister src, int vector_len) { Assembler::evmovdquq(dst, src, vector_len); }
1178   void evmovdquq(XMMRegister dst, AddressLiteral src, int vector_len, Register rscratch);
1179   void evmovdquq(XMMRegister dst, XMMRegister src, int vector_len) {
1180     if (dst->encoding() == src->encoding()) return;
1181     Assembler::evmovdquq(dst, src, vector_len);
1182   }
1183   void evmovdquq(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdquq(dst, mask, src, merge, vector_len); }
1184   void evmovdquq(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdquq(dst, mask, src, merge, vector_len); }
1185   void evmovdquq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len) {
1186     if (dst->encoding() == src->encoding() && mask == k0) return;
1187     Assembler::evmovdquq(dst, mask, src, merge, vector_len);
1188   }
1189   void evmovdquq(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1190 
1191   // Move Aligned Double Quadword
1192   void movdqa(XMMRegister dst, Address src)       { Assembler::movdqa(dst, src); }
1193   void movdqa(XMMRegister dst, XMMRegister src)   { Assembler::movdqa(dst, src); }
1194   void movdqa(XMMRegister dst, AddressLiteral src);
1195 
1196   // Move Aligned, possibly non-temporal
1197   void movqa(Address dst, Register src, bool nt);       // 64-bit
1198   void movdqa(Address dst, XMMRegister src, bool nt);   // 128-bit
1199   void vmovdqa(Address dst, XMMRegister src, bool nt);  // 256-bit
1200   void evmovdqa(Address dst, XMMRegister src, int vector_len, bool nt); // 512-bit
1201 
1202   void movdqa(XMMRegister dst, Address src, bool nt);   // 128-bit
1203   void vmovdqa(XMMRegister dst, Address src, bool nt);  // 256-bit
1204   void evmovdqa(XMMRegister dst, Address src, int vector_len, bool nt); // 512-bit
1205 
1206   void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); }
1207   void movsd(Address dst, XMMRegister src)     { Assembler::movsd(dst, src); }
1208   void movsd(XMMRegister dst, Address src)     { Assembler::movsd(dst, src); }
1209   void movsd(XMMRegister dst, AddressLiteral src);
1210 
1211   void mulpd(XMMRegister dst, XMMRegister src)    { Assembler::mulpd(dst, src); }
1212   void mulpd(XMMRegister dst, Address src)        { Assembler::mulpd(dst, src); }
1213   void mulpd(XMMRegister dst, AddressLiteral src);
1214 
1215   void mulsd(XMMRegister dst, XMMRegister src)    { Assembler::mulsd(dst, src); }
1216   void mulsd(XMMRegister dst, Address src)        { Assembler::mulsd(dst, src); }
1217   void mulsd(XMMRegister dst, AddressLiteral src);
1218 
1219   void mulss(XMMRegister dst, XMMRegister src)    { Assembler::mulss(dst, src); }
1220   void mulss(XMMRegister dst, Address src)        { Assembler::mulss(dst, src); }
1221   void mulss(XMMRegister dst, AddressLiteral src);
1222 
1223   // Carry-Less Multiplication Quadword
1224   void pclmulldq(XMMRegister dst, XMMRegister src) {
1225     // 0x00 - multiply lower 64 bits [0:63]
1226     Assembler::pclmulqdq(dst, src, 0x00);
1227   }
1228   void pclmulhdq(XMMRegister dst, XMMRegister src) {
1229     // 0x11 - multiply upper 64 bits [64:127]
1230     Assembler::pclmulqdq(dst, src, 0x11);
1231   }
1232 
1233   void pcmpeqb(XMMRegister dst, XMMRegister src);
1234   void pcmpeqw(XMMRegister dst, XMMRegister src);
1235 
1236   void pcmpestri(XMMRegister dst, Address src, int imm8);
1237   void pcmpestri(XMMRegister dst, XMMRegister src, int imm8);
1238 
1239   void pmovzxbw(XMMRegister dst, XMMRegister src);
1240   void pmovzxbw(XMMRegister dst, Address src);
1241 
1242   void pmovmskb(Register dst, XMMRegister src);
1243 
1244   void ptest(XMMRegister dst, XMMRegister src);
1245 
1246   void sqrtsd(XMMRegister dst, XMMRegister src)    { Assembler::sqrtsd(dst, src); }
1247   void sqrtsd(XMMRegister dst, Address src)        { Assembler::sqrtsd(dst, src); }
1248   void sqrtsd(XMMRegister dst, AddressLiteral src);
1249 
1250   void roundsd(XMMRegister dst, XMMRegister src, int32_t rmode)    { Assembler::roundsd(dst, src, rmode); }
1251   void roundsd(XMMRegister dst, Address src, int32_t rmode)        { Assembler::roundsd(dst, src, rmode); }
1252   void roundsd(XMMRegister dst, AddressLiteral src, int32_t rmode, Register scratch_reg);
1253 
1254   void sqrtss(XMMRegister dst, XMMRegister src)    { Assembler::sqrtss(dst, src); }
1255   void sqrtss(XMMRegister dst, Address src)        { Assembler::sqrtss(dst, src); }
1256   void sqrtss(XMMRegister dst, AddressLiteral src);
1257 
1258   void subsd(XMMRegister dst, XMMRegister src)    { Assembler::subsd(dst, src); }
1259   void subsd(XMMRegister dst, Address src)        { Assembler::subsd(dst, src); }
1260   void subsd(XMMRegister dst, AddressLiteral src);
1261 
1262   void subss(XMMRegister dst, XMMRegister src)    { Assembler::subss(dst, src); }
1263   void subss(XMMRegister dst, Address src)        { Assembler::subss(dst, src); }
1264   void subss(XMMRegister dst, AddressLiteral src);
1265 
1266   void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); }
1267   void ucomiss(XMMRegister dst, Address src)     { Assembler::ucomiss(dst, src); }
1268   void ucomiss(XMMRegister dst, AddressLiteral src);
1269 
1270   void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); }
1271   void ucomisd(XMMRegister dst, Address src)     { Assembler::ucomisd(dst, src); }
1272   void ucomisd(XMMRegister dst, AddressLiteral src);
1273 
1274   // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
1275   void xorpd(XMMRegister dst, XMMRegister src);
1276   void xorpd(XMMRegister dst, Address src)     { Assembler::xorpd(dst, src); }
1277   void xorpd(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1278 
1279   // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
1280   void xorps(XMMRegister dst, XMMRegister src);
1281   void xorps(XMMRegister dst, Address src)     { Assembler::xorps(dst, src); }
1282   void xorps(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1283 
1284   // Shuffle Bytes
1285   void pshufb(XMMRegister dst, XMMRegister src) { Assembler::pshufb(dst, src); }
1286   void pshufb(XMMRegister dst, Address src)     { Assembler::pshufb(dst, src); }
1287   void pshufb(XMMRegister dst, AddressLiteral src);
1288   // AVX 3-operands instructions
1289 
1290   void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddsd(dst, nds, src); }
1291   void vaddsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vaddsd(dst, nds, src); }
1292   void vaddsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1293 
1294   void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddss(dst, nds, src); }
1295   void vaddss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vaddss(dst, nds, src); }
1296   void vaddss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1297 
1298   void vabsss(XMMRegister dst, XMMRegister nds, XMMRegister src, AddressLiteral negate_field, int vector_len);
1299   void vabssd(XMMRegister dst, XMMRegister nds, XMMRegister src, AddressLiteral negate_field, int vector_len);
1300 
1301   void vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1302   void vpaddb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1303   void vpaddb(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch);
1304 
1305   void vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1306   void vpaddw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1307 
1308   void vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpaddd(dst, nds, src, vector_len); }
1309   void vpaddd(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vpaddd(dst, nds, src, vector_len); }
1310   void vpaddd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch);
1311 
1312   void vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpand(dst, nds, src, vector_len); }
1313   void vpand(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vpand(dst, nds, src, vector_len); }
1314   void vpand(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1315 
1316   void vpbroadcastw(XMMRegister dst, XMMRegister src, int vector_len);
1317   void vpbroadcastw(XMMRegister dst, Address src, int vector_len) { Assembler::vpbroadcastw(dst, src, vector_len); }
1318 
1319   void vpcmpeqb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1320 
1321   void vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1322   void evpcmpeqd(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg);
1323 
1324   // Vector compares
1325   void evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1326                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpd(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1327   void evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1328                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1329   void evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1330                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpq(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1331   void evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1332                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1333   void evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1334                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpb(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1335   void evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1336                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1337   void evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1338                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpw(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1339   void evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1340                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1341 
1342   void evpbroadcast(BasicType type, XMMRegister dst, Register src, int vector_len);
1343 
1344   // Emit comparison instruction for the specified comparison predicate.
1345   void vpcmpCCW(XMMRegister dst, XMMRegister nds, XMMRegister src, ComparisonPredicate cond, Width width, int vector_len, Register scratch_reg);
1346   void vpcmpCC(XMMRegister dst, XMMRegister nds, XMMRegister src, int cond_encoding, Width width, int vector_len);
1347 
1348   void vpmovzxbw(XMMRegister dst, Address src, int vector_len);
1349   void vpmovzxbw(XMMRegister dst, XMMRegister src, int vector_len) { Assembler::vpmovzxbw(dst, src, vector_len); }
1350 
1351   void vpmovmskb(Register dst, XMMRegister src, int vector_len = Assembler::AVX_256bit);
1352 
1353   void vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1354   void vpmullw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1355   void vpmulld(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
1356     Assembler::vpmulld(dst, nds, src, vector_len);
1357   };
1358   void vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1359     Assembler::vpmulld(dst, nds, src, vector_len);
1360   }
1361   void vpmulld(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg);
1362 
1363   void vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1364   void vpsubb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1365 
1366   void vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1367   void vpsubw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1368 
1369   void vpsraw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1370   void vpsraw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1371 
1372   void evpsraq(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1373   void evpsraq(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1374 
1375   void evpsllw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1376     if (!is_varshift) {
1377       Assembler::evpsllw(dst, mask, nds, src, merge, vector_len);
1378     } else {
1379       Assembler::evpsllvw(dst, mask, nds, src, merge, vector_len);
1380     }
1381   }
1382   void evpslld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1383     if (!is_varshift) {
1384       Assembler::evpslld(dst, mask, nds, src, merge, vector_len);
1385     } else {
1386       Assembler::evpsllvd(dst, mask, nds, src, merge, vector_len);
1387     }
1388   }
1389   void evpsllq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1390     if (!is_varshift) {
1391       Assembler::evpsllq(dst, mask, nds, src, merge, vector_len);
1392     } else {
1393       Assembler::evpsllvq(dst, mask, nds, src, merge, vector_len);
1394     }
1395   }
1396   void evpsrlw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1397     if (!is_varshift) {
1398       Assembler::evpsrlw(dst, mask, nds, src, merge, vector_len);
1399     } else {
1400       Assembler::evpsrlvw(dst, mask, nds, src, merge, vector_len);
1401     }
1402   }
1403   void evpsrld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1404     if (!is_varshift) {
1405       Assembler::evpsrld(dst, mask, nds, src, merge, vector_len);
1406     } else {
1407       Assembler::evpsrlvd(dst, mask, nds, src, merge, vector_len);
1408     }
1409   }
1410   void evpsrlq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1411     if (!is_varshift) {
1412       Assembler::evpsrlq(dst, mask, nds, src, merge, vector_len);
1413     } else {
1414       Assembler::evpsrlvq(dst, mask, nds, src, merge, vector_len);
1415     }
1416   }
1417   void evpsraw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1418     if (!is_varshift) {
1419       Assembler::evpsraw(dst, mask, nds, src, merge, vector_len);
1420     } else {
1421       Assembler::evpsravw(dst, mask, nds, src, merge, vector_len);
1422     }
1423   }
1424   void evpsrad(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1425     if (!is_varshift) {
1426       Assembler::evpsrad(dst, mask, nds, src, merge, vector_len);
1427     } else {
1428       Assembler::evpsravd(dst, mask, nds, src, merge, vector_len);
1429     }
1430   }
1431   void evpsraq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1432     if (!is_varshift) {
1433       Assembler::evpsraq(dst, mask, nds, src, merge, vector_len);
1434     } else {
1435       Assembler::evpsravq(dst, mask, nds, src, merge, vector_len);
1436     }
1437   }
1438 
1439   void evpmins(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1440   void evpmaxs(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1441   void evpmins(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1442   void evpmaxs(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1443 
1444   void vpsrlw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1445   void vpsrlw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1446 
1447   void vpsllw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1448   void vpsllw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1449 
1450   void vptest(XMMRegister dst, XMMRegister src);
1451   void vptest(XMMRegister dst, XMMRegister src, int vector_len) { Assembler::vptest(dst, src, vector_len); }
1452 
1453   void punpcklbw(XMMRegister dst, XMMRegister src);
1454   void punpcklbw(XMMRegister dst, Address src) { Assembler::punpcklbw(dst, src); }
1455 
1456   void pshufd(XMMRegister dst, Address src, int mode);
1457   void pshufd(XMMRegister dst, XMMRegister src, int mode) { Assembler::pshufd(dst, src, mode); }
1458 
1459   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1460   void pshuflw(XMMRegister dst, Address src, int mode) { Assembler::pshuflw(dst, src, mode); }
1461 
1462   void vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vandpd(dst, nds, src, vector_len); }
1463   void vandpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len)     { Assembler::vandpd(dst, nds, src, vector_len); }
1464   void vandpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1465 
1466   void vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vandps(dst, nds, src, vector_len); }
1467   void vandps(XMMRegister dst, XMMRegister nds, Address src, int vector_len)     { Assembler::vandps(dst, nds, src, vector_len); }
1468   void vandps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1469 
1470   void evpord(XMMRegister dst, KRegister mask, XMMRegister nds, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1471 
1472   void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivsd(dst, nds, src); }
1473   void vdivsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vdivsd(dst, nds, src); }
1474   void vdivsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1475 
1476   void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivss(dst, nds, src); }
1477   void vdivss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vdivss(dst, nds, src); }
1478   void vdivss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1479 
1480   void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulsd(dst, nds, src); }
1481   void vmulsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vmulsd(dst, nds, src); }
1482   void vmulsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1483 
1484   void vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulss(dst, nds, src); }
1485   void vmulss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vmulss(dst, nds, src); }
1486   void vmulss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1487 
1488   void vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubsd(dst, nds, src); }
1489   void vsubsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vsubsd(dst, nds, src); }
1490   void vsubsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1491 
1492   void vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubss(dst, nds, src); }
1493   void vsubss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vsubss(dst, nds, src); }
1494   void vsubss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1495 
1496   void vnegatess(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1497   void vnegatesd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1498 
1499   // AVX Vector instructions
1500 
1501   void vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vxorpd(dst, nds, src, vector_len); }
1502   void vxorpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vxorpd(dst, nds, src, vector_len); }
1503   void vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1504 
1505   void vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vxorps(dst, nds, src, vector_len); }
1506   void vxorps(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vxorps(dst, nds, src, vector_len); }
1507   void vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1508 
1509   void vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1510     if (UseAVX > 1 || (vector_len < 1)) // vpxor 256 bit is available only in AVX2
1511       Assembler::vpxor(dst, nds, src, vector_len);
1512     else
1513       Assembler::vxorpd(dst, nds, src, vector_len);
1514   }
1515   void vpxor(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
1516     if (UseAVX > 1 || (vector_len < 1)) // vpxor 256 bit is available only in AVX2
1517       Assembler::vpxor(dst, nds, src, vector_len);
1518     else
1519       Assembler::vxorpd(dst, nds, src, vector_len);
1520   }
1521   void vpxor(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1522 
1523   // Simple version for AVX2 256bit vectors
1524   void vpxor(XMMRegister dst, XMMRegister src) {
1525     assert(UseAVX >= 2, "Should be at least AVX2");
1526     Assembler::vpxor(dst, dst, src, AVX_256bit);
1527   }
1528   void vpxor(XMMRegister dst, Address src) {
1529     assert(UseAVX >= 2, "Should be at least AVX2");
1530     Assembler::vpxor(dst, dst, src, AVX_256bit);
1531   }
1532 
1533   void vpermd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpermd(dst, nds, src, vector_len); }
1534   void vpermd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg);
1535 
1536   void vinserti128(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8) {
1537     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1538       Assembler::vinserti32x4(dst, nds, src, imm8);
1539     } else if (UseAVX > 1) {
1540       // vinserti128 is available only in AVX2
1541       Assembler::vinserti128(dst, nds, src, imm8);
1542     } else {
1543       Assembler::vinsertf128(dst, nds, src, imm8);
1544     }
1545   }
1546 
1547   void vinserti128(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8) {
1548     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1549       Assembler::vinserti32x4(dst, nds, src, imm8);
1550     } else if (UseAVX > 1) {
1551       // vinserti128 is available only in AVX2
1552       Assembler::vinserti128(dst, nds, src, imm8);
1553     } else {
1554       Assembler::vinsertf128(dst, nds, src, imm8);
1555     }
1556   }
1557 
1558   void vextracti128(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1559     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1560       Assembler::vextracti32x4(dst, src, imm8);
1561     } else if (UseAVX > 1) {
1562       // vextracti128 is available only in AVX2
1563       Assembler::vextracti128(dst, src, imm8);
1564     } else {
1565       Assembler::vextractf128(dst, src, imm8);
1566     }
1567   }
1568 
1569   void vextracti128(Address dst, XMMRegister src, uint8_t imm8) {
1570     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1571       Assembler::vextracti32x4(dst, src, imm8);
1572     } else if (UseAVX > 1) {
1573       // vextracti128 is available only in AVX2
1574       Assembler::vextracti128(dst, src, imm8);
1575     } else {
1576       Assembler::vextractf128(dst, src, imm8);
1577     }
1578   }
1579 
1580   // 128bit copy to/from high 128 bits of 256bit (YMM) vector registers
1581   void vinserti128_high(XMMRegister dst, XMMRegister src) {
1582     vinserti128(dst, dst, src, 1);
1583   }
1584   void vinserti128_high(XMMRegister dst, Address src) {
1585     vinserti128(dst, dst, src, 1);
1586   }
1587   void vextracti128_high(XMMRegister dst, XMMRegister src) {
1588     vextracti128(dst, src, 1);
1589   }
1590   void vextracti128_high(Address dst, XMMRegister src) {
1591     vextracti128(dst, src, 1);
1592   }
1593 
1594   void vinsertf128_high(XMMRegister dst, XMMRegister src) {
1595     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1596       Assembler::vinsertf32x4(dst, dst, src, 1);
1597     } else {
1598       Assembler::vinsertf128(dst, dst, src, 1);
1599     }
1600   }
1601 
1602   void vinsertf128_high(XMMRegister dst, Address src) {
1603     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1604       Assembler::vinsertf32x4(dst, dst, src, 1);
1605     } else {
1606       Assembler::vinsertf128(dst, dst, src, 1);
1607     }
1608   }
1609 
1610   void vextractf128_high(XMMRegister dst, XMMRegister src) {
1611     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1612       Assembler::vextractf32x4(dst, src, 1);
1613     } else {
1614       Assembler::vextractf128(dst, src, 1);
1615     }
1616   }
1617 
1618   void vextractf128_high(Address dst, XMMRegister src) {
1619     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1620       Assembler::vextractf32x4(dst, src, 1);
1621     } else {
1622       Assembler::vextractf128(dst, src, 1);
1623     }
1624   }
1625 
1626   // 256bit copy to/from high 256 bits of 512bit (ZMM) vector registers
1627   void vinserti64x4_high(XMMRegister dst, XMMRegister src) {
1628     Assembler::vinserti64x4(dst, dst, src, 1);
1629   }
1630   void vinsertf64x4_high(XMMRegister dst, XMMRegister src) {
1631     Assembler::vinsertf64x4(dst, dst, src, 1);
1632   }
1633   void vextracti64x4_high(XMMRegister dst, XMMRegister src) {
1634     Assembler::vextracti64x4(dst, src, 1);
1635   }
1636   void vextractf64x4_high(XMMRegister dst, XMMRegister src) {
1637     Assembler::vextractf64x4(dst, src, 1);
1638   }
1639   void vextractf64x4_high(Address dst, XMMRegister src) {
1640     Assembler::vextractf64x4(dst, src, 1);
1641   }
1642   void vinsertf64x4_high(XMMRegister dst, Address src) {
1643     Assembler::vinsertf64x4(dst, dst, src, 1);
1644   }
1645 
1646   // 128bit copy to/from low 128 bits of 256bit (YMM) vector registers
1647   void vinserti128_low(XMMRegister dst, XMMRegister src) {
1648     vinserti128(dst, dst, src, 0);
1649   }
1650   void vinserti128_low(XMMRegister dst, Address src) {
1651     vinserti128(dst, dst, src, 0);
1652   }
1653   void vextracti128_low(XMMRegister dst, XMMRegister src) {
1654     vextracti128(dst, src, 0);
1655   }
1656   void vextracti128_low(Address dst, XMMRegister src) {
1657     vextracti128(dst, src, 0);
1658   }
1659 
1660   void vinsertf128_low(XMMRegister dst, XMMRegister src) {
1661     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1662       Assembler::vinsertf32x4(dst, dst, src, 0);
1663     } else {
1664       Assembler::vinsertf128(dst, dst, src, 0);
1665     }
1666   }
1667 
1668   void vinsertf128_low(XMMRegister dst, Address src) {
1669     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1670       Assembler::vinsertf32x4(dst, dst, src, 0);
1671     } else {
1672       Assembler::vinsertf128(dst, dst, src, 0);
1673     }
1674   }
1675 
1676   void vextractf128_low(XMMRegister dst, XMMRegister src) {
1677     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1678       Assembler::vextractf32x4(dst, src, 0);
1679     } else {
1680       Assembler::vextractf128(dst, src, 0);
1681     }
1682   }
1683 
1684   void vextractf128_low(Address dst, XMMRegister src) {
1685     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1686       Assembler::vextractf32x4(dst, src, 0);
1687     } else {
1688       Assembler::vextractf128(dst, src, 0);
1689     }
1690   }
1691 
1692   // 256bit copy to/from low 256 bits of 512bit (ZMM) vector registers
1693   void vinserti64x4_low(XMMRegister dst, XMMRegister src) {
1694     Assembler::vinserti64x4(dst, dst, src, 0);
1695   }
1696   void vinsertf64x4_low(XMMRegister dst, XMMRegister src) {
1697     Assembler::vinsertf64x4(dst, dst, src, 0);
1698   }
1699   void vextracti64x4_low(XMMRegister dst, XMMRegister src) {
1700     Assembler::vextracti64x4(dst, src, 0);
1701   }
1702   void vextractf64x4_low(XMMRegister dst, XMMRegister src) {
1703     Assembler::vextractf64x4(dst, src, 0);
1704   }
1705   void vextractf64x4_low(Address dst, XMMRegister src) {
1706     Assembler::vextractf64x4(dst, src, 0);
1707   }
1708   void vinsertf64x4_low(XMMRegister dst, Address src) {
1709     Assembler::vinsertf64x4(dst, dst, src, 0);
1710   }
1711 
1712   // Carry-Less Multiplication Quadword
1713   void vpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1714     // 0x00 - multiply lower 64 bits [0:63]
1715     Assembler::vpclmulqdq(dst, nds, src, 0x00);
1716   }
1717   void vpclmulhdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1718     // 0x11 - multiply upper 64 bits [64:127]
1719     Assembler::vpclmulqdq(dst, nds, src, 0x11);
1720   }
1721   void vpclmullqhqdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1722     // 0x10 - multiply nds[0:63] and src[64:127]
1723     Assembler::vpclmulqdq(dst, nds, src, 0x10);
1724   }
1725   void vpclmulhqlqdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1726     //0x01 - multiply nds[64:127] and src[0:63]
1727     Assembler::vpclmulqdq(dst, nds, src, 0x01);
1728   }
1729 
1730   void evpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1731     // 0x00 - multiply lower 64 bits [0:63]
1732     Assembler::evpclmulqdq(dst, nds, src, 0x00, vector_len);
1733   }
1734   void evpclmulhdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1735     // 0x11 - multiply upper 64 bits [64:127]
1736     Assembler::evpclmulqdq(dst, nds, src, 0x11, vector_len);
1737   }
1738 
1739   // AVX-512 mask operations.
1740   void kand(BasicType etype, KRegister dst, KRegister src1, KRegister src2);
1741   void kor(BasicType type, KRegister dst, KRegister src1, KRegister src2);
1742   void knot(uint masklen, KRegister dst, KRegister src, KRegister ktmp = knoreg, Register rtmp = noreg);
1743   void kxor(BasicType type, KRegister dst, KRegister src1, KRegister src2);
1744   void kortest(uint masklen, KRegister src1, KRegister src2);
1745   void ktest(uint masklen, KRegister src1, KRegister src2);
1746 
1747   void evperm(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1748   void evperm(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1749 
1750   void evor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1751   void evor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1752 
1753   void evand(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1754   void evand(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1755 
1756   void evxor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1757   void evxor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1758 
1759   void evrold(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vlen_enc);
1760   void evrold(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src1, XMMRegister src2, bool merge, int vlen_enc);
1761   void evrord(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vlen_enc);
1762   void evrord(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src1, XMMRegister src2, bool merge, int vlen_enc);
1763 
1764   void alltrue(Register dst, uint masklen, KRegister src1, KRegister src2, KRegister kscratch);
1765   void anytrue(Register dst, uint masklen, KRegister src, KRegister kscratch);
1766 
1767   void cmov32( Condition cc, Register dst, Address  src);
1768   void cmov32( Condition cc, Register dst, Register src);
1769 
1770   void cmov(   Condition cc, Register dst, Register src) { cmovptr(cc, dst, src); }
1771 
1772   void cmovptr(Condition cc, Register dst, Address  src) { LP64_ONLY(cmovq(cc, dst, src)) NOT_LP64(cmov32(cc, dst, src)); }
1773   void cmovptr(Condition cc, Register dst, Register src) { LP64_ONLY(cmovq(cc, dst, src)) NOT_LP64(cmov32(cc, dst, src)); }
1774 
1775   void movoop(Register dst, jobject obj);
1776   void movoop(Address dst, jobject obj);
1777 
1778   void mov_metadata(Register dst, Metadata* obj);
1779   void mov_metadata(Address dst, Metadata* obj);
1780 
1781   void movptr(ArrayAddress dst, Register src);
1782   // can this do an lea?
1783   void movptr(Register dst, ArrayAddress src);
1784 
1785   void movptr(Register dst, Address src);
1786 
1787 #ifdef _LP64
1788   void movptr(Register dst, AddressLiteral src, Register scratch=rscratch1);
1789 #else
1790   void movptr(Register dst, AddressLiteral src, Register scratch=noreg); // Scratch reg is ignored in 32-bit
1791 #endif
1792 
1793   void movptr(Register dst, intptr_t src);
1794   void movptr(Register dst, Register src);
1795   void movptr(Address dst, intptr_t src);
1796 
1797   void movptr(Address dst, Register src);
1798 
1799   void movptr(Register dst, RegisterOrConstant src) {
1800     if (src.is_constant()) movptr(dst, src.as_constant());
1801     else                   movptr(dst, src.as_register());
1802   }
1803 
1804 #ifdef _LP64
1805   // Generally the next two are only used for moving NULL
1806   // Although there are situations in initializing the mark word where
1807   // they could be used. They are dangerous.
1808 
1809   // They only exist on LP64 so that int32_t and intptr_t are not the same
1810   // and we have ambiguous declarations.
1811 
1812   void movptr(Address dst, int32_t imm32);
1813   void movptr(Register dst, int32_t imm32);
1814 #endif // _LP64
1815 
1816   // to avoid hiding movl
1817   void mov32(AddressLiteral dst, Register src);
1818   void mov32(Register dst, AddressLiteral src);
1819 
1820   // to avoid hiding movb
1821   void movbyte(ArrayAddress dst, int src);
1822 
1823   // Import other mov() methods from the parent class or else
1824   // they will be hidden by the following overriding declaration.
1825   using Assembler::movdl;
1826   using Assembler::movq;
1827   void movdl(XMMRegister dst, AddressLiteral src);
1828   void movq(XMMRegister dst, AddressLiteral src);
1829 
1830   // Can push value or effective address
1831   void pushptr(AddressLiteral src);
1832 
1833   void pushptr(Address src) { LP64_ONLY(pushq(src)) NOT_LP64(pushl(src)); }
1834   void popptr(Address src) { LP64_ONLY(popq(src)) NOT_LP64(popl(src)); }
1835 
1836   void pushoop(jobject obj);
1837   void pushklass(Metadata* obj);
1838 
1839   // sign extend as need a l to ptr sized element
1840   void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
1841   void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
1842 
1843 
1844  public:
1845   // C2 compiled method's prolog code.
1846   void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b, bool is_stub);
1847 
1848   // clear memory of size 'cnt' qwords, starting at 'base';
1849   // if 'is_large' is set, do not try to produce short loop
1850   void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1851 
1852   // clear memory initialization sequence for constant size;
1853   void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1854 
1855   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1856   void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1857 
1858   // Fill primitive arrays
1859   void generate_fill(BasicType t, bool aligned,
1860                      Register to, Register value, Register count,
1861                      Register rtmp, XMMRegister xtmp);
1862 
1863   void encode_iso_array(Register src, Register dst, Register len,
1864                         XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1865                         XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1866 
1867 #ifdef _LP64
1868   void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1869   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1870                              Register y, Register y_idx, Register z,
1871                              Register carry, Register product,
1872                              Register idx, Register kdx);
1873   void multiply_add_128_x_128(Register x_xstart, Register y, Register z,
1874                               Register yz_idx, Register idx,
1875                               Register carry, Register product, int offset);
1876   void multiply_128_x_128_bmi2_loop(Register y, Register z,
1877                                     Register carry, Register carry2,
1878                                     Register idx, Register jdx,
1879                                     Register yz_idx1, Register yz_idx2,
1880                                     Register tmp, Register tmp3, Register tmp4);
1881   void multiply_128_x_128_loop(Register x_xstart, Register y, Register z,
1882                                Register yz_idx, Register idx, Register jdx,
1883                                Register carry, Register product,
1884                                Register carry2);
1885   void multiply_to_len(Register x, Register xlen, Register y, Register ylen, Register z, Register zlen,
1886                        Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5);
1887   void square_rshift(Register x, Register len, Register z, Register tmp1, Register tmp3,
1888                      Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
1889   void multiply_add_64_bmi2(Register sum, Register op1, Register op2, Register carry,
1890                             Register tmp2);
1891   void multiply_add_64(Register sum, Register op1, Register op2, Register carry,
1892                        Register rdxReg, Register raxReg);
1893   void add_one_64(Register z, Register zlen, Register carry, Register tmp1);
1894   void lshift_by_1(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
1895                        Register tmp3, Register tmp4);
1896   void square_to_len(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
1897                      Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
1898 
1899   void mul_add_128_x_32_loop(Register out, Register in, Register offset, Register len, Register tmp1,
1900                Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
1901                Register raxReg);
1902   void mul_add(Register out, Register in, Register offset, Register len, Register k, Register tmp1,
1903                Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
1904                Register raxReg);
1905   void vectorized_mismatch(Register obja, Register objb, Register length, Register log2_array_indxscale,
1906                            Register result, Register tmp1, Register tmp2,
1907                            XMMRegister vec1, XMMRegister vec2, XMMRegister vec3);
1908 #endif
1909 
1910   // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
1911   void update_byte_crc32(Register crc, Register val, Register table);
1912   void kernel_crc32(Register crc, Register buf, Register len, Register table, Register tmp);
1913 
1914 
1915 #ifdef _LP64
1916   void kernel_crc32_avx512(Register crc, Register buf, Register len, Register table, Register tmp1, Register tmp2);
1917   void kernel_crc32_avx512_256B(Register crc, Register buf, Register len, Register key, Register pos,
1918                                 Register tmp1, Register tmp2, Label& L_barrett, Label& L_16B_reduction_loop,
1919                                 Label& L_get_last_two_xmms, Label& L_128_done, Label& L_cleanup);
1920   void updateBytesAdler32(Register adler32, Register buf, Register length, XMMRegister shuf0, XMMRegister shuf1, ExternalAddress scale);
1921 #endif // _LP64
1922 
1923   // CRC32C code for java.util.zip.CRC32C::updateBytes() intrinsic
1924   // Note on a naming convention:
1925   // Prefix w = register only used on a Westmere+ architecture
1926   // Prefix n = register only used on a Nehalem architecture
1927 #ifdef _LP64
1928   void crc32c_ipl_alg4(Register in_out, uint32_t n,
1929                        Register tmp1, Register tmp2, Register tmp3);
1930 #else
1931   void crc32c_ipl_alg4(Register in_out, uint32_t n,
1932                        Register tmp1, Register tmp2, Register tmp3,
1933                        XMMRegister xtmp1, XMMRegister xtmp2);
1934 #endif
1935   void crc32c_pclmulqdq(XMMRegister w_xtmp1,
1936                         Register in_out,
1937                         uint32_t const_or_pre_comp_const_index, bool is_pclmulqdq_supported,
1938                         XMMRegister w_xtmp2,
1939                         Register tmp1,
1940                         Register n_tmp2, Register n_tmp3);
1941   void crc32c_rec_alt2(uint32_t const_or_pre_comp_const_index_u1, uint32_t const_or_pre_comp_const_index_u2, bool is_pclmulqdq_supported, Register in_out, Register in1, Register in2,
1942                        XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1943                        Register tmp1, Register tmp2,
1944                        Register n_tmp3);
1945   void crc32c_proc_chunk(uint32_t size, uint32_t const_or_pre_comp_const_index_u1, uint32_t const_or_pre_comp_const_index_u2, bool is_pclmulqdq_supported,
1946                          Register in_out1, Register in_out2, Register in_out3,
1947                          Register tmp1, Register tmp2, Register tmp3,
1948                          XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1949                          Register tmp4, Register tmp5,
1950                          Register n_tmp6);
1951   void crc32c_ipl_alg2_alt2(Register in_out, Register in1, Register in2,
1952                             Register tmp1, Register tmp2, Register tmp3,
1953                             Register tmp4, Register tmp5, Register tmp6,
1954                             XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1955                             bool is_pclmulqdq_supported);
1956   // Fold 128-bit data chunk
1957   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1958   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
1959 #ifdef _LP64
1960   // Fold 512-bit data chunk
1961   void fold512bit_crc32_avx512(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, Register pos, int offset);
1962 #endif // _LP64
1963   // Fold 8-bit data
1964   void fold_8bit_crc32(Register crc, Register table, Register tmp);
1965   void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
1966 
1967   // Compress char[] array to byte[].
1968   void char_array_compress(Register src, Register dst, Register len,
1969                            XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1970                            XMMRegister tmp4, Register tmp5, Register result,
1971                            KRegister mask1 = knoreg, KRegister mask2 = knoreg);
1972 
1973   // Inflate byte[] array to char[].
1974   void byte_array_inflate(Register src, Register dst, Register len,
1975                           XMMRegister tmp1, Register tmp2, KRegister mask = knoreg);
1976 
1977   void fill_masked(BasicType bt, Address dst, XMMRegister xmm, KRegister mask,
1978                    Register length, Register temp, int vec_enc);
1979 
1980   void fill64_masked(uint shift, Register dst, int disp,
1981                          XMMRegister xmm, KRegister mask, Register length,
1982                          Register temp, bool use64byteVector = false);
1983 
1984   void fill32_masked(uint shift, Register dst, int disp,
1985                          XMMRegister xmm, KRegister mask, Register length,
1986                          Register temp);
1987 
1988   void fill32(Register dst, int disp, XMMRegister xmm);
1989 
1990   void fill64(Register dst, int dis, XMMRegister xmm, bool use64byteVector = false);
1991 
1992 #ifdef _LP64
1993   void convert_f2i(Register dst, XMMRegister src);
1994   void convert_d2i(Register dst, XMMRegister src);
1995   void convert_f2l(Register dst, XMMRegister src);
1996   void convert_d2l(Register dst, XMMRegister src);
1997 
1998   void cache_wb(Address line);
1999   void cache_wbsync(bool is_pre);
2000 
2001 #if COMPILER2_OR_JVMCI
2002   void arraycopy_avx3_special_cases(XMMRegister xmm, KRegister mask, Register from,
2003                                     Register to, Register count, int shift,
2004                                     Register index, Register temp,
2005                                     bool use64byteVector, Label& L_entry, Label& L_exit);
2006 
2007   void arraycopy_avx3_special_cases_conjoint(XMMRegister xmm, KRegister mask, Register from,
2008                                              Register to, Register start_index, Register end_index,
2009                                              Register count, int shift, Register temp,
2010                                              bool use64byteVector, Label& L_entry, Label& L_exit);
2011 
2012   void copy64_masked_avx(Register dst, Register src, XMMRegister xmm,
2013                          KRegister mask, Register length, Register index,
2014                          Register temp, int shift = Address::times_1, int offset = 0,
2015                          bool use64byteVector = false);
2016 
2017   void copy32_masked_avx(Register dst, Register src, XMMRegister xmm,
2018                          KRegister mask, Register length, Register index,
2019                          Register temp, int shift = Address::times_1, int offset = 0);
2020 
2021   void copy32_avx(Register dst, Register src, Register index, XMMRegister xmm,
2022                   int shift = Address::times_1, int offset = 0);
2023 
2024   void copy64_avx(Register dst, Register src, Register index, XMMRegister xmm,
2025                   bool conjoint, int shift = Address::times_1, int offset = 0,
2026                   bool use64byteVector = false);
2027 
2028   void generate_fill_avx3(BasicType type, Register to, Register value,
2029                           Register count, Register rtmp, XMMRegister xtmp);
2030 
2031 #endif // COMPILER2_OR_JVMCI
2032 
2033 #endif // _LP64
2034 
2035   void vallones(XMMRegister dst, int vector_len);
2036 };
2037 
2038 /**
2039  * class SkipIfEqual:
2040  *
2041  * Instantiating this class will result in assembly code being output that will
2042  * jump around any code emitted between the creation of the instance and it's
2043  * automatic destruction at the end of a scope block, depending on the value of
2044  * the flag passed to the constructor, which will be checked at run-time.
2045  */
2046 class SkipIfEqual {
2047  private:
2048   MacroAssembler* _masm;
2049   Label _label;
2050 
2051  public:
2052    SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
2053    ~SkipIfEqual();
2054 };
2055 
2056 #endif // CPU_X86_MACROASSEMBLER_X86_HPP