1 /* 2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.hpp" 27 #include "asm/macroAssembler.inline.hpp" 28 #include "code/compiledIC.hpp" 29 #include "code/debugInfoRec.hpp" 30 #include "code/nativeInst.hpp" 31 #include "code/vtableStubs.hpp" 32 #include "compiler/oopMap.hpp" 33 #include "gc/shared/gcLocker.hpp" 34 #include "gc/shared/barrierSet.hpp" 35 #include "gc/shared/barrierSetAssembler.hpp" 36 #include "interpreter/interpreter.hpp" 37 #include "logging/log.hpp" 38 #include "memory/resourceArea.hpp" 39 #include "oops/klass.inline.hpp" 40 #include "prims/methodHandles.hpp" 41 #include "runtime/jniHandles.hpp" 42 #include "runtime/safepointMechanism.hpp" 43 #include "runtime/sharedRuntime.hpp" 44 #include "runtime/signature.hpp" 45 #include "runtime/stubRoutines.hpp" 46 #include "runtime/timerTrace.hpp" 47 #include "runtime/vframeArray.hpp" 48 #include "runtime/vm_version.hpp" 49 #include "utilities/align.hpp" 50 #include "vmreg_x86.inline.hpp" 51 #ifdef COMPILER1 52 #include "c1/c1_Runtime1.hpp" 53 #endif 54 #ifdef COMPILER2 55 #include "opto/runtime.hpp" 56 #endif 57 58 #define __ masm-> 59 60 #ifdef PRODUCT 61 #define BLOCK_COMMENT(str) /* nothing */ 62 #else 63 #define BLOCK_COMMENT(str) __ block_comment(str) 64 #endif // PRODUCT 65 66 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 67 68 class RegisterSaver { 69 // Capture info about frame layout 70 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off 71 enum layout { 72 fpu_state_off = 0, 73 fpu_state_end = fpu_state_off+FPUStateSizeInWords, 74 st0_off, st0H_off, 75 st1_off, st1H_off, 76 st2_off, st2H_off, 77 st3_off, st3H_off, 78 st4_off, st4H_off, 79 st5_off, st5H_off, 80 st6_off, st6H_off, 81 st7_off, st7H_off, 82 xmm_off, 83 DEF_XMM_OFFS(0), 84 DEF_XMM_OFFS(1), 85 DEF_XMM_OFFS(2), 86 DEF_XMM_OFFS(3), 87 DEF_XMM_OFFS(4), 88 DEF_XMM_OFFS(5), 89 DEF_XMM_OFFS(6), 90 DEF_XMM_OFFS(7), 91 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word 92 rdi_off, 93 rsi_off, 94 ignore_off, // extra copy of rbp, 95 rsp_off, 96 rbx_off, 97 rdx_off, 98 rcx_off, 99 rax_off, 100 // The frame sender code expects that rbp will be in the "natural" place and 101 // will override any oopMap setting for it. We must therefore force the layout 102 // so that it agrees with the frame sender code. 103 rbp_off, 104 return_off, // slot for return address 105 reg_save_size }; 106 enum { FPU_regs_live = flags_off - fpu_state_end }; 107 108 public: 109 110 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, 111 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); 112 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); 113 114 static int rax_offset() { return rax_off; } 115 static int rbx_offset() { return rbx_off; } 116 117 // Offsets into the register save area 118 // Used by deoptimization when it is managing result register 119 // values on its own 120 121 static int raxOffset(void) { return rax_off; } 122 static int rdxOffset(void) { return rdx_off; } 123 static int rbxOffset(void) { return rbx_off; } 124 static int xmm0Offset(void) { return xmm0_off; } 125 // This really returns a slot in the fp save area, which one is not important 126 static int fpResultOffset(void) { return st0_off; } 127 128 // During deoptimization only the result register need to be restored 129 // all the other values have already been extracted. 130 131 static void restore_result_registers(MacroAssembler* masm); 132 133 }; 134 135 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, 136 int* total_frame_words, bool verify_fpu, bool save_vectors) { 137 int num_xmm_regs = XMMRegister::number_of_registers; 138 int ymm_bytes = num_xmm_regs * 16; 139 int zmm_bytes = num_xmm_regs * 32; 140 #ifdef COMPILER2 141 int opmask_state_bytes = KRegister::number_of_registers * 8; 142 if (save_vectors) { 143 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX"); 144 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported"); 145 // Save upper half of YMM registers 146 int vect_bytes = ymm_bytes; 147 if (UseAVX > 2) { 148 // Save upper half of ZMM registers as well 149 vect_bytes += zmm_bytes; 150 additional_frame_words += opmask_state_bytes / wordSize; 151 } 152 additional_frame_words += vect_bytes / wordSize; 153 } 154 #else 155 assert(!save_vectors, "vectors are generated only by C2"); 156 #endif 157 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; 158 int frame_words = frame_size_in_bytes / wordSize; 159 *total_frame_words = frame_words; 160 161 assert(FPUStateSizeInWords == 27, "update stack layout"); 162 163 // save registers, fpu state, and flags 164 // We assume caller has already has return address slot on the stack 165 // We push epb twice in this sequence because we want the real rbp, 166 // to be under the return like a normal enter and we want to use pusha 167 // We push by hand instead of using push. 168 __ enter(); 169 __ pusha(); 170 __ pushf(); 171 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space 172 __ push_FPU_state(); // Save FPU state & init 173 174 if (verify_fpu) { 175 // Some stubs may have non standard FPU control word settings so 176 // only check and reset the value when it required to be the 177 // standard value. The safepoint blob in particular can be used 178 // in methods which are using the 24 bit control word for 179 // optimized float math. 180 181 #ifdef ASSERT 182 // Make sure the control word has the expected value 183 Label ok; 184 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std()); 185 __ jccb(Assembler::equal, ok); 186 __ stop("corrupted control word detected"); 187 __ bind(ok); 188 #endif 189 190 // Reset the control word to guard against exceptions being unmasked 191 // since fstp_d can cause FPU stack underflow exceptions. Write it 192 // into the on stack copy and then reload that to make sure that the 193 // current and future values are correct. 194 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std()); 195 } 196 197 __ frstor(Address(rsp, 0)); 198 if (!verify_fpu) { 199 // Set the control word so that exceptions are masked for the 200 // following code. 201 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std())); 202 } 203 204 int off = st0_off; 205 int delta = st1_off - off; 206 207 // Save the FPU registers in de-opt-able form 208 for (int n = 0; n < FloatRegister::number_of_registers; n++) { 209 __ fstp_d(Address(rsp, off*wordSize)); 210 off += delta; 211 } 212 213 off = xmm0_off; 214 delta = xmm1_off - off; 215 if(UseSSE == 1) { 216 // Save the XMM state 217 for (int n = 0; n < num_xmm_regs; n++) { 218 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n)); 219 off += delta; 220 } 221 } else if(UseSSE >= 2) { 222 // Save whole 128bit (16 bytes) XMM registers 223 for (int n = 0; n < num_xmm_regs; n++) { 224 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n)); 225 off += delta; 226 } 227 } 228 229 #ifdef COMPILER2 230 if (save_vectors) { 231 __ subptr(rsp, ymm_bytes); 232 // Save upper half of YMM registers 233 for (int n = 0; n < num_xmm_regs; n++) { 234 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n)); 235 } 236 if (UseAVX > 2) { 237 __ subptr(rsp, zmm_bytes); 238 // Save upper half of ZMM registers 239 for (int n = 0; n < num_xmm_regs; n++) { 240 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n)); 241 } 242 __ subptr(rsp, opmask_state_bytes); 243 // Save opmask registers 244 for (int n = 0; n < KRegister::number_of_registers; n++) { 245 __ kmov(Address(rsp, n*8), as_KRegister(n)); 246 } 247 } 248 } 249 #else 250 assert(!save_vectors, "vectors are generated only by C2"); 251 #endif 252 253 __ vzeroupper(); 254 255 // Set an oopmap for the call site. This oopmap will map all 256 // oop-registers and debug-info registers as callee-saved. This 257 // will allow deoptimization at this safepoint to find all possible 258 // debug-info recordings, as well as let GC find all oops. 259 260 OopMapSet *oop_maps = new OopMapSet(); 261 OopMap* map = new OopMap( frame_words, 0 ); 262 263 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) 264 #define NEXTREG(x) (x)->as_VMReg()->next() 265 266 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg()); 267 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg()); 268 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg()); 269 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg()); 270 // rbp, location is known implicitly, no oopMap 271 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg()); 272 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg()); 273 274 // %%% This is really a waste but we'll keep things as they were for now for the upper component 275 off = st0_off; 276 delta = st1_off - off; 277 for (int n = 0; n < FloatRegister::number_of_registers; n++) { 278 FloatRegister freg_name = as_FloatRegister(n); 279 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg()); 280 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name)); 281 off += delta; 282 } 283 off = xmm0_off; 284 delta = xmm1_off - off; 285 for (int n = 0; n < num_xmm_regs; n++) { 286 XMMRegister xmm_name = as_XMMRegister(n); 287 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()); 288 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name)); 289 off += delta; 290 } 291 #undef NEXTREG 292 #undef STACK_OFFSET 293 294 return map; 295 } 296 297 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { 298 int opmask_state_bytes = 0; 299 int additional_frame_bytes = 0; 300 int num_xmm_regs = XMMRegister::number_of_registers; 301 int ymm_bytes = num_xmm_regs * 16; 302 int zmm_bytes = num_xmm_regs * 32; 303 // Recover XMM & FPU state 304 #ifdef COMPILER2 305 if (restore_vectors) { 306 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX"); 307 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported"); 308 // Save upper half of YMM registers 309 additional_frame_bytes = ymm_bytes; 310 if (UseAVX > 2) { 311 // Save upper half of ZMM registers as well 312 additional_frame_bytes += zmm_bytes; 313 opmask_state_bytes = KRegister::number_of_registers * 8; 314 additional_frame_bytes += opmask_state_bytes; 315 } 316 } 317 #else 318 assert(!restore_vectors, "vectors are generated only by C2"); 319 #endif 320 321 int off = xmm0_off; 322 int delta = xmm1_off - off; 323 324 __ vzeroupper(); 325 326 if (UseSSE == 1) { 327 // Restore XMM registers 328 assert(additional_frame_bytes == 0, ""); 329 for (int n = 0; n < num_xmm_regs; n++) { 330 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize)); 331 off += delta; 332 } 333 } else if (UseSSE >= 2) { 334 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and 335 // ZMM because the movdqu instruction zeros the upper part of the XMM register. 336 for (int n = 0; n < num_xmm_regs; n++) { 337 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes)); 338 off += delta; 339 } 340 } 341 342 if (restore_vectors) { 343 off = additional_frame_bytes - ymm_bytes; 344 // Restore upper half of YMM registers. 345 for (int n = 0; n < num_xmm_regs; n++) { 346 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off)); 347 } 348 if (UseAVX > 2) { 349 // Restore upper half of ZMM registers. 350 off = opmask_state_bytes; 351 for (int n = 0; n < num_xmm_regs; n++) { 352 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off)); 353 } 354 for (int n = 0; n < KRegister::number_of_registers; n++) { 355 __ kmov(as_KRegister(n), Address(rsp, n*8)); 356 } 357 } 358 __ addptr(rsp, additional_frame_bytes); 359 } 360 361 __ pop_FPU_state(); 362 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers 363 364 __ popf(); 365 __ popa(); 366 // Get the rbp, described implicitly by the frame sender code (no oopMap) 367 __ pop(rbp); 368 } 369 370 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 371 372 // Just restore result register. Only used by deoptimization. By 373 // now any callee save register that needs to be restore to a c2 374 // caller of the deoptee has been extracted into the vframeArray 375 // and will be stuffed into the c2i adapter we create for later 376 // restoration so only result registers need to be restored here. 377 // 378 379 __ frstor(Address(rsp, 0)); // Restore fpu state 380 381 // Recover XMM & FPU state 382 if( UseSSE == 1 ) { 383 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); 384 } else if( UseSSE >= 2 ) { 385 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); 386 } 387 __ movptr(rax, Address(rsp, rax_off*wordSize)); 388 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); 389 // Pop all of the register save are off the stack except the return address 390 __ addptr(rsp, return_off * wordSize); 391 } 392 393 // Is vector's size (in bytes) bigger than a size saved by default? 394 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. 395 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. 396 bool SharedRuntime::is_wide_vector(int size) { 397 return size > 16; 398 } 399 400 // The java_calling_convention describes stack locations as ideal slots on 401 // a frame with no abi restrictions. Since we must observe abi restrictions 402 // (like the placement of the register window) the slots must be biased by 403 // the following value. 404 static int reg2offset_in(VMReg r) { 405 // Account for saved rbp, and return address 406 // This should really be in_preserve_stack_slots 407 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; 408 } 409 410 static int reg2offset_out(VMReg r) { 411 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 412 } 413 414 // --------------------------------------------------------------------------- 415 // Read the array of BasicTypes from a signature, and compute where the 416 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 417 // quantities. Values less than SharedInfo::stack0 are registers, those above 418 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 419 // as framesizes are fixed. 420 // VMRegImpl::stack0 refers to the first slot 0(sp). 421 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. 422 // Register up to Register::number_of_registers are the 32-bit 423 // integer registers. 424 425 // Pass first two oop/int args in registers ECX and EDX. 426 // Pass first two float/double args in registers XMM0 and XMM1. 427 // Doubles have precedence, so if you pass a mix of floats and doubles 428 // the doubles will grab the registers before the floats will. 429 430 // Note: the INPUTS in sig_bt are in units of Java argument words, which are 431 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 432 // units regardless of build. Of course for i486 there is no 64 bit build 433 434 435 // --------------------------------------------------------------------------- 436 // The compiled Java calling convention. 437 // Pass first two oop/int args in registers ECX and EDX. 438 // Pass first two float/double args in registers XMM0 and XMM1. 439 // Doubles have precedence, so if you pass a mix of floats and doubles 440 // the doubles will grab the registers before the floats will. 441 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 442 VMRegPair *regs, 443 int total_args_passed) { 444 uint stack = 0; // Starting stack position for args on stack 445 446 447 // Pass first two oop/int args in registers ECX and EDX. 448 uint reg_arg0 = 9999; 449 uint reg_arg1 = 9999; 450 451 // Pass first two float/double args in registers XMM0 and XMM1. 452 // Doubles have precedence, so if you pass a mix of floats and doubles 453 // the doubles will grab the registers before the floats will. 454 // CNC - TURNED OFF FOR non-SSE. 455 // On Intel we have to round all doubles (and most floats) at 456 // call sites by storing to the stack in any case. 457 // UseSSE=0 ==> Don't Use ==> 9999+0 458 // UseSSE=1 ==> Floats only ==> 9999+1 459 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 460 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; 461 uint fargs = (UseSSE>=2) ? 2 : UseSSE; 462 uint freg_arg0 = 9999+fargs; 463 uint freg_arg1 = 9999+fargs; 464 465 // Pass doubles & longs aligned on the stack. First count stack slots for doubles 466 int i; 467 for( i = 0; i < total_args_passed; i++) { 468 if( sig_bt[i] == T_DOUBLE ) { 469 // first 2 doubles go in registers 470 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; 471 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; 472 else // Else double is passed low on the stack to be aligned. 473 stack += 2; 474 } else if( sig_bt[i] == T_LONG ) { 475 stack += 2; 476 } 477 } 478 int dstack = 0; // Separate counter for placing doubles 479 480 // Now pick where all else goes. 481 for( i = 0; i < total_args_passed; i++) { 482 // From the type and the argument number (count) compute the location 483 switch( sig_bt[i] ) { 484 case T_SHORT: 485 case T_CHAR: 486 case T_BYTE: 487 case T_BOOLEAN: 488 case T_INT: 489 case T_ARRAY: 490 case T_OBJECT: 491 case T_ADDRESS: 492 if( reg_arg0 == 9999 ) { 493 reg_arg0 = i; 494 regs[i].set1(rcx->as_VMReg()); 495 } else if( reg_arg1 == 9999 ) { 496 reg_arg1 = i; 497 regs[i].set1(rdx->as_VMReg()); 498 } else { 499 regs[i].set1(VMRegImpl::stack2reg(stack++)); 500 } 501 break; 502 case T_FLOAT: 503 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { 504 freg_arg0 = i; 505 regs[i].set1(xmm0->as_VMReg()); 506 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { 507 freg_arg1 = i; 508 regs[i].set1(xmm1->as_VMReg()); 509 } else { 510 regs[i].set1(VMRegImpl::stack2reg(stack++)); 511 } 512 break; 513 case T_LONG: 514 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 515 regs[i].set2(VMRegImpl::stack2reg(dstack)); 516 dstack += 2; 517 break; 518 case T_DOUBLE: 519 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 520 if( freg_arg0 == (uint)i ) { 521 regs[i].set2(xmm0->as_VMReg()); 522 } else if( freg_arg1 == (uint)i ) { 523 regs[i].set2(xmm1->as_VMReg()); 524 } else { 525 regs[i].set2(VMRegImpl::stack2reg(dstack)); 526 dstack += 2; 527 } 528 break; 529 case T_VOID: regs[i].set_bad(); break; 530 break; 531 default: 532 ShouldNotReachHere(); 533 break; 534 } 535 } 536 537 return stack; 538 } 539 540 // Patch the callers callsite with entry to compiled code if it exists. 541 static void patch_callers_callsite(MacroAssembler *masm) { 542 Label L; 543 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD); 544 __ jcc(Assembler::equal, L); 545 // Schedule the branch target address early. 546 // Call into the VM to patch the caller, then jump to compiled callee 547 // rax, isn't live so capture return address while we easily can 548 __ movptr(rax, Address(rsp, 0)); 549 __ pusha(); 550 __ pushf(); 551 552 if (UseSSE == 1) { 553 __ subptr(rsp, 2*wordSize); 554 __ movflt(Address(rsp, 0), xmm0); 555 __ movflt(Address(rsp, wordSize), xmm1); 556 } 557 if (UseSSE >= 2) { 558 __ subptr(rsp, 4*wordSize); 559 __ movdbl(Address(rsp, 0), xmm0); 560 __ movdbl(Address(rsp, 2*wordSize), xmm1); 561 } 562 #ifdef COMPILER2 563 // C2 may leave the stack dirty if not in SSE2+ mode 564 if (UseSSE >= 2) { 565 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 566 } else { 567 __ empty_FPU_stack(); 568 } 569 #endif /* COMPILER2 */ 570 571 // VM needs caller's callsite 572 __ push(rax); 573 // VM needs target method 574 __ push(rbx); 575 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 576 __ addptr(rsp, 2*wordSize); 577 578 if (UseSSE == 1) { 579 __ movflt(xmm0, Address(rsp, 0)); 580 __ movflt(xmm1, Address(rsp, wordSize)); 581 __ addptr(rsp, 2*wordSize); 582 } 583 if (UseSSE >= 2) { 584 __ movdbl(xmm0, Address(rsp, 0)); 585 __ movdbl(xmm1, Address(rsp, 2*wordSize)); 586 __ addptr(rsp, 4*wordSize); 587 } 588 589 __ popf(); 590 __ popa(); 591 __ bind(L); 592 } 593 594 595 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { 596 int next_off = st_off - Interpreter::stackElementSize; 597 __ movdbl(Address(rsp, next_off), r); 598 } 599 600 static void gen_c2i_adapter(MacroAssembler *masm, 601 int total_args_passed, 602 int comp_args_on_stack, 603 const BasicType *sig_bt, 604 const VMRegPair *regs, 605 Label& skip_fixup) { 606 // Before we get into the guts of the C2I adapter, see if we should be here 607 // at all. We've come from compiled code and are attempting to jump to the 608 // interpreter, which means the caller made a static call to get here 609 // (vcalls always get a compiled target if there is one). Check for a 610 // compiled target. If there is one, we need to patch the caller's call. 611 patch_callers_callsite(masm); 612 613 __ bind(skip_fixup); 614 615 #ifdef COMPILER2 616 // C2 may leave the stack dirty if not in SSE2+ mode 617 if (UseSSE >= 2) { 618 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 619 } else { 620 __ empty_FPU_stack(); 621 } 622 #endif /* COMPILER2 */ 623 624 // Since all args are passed on the stack, total_args_passed * interpreter_ 625 // stack_element_size is the 626 // space we need. 627 int extraspace = total_args_passed * Interpreter::stackElementSize; 628 629 // Get return address 630 __ pop(rax); 631 632 // set senderSP value 633 __ movptr(rsi, rsp); 634 635 __ subptr(rsp, extraspace); 636 637 // Now write the args into the outgoing interpreter space 638 for (int i = 0; i < total_args_passed; i++) { 639 if (sig_bt[i] == T_VOID) { 640 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 641 continue; 642 } 643 644 // st_off points to lowest address on stack. 645 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; 646 int next_off = st_off - Interpreter::stackElementSize; 647 648 // Say 4 args: 649 // i st_off 650 // 0 12 T_LONG 651 // 1 8 T_VOID 652 // 2 4 T_OBJECT 653 // 3 0 T_BOOL 654 VMReg r_1 = regs[i].first(); 655 VMReg r_2 = regs[i].second(); 656 if (!r_1->is_valid()) { 657 assert(!r_2->is_valid(), ""); 658 continue; 659 } 660 661 if (r_1->is_stack()) { 662 // memory to memory use fpu stack top 663 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 664 665 if (!r_2->is_valid()) { 666 __ movl(rdi, Address(rsp, ld_off)); 667 __ movptr(Address(rsp, st_off), rdi); 668 } else { 669 670 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW 671 // st_off == MSW, st_off-wordSize == LSW 672 673 __ movptr(rdi, Address(rsp, ld_off)); 674 __ movptr(Address(rsp, next_off), rdi); 675 __ movptr(rdi, Address(rsp, ld_off + wordSize)); 676 __ movptr(Address(rsp, st_off), rdi); 677 } 678 } else if (r_1->is_Register()) { 679 Register r = r_1->as_Register(); 680 if (!r_2->is_valid()) { 681 __ movl(Address(rsp, st_off), r); 682 } else { 683 // long/double in gpr 684 ShouldNotReachHere(); 685 } 686 } else { 687 assert(r_1->is_XMMRegister(), ""); 688 if (!r_2->is_valid()) { 689 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); 690 } else { 691 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); 692 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); 693 } 694 } 695 } 696 697 // Schedule the branch target address early. 698 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); 699 // And repush original return address 700 __ push(rax); 701 __ jmp(rcx); 702 } 703 704 705 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { 706 int next_val_off = ld_off - Interpreter::stackElementSize; 707 __ movdbl(r, Address(saved_sp, next_val_off)); 708 } 709 710 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, 711 address code_start, address code_end, 712 Label& L_ok) { 713 Label L_fail; 714 __ lea(temp_reg, AddressLiteral(code_start, relocInfo::none)); 715 __ cmpptr(pc_reg, temp_reg); 716 __ jcc(Assembler::belowEqual, L_fail); 717 __ lea(temp_reg, AddressLiteral(code_end, relocInfo::none)); 718 __ cmpptr(pc_reg, temp_reg); 719 __ jcc(Assembler::below, L_ok); 720 __ bind(L_fail); 721 } 722 723 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 724 int total_args_passed, 725 int comp_args_on_stack, 726 const BasicType *sig_bt, 727 const VMRegPair *regs) { 728 // Note: rsi contains the senderSP on entry. We must preserve it since 729 // we may do a i2c -> c2i transition if we lose a race where compiled 730 // code goes non-entrant while we get args ready. 731 732 // Adapters can be frameless because they do not require the caller 733 // to perform additional cleanup work, such as correcting the stack pointer. 734 // An i2c adapter is frameless because the *caller* frame, which is interpreted, 735 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), 736 // even if a callee has modified the stack pointer. 737 // A c2i adapter is frameless because the *callee* frame, which is interpreted, 738 // routinely repairs its caller's stack pointer (from sender_sp, which is set 739 // up via the senderSP register). 740 // In other words, if *either* the caller or callee is interpreted, we can 741 // get the stack pointer repaired after a call. 742 // This is why c2i and i2c adapters cannot be indefinitely composed. 743 // In particular, if a c2i adapter were to somehow call an i2c adapter, 744 // both caller and callee would be compiled methods, and neither would 745 // clean up the stack pointer changes performed by the two adapters. 746 // If this happens, control eventually transfers back to the compiled 747 // caller, but with an uncorrected stack, causing delayed havoc. 748 749 // Pick up the return address 750 __ movptr(rax, Address(rsp, 0)); 751 752 if (VerifyAdapterCalls && 753 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) { 754 // So, let's test for cascading c2i/i2c adapters right now. 755 // assert(Interpreter::contains($return_addr) || 756 // StubRoutines::contains($return_addr), 757 // "i2c adapter must return to an interpreter frame"); 758 __ block_comment("verify_i2c { "); 759 Label L_ok; 760 if (Interpreter::code() != nullptr) { 761 range_check(masm, rax, rdi, 762 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 763 L_ok); 764 } 765 if (StubRoutines::initial_stubs_code() != nullptr) { 766 range_check(masm, rax, rdi, 767 StubRoutines::initial_stubs_code()->code_begin(), 768 StubRoutines::initial_stubs_code()->code_end(), 769 L_ok); 770 } 771 if (StubRoutines::final_stubs_code() != nullptr) { 772 range_check(masm, rax, rdi, 773 StubRoutines::final_stubs_code()->code_begin(), 774 StubRoutines::final_stubs_code()->code_end(), 775 L_ok); 776 } 777 const char* msg = "i2c adapter must return to an interpreter frame"; 778 __ block_comment(msg); 779 __ stop(msg); 780 __ bind(L_ok); 781 __ block_comment("} verify_i2ce "); 782 } 783 784 // Must preserve original SP for loading incoming arguments because 785 // we need to align the outgoing SP for compiled code. 786 __ movptr(rdi, rsp); 787 788 // Cut-out for having no stack args. Since up to 2 int/oop args are passed 789 // in registers, we will occasionally have no stack args. 790 int comp_words_on_stack = 0; 791 if (comp_args_on_stack) { 792 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in 793 // registers are below. By subtracting stack0, we either get a negative 794 // number (all values in registers) or the maximum stack slot accessed. 795 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); 796 // Convert 4-byte stack slots to words. 797 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; 798 // Round up to miminum stack alignment, in wordSize 799 comp_words_on_stack = align_up(comp_words_on_stack, 2); 800 __ subptr(rsp, comp_words_on_stack * wordSize); 801 } 802 803 // Align the outgoing SP 804 __ andptr(rsp, -(StackAlignmentInBytes)); 805 806 // push the return address on the stack (note that pushing, rather 807 // than storing it, yields the correct frame alignment for the callee) 808 __ push(rax); 809 810 // Put saved SP in another register 811 const Register saved_sp = rax; 812 __ movptr(saved_sp, rdi); 813 814 815 // Will jump to the compiled code just as if compiled code was doing it. 816 // Pre-load the register-jump target early, to schedule it better. 817 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); 818 819 // Now generate the shuffle code. Pick up all register args and move the 820 // rest through the floating point stack top. 821 for (int i = 0; i < total_args_passed; i++) { 822 if (sig_bt[i] == T_VOID) { 823 // Longs and doubles are passed in native word order, but misaligned 824 // in the 32-bit build. 825 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 826 continue; 827 } 828 829 // Pick up 0, 1 or 2 words from SP+offset. 830 831 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 832 "scrambled load targets?"); 833 // Load in argument order going down. 834 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; 835 // Point to interpreter value (vs. tag) 836 int next_off = ld_off - Interpreter::stackElementSize; 837 // 838 // 839 // 840 VMReg r_1 = regs[i].first(); 841 VMReg r_2 = regs[i].second(); 842 if (!r_1->is_valid()) { 843 assert(!r_2->is_valid(), ""); 844 continue; 845 } 846 if (r_1->is_stack()) { 847 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 848 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; 849 850 // We can use rsi as a temp here because compiled code doesn't need rsi as an input 851 // and if we end up going thru a c2i because of a miss a reasonable value of rsi 852 // we be generated. 853 if (!r_2->is_valid()) { 854 // __ fld_s(Address(saved_sp, ld_off)); 855 // __ fstp_s(Address(rsp, st_off)); 856 __ movl(rsi, Address(saved_sp, ld_off)); 857 __ movptr(Address(rsp, st_off), rsi); 858 } else { 859 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 860 // are accessed as negative so LSW is at LOW address 861 862 // ld_off is MSW so get LSW 863 // st_off is LSW (i.e. reg.first()) 864 // __ fld_d(Address(saved_sp, next_off)); 865 // __ fstp_d(Address(rsp, st_off)); 866 // 867 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 868 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 869 // So we must adjust where to pick up the data to match the interpreter. 870 // 871 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 872 // are accessed as negative so LSW is at LOW address 873 874 // ld_off is MSW so get LSW 875 __ movptr(rsi, Address(saved_sp, next_off)); 876 __ movptr(Address(rsp, st_off), rsi); 877 __ movptr(rsi, Address(saved_sp, ld_off)); 878 __ movptr(Address(rsp, st_off + wordSize), rsi); 879 } 880 } else if (r_1->is_Register()) { // Register argument 881 Register r = r_1->as_Register(); 882 assert(r != rax, "must be different"); 883 if (r_2->is_valid()) { 884 // 885 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 886 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 887 // So we must adjust where to pick up the data to match the interpreter. 888 889 // this can be a misaligned move 890 __ movptr(r, Address(saved_sp, next_off)); 891 assert(r_2->as_Register() != rax, "need another temporary register"); 892 // Remember r_1 is low address (and LSB on x86) 893 // So r_2 gets loaded from high address regardless of the platform 894 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); 895 } else { 896 __ movl(r, Address(saved_sp, ld_off)); 897 } 898 } else { 899 assert(r_1->is_XMMRegister(), ""); 900 if (!r_2->is_valid()) { 901 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); 902 } else { 903 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); 904 } 905 } 906 } 907 908 // 6243940 We might end up in handle_wrong_method if 909 // the callee is deoptimized as we race thru here. If that 910 // happens we don't want to take a safepoint because the 911 // caller frame will look interpreted and arguments are now 912 // "compiled" so it is much better to make this transition 913 // invisible to the stack walking code. Unfortunately if 914 // we try and find the callee by normal means a safepoint 915 // is possible. So we stash the desired callee in the thread 916 // and the vm will find there should this case occur. 917 918 __ get_thread(rax); 919 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); 920 921 // move Method* to rax, in case we end up in an c2i adapter. 922 // the c2i adapters expect Method* in rax, (c2) because c2's 923 // resolve stubs return the result (the method) in rax,. 924 // I'd love to fix this. 925 __ mov(rax, rbx); 926 927 __ jmp(rdi); 928 } 929 930 // --------------------------------------------------------------- 931 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 932 int total_args_passed, 933 int comp_args_on_stack, 934 const BasicType *sig_bt, 935 const VMRegPair *regs, 936 AdapterFingerPrint* fingerprint) { 937 address i2c_entry = __ pc(); 938 939 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 940 941 // ------------------------------------------------------------------------- 942 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls 943 // to the interpreter. The args start out packed in the compiled layout. They 944 // need to be unpacked into the interpreter layout. This will almost always 945 // require some stack space. We grow the current (compiled) stack, then repack 946 // the args. We finally end in a jump to the generic interpreter entry point. 947 // On exit from the interpreter, the interpreter will restore our SP (lest the 948 // compiled code, which relies solely on SP and not EBP, get sick). 949 950 address c2i_unverified_entry = __ pc(); 951 Label skip_fixup; 952 953 Register data = rax; 954 Register receiver = rcx; 955 Register temp = rbx; 956 957 { 958 __ ic_check(1 /* end_alignment */); 959 __ movptr(rbx, Address(data, CompiledICData::speculated_method_offset())); 960 // Method might have been compiled since the call site was patched to 961 // interpreted if that is the case treat it as a miss so we can get 962 // the call site corrected. 963 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD); 964 __ jcc(Assembler::equal, skip_fixup); 965 } 966 967 address c2i_entry = __ pc(); 968 969 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 970 bs->c2i_entry_barrier(masm); 971 972 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 973 974 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 975 } 976 977 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 978 VMRegPair *regs, 979 int total_args_passed) { 980 981 // We return the amount of VMRegImpl stack slots we need to reserve for all 982 // the arguments NOT counting out_preserve_stack_slots. 983 984 uint stack = 0; // All arguments on stack 985 986 for( int i = 0; i < total_args_passed; i++) { 987 // From the type and the argument number (count) compute the location 988 switch( sig_bt[i] ) { 989 case T_BOOLEAN: 990 case T_CHAR: 991 case T_FLOAT: 992 case T_BYTE: 993 case T_SHORT: 994 case T_INT: 995 case T_OBJECT: 996 case T_ARRAY: 997 case T_ADDRESS: 998 case T_METADATA: 999 regs[i].set1(VMRegImpl::stack2reg(stack++)); 1000 break; 1001 case T_LONG: 1002 case T_DOUBLE: // The stack numbering is reversed from Java 1003 // Since C arguments do not get reversed, the ordering for 1004 // doubles on the stack must be opposite the Java convention 1005 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 1006 regs[i].set2(VMRegImpl::stack2reg(stack)); 1007 stack += 2; 1008 break; 1009 case T_VOID: regs[i].set_bad(); break; 1010 default: 1011 ShouldNotReachHere(); 1012 break; 1013 } 1014 } 1015 return stack; 1016 } 1017 1018 int SharedRuntime::vector_calling_convention(VMRegPair *regs, 1019 uint num_bits, 1020 uint total_args_passed) { 1021 Unimplemented(); 1022 return 0; 1023 } 1024 1025 // A simple move of integer like type 1026 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1027 if (src.first()->is_stack()) { 1028 if (dst.first()->is_stack()) { 1029 // stack to stack 1030 // __ ld(FP, reg2offset(src.first()), L5); 1031 // __ st(L5, SP, reg2offset(dst.first())); 1032 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); 1033 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1034 } else { 1035 // stack to reg 1036 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); 1037 } 1038 } else if (dst.first()->is_stack()) { 1039 // reg to stack 1040 // no need to sign extend on 64bit 1041 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); 1042 } else { 1043 if (dst.first() != src.first()) { 1044 __ mov(dst.first()->as_Register(), src.first()->as_Register()); 1045 } 1046 } 1047 } 1048 1049 // An oop arg. Must pass a handle not the oop itself 1050 static void object_move(MacroAssembler* masm, 1051 OopMap* map, 1052 int oop_handle_offset, 1053 int framesize_in_slots, 1054 VMRegPair src, 1055 VMRegPair dst, 1056 bool is_receiver, 1057 int* receiver_offset) { 1058 1059 // Because of the calling conventions we know that src can be a 1060 // register or a stack location. dst can only be a stack location. 1061 1062 assert(dst.first()->is_stack(), "must be stack"); 1063 // must pass a handle. First figure out the location we use as a handle 1064 1065 if (src.first()->is_stack()) { 1066 // Oop is already on the stack as an argument 1067 Register rHandle = rax; 1068 Label nil; 1069 __ xorptr(rHandle, rHandle); 1070 __ cmpptr(Address(rbp, reg2offset_in(src.first())), NULL_WORD); 1071 __ jcc(Assembler::equal, nil); 1072 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); 1073 __ bind(nil); 1074 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1075 1076 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1077 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); 1078 if (is_receiver) { 1079 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; 1080 } 1081 } else { 1082 // Oop is in a register we must store it to the space we reserve 1083 // on the stack for oop_handles 1084 const Register rOop = src.first()->as_Register(); 1085 const Register rHandle = rax; 1086 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; 1087 int offset = oop_slot*VMRegImpl::stack_slot_size; 1088 Label skip; 1089 __ movptr(Address(rsp, offset), rOop); 1090 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 1091 __ xorptr(rHandle, rHandle); 1092 __ cmpptr(rOop, NULL_WORD); 1093 __ jcc(Assembler::equal, skip); 1094 __ lea(rHandle, Address(rsp, offset)); 1095 __ bind(skip); 1096 // Store the handle parameter 1097 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1098 if (is_receiver) { 1099 *receiver_offset = offset; 1100 } 1101 } 1102 } 1103 1104 // A float arg may have to do float reg int reg conversion 1105 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1106 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); 1107 1108 // Because of the calling convention we know that src is either a stack location 1109 // or an xmm register. dst can only be a stack location. 1110 1111 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); 1112 1113 if (src.first()->is_stack()) { 1114 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); 1115 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1116 } else { 1117 // reg to stack 1118 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1119 } 1120 } 1121 1122 // A long move 1123 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1124 1125 // The only legal possibility for a long_move VMRegPair is: 1126 // 1: two stack slots (possibly unaligned) 1127 // as neither the java or C calling convention will use registers 1128 // for longs. 1129 1130 if (src.first()->is_stack() && dst.first()->is_stack()) { 1131 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); 1132 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); 1133 __ movptr(rbx, Address(rbp, reg2offset_in(src.second()))); 1134 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1135 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx); 1136 } else { 1137 ShouldNotReachHere(); 1138 } 1139 } 1140 1141 // A double move 1142 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1143 1144 // The only legal possibilities for a double_move VMRegPair are: 1145 // The painful thing here is that like long_move a VMRegPair might be 1146 1147 // Because of the calling convention we know that src is either 1148 // 1: a single physical register (xmm registers only) 1149 // 2: two stack slots (possibly unaligned) 1150 // dst can only be a pair of stack slots. 1151 1152 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); 1153 1154 if (src.first()->is_stack()) { 1155 // source is all stack 1156 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); 1157 __ movptr(rbx, Address(rbp, reg2offset_in(src.second()))); 1158 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1159 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx); 1160 } else { 1161 // reg to stack 1162 // No worries about stack alignment 1163 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1164 } 1165 } 1166 1167 1168 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1169 // We always ignore the frame_slots arg and just use the space just below frame pointer 1170 // which by this time is free to use 1171 switch (ret_type) { 1172 case T_FLOAT: 1173 __ fstp_s(Address(rbp, -wordSize)); 1174 break; 1175 case T_DOUBLE: 1176 __ fstp_d(Address(rbp, -2*wordSize)); 1177 break; 1178 case T_VOID: break; 1179 case T_LONG: 1180 __ movptr(Address(rbp, -wordSize), rax); 1181 __ movptr(Address(rbp, -2*wordSize), rdx); 1182 break; 1183 default: { 1184 __ movptr(Address(rbp, -wordSize), rax); 1185 } 1186 } 1187 } 1188 1189 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1190 // We always ignore the frame_slots arg and just use the space just below frame pointer 1191 // which by this time is free to use 1192 switch (ret_type) { 1193 case T_FLOAT: 1194 __ fld_s(Address(rbp, -wordSize)); 1195 break; 1196 case T_DOUBLE: 1197 __ fld_d(Address(rbp, -2*wordSize)); 1198 break; 1199 case T_LONG: 1200 __ movptr(rax, Address(rbp, -wordSize)); 1201 __ movptr(rdx, Address(rbp, -2*wordSize)); 1202 break; 1203 case T_VOID: break; 1204 default: { 1205 __ movptr(rax, Address(rbp, -wordSize)); 1206 } 1207 } 1208 } 1209 1210 static void verify_oop_args(MacroAssembler* masm, 1211 const methodHandle& method, 1212 const BasicType* sig_bt, 1213 const VMRegPair* regs) { 1214 Register temp_reg = rbx; // not part of any compiled calling seq 1215 if (VerifyOops) { 1216 for (int i = 0; i < method->size_of_parameters(); i++) { 1217 if (is_reference_type(sig_bt[i])) { 1218 VMReg r = regs[i].first(); 1219 assert(r->is_valid(), "bad oop arg"); 1220 if (r->is_stack()) { 1221 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1222 __ verify_oop(temp_reg); 1223 } else { 1224 __ verify_oop(r->as_Register()); 1225 } 1226 } 1227 } 1228 } 1229 } 1230 1231 static void gen_special_dispatch(MacroAssembler* masm, 1232 const methodHandle& method, 1233 const BasicType* sig_bt, 1234 const VMRegPair* regs) { 1235 verify_oop_args(masm, method, sig_bt, regs); 1236 vmIntrinsics::ID iid = method->intrinsic_id(); 1237 1238 // Now write the args into the outgoing interpreter space 1239 bool has_receiver = false; 1240 Register receiver_reg = noreg; 1241 int member_arg_pos = -1; 1242 Register member_reg = noreg; 1243 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1244 if (ref_kind != 0) { 1245 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1246 member_reg = rbx; // known to be free at this point 1247 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1248 } else if (iid == vmIntrinsics::_invokeBasic) { 1249 has_receiver = true; 1250 } else { 1251 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid)); 1252 } 1253 1254 if (member_reg != noreg) { 1255 // Load the member_arg into register, if necessary. 1256 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1257 VMReg r = regs[member_arg_pos].first(); 1258 if (r->is_stack()) { 1259 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1260 } else { 1261 // no data motion is needed 1262 member_reg = r->as_Register(); 1263 } 1264 } 1265 1266 if (has_receiver) { 1267 // Make sure the receiver is loaded into a register. 1268 assert(method->size_of_parameters() > 0, "oob"); 1269 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1270 VMReg r = regs[0].first(); 1271 assert(r->is_valid(), "bad receiver arg"); 1272 if (r->is_stack()) { 1273 // Porting note: This assumes that compiled calling conventions always 1274 // pass the receiver oop in a register. If this is not true on some 1275 // platform, pick a temp and load the receiver from stack. 1276 fatal("receiver always in a register"); 1277 receiver_reg = rcx; // known to be free at this point 1278 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1279 } else { 1280 // no data motion is needed 1281 receiver_reg = r->as_Register(); 1282 } 1283 } 1284 1285 // Figure out which address we are really jumping to: 1286 MethodHandles::generate_method_handle_dispatch(masm, iid, 1287 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1288 } 1289 1290 // --------------------------------------------------------------------------- 1291 // Generate a native wrapper for a given method. The method takes arguments 1292 // in the Java compiled code convention, marshals them to the native 1293 // convention (handlizes oops, etc), transitions to native, makes the call, 1294 // returns to java state (possibly blocking), unhandlizes any result and 1295 // returns. 1296 // 1297 // Critical native functions are a shorthand for the use of 1298 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1299 // functions. The wrapper is expected to unpack the arguments before 1300 // passing them to the callee. Critical native functions leave the state _in_Java, 1301 // since they cannot stop for GC. 1302 // Some other parts of JNI setup are skipped like the tear down of the JNI handle 1303 // block and the check for pending exceptions it's impossible for them 1304 // to be thrown. 1305 // 1306 // 1307 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1308 const methodHandle& method, 1309 int compile_id, 1310 BasicType* in_sig_bt, 1311 VMRegPair* in_regs, 1312 BasicType ret_type) { 1313 if (method->is_method_handle_intrinsic()) { 1314 vmIntrinsics::ID iid = method->intrinsic_id(); 1315 intptr_t start = (intptr_t)__ pc(); 1316 int vep_offset = ((intptr_t)__ pc()) - start; 1317 gen_special_dispatch(masm, 1318 method, 1319 in_sig_bt, 1320 in_regs); 1321 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1322 __ flush(); 1323 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1324 return nmethod::new_native_nmethod(method, 1325 compile_id, 1326 masm->code(), 1327 vep_offset, 1328 frame_complete, 1329 stack_slots / VMRegImpl::slots_per_word, 1330 in_ByteSize(-1), 1331 in_ByteSize(-1), 1332 (OopMapSet*)nullptr); 1333 } 1334 address native_func = method->native_function(); 1335 assert(native_func != nullptr, "must have function"); 1336 1337 // An OopMap for lock (and class if static) 1338 OopMapSet *oop_maps = new OopMapSet(); 1339 1340 // We have received a description of where all the java arg are located 1341 // on entry to the wrapper. We need to convert these args to where 1342 // the jni function will expect them. To figure out where they go 1343 // we convert the java signature to a C signature by inserting 1344 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1345 1346 const int total_in_args = method->size_of_parameters(); 1347 int total_c_args = total_in_args + (method->is_static() ? 2 : 1); 1348 1349 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1350 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1351 BasicType* in_elem_bt = nullptr; 1352 1353 int argc = 0; 1354 out_sig_bt[argc++] = T_ADDRESS; 1355 if (method->is_static()) { 1356 out_sig_bt[argc++] = T_OBJECT; 1357 } 1358 1359 for (int i = 0; i < total_in_args ; i++ ) { 1360 out_sig_bt[argc++] = in_sig_bt[i]; 1361 } 1362 1363 // Now figure out where the args must be stored and how much stack space 1364 // they require. 1365 int out_arg_slots; 1366 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); 1367 1368 // Compute framesize for the wrapper. We need to handlize all oops in 1369 // registers a max of 2 on x86. 1370 1371 // Calculate the total number of stack slots we will need. 1372 1373 // First count the abi requirement plus all of the outgoing args 1374 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1375 1376 // Now the space for the inbound oop handle area 1377 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers 1378 1379 int oop_handle_offset = stack_slots; 1380 stack_slots += total_save_slots; 1381 1382 // Now any space we need for handlizing a klass if static method 1383 1384 int klass_slot_offset = 0; 1385 int klass_offset = -1; 1386 int lock_slot_offset = 0; 1387 bool is_static = false; 1388 1389 if (method->is_static()) { 1390 klass_slot_offset = stack_slots; 1391 stack_slots += VMRegImpl::slots_per_word; 1392 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1393 is_static = true; 1394 } 1395 1396 // Plus a lock if needed 1397 1398 if (method->is_synchronized()) { 1399 lock_slot_offset = stack_slots; 1400 stack_slots += VMRegImpl::slots_per_word; 1401 } 1402 1403 // Now a place (+2) to save return values or temp during shuffling 1404 // + 2 for return address (which we own) and saved rbp, 1405 stack_slots += 4; 1406 1407 // Ok The space we have allocated will look like: 1408 // 1409 // 1410 // FP-> | | 1411 // |---------------------| 1412 // | 2 slots for moves | 1413 // |---------------------| 1414 // | lock box (if sync) | 1415 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) 1416 // | klass (if static) | 1417 // |---------------------| <- klass_slot_offset 1418 // | oopHandle area | 1419 // |---------------------| <- oop_handle_offset (a max of 2 registers) 1420 // | outbound memory | 1421 // | based arguments | 1422 // | | 1423 // |---------------------| 1424 // | | 1425 // SP-> | out_preserved_slots | 1426 // 1427 // 1428 // **************************************************************************** 1429 // WARNING - on Windows Java Natives use pascal calling convention and pop the 1430 // arguments off of the stack after the jni call. Before the call we can use 1431 // instructions that are SP relative. After the jni call we switch to FP 1432 // relative instructions instead of re-adjusting the stack on windows. 1433 // **************************************************************************** 1434 1435 1436 // Now compute actual number of stack words we need rounding to make 1437 // stack properly aligned. 1438 stack_slots = align_up(stack_slots, StackAlignmentInSlots); 1439 1440 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1441 1442 intptr_t start = (intptr_t)__ pc(); 1443 1444 // First thing make an ic check to see if we should even be here 1445 1446 // We are free to use all registers as temps without saving them and 1447 // restoring them except rbp. rbp is the only callee save register 1448 // as far as the interpreter and the compiler(s) are concerned. 1449 1450 1451 const Register receiver = rcx; 1452 Label exception_pending; 1453 1454 __ verify_oop(receiver); 1455 // verified entry must be aligned for code patching. 1456 __ ic_check(8 /* end_alignment */); 1457 1458 int vep_offset = ((intptr_t)__ pc()) - start; 1459 1460 #ifdef COMPILER1 1461 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available. 1462 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) { 1463 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/); 1464 } 1465 #endif // COMPILER1 1466 1467 // The instruction at the verified entry point must be 5 bytes or longer 1468 // because it can be patched on the fly by make_non_entrant. The stack bang 1469 // instruction fits that requirement. 1470 1471 // Generate stack overflow check 1472 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size()); 1473 1474 // Generate a new frame for the wrapper. 1475 __ enter(); 1476 // -2 because return address is already present and so is saved rbp 1477 __ subptr(rsp, stack_size - 2*wordSize); 1478 1479 1480 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 1481 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */); 1482 1483 // Frame is now completed as far as size and linkage. 1484 int frame_complete = ((intptr_t)__ pc()) - start; 1485 1486 // Calculate the difference between rsp and rbp,. We need to know it 1487 // after the native call because on windows Java Natives will pop 1488 // the arguments and it is painful to do rsp relative addressing 1489 // in a platform independent way. So after the call we switch to 1490 // rbp, relative addressing. 1491 1492 int fp_adjustment = stack_size - 2*wordSize; 1493 1494 #ifdef COMPILER2 1495 // C2 may leave the stack dirty if not in SSE2+ mode 1496 if (UseSSE >= 2) { 1497 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 1498 } else { 1499 __ empty_FPU_stack(); 1500 } 1501 #endif /* COMPILER2 */ 1502 1503 // Compute the rbp, offset for any slots used after the jni call 1504 1505 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; 1506 1507 // We use rdi as a thread pointer because it is callee save and 1508 // if we load it once it is usable thru the entire wrapper 1509 const Register thread = rdi; 1510 1511 // We use rsi as the oop handle for the receiver/klass 1512 // It is callee save so it survives the call to native 1513 1514 const Register oop_handle_reg = rsi; 1515 1516 __ get_thread(thread); 1517 1518 // 1519 // We immediately shuffle the arguments so that any vm call we have to 1520 // make from here on out (sync slow path, jvmti, etc.) we will have 1521 // captured the oops from our caller and have a valid oopMap for 1522 // them. 1523 1524 // ----------------- 1525 // The Grand Shuffle 1526 // 1527 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* 1528 // and, if static, the class mirror instead of a receiver. This pretty much 1529 // guarantees that register layout will not match (and x86 doesn't use reg 1530 // parms though amd does). Since the native abi doesn't use register args 1531 // and the java conventions does we don't have to worry about collisions. 1532 // All of our moved are reg->stack or stack->stack. 1533 // We ignore the extra arguments during the shuffle and handle them at the 1534 // last moment. The shuffle is described by the two calling convention 1535 // vectors we have in our possession. We simply walk the java vector to 1536 // get the source locations and the c vector to get the destinations. 1537 1538 int c_arg = method->is_static() ? 2 : 1; 1539 1540 // Record rsp-based slot for receiver on stack for non-static methods 1541 int receiver_offset = -1; 1542 1543 // This is a trick. We double the stack slots so we can claim 1544 // the oops in the caller's frame. Since we are sure to have 1545 // more args than the caller doubling is enough to make 1546 // sure we can capture all the incoming oop args from the 1547 // caller. 1548 // 1549 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1550 1551 // Mark location of rbp, 1552 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); 1553 1554 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx 1555 // Are free to temporaries if we have to do stack to steck moves. 1556 // All inbound args are referenced based on rbp, and all outbound args via rsp. 1557 1558 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { 1559 switch (in_sig_bt[i]) { 1560 case T_ARRAY: 1561 case T_OBJECT: 1562 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 1563 ((i == 0) && (!is_static)), 1564 &receiver_offset); 1565 break; 1566 case T_VOID: 1567 break; 1568 1569 case T_FLOAT: 1570 float_move(masm, in_regs[i], out_regs[c_arg]); 1571 break; 1572 1573 case T_DOUBLE: 1574 assert( i + 1 < total_in_args && 1575 in_sig_bt[i + 1] == T_VOID && 1576 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 1577 double_move(masm, in_regs[i], out_regs[c_arg]); 1578 break; 1579 1580 case T_LONG : 1581 long_move(masm, in_regs[i], out_regs[c_arg]); 1582 break; 1583 1584 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 1585 1586 default: 1587 simple_move32(masm, in_regs[i], out_regs[c_arg]); 1588 } 1589 } 1590 1591 // Pre-load a static method's oop into rsi. Used both by locking code and 1592 // the normal JNI call code. 1593 if (method->is_static()) { 1594 1595 // load opp into a register 1596 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); 1597 1598 // Now handlize the static class mirror it's known not-null. 1599 __ movptr(Address(rsp, klass_offset), oop_handle_reg); 1600 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 1601 1602 // Now get the handle 1603 __ lea(oop_handle_reg, Address(rsp, klass_offset)); 1604 // store the klass handle as second argument 1605 __ movptr(Address(rsp, wordSize), oop_handle_reg); 1606 } 1607 1608 // Change state to native (we save the return address in the thread, since it might not 1609 // be pushed on the stack when we do a stack traversal). It is enough that the pc() 1610 // points into the right code segment. It does not have to be the correct return pc. 1611 // We use the same pc/oopMap repeatedly when we call out 1612 1613 intptr_t the_pc = (intptr_t) __ pc(); 1614 oop_maps->add_gc_map(the_pc - start, map); 1615 1616 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc, noreg); 1617 1618 1619 // We have all of the arguments setup at this point. We must not touch any register 1620 // argument registers at this point (what if we save/restore them there are no oop? 1621 1622 if (DTraceMethodProbes) { 1623 __ mov_metadata(rax, method()); 1624 __ call_VM_leaf( 1625 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 1626 thread, rax); 1627 } 1628 1629 // RedefineClasses() tracing support for obsolete method entry 1630 if (log_is_enabled(Trace, redefine, class, obsolete)) { 1631 __ mov_metadata(rax, method()); 1632 __ call_VM_leaf( 1633 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 1634 thread, rax); 1635 } 1636 1637 // These are register definitions we need for locking/unlocking 1638 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction 1639 const Register obj_reg = rcx; // Will contain the oop 1640 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) 1641 1642 Label slow_path_lock; 1643 Label lock_done; 1644 1645 // Lock a synchronized method 1646 if (method->is_synchronized()) { 1647 Label count_mon; 1648 1649 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 1650 1651 // Get the handle (the 2nd argument) 1652 __ movptr(oop_handle_reg, Address(rsp, wordSize)); 1653 1654 // Get address of the box 1655 1656 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); 1657 1658 // Load the oop from the handle 1659 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 1660 1661 if (LockingMode == LM_MONITOR) { 1662 __ jmp(slow_path_lock); 1663 } else if (LockingMode == LM_LEGACY) { 1664 // Load immediate 1 into swap_reg %rax, 1665 __ movptr(swap_reg, 1); 1666 1667 // Load (object->mark() | 1) into swap_reg %rax, 1668 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1669 1670 // Save (object->mark() | 1) into BasicLock's displaced header 1671 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 1672 1673 // src -> dest iff dest == rax, else rax, <- dest 1674 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) 1675 __ lock(); 1676 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1677 __ jcc(Assembler::equal, count_mon); 1678 1679 // Test if the oopMark is an obvious stack pointer, i.e., 1680 // 1) (mark & 3) == 0, and 1681 // 2) rsp <= mark < mark + os::pagesize() 1682 // These 3 tests can be done by evaluating the following 1683 // expression: ((mark - rsp) & (3 - os::vm_page_size())), 1684 // assuming both stack pointer and pagesize have their 1685 // least significant 2 bits clear. 1686 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg 1687 1688 __ subptr(swap_reg, rsp); 1689 __ andptr(swap_reg, 3 - (int)os::vm_page_size()); 1690 1691 // Save the test result, for recursive case, the result is zero 1692 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 1693 __ jcc(Assembler::notEqual, slow_path_lock); 1694 } else { 1695 assert(LockingMode == LM_LIGHTWEIGHT, "must be"); 1696 // Lacking registers and thread on x86_32. Always take slow path. 1697 __ jmp(slow_path_lock); 1698 } 1699 __ bind(count_mon); 1700 __ inc_held_monitor_count(); 1701 1702 // Slow path will re-enter here 1703 __ bind(lock_done); 1704 } 1705 1706 1707 // Finally just about ready to make the JNI call 1708 1709 // get JNIEnv* which is first argument to native 1710 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); 1711 __ movptr(Address(rsp, 0), rdx); 1712 1713 // Now set thread in native 1714 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); 1715 1716 __ call(RuntimeAddress(native_func)); 1717 1718 // Verify or restore cpu control state after JNI call 1719 __ restore_cpu_control_state_after_jni(noreg); 1720 1721 // WARNING - on Windows Java Natives use pascal calling convention and pop the 1722 // arguments off of the stack. We could just re-adjust the stack pointer here 1723 // and continue to do SP relative addressing but we instead switch to FP 1724 // relative addressing. 1725 1726 // Unpack native results. 1727 switch (ret_type) { 1728 case T_BOOLEAN: __ c2bool(rax); break; 1729 case T_CHAR : __ andptr(rax, 0xFFFF); break; 1730 case T_BYTE : __ sign_extend_byte (rax); break; 1731 case T_SHORT : __ sign_extend_short(rax); break; 1732 case T_INT : /* nothing to do */ break; 1733 case T_DOUBLE : 1734 case T_FLOAT : 1735 // Result is in st0 we'll save as needed 1736 break; 1737 case T_ARRAY: // Really a handle 1738 case T_OBJECT: // Really a handle 1739 break; // can't de-handlize until after safepoint check 1740 case T_VOID: break; 1741 case T_LONG: break; 1742 default : ShouldNotReachHere(); 1743 } 1744 1745 Label after_transition; 1746 1747 // Switch thread to "native transition" state before reading the synchronization state. 1748 // This additional state is necessary because reading and testing the synchronization 1749 // state is not atomic w.r.t. GC, as this scenario demonstrates: 1750 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 1751 // VM thread changes sync state to synchronizing and suspends threads for GC. 1752 // Thread A is resumed to finish this native method, but doesn't block here since it 1753 // didn't see any synchronization is progress, and escapes. 1754 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); 1755 1756 // Force this write out before the read below 1757 if (!UseSystemMemoryBarrier) { 1758 __ membar(Assembler::Membar_mask_bits( 1759 Assembler::LoadLoad | Assembler::LoadStore | 1760 Assembler::StoreLoad | Assembler::StoreStore)); 1761 } 1762 1763 if (AlwaysRestoreFPU) { 1764 // Make sure the control word is correct. 1765 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std())); 1766 } 1767 1768 // check for safepoint operation in progress and/or pending suspend requests 1769 { Label Continue, slow_path; 1770 1771 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */); 1772 1773 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); 1774 __ jcc(Assembler::equal, Continue); 1775 __ bind(slow_path); 1776 1777 // Don't use call_VM as it will see a possible pending exception and forward it 1778 // and never return here preventing us from clearing _last_native_pc down below. 1779 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are 1780 // preserved and correspond to the bcp/locals pointers. So we do a runtime call 1781 // by hand. 1782 // 1783 __ vzeroupper(); 1784 1785 save_native_result(masm, ret_type, stack_slots); 1786 __ push(thread); 1787 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, 1788 JavaThread::check_special_condition_for_native_trans))); 1789 __ increment(rsp, wordSize); 1790 // Restore any method result value 1791 restore_native_result(masm, ret_type, stack_slots); 1792 __ bind(Continue); 1793 } 1794 1795 // change thread state 1796 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); 1797 __ bind(after_transition); 1798 1799 Label reguard; 1800 Label reguard_done; 1801 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled); 1802 __ jcc(Assembler::equal, reguard); 1803 1804 // slow path reguard re-enters here 1805 __ bind(reguard_done); 1806 1807 // Handle possible exception (will unlock if necessary) 1808 1809 // native result if any is live 1810 1811 // Unlock 1812 Label slow_path_unlock; 1813 Label unlock_done; 1814 if (method->is_synchronized()) { 1815 1816 Label fast_done; 1817 1818 // Get locked oop from the handle we passed to jni 1819 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 1820 1821 if (LockingMode == LM_LEGACY) { 1822 Label not_recur; 1823 // Simple recursive lock? 1824 __ cmpptr(Address(rbp, lock_slot_rbp_offset), NULL_WORD); 1825 __ jcc(Assembler::notEqual, not_recur); 1826 __ dec_held_monitor_count(); 1827 __ jmpb(fast_done); 1828 __ bind(not_recur); 1829 } 1830 1831 // Must save rax, if it is live now because cmpxchg must use it 1832 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 1833 save_native_result(masm, ret_type, stack_slots); 1834 } 1835 1836 if (LockingMode == LM_MONITOR) { 1837 __ jmp(slow_path_unlock); 1838 } else if (LockingMode == LM_LEGACY) { 1839 // get old displaced header 1840 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); 1841 1842 // get address of the stack lock 1843 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); 1844 1845 // Atomic swap old header if oop still contains the stack lock 1846 // src -> dest iff dest == rax, else rax, <- dest 1847 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) 1848 __ lock(); 1849 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1850 __ jcc(Assembler::notEqual, slow_path_unlock); 1851 __ dec_held_monitor_count(); 1852 } else { 1853 assert(LockingMode == LM_LIGHTWEIGHT, "must be"); 1854 __ lightweight_unlock(obj_reg, swap_reg, thread, lock_reg, slow_path_unlock); 1855 __ dec_held_monitor_count(); 1856 } 1857 1858 // slow path re-enters here 1859 __ bind(unlock_done); 1860 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 1861 restore_native_result(masm, ret_type, stack_slots); 1862 } 1863 1864 __ bind(fast_done); 1865 } 1866 1867 if (DTraceMethodProbes) { 1868 // Tell dtrace about this method exit 1869 save_native_result(masm, ret_type, stack_slots); 1870 __ mov_metadata(rax, method()); 1871 __ call_VM_leaf( 1872 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 1873 thread, rax); 1874 restore_native_result(masm, ret_type, stack_slots); 1875 } 1876 1877 // We can finally stop using that last_Java_frame we setup ages ago 1878 1879 __ reset_last_Java_frame(thread, false); 1880 1881 // Unbox oop result, e.g. JNIHandles::resolve value. 1882 if (is_reference_type(ret_type)) { 1883 __ resolve_jobject(rax /* value */, 1884 thread /* thread */, 1885 rcx /* tmp */); 1886 } 1887 1888 if (CheckJNICalls) { 1889 // clear_pending_jni_exception_check 1890 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD); 1891 } 1892 1893 // reset handle block 1894 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); 1895 __ movl(Address(rcx, JNIHandleBlock::top_offset()), NULL_WORD); 1896 1897 // Any exception pending? 1898 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1899 __ jcc(Assembler::notEqual, exception_pending); 1900 1901 // no exception, we're almost done 1902 1903 // check that only result value is on FPU stack 1904 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); 1905 1906 // Fixup floating pointer results so that result looks like a return from a compiled method 1907 if (ret_type == T_FLOAT) { 1908 if (UseSSE >= 1) { 1909 // Pop st0 and store as float and reload into xmm register 1910 __ fstp_s(Address(rbp, -4)); 1911 __ movflt(xmm0, Address(rbp, -4)); 1912 } 1913 } else if (ret_type == T_DOUBLE) { 1914 if (UseSSE >= 2) { 1915 // Pop st0 and store as double and reload into xmm register 1916 __ fstp_d(Address(rbp, -8)); 1917 __ movdbl(xmm0, Address(rbp, -8)); 1918 } 1919 } 1920 1921 // Return 1922 1923 __ leave(); 1924 __ ret(0); 1925 1926 // Unexpected paths are out of line and go here 1927 1928 // Slow path locking & unlocking 1929 if (method->is_synchronized()) { 1930 1931 // BEGIN Slow path lock 1932 1933 __ bind(slow_path_lock); 1934 1935 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 1936 // args are (oop obj, BasicLock* lock, JavaThread* thread) 1937 __ push(thread); 1938 __ push(lock_reg); 1939 __ push(obj_reg); 1940 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); 1941 __ addptr(rsp, 3*wordSize); 1942 1943 #ifdef ASSERT 1944 { Label L; 1945 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1946 __ jcc(Assembler::equal, L); 1947 __ stop("no pending exception allowed on exit from monitorenter"); 1948 __ bind(L); 1949 } 1950 #endif 1951 __ jmp(lock_done); 1952 1953 // END Slow path lock 1954 1955 // BEGIN Slow path unlock 1956 __ bind(slow_path_unlock); 1957 __ vzeroupper(); 1958 // Slow path unlock 1959 1960 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 1961 save_native_result(masm, ret_type, stack_slots); 1962 } 1963 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 1964 1965 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); 1966 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1967 1968 1969 // should be a peal 1970 // +wordSize because of the push above 1971 // args are (oop obj, BasicLock* lock, JavaThread* thread) 1972 __ push(thread); 1973 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); 1974 __ push(rax); 1975 1976 __ push(obj_reg); 1977 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); 1978 __ addptr(rsp, 3*wordSize); 1979 #ifdef ASSERT 1980 { 1981 Label L; 1982 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1983 __ jcc(Assembler::equal, L); 1984 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 1985 __ bind(L); 1986 } 1987 #endif /* ASSERT */ 1988 1989 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); 1990 1991 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 1992 restore_native_result(masm, ret_type, stack_slots); 1993 } 1994 __ jmp(unlock_done); 1995 // END Slow path unlock 1996 1997 } 1998 1999 // SLOW PATH Reguard the stack if needed 2000 2001 __ bind(reguard); 2002 __ vzeroupper(); 2003 save_native_result(masm, ret_type, stack_slots); 2004 { 2005 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); 2006 } 2007 restore_native_result(masm, ret_type, stack_slots); 2008 __ jmp(reguard_done); 2009 2010 2011 // BEGIN EXCEPTION PROCESSING 2012 2013 // Forward the exception 2014 __ bind(exception_pending); 2015 2016 // remove possible return value from FPU register stack 2017 __ empty_FPU_stack(); 2018 2019 // pop our frame 2020 __ leave(); 2021 // and forward the exception 2022 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2023 2024 __ flush(); 2025 2026 nmethod *nm = nmethod::new_native_nmethod(method, 2027 compile_id, 2028 masm->code(), 2029 vep_offset, 2030 frame_complete, 2031 stack_slots / VMRegImpl::slots_per_word, 2032 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2033 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2034 oop_maps); 2035 2036 return nm; 2037 2038 } 2039 2040 // this function returns the adjust size (in number of words) to a c2i adapter 2041 // activation for use during deoptimization 2042 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { 2043 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2044 } 2045 2046 2047 // Number of stack slots between incoming argument block and the start of 2048 // a new frame. The PROLOG must add this many slots to the stack. The 2049 // EPILOG must remove this many slots. Intel needs one slot for 2050 // return address and one for rbp, (must save rbp) 2051 uint SharedRuntime::in_preserve_stack_slots() { 2052 return 2+VerifyStackAtCalls; 2053 } 2054 2055 uint SharedRuntime::out_preserve_stack_slots() { 2056 return 0; 2057 } 2058 2059 VMReg SharedRuntime::thread_register() { 2060 Unimplemented(); 2061 return nullptr; 2062 } 2063 2064 //------------------------------generate_deopt_blob---------------------------- 2065 void SharedRuntime::generate_deopt_blob() { 2066 // allocate space for the code 2067 ResourceMark rm; 2068 // setup code generation tools 2069 // note: the buffer code size must account for StackShadowPages=50 2070 const char* name = SharedRuntime::stub_name(SharedStubId::deopt_id); 2071 CodeBuffer buffer(name, 1536, 1024); 2072 MacroAssembler* masm = new MacroAssembler(&buffer); 2073 int frame_size_in_words; 2074 OopMap* map = nullptr; 2075 // Account for the extra args we place on the stack 2076 // by the time we call fetch_unroll_info 2077 const int additional_words = 2; // deopt kind, thread 2078 2079 OopMapSet *oop_maps = new OopMapSet(); 2080 2081 // ------------- 2082 // This code enters when returning to a de-optimized nmethod. A return 2083 // address has been pushed on the stack, and return values are in 2084 // registers. 2085 // If we are doing a normal deopt then we were called from the patched 2086 // nmethod from the point we returned to the nmethod. So the return 2087 // address on the stack is wrong by NativeCall::instruction_size 2088 // We will adjust the value to it looks like we have the original return 2089 // address on the stack (like when we eagerly deoptimized). 2090 // In the case of an exception pending with deoptimized then we enter 2091 // with a return address on the stack that points after the call we patched 2092 // into the exception handler. We have the following register state: 2093 // rax,: exception 2094 // rbx,: exception handler 2095 // rdx: throwing pc 2096 // So in this case we simply jam rdx into the useless return address and 2097 // the stack looks just like we want. 2098 // 2099 // At this point we need to de-opt. We save the argument return 2100 // registers. We call the first C routine, fetch_unroll_info(). This 2101 // routine captures the return values and returns a structure which 2102 // describes the current frame size and the sizes of all replacement frames. 2103 // The current frame is compiled code and may contain many inlined 2104 // functions, each with their own JVM state. We pop the current frame, then 2105 // push all the new frames. Then we call the C routine unpack_frames() to 2106 // populate these frames. Finally unpack_frames() returns us the new target 2107 // address. Notice that callee-save registers are BLOWN here; they have 2108 // already been captured in the vframeArray at the time the return PC was 2109 // patched. 2110 address start = __ pc(); 2111 Label cont; 2112 2113 // Prolog for non exception case! 2114 2115 // Save everything in sight. 2116 2117 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2118 // Normal deoptimization 2119 __ push(Deoptimization::Unpack_deopt); 2120 __ jmp(cont); 2121 2122 int reexecute_offset = __ pc() - start; 2123 2124 // Reexecute case 2125 // return address is the pc describes what bci to do re-execute at 2126 2127 // No need to update map as each call to save_live_registers will produce identical oopmap 2128 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2129 2130 __ push(Deoptimization::Unpack_reexecute); 2131 __ jmp(cont); 2132 2133 int exception_offset = __ pc() - start; 2134 2135 // Prolog for exception case 2136 2137 // all registers are dead at this entry point, except for rax, and 2138 // rdx which contain the exception oop and exception pc 2139 // respectively. Set them in TLS and fall thru to the 2140 // unpack_with_exception_in_tls entry point. 2141 2142 __ get_thread(rdi); 2143 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); 2144 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); 2145 2146 int exception_in_tls_offset = __ pc() - start; 2147 2148 // new implementation because exception oop is now passed in JavaThread 2149 2150 // Prolog for exception case 2151 // All registers must be preserved because they might be used by LinearScan 2152 // Exceptiop oop and throwing PC are passed in JavaThread 2153 // tos: stack at point of call to method that threw the exception (i.e. only 2154 // args are on the stack, no return address) 2155 2156 // make room on stack for the return address 2157 // It will be patched later with the throwing pc. The correct value is not 2158 // available now because loading it from memory would destroy registers. 2159 __ push(0); 2160 2161 // Save everything in sight. 2162 2163 // No need to update map as each call to save_live_registers will produce identical oopmap 2164 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2165 2166 // Now it is safe to overwrite any register 2167 2168 // store the correct deoptimization type 2169 __ push(Deoptimization::Unpack_exception); 2170 2171 // load throwing pc from JavaThread and patch it as the return address 2172 // of the current frame. Then clear the field in JavaThread 2173 __ get_thread(rdi); 2174 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); 2175 __ movptr(Address(rbp, wordSize), rdx); 2176 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); 2177 2178 #ifdef ASSERT 2179 // verify that there is really an exception oop in JavaThread 2180 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); 2181 __ verify_oop(rax); 2182 2183 // verify that there is no pending exception 2184 Label no_pending_exception; 2185 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); 2186 __ testptr(rax, rax); 2187 __ jcc(Assembler::zero, no_pending_exception); 2188 __ stop("must not have pending exception here"); 2189 __ bind(no_pending_exception); 2190 #endif 2191 2192 __ bind(cont); 2193 2194 // Compiled code leaves the floating point stack dirty, empty it. 2195 __ empty_FPU_stack(); 2196 2197 2198 // Call C code. Need thread and this frame, but NOT official VM entry 2199 // crud. We cannot block on this call, no GC can happen. 2200 __ get_thread(rcx); 2201 __ push(rcx); 2202 // fetch_unroll_info needs to call last_java_frame() 2203 __ set_last_Java_frame(rcx, noreg, noreg, nullptr, noreg); 2204 2205 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2206 2207 // Need to have an oopmap that tells fetch_unroll_info where to 2208 // find any register it might need. 2209 2210 oop_maps->add_gc_map( __ pc()-start, map); 2211 2212 // Discard args to fetch_unroll_info 2213 __ pop(rcx); 2214 __ pop(rcx); 2215 2216 __ get_thread(rcx); 2217 __ reset_last_Java_frame(rcx, false); 2218 2219 // Load UnrollBlock into EDI 2220 __ mov(rdi, rax); 2221 2222 // Move the unpack kind to a safe place in the UnrollBlock because 2223 // we are very short of registers 2224 2225 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset()); 2226 // retrieve the deopt kind from the UnrollBlock. 2227 __ movl(rax, unpack_kind); 2228 2229 Label noException; 2230 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? 2231 __ jcc(Assembler::notEqual, noException); 2232 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); 2233 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); 2234 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); 2235 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); 2236 2237 __ verify_oop(rax); 2238 2239 // Overwrite the result registers with the exception results. 2240 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); 2241 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); 2242 2243 __ bind(noException); 2244 2245 // Stack is back to only having register save data on the stack. 2246 // Now restore the result registers. Everything else is either dead or captured 2247 // in the vframeArray. 2248 2249 RegisterSaver::restore_result_registers(masm); 2250 2251 // Non standard control word may be leaked out through a safepoint blob, and we can 2252 // deopt at a poll point with the non standard control word. However, we should make 2253 // sure the control word is correct after restore_result_registers. 2254 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std())); 2255 2256 // All of the register save area has been popped of the stack. Only the 2257 // return address remains. 2258 2259 // Pop all the frames we must move/replace. 2260 // 2261 // Frame picture (youngest to oldest) 2262 // 1: self-frame (no frame link) 2263 // 2: deopting frame (no frame link) 2264 // 3: caller of deopting frame (could be compiled/interpreted). 2265 // 2266 // Note: by leaving the return address of self-frame on the stack 2267 // and using the size of frame 2 to adjust the stack 2268 // when we are done the return to frame 3 will still be on the stack. 2269 2270 // Pop deoptimized frame 2271 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset())); 2272 2273 // sp should be pointing at the return address to the caller (3) 2274 2275 // Pick up the initial fp we should save 2276 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 2277 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset())); 2278 2279 #ifdef ASSERT 2280 // Compilers generate code that bang the stack by as much as the 2281 // interpreter would need. So this stack banging should never 2282 // trigger a fault. Verify that it does not on non product builds. 2283 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset())); 2284 __ bang_stack_size(rbx, rcx); 2285 #endif 2286 2287 // Load array of frame pcs into ECX 2288 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset())); 2289 2290 __ pop(rsi); // trash the old pc 2291 2292 // Load array of frame sizes into ESI 2293 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset())); 2294 2295 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset()); 2296 2297 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset())); 2298 __ movl(counter, rbx); 2299 2300 // Now adjust the caller's stack to make up for the extra locals 2301 // but record the original sp so that we can save it in the skeletal interpreter 2302 // frame and the stack walking of interpreter_sender will get the unextended sp 2303 // value and not the "real" sp value. 2304 2305 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset()); 2306 __ movptr(sp_temp, rsp); 2307 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset())); 2308 __ subptr(rsp, rbx); 2309 2310 // Push interpreter frames in a loop 2311 Label loop; 2312 __ bind(loop); 2313 __ movptr(rbx, Address(rsi, 0)); // Load frame size 2314 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand 2315 __ pushptr(Address(rcx, 0)); // save return address 2316 __ enter(); // save old & set new rbp, 2317 __ subptr(rsp, rbx); // Prolog! 2318 __ movptr(rbx, sp_temp); // sender's sp 2319 // This value is corrected by layout_activation_impl 2320 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); 2321 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable 2322 __ movptr(sp_temp, rsp); // pass to next frame 2323 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 2324 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 2325 __ decrementl(counter); // decrement counter 2326 __ jcc(Assembler::notZero, loop); 2327 __ pushptr(Address(rcx, 0)); // save final return address 2328 2329 // Re-push self-frame 2330 __ enter(); // save old & set new rbp, 2331 2332 // Return address and rbp, are in place 2333 // We'll push additional args later. Just allocate a full sized 2334 // register save area 2335 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); 2336 2337 // Restore frame locals after moving the frame 2338 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); 2339 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); 2340 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local 2341 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); 2342 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); 2343 2344 // Set up the args to unpack_frame 2345 2346 __ pushl(unpack_kind); // get the unpack_kind value 2347 __ get_thread(rcx); 2348 __ push(rcx); 2349 2350 // set last_Java_sp, last_Java_fp 2351 __ set_last_Java_frame(rcx, noreg, rbp, nullptr, noreg); 2352 2353 // Call C code. Need thread but NOT official VM entry 2354 // crud. We cannot block on this call, no GC can happen. Call should 2355 // restore return values to their stack-slots with the new SP. 2356 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2357 // Set an oopmap for the call site 2358 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); 2359 2360 // rax, contains the return result type 2361 __ push(rax); 2362 2363 __ get_thread(rcx); 2364 __ reset_last_Java_frame(rcx, false); 2365 2366 // Collect return values 2367 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); 2368 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); 2369 2370 // Clear floating point stack before returning to interpreter 2371 __ empty_FPU_stack(); 2372 2373 // Check if we should push the float or double return value. 2374 Label results_done, yes_double_value; 2375 __ cmpl(Address(rsp, 0), T_DOUBLE); 2376 __ jcc (Assembler::zero, yes_double_value); 2377 __ cmpl(Address(rsp, 0), T_FLOAT); 2378 __ jcc (Assembler::notZero, results_done); 2379 2380 // return float value as expected by interpreter 2381 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); 2382 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); 2383 __ jmp(results_done); 2384 2385 // return double value as expected by interpreter 2386 __ bind(yes_double_value); 2387 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); 2388 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); 2389 2390 __ bind(results_done); 2391 2392 // Pop self-frame. 2393 __ leave(); // Epilog! 2394 2395 // Jump to interpreter 2396 __ ret(0); 2397 2398 // ------------- 2399 // make sure all code is generated 2400 masm->flush(); 2401 2402 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2403 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2404 } 2405 2406 //------------------------------generate_handler_blob------ 2407 // 2408 // Generate a special Compile2Runtime blob that saves all registers, 2409 // setup oopmap, and calls safepoint code to stop the compiled code for 2410 // a safepoint. 2411 // 2412 SafepointBlob* SharedRuntime::generate_handler_blob(SharedStubId id, address call_ptr) { 2413 2414 // Account for thread arg in our frame 2415 const int additional_words = 1; 2416 int frame_size_in_words; 2417 2418 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2419 assert(is_polling_page_id(id), "expected a polling page stub id"); 2420 2421 ResourceMark rm; 2422 OopMapSet *oop_maps = new OopMapSet(); 2423 OopMap* map; 2424 2425 // allocate space for the code 2426 // setup code generation tools 2427 const char* name = SharedRuntime::stub_name(id); 2428 CodeBuffer buffer(name, 2048, 1024); 2429 MacroAssembler* masm = new MacroAssembler(&buffer); 2430 2431 const Register java_thread = rdi; // callee-saved for VC++ 2432 address start = __ pc(); 2433 address call_pc = nullptr; 2434 bool cause_return = (id == SharedStubId::polling_page_return_handler_id); 2435 bool save_vectors = (id == SharedStubId::polling_page_vectors_safepoint_handler_id); 2436 2437 // If cause_return is true we are at a poll_return and there is 2438 // the return address on the stack to the caller on the nmethod 2439 // that is safepoint. We can leave this return on the stack and 2440 // effectively complete the return and safepoint in the caller. 2441 // Otherwise we push space for a return address that the safepoint 2442 // handler will install later to make the stack walking sensible. 2443 if (!cause_return) 2444 __ push(rbx); // Make room for return address (or push it again) 2445 2446 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); 2447 2448 // The following is basically a call_VM. However, we need the precise 2449 // address of the call in order to generate an oopmap. Hence, we do all the 2450 // work ourselves. 2451 2452 // Push thread argument and setup last_Java_sp 2453 __ get_thread(java_thread); 2454 __ push(java_thread); 2455 __ set_last_Java_frame(java_thread, noreg, noreg, nullptr, noreg); 2456 2457 // if this was not a poll_return then we need to correct the return address now. 2458 if (!cause_return) { 2459 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack. 2460 // Additionally, rbx is a callee saved register and we can look at it later to determine 2461 // if someone changed the return address for us! 2462 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset())); 2463 __ movptr(Address(rbp, wordSize), rbx); 2464 } 2465 2466 // do the call 2467 __ call(RuntimeAddress(call_ptr)); 2468 2469 // Set an oopmap for the call site. This oopmap will map all 2470 // oop-registers and debug-info registers as callee-saved. This 2471 // will allow deoptimization at this safepoint to find all possible 2472 // debug-info recordings, as well as let GC find all oops. 2473 2474 oop_maps->add_gc_map( __ pc() - start, map); 2475 2476 // Discard arg 2477 __ pop(rcx); 2478 2479 Label noException; 2480 2481 // Clear last_Java_sp again 2482 __ get_thread(java_thread); 2483 __ reset_last_Java_frame(java_thread, false); 2484 2485 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD); 2486 __ jcc(Assembler::equal, noException); 2487 2488 // Exception pending 2489 RegisterSaver::restore_live_registers(masm, save_vectors); 2490 2491 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2492 2493 __ bind(noException); 2494 2495 Label no_adjust, bail, not_special; 2496 if (!cause_return) { 2497 // If our stashed return pc was modified by the runtime we avoid touching it 2498 __ cmpptr(rbx, Address(rbp, wordSize)); 2499 __ jccb(Assembler::notEqual, no_adjust); 2500 2501 // Skip over the poll instruction. 2502 // See NativeInstruction::is_safepoint_poll() 2503 // Possible encodings: 2504 // 85 00 test %eax,(%rax) 2505 // 85 01 test %eax,(%rcx) 2506 // 85 02 test %eax,(%rdx) 2507 // 85 03 test %eax,(%rbx) 2508 // 85 06 test %eax,(%rsi) 2509 // 85 07 test %eax,(%rdi) 2510 // 2511 // 85 04 24 test %eax,(%rsp) 2512 // 85 45 00 test %eax,0x0(%rbp) 2513 2514 #ifdef ASSERT 2515 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below 2516 #endif 2517 // rsp/rbp base encoding takes 3 bytes with the following register values: 2518 // rsp 0x04 2519 // rbp 0x05 2520 __ movzbl(rcx, Address(rbx, 1)); 2521 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05 2522 __ subptr(rcx, 4); // looking for 0x00 .. 0x01 2523 __ cmpptr(rcx, 1); 2524 __ jcc(Assembler::above, not_special); 2525 __ addptr(rbx, 1); 2526 __ bind(not_special); 2527 #ifdef ASSERT 2528 // Verify the correct encoding of the poll we're about to skip. 2529 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl); 2530 __ jcc(Assembler::notEqual, bail); 2531 // Mask out the modrm bits 2532 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask); 2533 // rax encodes to 0, so if the bits are nonzero it's incorrect 2534 __ jcc(Assembler::notZero, bail); 2535 #endif 2536 // Adjust return pc forward to step over the safepoint poll instruction 2537 __ addptr(rbx, 2); 2538 __ movptr(Address(rbp, wordSize), rbx); 2539 } 2540 2541 __ bind(no_adjust); 2542 // Normal exit, register restoring and exit 2543 RegisterSaver::restore_live_registers(masm, save_vectors); 2544 2545 __ ret(0); 2546 2547 #ifdef ASSERT 2548 __ bind(bail); 2549 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected"); 2550 #endif 2551 2552 // make sure all code is generated 2553 masm->flush(); 2554 2555 // Fill-out other meta info 2556 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 2557 } 2558 2559 // 2560 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2561 // 2562 // Generate a stub that calls into vm to find out the proper destination 2563 // of a java call. All the argument registers are live at this point 2564 // but since this is generic code we don't know what they are and the caller 2565 // must do any gc of the args. 2566 // 2567 RuntimeStub* SharedRuntime::generate_resolve_blob(SharedStubId id, address destination) { 2568 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2569 assert(is_resolve_id(id), "expected a resolve stub id"); 2570 2571 // allocate space for the code 2572 ResourceMark rm; 2573 2574 const char* name = SharedRuntime::stub_name(id); 2575 CodeBuffer buffer(name, 1000, 512); 2576 MacroAssembler* masm = new MacroAssembler(&buffer); 2577 2578 int frame_size_words; 2579 enum frame_layout { 2580 thread_off, 2581 extra_words }; 2582 2583 OopMapSet *oop_maps = new OopMapSet(); 2584 OopMap* map = nullptr; 2585 2586 int start = __ offset(); 2587 2588 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); 2589 2590 int frame_complete = __ offset(); 2591 2592 const Register thread = rdi; 2593 __ get_thread(rdi); 2594 2595 __ push(thread); 2596 __ set_last_Java_frame(thread, noreg, rbp, nullptr, noreg); 2597 2598 __ call(RuntimeAddress(destination)); 2599 2600 2601 // Set an oopmap for the call site. 2602 // We need this not only for callee-saved registers, but also for volatile 2603 // registers that the compiler might be keeping live across a safepoint. 2604 2605 oop_maps->add_gc_map( __ offset() - start, map); 2606 2607 // rax, contains the address we are going to jump to assuming no exception got installed 2608 2609 __ addptr(rsp, wordSize); 2610 2611 // clear last_Java_sp 2612 __ reset_last_Java_frame(thread, true); 2613 // check for pending exceptions 2614 Label pending; 2615 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 2616 __ jcc(Assembler::notEqual, pending); 2617 2618 // get the returned Method* 2619 __ get_vm_result_2(rbx, thread); 2620 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); 2621 2622 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); 2623 2624 RegisterSaver::restore_live_registers(masm); 2625 2626 // We are back to the original state on entry and ready to go. 2627 2628 __ jmp(rax); 2629 2630 // Pending exception after the safepoint 2631 2632 __ bind(pending); 2633 2634 RegisterSaver::restore_live_registers(masm); 2635 2636 // exception pending => remove activation and forward to exception handler 2637 2638 __ get_thread(thread); 2639 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 2640 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); 2641 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2642 2643 // ------------- 2644 // make sure all code is generated 2645 masm->flush(); 2646 2647 // return the blob 2648 // frame_size_words or bytes?? 2649 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); 2650 } 2651 2652 //------------------------------------------------------------------------------------------------------------------------ 2653 // Continuation point for throwing of implicit exceptions that are not handled in 2654 // the current activation. Fabricates an exception oop and initiates normal 2655 // exception dispatching in this frame. 2656 // 2657 // Previously the compiler (c2) allowed for callee save registers on Java calls. 2658 // This is no longer true after adapter frames were removed but could possibly 2659 // be brought back in the future if the interpreter code was reworked and it 2660 // was deemed worthwhile. The comment below was left to describe what must 2661 // happen here if callee saves were resurrected. As it stands now this stub 2662 // could actually be a vanilla BufferBlob and have now oopMap at all. 2663 // Since it doesn't make much difference we've chosen to leave it the 2664 // way it was in the callee save days and keep the comment. 2665 2666 // If we need to preserve callee-saved values we need a callee-saved oop map and 2667 // therefore have to make these stubs into RuntimeStubs rather than BufferBlobs. 2668 // If the compiler needs all registers to be preserved between the fault 2669 // point and the exception handler then it must assume responsibility for that in 2670 // AbstractCompiler::continuation_for_implicit_null_exception or 2671 // continuation_for_implicit_division_by_zero_exception. All other implicit 2672 // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are 2673 // either at call sites or otherwise assume that stack unwinding will be initiated, 2674 // so caller saved registers were assumed volatile in the compiler. 2675 RuntimeStub* SharedRuntime::generate_throw_exception(SharedStubId id, address runtime_entry) { 2676 assert(is_throw_id(id), "expected a throw stub id"); 2677 2678 const char* name = SharedRuntime::stub_name(id); 2679 2680 // Information about frame layout at time of blocking runtime call. 2681 // Note that we only have to preserve callee-saved registers since 2682 // the compilers are responsible for supplying a continuation point 2683 // if they expect all registers to be preserved. 2684 enum layout { 2685 thread_off, // last_java_sp 2686 arg1_off, 2687 arg2_off, 2688 rbp_off, // callee saved register 2689 ret_pc, 2690 framesize 2691 }; 2692 2693 int insts_size = 256; 2694 int locs_size = 32; 2695 2696 ResourceMark rm; 2697 const char* timer_msg = "SharedRuntime generate_throw_exception"; 2698 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime)); 2699 2700 CodeBuffer code(name, insts_size, locs_size); 2701 OopMapSet* oop_maps = new OopMapSet(); 2702 MacroAssembler* masm = new MacroAssembler(&code); 2703 2704 address start = __ pc(); 2705 2706 // This is an inlined and slightly modified version of call_VM 2707 // which has the ability to fetch the return PC out of 2708 // thread-local storage and also sets up last_Java_sp slightly 2709 // differently than the real call_VM 2710 Register java_thread = rbx; 2711 __ get_thread(java_thread); 2712 2713 __ enter(); // required for proper stackwalking of RuntimeStub frame 2714 2715 // pc and rbp, already pushed 2716 __ subptr(rsp, (framesize-2) * wordSize); // prolog 2717 2718 // Frame is now completed as far as size and linkage. 2719 2720 int frame_complete = __ pc() - start; 2721 2722 // push java thread (becomes first argument of C function) 2723 __ movptr(Address(rsp, thread_off * wordSize), java_thread); 2724 // Set up last_Java_sp and last_Java_fp 2725 __ set_last_Java_frame(java_thread, rsp, rbp, nullptr, noreg); 2726 2727 // Call runtime 2728 BLOCK_COMMENT("call runtime_entry"); 2729 __ call(RuntimeAddress(runtime_entry)); 2730 // Generate oop map 2731 OopMap* map = new OopMap(framesize, 0); 2732 oop_maps->add_gc_map(__ pc() - start, map); 2733 2734 // restore the thread (cannot use the pushed argument since arguments 2735 // may be overwritten by C code generated by an optimizing compiler); 2736 // however can use the register value directly if it is callee saved. 2737 __ get_thread(java_thread); 2738 2739 __ reset_last_Java_frame(java_thread, true); 2740 2741 __ leave(); // required for proper stackwalking of RuntimeStub frame 2742 2743 // check for pending exceptions 2744 #ifdef ASSERT 2745 Label L; 2746 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD); 2747 __ jcc(Assembler::notEqual, L); 2748 __ should_not_reach_here(); 2749 __ bind(L); 2750 #endif /* ASSERT */ 2751 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2752 2753 2754 RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, framesize, oop_maps, false); 2755 return stub; 2756 } 2757 2758 #if INCLUDE_JFR 2759 2760 static void jfr_prologue(address the_pc, MacroAssembler* masm) { 2761 Register java_thread = rdi; 2762 __ get_thread(java_thread); 2763 __ set_last_Java_frame(java_thread, rsp, rbp, the_pc, noreg); 2764 __ movptr(Address(rsp, 0), java_thread); 2765 } 2766 2767 // The handle is dereferenced through a load barrier. 2768 static void jfr_epilogue(MacroAssembler* masm) { 2769 Register java_thread = rdi; 2770 __ get_thread(java_thread); 2771 __ reset_last_Java_frame(java_thread, true); 2772 } 2773 2774 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint. 2775 // It returns a jobject handle to the event writer. 2776 // The handle is dereferenced and the return value is the event writer oop. 2777 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() { 2778 enum layout { 2779 FPUState_off = 0, 2780 rbp_off = FPUStateSizeInWords, 2781 rdi_off, 2782 rsi_off, 2783 rcx_off, 2784 rbx_off, 2785 saved_argument_off, 2786 saved_argument_off2, // 2nd half of double 2787 framesize 2788 }; 2789 2790 int insts_size = 1024; 2791 int locs_size = 64; 2792 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_write_checkpoint_id); 2793 CodeBuffer code(name, insts_size, locs_size); 2794 OopMapSet* oop_maps = new OopMapSet(); 2795 MacroAssembler* masm = new MacroAssembler(&code); 2796 2797 address start = __ pc(); 2798 __ enter(); 2799 int frame_complete = __ pc() - start; 2800 address the_pc = __ pc(); 2801 jfr_prologue(the_pc, masm); 2802 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1); 2803 jfr_epilogue(masm); 2804 __ resolve_global_jobject(rax, rdi, rdx); 2805 __ leave(); 2806 __ ret(0); 2807 2808 OopMap* map = new OopMap(framesize, 1); // rbp 2809 oop_maps->add_gc_map(the_pc - start, map); 2810 2811 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size) 2812 RuntimeStub::new_runtime_stub(name, &code, frame_complete, 2813 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 2814 oop_maps, false); 2815 return stub; 2816 } 2817 2818 // For c2: call to return a leased buffer. 2819 RuntimeStub* SharedRuntime::generate_jfr_return_lease() { 2820 enum layout { 2821 FPUState_off = 0, 2822 rbp_off = FPUStateSizeInWords, 2823 rdi_off, 2824 rsi_off, 2825 rcx_off, 2826 rbx_off, 2827 saved_argument_off, 2828 saved_argument_off2, // 2nd half of double 2829 framesize 2830 }; 2831 2832 int insts_size = 1024; 2833 int locs_size = 64; 2834 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_return_lease_id); 2835 CodeBuffer code(name, insts_size, locs_size); 2836 OopMapSet* oop_maps = new OopMapSet(); 2837 MacroAssembler* masm = new MacroAssembler(&code); 2838 2839 address start = __ pc(); 2840 __ enter(); 2841 int frame_complete = __ pc() - start; 2842 address the_pc = __ pc(); 2843 jfr_prologue(the_pc, masm); 2844 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1); 2845 jfr_epilogue(masm); 2846 __ leave(); 2847 __ ret(0); 2848 2849 OopMap* map = new OopMap(framesize, 1); // rbp 2850 oop_maps->add_gc_map(the_pc - start, map); 2851 2852 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size) 2853 RuntimeStub::new_runtime_stub(name, &code, frame_complete, 2854 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 2855 oop_maps, false); 2856 return stub; 2857 } 2858 2859 #endif // INCLUDE_JFR