804   }
805 
806   // Intel Core and newer cpus have fast IDIV instruction (excluding Atom).
807   static bool has_fast_idiv()     { return is_intel() && cpu_family() == 6 &&
808                                            supports_sse3() && _model != 0x1C; }
809 
810   static bool supports_compare_and_exchange() { return true; }
811 
812   static int allocate_prefetch_distance(bool use_watermark_prefetch);
813 
814   // SSE2 and later processors implement a 'pause' instruction
815   // that can be used for efficient implementation of
816   // the intrinsic for java.lang.Thread.onSpinWait()
817   static bool supports_on_spin_wait() { return supports_sse2(); }
818 
819   // x86_64 supports fast class initialization checks
820   static bool supports_fast_class_init_checks() {
821     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
822   }
823 


824   // x86_64 supports secondary supers table
825   constexpr static bool supports_secondary_supers_table() {
826     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
827   }
828 
829   constexpr static bool supports_stack_watermark_barrier() {
830     return true;
831   }
832 
833   constexpr static bool supports_recursive_lightweight_locking() {
834     return true;
835   }
836 
837   // For AVX CPUs only. f16c support is disabled if UseAVX == 0.
838   static bool supports_float16() {
839     return supports_f16c() || supports_avx512vl();
840   }
841 
842   // Check intrinsic support
843   static bool is_intrinsic_supported(vmIntrinsicID id);

804   }
805 
806   // Intel Core and newer cpus have fast IDIV instruction (excluding Atom).
807   static bool has_fast_idiv()     { return is_intel() && cpu_family() == 6 &&
808                                            supports_sse3() && _model != 0x1C; }
809 
810   static bool supports_compare_and_exchange() { return true; }
811 
812   static int allocate_prefetch_distance(bool use_watermark_prefetch);
813 
814   // SSE2 and later processors implement a 'pause' instruction
815   // that can be used for efficient implementation of
816   // the intrinsic for java.lang.Thread.onSpinWait()
817   static bool supports_on_spin_wait() { return supports_sse2(); }
818 
819   // x86_64 supports fast class initialization checks
820   static bool supports_fast_class_init_checks() {
821     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
822   }
823 
824   static bool supports_cont_preemption() { return true; }
825 
826   // x86_64 supports secondary supers table
827   constexpr static bool supports_secondary_supers_table() {
828     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
829   }
830 
831   constexpr static bool supports_stack_watermark_barrier() {
832     return true;
833   }
834 
835   constexpr static bool supports_recursive_lightweight_locking() {
836     return true;
837   }
838 
839   // For AVX CPUs only. f16c support is disabled if UseAVX == 0.
840   static bool supports_float16() {
841     return supports_f16c() || supports_avx512vl();
842   }
843 
844   // Check intrinsic support
845   static bool is_intrinsic_supported(vmIntrinsicID id);