771   }
772 
773   // Intel Core and newer cpus have fast IDIV instruction (excluding Atom).
774   static bool has_fast_idiv()     { return is_intel() && cpu_family() == 6 &&
775                                            supports_sse3() && _model != 0x1C; }
776 
777   static bool supports_compare_and_exchange() { return true; }
778 
779   static int allocate_prefetch_distance(bool use_watermark_prefetch);
780 
781   // SSE2 and later processors implement a 'pause' instruction
782   // that can be used for efficient implementation of
783   // the intrinsic for java.lang.Thread.onSpinWait()
784   static bool supports_on_spin_wait() { return supports_sse2(); }
785 
786   // x86_64 supports fast class initialization checks
787   static bool supports_fast_class_init_checks() {
788     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
789   }
790 


791   // x86_64 supports secondary supers table
792   constexpr static bool supports_secondary_supers_table() {
793     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
794   }
795 
796   constexpr static bool supports_stack_watermark_barrier() {
797     return true;
798   }
799 
800   constexpr static bool supports_recursive_lightweight_locking() {
801     return true;
802   }
803 
804   // For AVX CPUs only. f16c support is disabled if UseAVX == 0.
805   static bool supports_float16() {
806     return supports_f16c() || supports_avx512vl();
807   }
808 
809   // Check intrinsic support
810   static bool is_intrinsic_supported(vmIntrinsicID id);

771   }
772 
773   // Intel Core and newer cpus have fast IDIV instruction (excluding Atom).
774   static bool has_fast_idiv()     { return is_intel() && cpu_family() == 6 &&
775                                            supports_sse3() && _model != 0x1C; }
776 
777   static bool supports_compare_and_exchange() { return true; }
778 
779   static int allocate_prefetch_distance(bool use_watermark_prefetch);
780 
781   // SSE2 and later processors implement a 'pause' instruction
782   // that can be used for efficient implementation of
783   // the intrinsic for java.lang.Thread.onSpinWait()
784   static bool supports_on_spin_wait() { return supports_sse2(); }
785 
786   // x86_64 supports fast class initialization checks
787   static bool supports_fast_class_init_checks() {
788     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
789   }
790 
791   static bool supports_cont_preemption() { return true; }
792 
793   // x86_64 supports secondary supers table
794   constexpr static bool supports_secondary_supers_table() {
795     return LP64_ONLY(true) NOT_LP64(false); // not implemented on x86_32
796   }
797 
798   constexpr static bool supports_stack_watermark_barrier() {
799     return true;
800   }
801 
802   constexpr static bool supports_recursive_lightweight_locking() {
803     return true;
804   }
805 
806   // For AVX CPUs only. f16c support is disabled if UseAVX == 0.
807   static bool supports_float16() {
808     return supports_f16c() || supports_avx512vl();
809   }
810 
811   // Check intrinsic support
812   static bool is_intrinsic_supported(vmIntrinsicID id);