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src/hotspot/cpu/x86/x86.ad

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2396 #ifndef PRODUCT
2397   void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const {
2398     st->print("# breakpoint");
2399   }
2400 #endif
2401 
2402   void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
2403     C2_MacroAssembler _masm(&cbuf);
2404     __ int3();
2405   }
2406 
2407   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2408     return MachNode::size(ra_);
2409   }
2410 
2411 %}
2412 
2413 encode %{
2414 
2415   enc_class call_epilog %{

2416     if (VerifyStackAtCalls) {
2417       // Check that stack depth is unchanged: find majik cookie on stack
2418       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2419       C2_MacroAssembler _masm(&cbuf);
2420       Label L;
2421       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2422       __ jccb(Assembler::equal, L);
2423       // Die if stack mismatch
2424       __ int3();
2425       __ bind(L);
2426     }

2427   %}
2428 
2429 %}
2430 
2431 // Operands for bound floating pointer register arguments
2432 operand rxmm0() %{
2433   constraint(ALLOC_IN_RC(xmm0_reg));
2434   match(VecX);
2435   format%{%}
2436   interface(REG_INTER);
2437 %}
2438 
2439 //----------OPERANDS-----------------------------------------------------------
2440 // Operand definitions must precede instruction definitions for correct parsing
2441 // in the ADLC because operands constitute user defined types which are used in
2442 // instruction definitions.
2443 
2444 // Vectors
2445 
2446 // Dummy generic vector class. Should be used for all vector operands.

2396 #ifndef PRODUCT
2397   void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const {
2398     st->print("# breakpoint");
2399   }
2400 #endif
2401 
2402   void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
2403     C2_MacroAssembler _masm(&cbuf);
2404     __ int3();
2405   }
2406 
2407   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2408     return MachNode::size(ra_);
2409   }
2410 
2411 %}
2412 
2413 encode %{
2414 
2415   enc_class call_epilog %{
2416     C2_MacroAssembler _masm(&cbuf);
2417     if (VerifyStackAtCalls) {
2418       // Check that stack depth is unchanged: find majik cookie on stack
2419       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));

2420       Label L;
2421       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2422       __ jccb(Assembler::equal, L);
2423       // Die if stack mismatch
2424       __ int3();
2425       __ bind(L);
2426     }
2427     __ oopmap_metadata(-1);
2428   %}
2429 
2430 %}
2431 
2432 // Operands for bound floating pointer register arguments
2433 operand rxmm0() %{
2434   constraint(ALLOC_IN_RC(xmm0_reg));
2435   match(VecX);
2436   format%{%}
2437   interface(REG_INTER);
2438 %}
2439 
2440 //----------OPERANDS-----------------------------------------------------------
2441 // Operand definitions must precede instruction definitions for correct parsing
2442 // in the ADLC because operands constitute user defined types which are used in
2443 // instruction definitions.
2444 
2445 // Vectors
2446 
2447 // Dummy generic vector class. Should be used for all vector operands.
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