1 /*
   2  * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_CodeStubs.hpp"
  27 #include "c1/c1_InstructionPrinter.hpp"
  28 #include "c1/c1_LIR.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_ValueStack.hpp"
  31 #include "ci/ciInstance.hpp"
  32 #include "runtime/safepointMechanism.inline.hpp"
  33 #include "runtime/sharedRuntime.hpp"
  34 #include "runtime/vm_version.hpp"
  35 
  36 Register LIR_Opr::as_register() const {
  37   return FrameMap::cpu_rnr2reg(cpu_regnr());
  38 }
  39 
  40 Register LIR_Opr::as_register_lo() const {
  41   return FrameMap::cpu_rnr2reg(cpu_regnrLo());
  42 }
  43 
  44 Register LIR_Opr::as_register_hi() const {
  45   return FrameMap::cpu_rnr2reg(cpu_regnrHi());
  46 }
  47 
  48 
  49 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
  50 LIR_Opr LIR_OprFact::nullOpr = LIR_Opr();
  51 
  52 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
  53   ValueTag tag = type->tag();
  54   switch (tag) {
  55   case metaDataTag : {
  56     ClassConstant* c = type->as_ClassConstant();
  57     if (c != NULL && !c->value()->is_loaded()) {
  58       return LIR_OprFact::metadataConst(NULL);
  59     } else if (c != NULL) {
  60       return LIR_OprFact::metadataConst(c->value()->constant_encoding());
  61     } else {
  62       MethodConstant* m = type->as_MethodConstant();
  63       assert (m != NULL, "not a class or a method?");
  64       return LIR_OprFact::metadataConst(m->value()->constant_encoding());
  65     }
  66   }
  67   case objectTag : {
  68       return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
  69     }
  70   case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
  71   case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
  72   case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
  73   case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
  74   case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
  75   default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
  76   }
  77 }
  78 
  79 
  80 //---------------------------------------------------
  81 
  82 
  83 LIR_Address::Scale LIR_Address::scale(BasicType type) {
  84   int elem_size = type2aelembytes(type);
  85   switch (elem_size) {
  86   case 1: return LIR_Address::times_1;
  87   case 2: return LIR_Address::times_2;
  88   case 4: return LIR_Address::times_4;
  89   case 8: return LIR_Address::times_8;
  90   }
  91   ShouldNotReachHere();
  92   return LIR_Address::times_1;
  93 }
  94 
  95 //---------------------------------------------------
  96 
  97 char LIR_Opr::type_char(BasicType t) {
  98   switch (t) {
  99     case T_ARRAY:
 100       t = T_OBJECT;
 101     case T_BOOLEAN:
 102     case T_CHAR:
 103     case T_FLOAT:
 104     case T_DOUBLE:
 105     case T_BYTE:
 106     case T_SHORT:
 107     case T_INT:
 108     case T_LONG:
 109     case T_OBJECT:
 110     case T_ADDRESS:
 111     case T_VOID:
 112       return ::type2char(t);
 113     case T_METADATA:
 114       return 'M';
 115     case T_ILLEGAL:
 116       return '?';
 117 
 118     default:
 119       ShouldNotReachHere();
 120       return '?';
 121   }
 122 }
 123 
 124 #ifndef PRODUCT
 125 void LIR_Opr::validate_type() const {
 126 
 127 #ifdef ASSERT
 128   if (!is_pointer() && !is_illegal()) {
 129     OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
 130     switch (as_BasicType(type_field())) {
 131     case T_LONG:
 132       assert((kindfield == cpu_register || kindfield == stack_value) &&
 133              size_field() == double_size, "must match");
 134       break;
 135     case T_FLOAT:
 136       // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
 137       assert((kindfield == fpu_register || kindfield == stack_value
 138              ARM_ONLY(|| kindfield == cpu_register)
 139              PPC32_ONLY(|| kindfield == cpu_register) ) &&
 140              size_field() == single_size, "must match");
 141       break;
 142     case T_DOUBLE:
 143       // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
 144       assert((kindfield == fpu_register || kindfield == stack_value
 145              ARM_ONLY(|| kindfield == cpu_register)
 146              PPC32_ONLY(|| kindfield == cpu_register) ) &&
 147              size_field() == double_size, "must match");
 148       break;
 149     case T_BOOLEAN:
 150     case T_CHAR:
 151     case T_BYTE:
 152     case T_SHORT:
 153     case T_INT:
 154     case T_ADDRESS:
 155     case T_OBJECT:
 156     case T_METADATA:
 157     case T_ARRAY:
 158       assert((kindfield == cpu_register || kindfield == stack_value) &&
 159              size_field() == single_size, "must match");
 160       break;
 161 
 162     case T_ILLEGAL:
 163       // XXX TKR also means unknown right now
 164       // assert(is_illegal(), "must match");
 165       break;
 166 
 167     default:
 168       ShouldNotReachHere();
 169     }
 170   }
 171 #endif
 172 
 173 }
 174 #endif // PRODUCT
 175 
 176 
 177 bool LIR_Opr::is_oop() const {
 178   if (is_pointer()) {
 179     return pointer()->is_oop_pointer();
 180   } else {
 181     OprType t= type_field();
 182     assert(t != unknown_type, "not set");
 183     return t == object_type;
 184   }
 185 }
 186 
 187 
 188 
 189 void LIR_Op2::verify() const {
 190 #ifdef ASSERT
 191   switch (code()) {
 192     case lir_cmove:
 193     case lir_xchg:
 194       break;
 195 
 196     default:
 197       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
 198              "can't produce oops from arith");
 199   }
 200 
 201   if (TwoOperandLIRForm) {
 202 
 203 #ifdef ASSERT
 204     bool threeOperandForm = false;
 205 #ifdef S390
 206     // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
 207     threeOperandForm =
 208       code() == lir_shl ||
 209       ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
 210 #endif
 211 #endif
 212 
 213     switch (code()) {
 214     case lir_add:
 215     case lir_sub:
 216     case lir_mul:
 217     case lir_div:
 218     case lir_rem:
 219     case lir_logic_and:
 220     case lir_logic_or:
 221     case lir_logic_xor:
 222     case lir_shl:
 223     case lir_shr:
 224       assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
 225       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 226       break;
 227 
 228     // special handling for lir_ushr because of write barriers
 229     case lir_ushr:
 230       assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
 231       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 232       break;
 233 
 234     default:
 235       break;
 236     }
 237   }
 238 #endif
 239 }
 240 
 241 
 242 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
 243   : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 244   , _cond(cond)
 245   , _label(block->label())
 246   , _block(block)
 247   , _ublock(NULL)
 248   , _stub(NULL) {
 249 }
 250 
 251 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
 252   LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 253   , _cond(cond)
 254   , _label(stub->entry())
 255   , _block(NULL)
 256   , _ublock(NULL)
 257   , _stub(stub) {
 258 }
 259 
 260 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
 261   : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 262   , _cond(cond)
 263   , _label(block->label())
 264   , _block(block)
 265   , _ublock(ublock)
 266   , _stub(NULL)
 267 {
 268 }
 269 
 270 void LIR_OpBranch::change_block(BlockBegin* b) {
 271   assert(_block != NULL, "must have old block");
 272   assert(_block->label() == label(), "must be equal");
 273 
 274   _block = b;
 275   _label = b->label();
 276 }
 277 
 278 void LIR_OpBranch::change_ublock(BlockBegin* b) {
 279   assert(_ublock != NULL, "must have old block");
 280   _ublock = b;
 281 }
 282 
 283 void LIR_OpBranch::negate_cond() {
 284   switch (_cond) {
 285     case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
 286     case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
 287     case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
 288     case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
 289     case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
 290     case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
 291     default: ShouldNotReachHere();
 292   }
 293 }
 294 
 295 
 296 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
 297                                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
 298                                  bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
 299                                  CodeStub* stub)
 300 
 301   : LIR_Op(code, result, NULL)
 302   , _object(object)
 303   , _array(LIR_OprFact::illegalOpr)
 304   , _klass(klass)
 305   , _tmp1(tmp1)
 306   , _tmp2(tmp2)
 307   , _tmp3(tmp3)
 308   , _fast_check(fast_check)
 309   , _info_for_patch(info_for_patch)
 310   , _info_for_exception(info_for_exception)
 311   , _stub(stub)
 312   , _profiled_method(NULL)
 313   , _profiled_bci(-1)
 314   , _should_profile(false)
 315 {
 316   if (code == lir_checkcast) {
 317     assert(info_for_exception != NULL, "checkcast throws exceptions");
 318   } else if (code == lir_instanceof) {
 319     assert(info_for_exception == NULL, "instanceof throws no exceptions");
 320   } else {
 321     ShouldNotReachHere();
 322   }
 323 }
 324 
 325 
 326 
 327 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
 328   : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
 329   , _object(object)
 330   , _array(array)
 331   , _klass(NULL)
 332   , _tmp1(tmp1)
 333   , _tmp2(tmp2)
 334   , _tmp3(tmp3)
 335   , _fast_check(false)
 336   , _info_for_patch(NULL)
 337   , _info_for_exception(info_for_exception)
 338   , _stub(NULL)
 339   , _profiled_method(NULL)
 340   , _profiled_bci(-1)
 341   , _should_profile(false)
 342 {
 343   if (code == lir_store_check) {
 344     _stub = new ArrayStoreExceptionStub(object, info_for_exception);
 345     assert(info_for_exception != NULL, "store_check throws exceptions");
 346   } else {
 347     ShouldNotReachHere();
 348   }
 349 }
 350 
 351 
 352 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
 353                                  LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
 354   : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
 355   , _src(src)
 356   , _src_pos(src_pos)
 357   , _dst(dst)
 358   , _dst_pos(dst_pos)
 359   , _length(length)
 360   , _tmp(tmp)
 361   , _expected_type(expected_type)
 362   , _flags(flags) {
 363   _stub = new ArrayCopyStub(this);
 364 }
 365 
 366 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
 367   : LIR_Op(lir_updatecrc32, res, NULL)
 368   , _crc(crc)
 369   , _val(val) {
 370 }
 371 
 372 //-------------------verify--------------------------
 373 
 374 void LIR_Op1::verify() const {
 375   switch(code()) {
 376   case lir_move:
 377     assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
 378     break;
 379   case lir_null_check:
 380     assert(in_opr()->is_register(), "must be");
 381     break;
 382   case lir_return:
 383     assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
 384     break;
 385   default:
 386     break;
 387   }
 388 }
 389 
 390 void LIR_OpRTCall::verify() const {
 391   assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
 392 }
 393 
 394 //-------------------visits--------------------------
 395 
 396 // complete rework of LIR instruction visitor.
 397 // The virtual call for each instruction type is replaced by a big
 398 // switch that adds the operands for each instruction
 399 
 400 void LIR_OpVisitState::visit(LIR_Op* op) {
 401   // copy information from the LIR_Op
 402   reset();
 403   set_op(op);
 404 
 405   switch (op->code()) {
 406 
 407 // LIR_Op0
 408     case lir_fpop_raw:                 // result and info always invalid
 409     case lir_breakpoint:               // result and info always invalid
 410     case lir_membar:                   // result and info always invalid
 411     case lir_membar_acquire:           // result and info always invalid
 412     case lir_membar_release:           // result and info always invalid
 413     case lir_membar_loadload:          // result and info always invalid
 414     case lir_membar_storestore:        // result and info always invalid
 415     case lir_membar_loadstore:         // result and info always invalid
 416     case lir_membar_storeload:         // result and info always invalid
 417     case lir_on_spin_wait:
 418     {
 419       assert(op->as_Op0() != NULL, "must be");
 420       assert(op->_info == NULL, "info not used by this instruction");
 421       assert(op->_result->is_illegal(), "not used");
 422       break;
 423     }
 424 
 425     case lir_nop:                      // may have info, result always invalid
 426     case lir_std_entry:                // may have result, info always invalid
 427     case lir_osr_entry:                // may have result, info always invalid
 428     case lir_get_thread:               // may have result, info always invalid
 429     {
 430       assert(op->as_Op0() != NULL, "must be");
 431       if (op->_info != NULL)           do_info(op->_info);
 432       if (op->_result->is_valid())     do_output(op->_result);
 433       break;
 434     }
 435 

 436 // LIR_OpLabel
 437     case lir_label:                    // result and info always invalid
 438     {
 439       assert(op->as_OpLabel() != NULL, "must be");
 440       assert(op->_info == NULL, "info not used by this instruction");
 441       assert(op->_result->is_illegal(), "not used");
 442       break;
 443     }
 444 
 445 
 446 // LIR_Op1
 447     case lir_fxch:           // input always valid, result and info always invalid
 448     case lir_fld:            // input always valid, result and info always invalid
 449     case lir_push:           // input always valid, result and info always invalid
 450     case lir_pop:            // input always valid, result and info always invalid
 451     case lir_leal:           // input and result always valid, info always invalid
 452     case lir_monaddr:        // input and result always valid, info always invalid
 453     case lir_null_check:     // input and info always valid, result always invalid
 454     case lir_move:           // input and result always valid, may have info
 455     {
 456       assert(op->as_Op1() != NULL, "must be");
 457       LIR_Op1* op1 = (LIR_Op1*)op;
 458 
 459       if (op1->_info)                  do_info(op1->_info);
 460       if (op1->_opr->is_valid())       do_input(op1->_opr);
 461       if (op1->_result->is_valid())    do_output(op1->_result);
 462 
 463       break;
 464     }
 465 
 466     case lir_return:
 467     {
 468       assert(op->as_OpReturn() != NULL, "must be");
 469       LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
 470 
 471       if (op_ret->_info)               do_info(op_ret->_info);
 472       if (op_ret->_opr->is_valid())    do_input(op_ret->_opr);
 473       if (op_ret->_result->is_valid()) do_output(op_ret->_result);
 474       if (op_ret->stub() != NULL)      do_stub(op_ret->stub());
 475 
 476       break;
 477     }
 478 
 479     case lir_safepoint:
 480     {
 481       assert(op->as_Op1() != NULL, "must be");
 482       LIR_Op1* op1 = (LIR_Op1*)op;
 483 
 484       assert(op1->_info != NULL, "");  do_info(op1->_info);
 485       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
 486       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 487 
 488       break;
 489     }
 490 
 491 // LIR_OpConvert;
 492     case lir_convert:        // input and result always valid, info always invalid
 493     {
 494       assert(op->as_OpConvert() != NULL, "must be");
 495       LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
 496 
 497       assert(opConvert->_info == NULL, "must be");
 498       if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
 499       if (opConvert->_result->is_valid())    do_output(opConvert->_result);
 500 #ifdef PPC32
 501       if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
 502       if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
 503 #endif
 504       do_stub(opConvert->_stub);
 505 
 506       break;
 507     }
 508 
 509 // LIR_OpBranch;
 510     case lir_branch:                   // may have info, input and result register always invalid
 511     case lir_cond_float_branch:        // may have info, input and result register always invalid
 512     {
 513       assert(op->as_OpBranch() != NULL, "must be");
 514       LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
 515 
 516       if (opBranch->_info != NULL)     do_info(opBranch->_info);
 517       assert(opBranch->_result->is_illegal(), "not used");
 518       if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
 519 
 520       break;
 521     }
 522 
 523 
 524 // LIR_OpAllocObj
 525     case lir_alloc_object:
 526     {
 527       assert(op->as_OpAllocObj() != NULL, "must be");
 528       LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
 529 
 530       if (opAllocObj->_info)                     do_info(opAllocObj->_info);
 531       if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
 532                                                  do_temp(opAllocObj->_opr);
 533                                         }
 534       if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
 535       if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
 536       if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
 537       if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
 538       if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
 539                                                  do_stub(opAllocObj->_stub);
 540       break;
 541     }
 542 
 543 
 544 // LIR_OpRoundFP;
 545     case lir_roundfp: {
 546       assert(op->as_OpRoundFP() != NULL, "must be");
 547       LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
 548 
 549       assert(op->_info == NULL, "info not used by this instruction");
 550       assert(opRoundFP->_tmp->is_illegal(), "not used");
 551       do_input(opRoundFP->_opr);
 552       do_output(opRoundFP->_result);
 553 
 554       break;
 555     }
 556 
 557 
 558 // LIR_Op2
 559     case lir_cmp:
 560     case lir_cmp_l2i:
 561     case lir_ucmp_fd2i:
 562     case lir_cmp_fd2i:
 563     case lir_add:
 564     case lir_sub:
 565     case lir_rem:
 566     case lir_sqrt:
 567     case lir_abs:
 568     case lir_neg:
 569     case lir_logic_and:
 570     case lir_logic_or:
 571     case lir_logic_xor:
 572     case lir_shl:
 573     case lir_shr:
 574     case lir_ushr:
 575     case lir_xadd:
 576     case lir_xchg:
 577     case lir_assert:
 578     {
 579       assert(op->as_Op2() != NULL, "must be");
 580       LIR_Op2* op2 = (LIR_Op2*)op;
 581       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 582              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 583 
 584       if (op2->_info)                     do_info(op2->_info);
 585       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 586       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 587       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 588       if (op2->_result->is_valid())       do_output(op2->_result);
 589       if (op->code() == lir_xchg || op->code() == lir_xadd) {
 590         // on ARM and PPC, return value is loaded first so could
 591         // destroy inputs. On other platforms that implement those
 592         // (x86, sparc), the extra constrainsts are harmless.
 593         if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
 594         if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
 595       }
 596 
 597       break;
 598     }
 599 
 600     // special handling for cmove: right input operand must not be equal
 601     // to the result operand, otherwise the backend fails
 602     case lir_cmove:
 603     {
 604       assert(op->as_Op2() != NULL, "must be");
 605       LIR_Op2* op2 = (LIR_Op2*)op;
 606 
 607       assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
 608              op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 609       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 610 
 611       do_input(op2->_opr1);
 612       do_input(op2->_opr2);
 613       do_temp(op2->_opr2);
 614       do_output(op2->_result);
 615 
 616       break;
 617     }
 618 
 619     // vspecial handling for strict operations: register input operands
 620     // as temp to guarantee that they do not overlap with other
 621     // registers
 622     case lir_mul:
 623     case lir_div:
 624     {
 625       assert(op->as_Op2() != NULL, "must be");
 626       LIR_Op2* op2 = (LIR_Op2*)op;
 627 
 628       assert(op2->_info == NULL, "not used");
 629       assert(op2->_opr1->is_valid(), "used");
 630       assert(op2->_opr2->is_valid(), "used");
 631       assert(op2->_result->is_valid(), "used");
 632       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 633              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 634 
 635       do_input(op2->_opr1); do_temp(op2->_opr1);
 636       do_input(op2->_opr2); do_temp(op2->_opr2);
 637       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 638       do_output(op2->_result);
 639 
 640       break;
 641     }
 642 
 643     case lir_throw: {
 644       assert(op->as_Op2() != NULL, "must be");
 645       LIR_Op2* op2 = (LIR_Op2*)op;
 646 
 647       if (op2->_info)                     do_info(op2->_info);
 648       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 649       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 650       assert(op2->_result->is_illegal(), "no result");
 651       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 652              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 653 
 654       break;
 655     }
 656 
 657     case lir_unwind: {
 658       assert(op->as_Op1() != NULL, "must be");
 659       LIR_Op1* op1 = (LIR_Op1*)op;
 660 
 661       assert(op1->_info == NULL, "no info");
 662       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 663       assert(op1->_result->is_illegal(), "no result");
 664 
 665       break;
 666     }
 667 
 668 // LIR_Op3
 669     case lir_idiv:
 670     case lir_irem: {
 671       assert(op->as_Op3() != NULL, "must be");
 672       LIR_Op3* op3= (LIR_Op3*)op;
 673 
 674       if (op3->_info)                     do_info(op3->_info);
 675       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 676 
 677       // second operand is input and temp, so ensure that second operand
 678       // and third operand get not the same register
 679       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 680       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 681       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 682 
 683       if (op3->_result->is_valid())       do_output(op3->_result);
 684 
 685       break;
 686     }
 687 
 688     case lir_fmad:
 689     case lir_fmaf: {
 690       assert(op->as_Op3() != NULL, "must be");
 691       LIR_Op3* op3= (LIR_Op3*)op;
 692       assert(op3->_info == NULL, "no info");
 693       do_input(op3->_opr1);
 694       do_input(op3->_opr2);
 695       do_input(op3->_opr3);
 696       do_output(op3->_result);
 697       break;
 698     }
 699 
 700 // LIR_OpJavaCall
 701     case lir_static_call:
 702     case lir_optvirtual_call:
 703     case lir_icvirtual_call:
 704     case lir_dynamic_call: {
 705       LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
 706       assert(opJavaCall != NULL, "must be");
 707 
 708       if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
 709 
 710       // only visit register parameters
 711       int n = opJavaCall->_arguments->length();
 712       for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
 713         if (!opJavaCall->_arguments->at(i)->is_pointer()) {
 714           do_input(*opJavaCall->_arguments->adr_at(i));
 715         }
 716       }
 717 
 718       if (opJavaCall->_info)                     do_info(opJavaCall->_info);
 719       if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
 720           opJavaCall->is_method_handle_invoke()) {
 721         opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
 722         do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
 723       }
 724       do_call();
 725       if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
 726 
 727       break;
 728     }
 729 
 730 
 731 // LIR_OpRTCall
 732     case lir_rtcall: {
 733       assert(op->as_OpRTCall() != NULL, "must be");
 734       LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
 735 
 736       // only visit register parameters
 737       int n = opRTCall->_arguments->length();
 738       for (int i = 0; i < n; i++) {
 739         if (!opRTCall->_arguments->at(i)->is_pointer()) {
 740           do_input(*opRTCall->_arguments->adr_at(i));
 741         }
 742       }
 743       if (opRTCall->_info)                     do_info(opRTCall->_info);
 744       if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
 745       do_call();
 746       if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
 747 
 748       break;
 749     }
 750 
 751 
 752 // LIR_OpArrayCopy
 753     case lir_arraycopy: {
 754       assert(op->as_OpArrayCopy() != NULL, "must be");
 755       LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
 756 
 757       assert(opArrayCopy->_result->is_illegal(), "unused");
 758       assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
 759       assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
 760       assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
 761       assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
 762       assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
 763       assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
 764       if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
 765 
 766       // the implementation of arraycopy always has a call into the runtime
 767       do_call();
 768 
 769       break;
 770     }
 771 
 772 
 773 // LIR_OpUpdateCRC32
 774     case lir_updatecrc32: {
 775       assert(op->as_OpUpdateCRC32() != NULL, "must be");
 776       LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
 777 
 778       assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
 779       assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
 780       assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
 781       assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
 782 
 783       break;
 784     }
 785 
 786 
 787 // LIR_OpLock
 788     case lir_lock:
 789     case lir_unlock: {
 790       assert(op->as_OpLock() != NULL, "must be");
 791       LIR_OpLock* opLock = (LIR_OpLock*)op;
 792 
 793       if (opLock->_info)                          do_info(opLock->_info);
 794 
 795       // TODO: check if these operands really have to be temp
 796       // (or if input is sufficient). This may have influence on the oop map!
 797       assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
 798       assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
 799       assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
 800 
 801       if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
 802       assert(opLock->_result->is_illegal(), "unused");
 803 
 804       do_stub(opLock->_stub);
 805 
 806       break;
 807     }
 808 
 809 
 810 // LIR_OpDelay
 811     case lir_delay_slot: {
 812       assert(op->as_OpDelay() != NULL, "must be");
 813       LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
 814 
 815       visit(opDelay->delay_op());
 816       break;
 817     }
 818 
 819 // LIR_OpTypeCheck
 820     case lir_instanceof:
 821     case lir_checkcast:
 822     case lir_store_check: {
 823       assert(op->as_OpTypeCheck() != NULL, "must be");
 824       LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
 825 
 826       if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
 827       if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
 828       if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
 829       if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
 830         do_temp(opTypeCheck->_object);
 831       }
 832       if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
 833       if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
 834       if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
 835       if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
 836       if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
 837                                                   do_stub(opTypeCheck->_stub);
 838       break;
 839     }
 840 
 841 // LIR_OpCompareAndSwap
 842     case lir_cas_long:
 843     case lir_cas_obj:
 844     case lir_cas_int: {
 845       assert(op->as_OpCompareAndSwap() != NULL, "must be");
 846       LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
 847 
 848       assert(opCompareAndSwap->_addr->is_valid(),      "used");
 849       assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
 850       assert(opCompareAndSwap->_new_value->is_valid(), "used");
 851       if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
 852                                                       do_input(opCompareAndSwap->_addr);
 853                                                       do_temp(opCompareAndSwap->_addr);
 854                                                       do_input(opCompareAndSwap->_cmp_value);
 855                                                       do_temp(opCompareAndSwap->_cmp_value);
 856                                                       do_input(opCompareAndSwap->_new_value);
 857                                                       do_temp(opCompareAndSwap->_new_value);
 858       if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
 859       if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
 860       if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
 861 
 862       break;
 863     }
 864 
 865 
 866 // LIR_OpAllocArray;
 867     case lir_alloc_array: {
 868       assert(op->as_OpAllocArray() != NULL, "must be");
 869       LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
 870 
 871       if (opAllocArray->_info)                        do_info(opAllocArray->_info);
 872       if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
 873       if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
 874       if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
 875       if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
 876       if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
 877       if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
 878       if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
 879                                                       do_stub(opAllocArray->_stub);
 880       break;
 881     }
 882 
 883 // LIR_OpLoadKlass
 884     case lir_load_klass:
 885     {
 886       LIR_OpLoadKlass* opLoadKlass = op->as_OpLoadKlass();
 887       assert(opLoadKlass != NULL, "must be");
 888 
 889       do_input(opLoadKlass->_obj);
 890       do_output(opLoadKlass->_result);
 891       if (opLoadKlass->_info) do_info(opLoadKlass->_info);
 892       break;
 893     }
 894 
 895 
 896 // LIR_OpProfileCall:
 897     case lir_profile_call: {
 898       assert(op->as_OpProfileCall() != NULL, "must be");
 899       LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
 900 
 901       if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
 902       assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
 903       assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
 904       break;
 905     }
 906 
 907 // LIR_OpProfileType:
 908     case lir_profile_type: {
 909       assert(op->as_OpProfileType() != NULL, "must be");
 910       LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
 911 
 912       do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
 913       do_input(opProfileType->_obj);
 914       do_temp(opProfileType->_tmp);
 915       break;
 916     }
 917   default:
 918     op->visit(this);
 919   }
 920 }
 921 
 922 void LIR_Op::visit(LIR_OpVisitState* state) {
 923   ShouldNotReachHere();
 924 }
 925 
 926 void LIR_OpVisitState::do_stub(CodeStub* stub) {
 927   if (stub != NULL) {
 928     stub->visit(this);
 929   }
 930 }
 931 
 932 XHandlers* LIR_OpVisitState::all_xhandler() {
 933   XHandlers* result = NULL;
 934 
 935   int i;
 936   for (i = 0; i < info_count(); i++) {
 937     if (info_at(i)->exception_handlers() != NULL) {
 938       result = info_at(i)->exception_handlers();
 939       break;
 940     }
 941   }
 942 
 943 #ifdef ASSERT
 944   for (i = 0; i < info_count(); i++) {
 945     assert(info_at(i)->exception_handlers() == NULL ||
 946            info_at(i)->exception_handlers() == result,
 947            "only one xhandler list allowed per LIR-operation");
 948   }
 949 #endif
 950 
 951   if (result != NULL) {
 952     return result;
 953   } else {
 954     return new XHandlers();
 955   }
 956 
 957   return result;
 958 }
 959 
 960 
 961 #ifdef ASSERT
 962 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
 963   visit(op);
 964 
 965   return opr_count(inputMode) == 0 &&
 966          opr_count(outputMode) == 0 &&
 967          opr_count(tempMode) == 0 &&
 968          info_count() == 0 &&
 969          !has_call() &&
 970          !has_slow_case();
 971 }
 972 #endif
 973 
 974 // LIR_OpReturn
 975 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
 976     LIR_Op1(lir_return, opr, (CodeEmitInfo*)NULL /* info */),
 977     _stub(NULL) {
 978   if (VM_Version::supports_stack_watermark_barrier()) {
 979     _stub = new C1SafepointPollStub();
 980   }
 981 }
 982 
 983 //---------------------------------------------------
 984 
 985 
 986 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
 987   masm->emit_call(this);
 988 }
 989 
 990 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
 991   masm->emit_rtcall(this);
 992 }
 993 
 994 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
 995   masm->emit_opLabel(this);
 996 }
 997 
 998 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
 999   masm->emit_arraycopy(this);
1000   masm->append_code_stub(stub());
1001 }
1002 
1003 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1004   masm->emit_updatecrc32(this);
1005 }
1006 
1007 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1008   masm->emit_op0(this);
1009 }
1010 
1011 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1012   masm->emit_op1(this);
1013 }
1014 
1015 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1016   masm->emit_alloc_obj(this);
1017   masm->append_code_stub(stub());
1018 }
1019 
1020 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1021   masm->emit_opBranch(this);
1022   if (stub()) {
1023     masm->append_code_stub(stub());
1024   }
1025 }
1026 
1027 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1028   masm->emit_opConvert(this);
1029   if (stub() != NULL) {
1030     masm->append_code_stub(stub());
1031   }
1032 }
1033 
1034 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1035   masm->emit_op2(this);
1036 }
1037 
1038 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1039   masm->emit_alloc_array(this);
1040   masm->append_code_stub(stub());
1041 }
1042 
1043 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1044   masm->emit_opTypeCheck(this);
1045   if (stub()) {
1046     masm->append_code_stub(stub());
1047   }
1048 }
1049 
1050 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1051   masm->emit_compare_and_swap(this);
1052 }
1053 
1054 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1055   masm->emit_op3(this);
1056 }
1057 
1058 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1059   masm->emit_lock(this);
1060   if (stub()) {
1061     masm->append_code_stub(stub());
1062   }
1063 }
1064 
1065 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1066   masm->emit_load_klass(this);
1067 }
1068 
1069 #ifdef ASSERT
1070 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1071   masm->emit_assert(this);
1072 }
1073 #endif
1074 
1075 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1076   masm->emit_delay(this);
1077 }
1078 
1079 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1080   masm->emit_profile_call(this);
1081 }
1082 
1083 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1084   masm->emit_profile_type(this);
1085 }
1086 
1087 // LIR_List
1088 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1089   : _operations(8)
1090   , _compilation(compilation)
1091 #ifndef PRODUCT
1092   , _block(block)
1093 #endif
1094 #ifdef ASSERT
1095   , _file(NULL)
1096   , _line(0)
1097 #endif
1098 { }
1099 
1100 
1101 #ifdef ASSERT
1102 void LIR_List::set_file_and_line(const char * file, int line) {
1103   const char * f = strrchr(file, '/');
1104   if (f == NULL) f = strrchr(file, '\\');
1105   if (f == NULL) {
1106     f = file;
1107   } else {
1108     f++;
1109   }
1110   _file = f;
1111   _line = line;
1112 }
1113 #endif
1114 
1115 
1116 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1117   assert(this == buffer->lir_list(), "wrong lir list");
1118   const int n = _operations.length();
1119 
1120   if (buffer->number_of_ops() > 0) {
1121     // increase size of instructions list
1122     _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1123     // insert ops from buffer into instructions list
1124     int op_index = buffer->number_of_ops() - 1;
1125     int ip_index = buffer->number_of_insertion_points() - 1;
1126     int from_index = n - 1;
1127     int to_index = _operations.length() - 1;
1128     for (; ip_index >= 0; ip_index --) {
1129       int index = buffer->index_at(ip_index);
1130       // make room after insertion point
1131       while (index < from_index) {
1132         _operations.at_put(to_index --, _operations.at(from_index --));
1133       }
1134       // insert ops from buffer
1135       for (int i = buffer->count_at(ip_index); i > 0; i --) {
1136         _operations.at_put(to_index --, buffer->op_at(op_index --));
1137       }
1138     }
1139   }
1140 
1141   buffer->finish();
1142 }
1143 
1144 
1145 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1146   assert(reg->type() == T_OBJECT, "bad reg");
1147   append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
1148 }
1149 
1150 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1151   assert(reg->type() == T_METADATA, "bad reg");
1152   append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1153 }
1154 
1155 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1156   append(new LIR_Op1(
1157             lir_move,
1158             LIR_OprFact::address(addr),
1159             src,
1160             addr->type(),
1161             patch_code,
1162             info));
1163 }
1164 
1165 
1166 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1167   append(new LIR_Op1(
1168             lir_move,
1169             LIR_OprFact::address(address),
1170             dst,
1171             address->type(),
1172             patch_code,
1173             info, lir_move_volatile));
1174 }
1175 
1176 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1177   append(new LIR_Op1(
1178             lir_move,
1179             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1180             dst,
1181             type,
1182             patch_code,
1183             info, lir_move_volatile));
1184 }
1185 
1186 
1187 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1188   append(new LIR_Op1(
1189             lir_move,
1190             LIR_OprFact::intConst(v),
1191             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1192             type,
1193             patch_code,
1194             info));
1195 }
1196 
1197 
1198 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1199   append(new LIR_Op1(
1200             lir_move,
1201             LIR_OprFact::oopConst(o),
1202             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1203             type,
1204             patch_code,
1205             info));
1206 }
1207 
1208 
1209 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1210   append(new LIR_Op1(
1211             lir_move,
1212             src,
1213             LIR_OprFact::address(addr),
1214             addr->type(),
1215             patch_code,
1216             info));
1217 }
1218 
1219 
1220 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1221   append(new LIR_Op1(
1222             lir_move,
1223             src,
1224             LIR_OprFact::address(addr),
1225             addr->type(),
1226             patch_code,
1227             info,
1228             lir_move_volatile));
1229 }
1230 
1231 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1232   append(new LIR_Op1(
1233             lir_move,
1234             src,
1235             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1236             type,
1237             patch_code,
1238             info, lir_move_volatile));
1239 }
1240 
1241 
1242 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1243   append(new LIR_Op3(
1244                     lir_idiv,
1245                     left,
1246                     right,
1247                     tmp,
1248                     res,
1249                     info));
1250 }
1251 
1252 
1253 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1254   append(new LIR_Op3(
1255                     lir_idiv,
1256                     left,
1257                     LIR_OprFact::intConst(right),
1258                     tmp,
1259                     res,
1260                     info));
1261 }
1262 
1263 
1264 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1265   append(new LIR_Op3(
1266                     lir_irem,
1267                     left,
1268                     right,
1269                     tmp,
1270                     res,
1271                     info));
1272 }
1273 
1274 
1275 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1276   append(new LIR_Op3(
1277                     lir_irem,
1278                     left,
1279                     LIR_OprFact::intConst(right),
1280                     tmp,
1281                     res,
1282                     info));
1283 }
1284 
1285 
1286 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1287   append(new LIR_Op2(
1288                     lir_cmp,
1289                     condition,
1290                     LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1291                     LIR_OprFact::intConst(c),
1292                     info));
1293 }
1294 
1295 
1296 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1297   append(new LIR_Op2(
1298                     lir_cmp,
1299                     condition,
1300                     reg,
1301                     LIR_OprFact::address(addr),
1302                     info));
1303 }
1304 
1305 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1306                                int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1307   append(new LIR_OpAllocObj(
1308                            klass,
1309                            dst,
1310                            t1,
1311                            t2,
1312                            t3,
1313                            t4,
1314                            header_size,
1315                            object_size,
1316                            init_check,
1317                            stub));
1318 }
1319 
1320 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1321   append(new LIR_OpAllocArray(
1322                            klass,
1323                            len,
1324                            dst,
1325                            t1,
1326                            t2,
1327                            t3,
1328                            t4,
1329                            type,
1330                            stub));
1331 }
1332 
1333 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1334  append(new LIR_Op2(
1335                     lir_shl,
1336                     value,
1337                     count,
1338                     dst,
1339                     tmp));
1340 }
1341 
1342 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1343  append(new LIR_Op2(
1344                     lir_shr,
1345                     value,
1346                     count,
1347                     dst,
1348                     tmp));
1349 }
1350 
1351 
1352 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1353  append(new LIR_Op2(
1354                     lir_ushr,
1355                     value,
1356                     count,
1357                     dst,
1358                     tmp));
1359 }
1360 
1361 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1362   append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1363                      left,
1364                      right,
1365                      dst));
1366 }
1367 
1368 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1369   append(new LIR_OpLock(
1370                     lir_lock,
1371                     hdr,
1372                     obj,
1373                     lock,
1374                     scratch,
1375                     stub,
1376                     info));
1377 }
1378 
1379 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1380   append(new LIR_OpLock(
1381                     lir_unlock,
1382                     hdr,
1383                     obj,
1384                     lock,
1385                     scratch,
1386                     stub,
1387                     NULL));
1388 }
1389 
1390 
1391 void check_LIR() {
1392   // cannot do the proper checking as PRODUCT and other modes return different results
1393   // guarantee(sizeof(LIR_Opr) == wordSize, "may not have a v-table");
1394 }
1395 
1396 
1397 
1398 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1399                           LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1400                           CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1401                           ciMethod* profiled_method, int profiled_bci) {
1402   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1403                                            tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1404   if (profiled_method != NULL) {
1405     c->set_profiled_method(profiled_method);
1406     c->set_profiled_bci(profiled_bci);
1407     c->set_should_profile(true);
1408   }
1409   append(c);
1410 }
1411 
1412 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1413   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1414   if (profiled_method != NULL) {
1415     c->set_profiled_method(profiled_method);
1416     c->set_profiled_bci(profiled_bci);
1417     c->set_should_profile(true);
1418   }
1419   append(c);
1420 }
1421 
1422 
1423 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1424                            CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1425   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1426   if (profiled_method != NULL) {
1427     c->set_profiled_method(profiled_method);
1428     c->set_profiled_bci(profiled_bci);
1429     c->set_should_profile(true);
1430   }
1431   append(c);
1432 }
1433 
1434 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1435   if (deoptimize_on_null) {
1436     // Emit an explicit null check and deoptimize if opr is null
1437     CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1438     cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1439     branch(lir_cond_equal, deopt);
1440   } else {
1441     // Emit an implicit null check
1442     append(new LIR_Op1(lir_null_check, opr, info));
1443   }
1444 }
1445 
1446 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1447                         LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1448   append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1449 }
1450 
1451 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1452                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1453   append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1454 }
1455 
1456 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1457                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1458   append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1459 }
1460 
1461 
1462 #ifdef PRODUCT
1463 
1464 void print_LIR(BlockList* blocks) {
1465 }
1466 
1467 #else
1468 // LIR_Opr
1469 void LIR_Opr::print() const {
1470   print(tty);
1471 }
1472 
1473 void LIR_Opr::print(outputStream* out) const {
1474   if (is_illegal()) {
1475     return;
1476   }
1477 
1478   out->print("[");
1479   if (is_pointer()) {
1480     pointer()->print_value_on(out);
1481   } else if (is_single_stack()) {
1482     out->print("stack:%d", single_stack_ix());
1483   } else if (is_double_stack()) {
1484     out->print("dbl_stack:%d",double_stack_ix());
1485   } else if (is_virtual()) {
1486     out->print("R%d", vreg_number());
1487   } else if (is_single_cpu()) {
1488     out->print("%s", as_register()->name());
1489   } else if (is_double_cpu()) {
1490     out->print("%s", as_register_hi()->name());
1491     out->print("%s", as_register_lo()->name());
1492 #if defined(X86)
1493   } else if (is_single_xmm()) {
1494     out->print("%s", as_xmm_float_reg()->name());
1495   } else if (is_double_xmm()) {
1496     out->print("%s", as_xmm_double_reg()->name());
1497   } else if (is_single_fpu()) {
1498     out->print("fpu%d", fpu_regnr());
1499   } else if (is_double_fpu()) {
1500     out->print("fpu%d", fpu_regnrLo());
1501 #elif defined(AARCH64)
1502   } else if (is_single_fpu()) {
1503     out->print("fpu%d", fpu_regnr());
1504   } else if (is_double_fpu()) {
1505     out->print("fpu%d", fpu_regnrLo());
1506 #elif defined(ARM)
1507   } else if (is_single_fpu()) {
1508     out->print("s%d", fpu_regnr());
1509   } else if (is_double_fpu()) {
1510     out->print("d%d", fpu_regnrLo() >> 1);
1511 #else
1512   } else if (is_single_fpu()) {
1513     out->print("%s", as_float_reg()->name());
1514   } else if (is_double_fpu()) {
1515     out->print("%s", as_double_reg()->name());
1516 #endif
1517 
1518   } else if (is_illegal()) {
1519     out->print("-");
1520   } else {
1521     out->print("Unknown Operand");
1522   }
1523   if (!is_illegal()) {
1524     out->print("|%c", type_char());
1525   }
1526   if (is_register() && is_last_use()) {
1527     out->print("(last_use)");
1528   }
1529   out->print("]");
1530 }
1531 
1532 
1533 // LIR_Address
1534 void LIR_Const::print_value_on(outputStream* out) const {
1535   switch (type()) {
1536     case T_ADDRESS:out->print("address:%d",as_jint());          break;
1537     case T_INT:    out->print("int:%d",   as_jint());           break;
1538     case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1539     case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
1540     case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
1541     case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
1542     case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1543     default:       out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1544   }
1545 }
1546 
1547 // LIR_Address
1548 void LIR_Address::print_value_on(outputStream* out) const {
1549   out->print("Base:"); _base->print(out);
1550   if (!_index->is_illegal()) {
1551     out->print(" Index:"); _index->print(out);
1552     switch (scale()) {
1553     case times_1: break;
1554     case times_2: out->print(" * 2"); break;
1555     case times_4: out->print(" * 4"); break;
1556     case times_8: out->print(" * 8"); break;
1557     }
1558   }
1559   out->print(" Disp: " INTX_FORMAT, _disp);
1560 }
1561 
1562 // debug output of block header without InstructionPrinter
1563 //       (because phi functions are not necessary for LIR)
1564 static void print_block(BlockBegin* x) {
1565   // print block id
1566   BlockEnd* end = x->end();
1567   tty->print("B%d ", x->block_id());
1568 
1569   // print flags
1570   if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
1571   if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
1572   if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
1573   if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
1574   if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
1575   if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1576   if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
1577 
1578   // print block bci range
1579   tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1580 
1581   // print predecessors and successors
1582   if (x->number_of_preds() > 0) {
1583     tty->print("preds: ");
1584     for (int i = 0; i < x->number_of_preds(); i ++) {
1585       tty->print("B%d ", x->pred_at(i)->block_id());
1586     }
1587   }
1588 
1589   if (x->number_of_sux() > 0) {
1590     tty->print("sux: ");
1591     for (int i = 0; i < x->number_of_sux(); i ++) {
1592       tty->print("B%d ", x->sux_at(i)->block_id());
1593     }
1594   }
1595 
1596   // print exception handlers
1597   if (x->number_of_exception_handlers() > 0) {
1598     tty->print("xhandler: ");
1599     for (int i = 0; i < x->number_of_exception_handlers();  i++) {
1600       tty->print("B%d ", x->exception_handler_at(i)->block_id());
1601     }
1602   }
1603 
1604   tty->cr();
1605 }
1606 
1607 void print_LIR(BlockList* blocks) {
1608   tty->print_cr("LIR:");
1609   int i;
1610   for (i = 0; i < blocks->length(); i++) {
1611     BlockBegin* bb = blocks->at(i);
1612     print_block(bb);
1613     tty->print("__id_Instruction___________________________________________"); tty->cr();
1614     bb->lir()->print_instructions();
1615   }
1616 }
1617 
1618 void LIR_List::print_instructions() {
1619   for (int i = 0; i < _operations.length(); i++) {
1620     _operations.at(i)->print(); tty->cr();
1621   }
1622   tty->cr();
1623 }
1624 
1625 // LIR_Ops printing routines
1626 // LIR_Op
1627 void LIR_Op::print_on(outputStream* out) const {
1628   if (id() != -1 || PrintCFGToFile) {
1629     out->print("%4d ", id());
1630   } else {
1631     out->print("     ");
1632   }
1633   out->print("%s ", name());
1634   print_instr(out);
1635   if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1636 #ifdef ASSERT
1637   if (Verbose && _file != NULL) {
1638     out->print(" (%s:%d)", _file, _line);
1639   }
1640 #endif
1641 }
1642 
1643 const char * LIR_Op::name() const {
1644   const char* s = NULL;
1645   switch(code()) {
1646      // LIR_Op0
1647      case lir_membar:                s = "membar";        break;
1648      case lir_membar_acquire:        s = "membar_acquire"; break;
1649      case lir_membar_release:        s = "membar_release"; break;
1650      case lir_membar_loadload:       s = "membar_loadload";   break;
1651      case lir_membar_storestore:     s = "membar_storestore"; break;
1652      case lir_membar_loadstore:      s = "membar_loadstore";  break;
1653      case lir_membar_storeload:      s = "membar_storeload";  break;
1654      case lir_label:                 s = "label";         break;
1655      case lir_nop:                   s = "nop";           break;
1656      case lir_on_spin_wait:          s = "on_spin_wait";  break;
1657      case lir_std_entry:             s = "std_entry";     break;
1658      case lir_osr_entry:             s = "osr_entry";     break;
1659      case lir_fpop_raw:              s = "fpop_raw";      break;
1660      case lir_breakpoint:            s = "breakpoint";    break;
1661      case lir_get_thread:            s = "get_thread";    break;
1662      // LIR_Op1
1663      case lir_fxch:                  s = "fxch";          break;
1664      case lir_fld:                   s = "fld";           break;
1665      case lir_push:                  s = "push";          break;
1666      case lir_pop:                   s = "pop";           break;
1667      case lir_null_check:            s = "null_check";    break;
1668      case lir_return:                s = "return";        break;
1669      case lir_safepoint:             s = "safepoint";     break;
1670      case lir_leal:                  s = "leal";          break;
1671      case lir_branch:                s = "branch";        break;
1672      case lir_cond_float_branch:     s = "flt_cond_br";   break;
1673      case lir_move:                  s = "move";          break;
1674      case lir_roundfp:               s = "roundfp";       break;
1675      case lir_rtcall:                s = "rtcall";        break;
1676      case lir_throw:                 s = "throw";         break;
1677      case lir_unwind:                s = "unwind";        break;
1678      case lir_convert:               s = "convert";       break;
1679      case lir_alloc_object:          s = "alloc_obj";     break;
1680      case lir_monaddr:               s = "mon_addr";      break;
1681      // LIR_Op2
1682      case lir_cmp:                   s = "cmp";           break;
1683      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1684      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1685      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1686      case lir_cmove:                 s = "cmove";         break;
1687      case lir_add:                   s = "add";           break;
1688      case lir_sub:                   s = "sub";           break;
1689      case lir_mul:                   s = "mul";           break;
1690      case lir_div:                   s = "div";           break;
1691      case lir_rem:                   s = "rem";           break;
1692      case lir_abs:                   s = "abs";           break;
1693      case lir_neg:                   s = "neg";           break;
1694      case lir_sqrt:                  s = "sqrt";          break;
1695      case lir_logic_and:             s = "logic_and";     break;
1696      case lir_logic_or:              s = "logic_or";      break;
1697      case lir_logic_xor:             s = "logic_xor";     break;
1698      case lir_shl:                   s = "shift_left";    break;
1699      case lir_shr:                   s = "shift_right";   break;
1700      case lir_ushr:                  s = "ushift_right";  break;
1701      case lir_alloc_array:           s = "alloc_array";   break;
1702      case lir_xadd:                  s = "xadd";          break;
1703      case lir_xchg:                  s = "xchg";          break;
1704      // LIR_Op3
1705      case lir_idiv:                  s = "idiv";          break;
1706      case lir_irem:                  s = "irem";          break;
1707      case lir_fmad:                  s = "fmad";          break;
1708      case lir_fmaf:                  s = "fmaf";          break;
1709      // LIR_OpJavaCall
1710      case lir_static_call:           s = "static";        break;
1711      case lir_optvirtual_call:       s = "optvirtual";    break;
1712      case lir_icvirtual_call:        s = "icvirtual";     break;
1713      case lir_dynamic_call:          s = "dynamic";       break;
1714      // LIR_OpArrayCopy
1715      case lir_arraycopy:             s = "arraycopy";     break;
1716      // LIR_OpUpdateCRC32
1717      case lir_updatecrc32:           s = "updatecrc32";   break;
1718      // LIR_OpLock
1719      case lir_lock:                  s = "lock";          break;
1720      case lir_unlock:                s = "unlock";        break;
1721      // LIR_OpDelay
1722      case lir_delay_slot:            s = "delay";         break;
1723      // LIR_OpTypeCheck
1724      case lir_instanceof:            s = "instanceof";    break;
1725      case lir_checkcast:             s = "checkcast";     break;
1726      case lir_store_check:           s = "store_check";   break;
1727      // LIR_OpCompareAndSwap
1728      case lir_cas_long:              s = "cas_long";      break;
1729      case lir_cas_obj:               s = "cas_obj";      break;
1730      case lir_cas_int:               s = "cas_int";      break;
1731      // LIR_OpProfileCall
1732      case lir_profile_call:          s = "profile_call";  break;
1733      // LIR_OpProfileType
1734      case lir_profile_type:          s = "profile_type";  break;
1735      // LIR_OpAssert
1736 #ifdef ASSERT
1737      case lir_assert:                s = "assert";        break;
1738 #endif
1739      case lir_none:                  ShouldNotReachHere();break;
1740     default:                         s = "illegal_op";    break;
1741   }
1742   return s;
1743 }
1744 
1745 // LIR_OpJavaCall
1746 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1747   out->print("call: ");
1748   out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1749   if (receiver()->is_valid()) {
1750     out->print(" [recv: ");   receiver()->print(out);   out->print("]");
1751   }
1752   if (result_opr()->is_valid()) {
1753     out->print(" [result: "); result_opr()->print(out); out->print("]");
1754   }
1755 }
1756 
1757 // LIR_OpLabel
1758 void LIR_OpLabel::print_instr(outputStream* out) const {
1759   out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1760 }
1761 
1762 // LIR_OpArrayCopy
1763 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1764   src()->print(out);     out->print(" ");
1765   src_pos()->print(out); out->print(" ");
1766   dst()->print(out);     out->print(" ");
1767   dst_pos()->print(out); out->print(" ");
1768   length()->print(out);  out->print(" ");
1769   tmp()->print(out);     out->print(" ");
1770 }
1771 
1772 // LIR_OpUpdateCRC32
1773 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1774   crc()->print(out);     out->print(" ");
1775   val()->print(out);     out->print(" ");
1776   result_opr()->print(out); out->print(" ");
1777 }
1778 
1779 // LIR_OpCompareAndSwap
1780 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1781   addr()->print(out);      out->print(" ");
1782   cmp_value()->print(out); out->print(" ");
1783   new_value()->print(out); out->print(" ");
1784   tmp1()->print(out);      out->print(" ");
1785   tmp2()->print(out);      out->print(" ");
1786 
1787 }
1788 
1789 // LIR_Op0
1790 void LIR_Op0::print_instr(outputStream* out) const {
1791   result_opr()->print(out);
1792 }
1793 
1794 // LIR_Op1
1795 const char * LIR_Op1::name() const {
1796   if (code() == lir_move) {
1797     switch (move_kind()) {
1798     case lir_move_normal:
1799       return "move";
1800     case lir_move_volatile:
1801       return "volatile_move";
1802     case lir_move_wide:
1803       return "wide_move";
1804     default:
1805       ShouldNotReachHere();
1806     return "illegal_op";
1807     }
1808   } else {
1809     return LIR_Op::name();
1810   }
1811 }
1812 
1813 
1814 void LIR_Op1::print_instr(outputStream* out) const {
1815   _opr->print(out);         out->print(" ");
1816   result_opr()->print(out); out->print(" ");
1817   print_patch_code(out, patch_code());
1818 }
1819 
1820 
1821 // LIR_Op1
1822 void LIR_OpRTCall::print_instr(outputStream* out) const {
1823   intx a = (intx)addr();
1824   out->print("%s", Runtime1::name_for_address(addr()));
1825   out->print(" ");
1826   tmp()->print(out);
1827 }
1828 
1829 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1830   switch(code) {
1831     case lir_patch_none:                                 break;
1832     case lir_patch_low:    out->print("[patch_low]");    break;
1833     case lir_patch_high:   out->print("[patch_high]");   break;
1834     case lir_patch_normal: out->print("[patch_normal]"); break;
1835     default: ShouldNotReachHere();
1836   }
1837 }
1838 
1839 // LIR_OpBranch
1840 void LIR_OpBranch::print_instr(outputStream* out) const {
1841   print_condition(out, cond());             out->print(" ");
1842   if (block() != NULL) {
1843     out->print("[B%d] ", block()->block_id());
1844   } else if (stub() != NULL) {
1845     out->print("[");
1846     stub()->print_name(out);
1847     out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1848     if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1849   } else {
1850     out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1851   }
1852   if (ublock() != NULL) {
1853     out->print("unordered: [B%d] ", ublock()->block_id());
1854   }
1855 }
1856 
1857 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1858   switch(cond) {
1859     case lir_cond_equal:           out->print("[EQ]");      break;
1860     case lir_cond_notEqual:        out->print("[NE]");      break;
1861     case lir_cond_less:            out->print("[LT]");      break;
1862     case lir_cond_lessEqual:       out->print("[LE]");      break;
1863     case lir_cond_greaterEqual:    out->print("[GE]");      break;
1864     case lir_cond_greater:         out->print("[GT]");      break;
1865     case lir_cond_belowEqual:      out->print("[BE]");      break;
1866     case lir_cond_aboveEqual:      out->print("[AE]");      break;
1867     case lir_cond_always:          out->print("[AL]");      break;
1868     default:                       out->print("[%d]",cond); break;
1869   }
1870 }
1871 
1872 // LIR_OpConvert
1873 void LIR_OpConvert::print_instr(outputStream* out) const {
1874   print_bytecode(out, bytecode());
1875   in_opr()->print(out);                  out->print(" ");
1876   result_opr()->print(out);              out->print(" ");
1877 #ifdef PPC32
1878   if(tmp1()->is_valid()) {
1879     tmp1()->print(out); out->print(" ");
1880     tmp2()->print(out); out->print(" ");
1881   }
1882 #endif
1883 }
1884 
1885 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1886   switch(code) {
1887     case Bytecodes::_d2f: out->print("[d2f] "); break;
1888     case Bytecodes::_d2i: out->print("[d2i] "); break;
1889     case Bytecodes::_d2l: out->print("[d2l] "); break;
1890     case Bytecodes::_f2d: out->print("[f2d] "); break;
1891     case Bytecodes::_f2i: out->print("[f2i] "); break;
1892     case Bytecodes::_f2l: out->print("[f2l] "); break;
1893     case Bytecodes::_i2b: out->print("[i2b] "); break;
1894     case Bytecodes::_i2c: out->print("[i2c] "); break;
1895     case Bytecodes::_i2d: out->print("[i2d] "); break;
1896     case Bytecodes::_i2f: out->print("[i2f] "); break;
1897     case Bytecodes::_i2l: out->print("[i2l] "); break;
1898     case Bytecodes::_i2s: out->print("[i2s] "); break;
1899     case Bytecodes::_l2i: out->print("[l2i] "); break;
1900     case Bytecodes::_l2f: out->print("[l2f] "); break;
1901     case Bytecodes::_l2d: out->print("[l2d] "); break;
1902     default:
1903       out->print("[?%d]",code);
1904     break;
1905   }
1906 }
1907 
1908 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1909   klass()->print(out);                      out->print(" ");
1910   obj()->print(out);                        out->print(" ");
1911   tmp1()->print(out);                       out->print(" ");
1912   tmp2()->print(out);                       out->print(" ");
1913   tmp3()->print(out);                       out->print(" ");
1914   tmp4()->print(out);                       out->print(" ");
1915   out->print("[hdr:%d]", header_size()); out->print(" ");
1916   out->print("[obj:%d]", object_size()); out->print(" ");
1917   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1918 }
1919 
1920 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1921   _opr->print(out);         out->print(" ");
1922   tmp()->print(out);        out->print(" ");
1923   result_opr()->print(out); out->print(" ");
1924 }
1925 
1926 // LIR_Op2
1927 void LIR_Op2::print_instr(outputStream* out) const {
1928   if (code() == lir_cmove || code() == lir_cmp) {
1929     print_condition(out, condition());         out->print(" ");
1930   }
1931   in_opr1()->print(out);    out->print(" ");
1932   in_opr2()->print(out);    out->print(" ");
1933   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
1934   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
1935   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
1936   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
1937   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1938   result_opr()->print(out);
1939 }
1940 
1941 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1942   klass()->print(out);                   out->print(" ");
1943   len()->print(out);                     out->print(" ");
1944   obj()->print(out);                     out->print(" ");
1945   tmp1()->print(out);                    out->print(" ");
1946   tmp2()->print(out);                    out->print(" ");
1947   tmp3()->print(out);                    out->print(" ");
1948   tmp4()->print(out);                    out->print(" ");
1949   out->print("[type:0x%x]", type());     out->print(" ");
1950   out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1951 }
1952 
1953 
1954 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1955   object()->print(out);                  out->print(" ");
1956   if (code() == lir_store_check) {
1957     array()->print(out);                 out->print(" ");
1958   }
1959   if (code() != lir_store_check) {
1960     klass()->print_name_on(out);         out->print(" ");
1961     if (fast_check())                 out->print("fast_check ");
1962   }
1963   tmp1()->print(out);                    out->print(" ");
1964   tmp2()->print(out);                    out->print(" ");
1965   tmp3()->print(out);                    out->print(" ");
1966   result_opr()->print(out);              out->print(" ");
1967   if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1968 }
1969 
1970 
1971 // LIR_Op3
1972 void LIR_Op3::print_instr(outputStream* out) const {
1973   in_opr1()->print(out);    out->print(" ");
1974   in_opr2()->print(out);    out->print(" ");
1975   in_opr3()->print(out);    out->print(" ");
1976   result_opr()->print(out);
1977 }
1978 
1979 
1980 void LIR_OpLock::print_instr(outputStream* out) const {
1981   hdr_opr()->print(out);   out->print(" ");
1982   obj_opr()->print(out);   out->print(" ");
1983   lock_opr()->print(out);  out->print(" ");
1984   if (_scratch->is_valid()) {
1985     _scratch->print(out);  out->print(" ");
1986   }
1987   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1988 }
1989 
1990 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
1991   obj()->print(out);        out->print(" ");
1992   result_opr()->print(out); out->print(" ");
1993 }
1994 
1995 #ifdef ASSERT
1996 void LIR_OpAssert::print_instr(outputStream* out) const {
1997   print_condition(out, condition()); out->print(" ");
1998   in_opr1()->print(out);             out->print(" ");
1999   in_opr2()->print(out);             out->print(", \"");
2000   out->print("%s", msg());          out->print("\"");
2001 }
2002 #endif
2003 
2004 
2005 void LIR_OpDelay::print_instr(outputStream* out) const {
2006   _op->print_on(out);
2007 }
2008 
2009 
2010 // LIR_OpProfileCall
2011 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2012   profiled_method()->name()->print_symbol_on(out);
2013   out->print(".");
2014   profiled_method()->holder()->name()->print_symbol_on(out);
2015   out->print(" @ %d ", profiled_bci());
2016   mdo()->print(out);           out->print(" ");
2017   recv()->print(out);          out->print(" ");
2018   tmp1()->print(out);          out->print(" ");
2019 }
2020 
2021 // LIR_OpProfileType
2022 void LIR_OpProfileType::print_instr(outputStream* out) const {
2023   out->print("exact = ");
2024   if  (exact_klass() == NULL) {
2025     out->print("unknown");
2026   } else {
2027     exact_klass()->print_name_on(out);
2028   }
2029   out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2030   out->print(" ");
2031   mdp()->print(out);          out->print(" ");
2032   obj()->print(out);          out->print(" ");
2033   tmp()->print(out);          out->print(" ");
2034 }
2035 
2036 #endif // PRODUCT
2037 
2038 // Implementation of LIR_InsertionBuffer
2039 
2040 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2041   assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2042 
2043   int i = number_of_insertion_points() - 1;
2044   if (i < 0 || index_at(i) < index) {
2045     append_new(index, 1);
2046   } else {
2047     assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2048     assert(count_at(i) > 0, "check");
2049     set_count_at(i, count_at(i) + 1);
2050   }
2051   _ops.push(op);
2052 
2053   DEBUG_ONLY(verify());
2054 }
2055 
2056 #ifdef ASSERT
2057 void LIR_InsertionBuffer::verify() {
2058   int sum = 0;
2059   int prev_idx = -1;
2060 
2061   for (int i = 0; i < number_of_insertion_points(); i++) {
2062     assert(prev_idx < index_at(i), "index must be ordered ascending");
2063     sum += count_at(i);
2064   }
2065   assert(sum == number_of_ops(), "wrong total sum");
2066 }
2067 #endif
--- EOF ---