1 /*
  2  * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "asm/assembler.inline.hpp"
 27 #include "c1/c1_Compilation.hpp"
 28 #include "c1/c1_Instruction.hpp"
 29 #include "c1/c1_InstructionPrinter.hpp"
 30 #include "c1/c1_LIRAssembler.hpp"
 31 #include "c1/c1_MacroAssembler.hpp"
 32 #include "c1/c1_ValueStack.hpp"
 33 #include "ci/ciInstance.hpp"
 34 #include "compiler/oopMap.hpp"
 35 #include "gc/shared/barrierSet.hpp"
 36 #include "runtime/os.hpp"
 37 #include "runtime/vm_version.hpp"
 38 
 39 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
 40   // We must have enough patching space so that call can be inserted.
 41   // We cannot use fat nops here, since the concurrent code rewrite may transiently
 42   // create the illegal instruction sequence.
 43   while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
 44     _masm->nop();
 45   }
 46   patch->install(_masm, patch_code, obj, info);
 47   append_code_stub(patch);
 48 
 49 #ifdef ASSERT
 50   Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
 51   if (patch->id() == PatchingStub::access_field_id) {
 52     switch (code) {
 53       case Bytecodes::_putstatic:
 54       case Bytecodes::_getstatic:
 55       case Bytecodes::_putfield:
 56       case Bytecodes::_getfield:
 57         break;
 58       default:
 59         ShouldNotReachHere();
 60     }
 61   } else if (patch->id() == PatchingStub::load_klass_id) {
 62     switch (code) {
 63       case Bytecodes::_new:
 64       case Bytecodes::_anewarray:
 65       case Bytecodes::_multianewarray:
 66       case Bytecodes::_instanceof:
 67       case Bytecodes::_checkcast:
 68         break;
 69       default:
 70         ShouldNotReachHere();
 71     }
 72   } else if (patch->id() == PatchingStub::load_mirror_id) {
 73     switch (code) {
 74       case Bytecodes::_putstatic:
 75       case Bytecodes::_getstatic:
 76       case Bytecodes::_ldc:
 77       case Bytecodes::_ldc_w:
 78         break;
 79       default:
 80         ShouldNotReachHere();
 81     }
 82   } else if (patch->id() == PatchingStub::load_appendix_id) {
 83     Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
 84     assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
 85   } else {
 86     ShouldNotReachHere();
 87   }
 88 #endif
 89 }
 90 
 91 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
 92   IRScope* scope = info->scope();
 93   Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
 94   if (Bytecodes::has_optional_appendix(bc_raw)) {
 95     return PatchingStub::load_appendix_id;
 96   }
 97   return PatchingStub::load_mirror_id;
 98 }
 99 
100 //---------------------------------------------------------------
101 
102 
103 LIR_Assembler::LIR_Assembler(Compilation* c):
104    _masm(c->masm())
105  , _bs(BarrierSet::barrier_set())
106  , _compilation(c)
107  , _frame_map(c->frame_map())
108  , _current_block(NULL)
109  , _pending_non_safepoint(NULL)
110  , _pending_non_safepoint_offset(0)
111  , _immediate_oops_patched(0)
112 {
113   _slow_case_stubs = new CodeStubList();
114 }
115 
116 
117 LIR_Assembler::~LIR_Assembler() {
118   // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
119   // Reset it here to avoid an assertion.
120   _unwind_handler_entry.reset();
121 }
122 
123 
124 void LIR_Assembler::check_codespace() {
125   CodeSection* cs = _masm->code_section();
126   if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
127     BAILOUT("CodeBuffer overflow");
128   }
129 }
130 
131 
132 void LIR_Assembler::append_code_stub(CodeStub* stub) {
133   _immediate_oops_patched += stub->nr_immediate_oops_patched();
134   _slow_case_stubs->append(stub);
135 }
136 
137 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
138   for (int m = 0; m < stub_list->length(); m++) {
139     CodeStub* s = stub_list->at(m);
140 
141     check_codespace();
142     CHECK_BAILOUT();
143 
144 #ifndef PRODUCT
145     if (CommentedAssembly) {
146       stringStream st;
147       s->print_name(&st);
148       st.print(" slow case");
149       _masm->block_comment(st.as_string());
150     }
151 #endif
152     s->emit_code(this);
153 #ifdef ASSERT
154     s->assert_no_unbound_labels();
155 #endif
156   }
157 }
158 
159 
160 void LIR_Assembler::emit_slow_case_stubs() {
161   emit_stubs(_slow_case_stubs);
162 }
163 
164 
165 bool LIR_Assembler::needs_icache(ciMethod* method) const {
166   return !method->is_static();
167 }
168 
169 bool LIR_Assembler::needs_clinit_barrier_on_entry(ciMethod* method) const {
170   return VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier();
171 }
172 
173 int LIR_Assembler::code_offset() const {
174   return _masm->offset();
175 }
176 
177 
178 address LIR_Assembler::pc() const {
179   return _masm->pc();
180 }
181 
182 // To bang the stack of this compiled method we use the stack size
183 // that the interpreter would need in case of a deoptimization. This
184 // removes the need to bang the stack in the deoptimization blob which
185 // in turn simplifies stack overflow handling.
186 int LIR_Assembler::bang_size_in_bytes() const {
187   return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
188 }
189 
190 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
191   for (int i = 0; i < info_list->length(); i++) {
192     XHandlers* handlers = info_list->at(i)->exception_handlers();
193 
194     for (int j = 0; j < handlers->length(); j++) {
195       XHandler* handler = handlers->handler_at(j);
196       assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
197       assert(handler->entry_code() == NULL ||
198              handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
199              handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
200 
201       if (handler->entry_pco() == -1) {
202         // entry code not emitted yet
203         if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
204           handler->set_entry_pco(code_offset());
205           if (CommentedAssembly) {
206             _masm->block_comment("Exception adapter block");
207           }
208           emit_lir_list(handler->entry_code());
209         } else {
210           handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
211         }
212 
213         assert(handler->entry_pco() != -1, "must be set now");
214       }
215     }
216   }
217 }
218 
219 
220 void LIR_Assembler::emit_code(BlockList* hir) {
221   if (PrintLIR) {
222     print_LIR(hir);
223   }
224 
225   int n = hir->length();
226   for (int i = 0; i < n; i++) {
227     emit_block(hir->at(i));
228     CHECK_BAILOUT();
229   }
230 
231   flush_debug_info(code_offset());
232 
233   DEBUG_ONLY(check_no_unbound_labels());
234 }
235 
236 
237 void LIR_Assembler::emit_block(BlockBegin* block) {
238   if (block->is_set(BlockBegin::backward_branch_target_flag)) {
239     align_backward_branch_target();
240   }
241 
242   // if this block is the start of an exception handler, record the
243   // PC offset of the first instruction for later construction of
244   // the ExceptionHandlerTable
245   if (block->is_set(BlockBegin::exception_entry_flag)) {
246     block->set_exception_handler_pco(code_offset());
247   }
248 
249 #ifndef PRODUCT
250   if (PrintLIRWithAssembly) {
251     // don't print Phi's
252     InstructionPrinter ip(false);
253     block->print(ip);
254   }
255 #endif /* PRODUCT */
256 
257   assert(block->lir() != NULL, "must have LIR");
258   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
259 
260 #ifndef PRODUCT
261   if (CommentedAssembly) {
262     stringStream st;
263     st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
264     _masm->block_comment(st.as_string());
265   }
266 #endif
267 
268   emit_lir_list(block->lir());
269 
270   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
271 }
272 
273 
274 void LIR_Assembler::emit_lir_list(LIR_List* list) {
275   peephole(list);
276 
277   int n = list->length();
278   for (int i = 0; i < n; i++) {
279     LIR_Op* op = list->at(i);
280 
281     check_codespace();
282     CHECK_BAILOUT();
283 
284 #ifndef PRODUCT
285     if (CommentedAssembly) {
286       // Don't record out every op since that's too verbose.  Print
287       // branches since they include block and stub names.  Also print
288       // patching moves since they generate funny looking code.
289       if (op->code() == lir_branch ||
290           (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
291           (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
292         stringStream st;
293         op->print_on(&st);
294         _masm->block_comment(st.as_string());
295       }
296     }
297     if (PrintLIRWithAssembly) {
298       // print out the LIR operation followed by the resulting assembly
299       list->at(i)->print(); tty->cr();
300     }
301 #endif /* PRODUCT */
302 
303     op->emit_code(this);
304 
305     if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
306       process_debug_info(op);
307     }
308 
309 #ifndef PRODUCT
310     if (PrintLIRWithAssembly) {
311       _masm->code()->decode();
312     }
313 #endif /* PRODUCT */
314   }
315 }
316 
317 #ifdef ASSERT
318 void LIR_Assembler::check_no_unbound_labels() {
319   CHECK_BAILOUT();
320 
321   for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
322     if (!_branch_target_blocks.at(i)->label()->is_bound()) {
323       tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
324       assert(false, "unbound label");
325     }
326   }
327 }
328 #endif
329 
330 //----------------------------------debug info--------------------------------
331 
332 
333 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
334   int pc_offset = code_offset();
335   flush_debug_info(pc_offset);
336   info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
337   if (info->exception_handlers() != NULL) {
338     compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
339   }
340 }
341 
342 
343 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
344   flush_debug_info(pc_offset);
345   cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
346   if (cinfo->exception_handlers() != NULL) {
347     compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
348   }
349 }
350 
351 static ValueStack* debug_info(Instruction* ins) {
352   StateSplit* ss = ins->as_StateSplit();
353   if (ss != NULL) return ss->state();
354   return ins->state_before();
355 }
356 
357 void LIR_Assembler::process_debug_info(LIR_Op* op) {
358   Instruction* src = op->source();
359   if (src == NULL)  return;
360   int pc_offset = code_offset();
361   if (_pending_non_safepoint == src) {
362     _pending_non_safepoint_offset = pc_offset;
363     return;
364   }
365   ValueStack* vstack = debug_info(src);
366   if (vstack == NULL)  return;
367   if (_pending_non_safepoint != NULL) {
368     // Got some old debug info.  Get rid of it.
369     if (debug_info(_pending_non_safepoint) == vstack) {
370       _pending_non_safepoint_offset = pc_offset;
371       return;
372     }
373     if (_pending_non_safepoint_offset < pc_offset) {
374       record_non_safepoint_debug_info();
375     }
376     _pending_non_safepoint = NULL;
377   }
378   // Remember the debug info.
379   if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
380     _pending_non_safepoint = src;
381     _pending_non_safepoint_offset = pc_offset;
382   }
383 }
384 
385 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
386 // Return NULL if n is too large.
387 // Returns the caller_bci for the next-younger state, also.
388 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
389   ValueStack* t = s;
390   for (int i = 0; i < n; i++) {
391     if (t == NULL)  break;
392     t = t->caller_state();
393   }
394   if (t == NULL)  return NULL;
395   for (;;) {
396     ValueStack* tc = t->caller_state();
397     if (tc == NULL)  return s;
398     t = tc;
399     bci_result = tc->bci();
400     s = s->caller_state();
401   }
402 }
403 
404 void LIR_Assembler::record_non_safepoint_debug_info() {
405   int         pc_offset = _pending_non_safepoint_offset;
406   ValueStack* vstack    = debug_info(_pending_non_safepoint);
407   int         bci       = vstack->bci();
408 
409   DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
410   assert(debug_info->recording_non_safepoints(), "sanity");
411 
412   debug_info->add_non_safepoint(pc_offset);
413 
414   // Visit scopes from oldest to youngest.
415   for (int n = 0; ; n++) {
416     int s_bci = bci;
417     ValueStack* s = nth_oldest(vstack, n, s_bci);
418     if (s == NULL)  break;
419     IRScope* scope = s->scope();
420     //Always pass false for reexecute since these ScopeDescs are never used for deopt
421     methodHandle null_mh;
422     debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
423   }
424 
425   debug_info->end_non_safepoint(pc_offset);
426 }
427 
428 
429 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
430   return add_debug_info_for_null_check(code_offset(), cinfo);
431 }
432 
433 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
434   ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
435   append_code_stub(stub);
436   return stub;
437 }
438 
439 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
440   add_debug_info_for_div0(code_offset(), info);
441 }
442 
443 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
444   DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
445   append_code_stub(stub);
446 }
447 
448 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
449   rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
450 }
451 
452 
453 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
454   verify_oop_map(op->info());
455 
456   // must align calls sites, otherwise they can't be updated atomically
457   align_call(op->code());
458 
459   // emit the static call stub stuff out of line
460   emit_static_call_stub();
461   CHECK_BAILOUT();
462 
463   switch (op->code()) {
464   case lir_static_call:
465   case lir_dynamic_call:
466     call(op, relocInfo::static_call_type);
467     break;
468   case lir_optvirtual_call:
469     call(op, relocInfo::opt_virtual_call_type);
470     break;
471   case lir_icvirtual_call:
472     ic_call(op);
473     break;
474   default:
475     fatal("unexpected op code: %s", op->name());
476     break;
477   }
478   // oopmap_metadata(-1); // TODO: maybe here instead of in call and ic_call ?
479 
480   // JSR 292
481   // Record if this method has MethodHandle invokes.
482   if (op->is_method_handle_invoke()) {
483     compilation()->set_has_method_handle_invokes(true);
484   }
485 
486 #if defined(IA32) && defined(COMPILER2)
487   // C2 leave fpu stack dirty clean it
488   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
489     int i;
490     for ( i = 1; i <= 7 ; i++ ) {
491       ffree(i);
492     }
493     if (!op->result_opr()->is_float_kind()) {
494       ffree(0);
495     }
496   }
497 #endif // IA32 && COMPILER2
498 }
499 
500 
501 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
502   _masm->bind (*(op->label()));
503 }
504 
505 
506 void LIR_Assembler::emit_op1(LIR_Op1* op) {
507   switch (op->code()) {
508     case lir_move:
509       if (op->move_kind() == lir_move_volatile) {
510         assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
511         volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
512       } else {
513         move_op(op->in_opr(), op->result_opr(), op->type(),
514                 op->patch_code(), op->info(), op->pop_fpu_stack(),
515                 op->move_kind() == lir_move_wide);
516       }
517       break;
518 
519     case lir_roundfp: {
520       LIR_OpRoundFP* round_op = op->as_OpRoundFP();
521       roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
522       break;
523     }
524 
525     case lir_return: {
526       assert(op->as_OpReturn() != NULL, "sanity");
527       LIR_OpReturn *ret_op = (LIR_OpReturn*)op;
528       return_op(ret_op->in_opr(), ret_op->stub());
529       if (ret_op->stub() != NULL) {
530         append_code_stub(ret_op->stub());
531       }
532       break;
533     }
534 
535     case lir_safepoint:
536       if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
537         _masm->nop();
538       }
539       safepoint_poll(op->in_opr(), op->info());
540       break;
541 
542 #ifdef IA32
543     case lir_fxch:
544       fxch(op->in_opr()->as_jint());
545       break;
546 
547     case lir_fld:
548       fld(op->in_opr()->as_jint());
549       break;
550 #endif // IA32
551 
552     case lir_branch:
553       break;
554 
555     case lir_push:
556       push(op->in_opr());
557       break;
558 
559     case lir_pop:
560       pop(op->in_opr());
561       break;
562 
563     case lir_leal:
564       leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
565       break;
566 
567     case lir_null_check: {
568       ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
569 
570       if (op->in_opr()->is_single_cpu()) {
571         _masm->null_check(op->in_opr()->as_register(), stub->entry());
572       } else {
573         Unimplemented();
574       }
575       break;
576     }
577 
578     case lir_monaddr:
579       monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
580       break;
581 
582     case lir_unwind:
583       unwind_op(op->in_opr());
584       break;
585 
586     default:
587       Unimplemented();
588       break;
589   }
590 }
591 
592 
593 void LIR_Assembler::emit_op0(LIR_Op0* op) {
594   switch (op->code()) {
595     case lir_nop:
596       assert(op->info() == NULL, "not supported");
597       _masm->nop();
598       break;
599 
600     case lir_label:
601       Unimplemented();
602       break;
603 
604     case lir_std_entry:
605       // init offsets
606       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
607       _masm->align(CodeEntryAlignment);
608       if (needs_icache(compilation()->method())) {
609         check_icache();
610       }
611       offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
612       _masm->verified_entry();
613       if (needs_clinit_barrier_on_entry(compilation()->method())) {
614         clinit_barrier(compilation()->method());
615       }
616       build_frame();
617       offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
618       break;
619 
620     case lir_osr_entry:
621       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
622       osr_entry();
623       break;
624 
625 #ifdef IA32
626     case lir_fpop_raw:
627       fpop();
628       break;
629 #endif // IA32
630 
631     case lir_breakpoint:
632       breakpoint();
633       break;
634 
635     case lir_membar:
636       membar();
637       break;
638 
639     case lir_membar_acquire:
640       membar_acquire();
641       break;
642 
643     case lir_membar_release:
644       membar_release();
645       break;
646 
647     case lir_membar_loadload:
648       membar_loadload();
649       break;
650 
651     case lir_membar_storestore:
652       membar_storestore();
653       break;
654 
655     case lir_membar_loadstore:
656       membar_loadstore();
657       break;
658 
659     case lir_membar_storeload:
660       membar_storeload();
661       break;
662 
663     case lir_get_thread:
664       get_thread(op->result_opr());
665       break;
666 
667     case lir_on_spin_wait:
668       on_spin_wait();
669       break;
670 
671 
672     default:
673       ShouldNotReachHere();
674       break;
675   }
676 }
677 
678 
679 void LIR_Assembler::emit_op2(LIR_Op2* op) {
680   switch (op->code()) {
681     case lir_cmp:
682       if (op->info() != NULL) {
683         assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
684                "shouldn't be codeemitinfo for non-address operands");
685         add_debug_info_for_null_check_here(op->info()); // exception possible
686       }
687       comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
688       break;
689 
690     case lir_cmp_l2i:
691     case lir_cmp_fd2i:
692     case lir_ucmp_fd2i:
693       comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
694       break;
695 
696     case lir_cmove:
697       cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
698       break;
699 
700     case lir_shl:
701     case lir_shr:
702     case lir_ushr:
703       if (op->in_opr2()->is_constant()) {
704         shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
705       } else {
706         shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
707       }
708       break;
709 
710     case lir_add:
711     case lir_sub:
712     case lir_mul:
713     case lir_div:
714     case lir_rem:
715       assert(op->fpu_pop_count() < 2, "");
716       arith_op(
717         op->code(),
718         op->in_opr1(),
719         op->in_opr2(),
720         op->result_opr(),
721         op->info(),
722         op->fpu_pop_count() == 1);
723       break;
724 
725     case lir_abs:
726     case lir_sqrt:
727     case lir_tan:
728     case lir_log10:
729       intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
730       break;
731 
732     case lir_neg:
733       negate(op->in_opr1(), op->result_opr(), op->in_opr2());
734       break;
735 
736     case lir_logic_and:
737     case lir_logic_or:
738     case lir_logic_xor:
739       logic_op(
740         op->code(),
741         op->in_opr1(),
742         op->in_opr2(),
743         op->result_opr());
744       break;
745 
746     case lir_throw:
747       throw_op(op->in_opr1(), op->in_opr2(), op->info());
748       break;
749 
750     case lir_xadd:
751     case lir_xchg:
752       atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
753       break;
754 
755     default:
756       Unimplemented();
757       break;
758   }
759 }
760 
761 
762 void LIR_Assembler::build_frame() {
763   _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
764 }
765 
766 
767 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
768   assert(strict_fp_requires_explicit_rounding, "not required");
769   assert((src->is_single_fpu() && dest->is_single_stack()) ||
770          (src->is_double_fpu() && dest->is_double_stack()),
771          "round_fp: rounds register -> stack location");
772 
773   reg2stack (src, dest, src->type(), pop_fpu_stack);
774 }
775 
776 
777 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
778   if (src->is_register()) {
779     if (dest->is_register()) {
780       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
781       reg2reg(src,  dest);
782     } else if (dest->is_stack()) {
783       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
784       reg2stack(src, dest, type, pop_fpu_stack);
785     } else if (dest->is_address()) {
786       reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide);
787     } else {
788       ShouldNotReachHere();
789     }
790 
791   } else if (src->is_stack()) {
792     assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
793     if (dest->is_register()) {
794       stack2reg(src, dest, type);
795     } else if (dest->is_stack()) {
796       stack2stack(src, dest, type);
797     } else {
798       ShouldNotReachHere();
799     }
800 
801   } else if (src->is_constant()) {
802     if (dest->is_register()) {
803       const2reg(src, dest, patch_code, info); // patching is possible
804     } else if (dest->is_stack()) {
805       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
806       const2stack(src, dest);
807     } else if (dest->is_address()) {
808       assert(patch_code == lir_patch_none, "no patching allowed here");
809       const2mem(src, dest, type, info, wide);
810     } else {
811       ShouldNotReachHere();
812     }
813 
814   } else if (src->is_address()) {
815     mem2reg(src, dest, type, patch_code, info, wide);
816   } else {
817     ShouldNotReachHere();
818   }
819 }
820 
821 
822 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
823 #ifndef PRODUCT
824   if (VerifyOops) {
825     OopMapStream s(info->oop_map());
826     while (!s.is_done()) {
827       OopMapValue v = s.current();
828       if (v.is_oop()) {
829         VMReg r = v.reg();
830         if (!r->is_stack()) {
831           stringStream st;
832           st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
833           _masm->verify_oop(r->as_Register());
834         } else {
835           _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
836         }
837       }
838       check_codespace();
839       CHECK_BAILOUT();
840 
841       s.next();
842     }
843   }
844 #endif
845 }