1 /*
   2  * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/assembler.inline.hpp"
  27 #include "c1/c1_Compilation.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_InstructionPrinter.hpp"
  30 #include "c1/c1_LIRAssembler.hpp"
  31 #include "c1/c1_MacroAssembler.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciInstance.hpp"
  34 #include "gc/shared/barrierSet.hpp"
  35 #include "runtime/os.hpp"
  36 
  37 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
  38   // We must have enough patching space so that call can be inserted.
  39   // We cannot use fat nops here, since the concurrent code rewrite may transiently
  40   // create the illegal instruction sequence.
  41   while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
  42     _masm->nop();
  43   }
  44   patch->install(_masm, patch_code, obj, info);
  45   append_code_stub(patch);
  46 
  47 #ifdef ASSERT
  48   Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
  49   if (patch->id() == PatchingStub::access_field_id) {
  50     switch (code) {
  51       case Bytecodes::_putstatic:
  52       case Bytecodes::_getstatic:
  53       case Bytecodes::_putfield:
  54       case Bytecodes::_getfield:
  55         break;
  56       default:
  57         ShouldNotReachHere();
  58     }
  59   } else if (patch->id() == PatchingStub::load_klass_id) {
  60     switch (code) {
  61       case Bytecodes::_new:
  62       case Bytecodes::_anewarray:
  63       case Bytecodes::_multianewarray:
  64       case Bytecodes::_instanceof:
  65       case Bytecodes::_checkcast:
  66         break;
  67       default:
  68         ShouldNotReachHere();
  69     }
  70   } else if (patch->id() == PatchingStub::load_mirror_id) {
  71     switch (code) {
  72       case Bytecodes::_putstatic:
  73       case Bytecodes::_getstatic:
  74       case Bytecodes::_ldc:
  75       case Bytecodes::_ldc_w:
  76         break;
  77       default:
  78         ShouldNotReachHere();
  79     }
  80   } else if (patch->id() == PatchingStub::load_appendix_id) {
  81     Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
  82     assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
  83   } else {
  84     ShouldNotReachHere();
  85   }
  86 #endif
  87 }
  88 
  89 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
  90   IRScope* scope = info->scope();
  91   Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
  92   if (Bytecodes::has_optional_appendix(bc_raw)) {
  93     return PatchingStub::load_appendix_id;
  94   }
  95   return PatchingStub::load_mirror_id;
  96 }
  97 
  98 //---------------------------------------------------------------
  99 
 100 
 101 LIR_Assembler::LIR_Assembler(Compilation* c):
 102    _masm(c->masm())
 103  , _bs(BarrierSet::barrier_set())
 104  , _compilation(c)
 105  , _frame_map(c->frame_map())
 106  , _current_block(NULL)
 107  , _pending_non_safepoint(NULL)
 108  , _pending_non_safepoint_offset(0)
 109  , _immediate_oops_patched(0)
 110 {
 111   _slow_case_stubs = new CodeStubList();
 112 }
 113 
 114 
 115 LIR_Assembler::~LIR_Assembler() {
 116   // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
 117   // Reset it here to avoid an assertion.
 118   _unwind_handler_entry.reset();
 119 }
 120 
 121 
 122 void LIR_Assembler::check_codespace() {
 123   CodeSection* cs = _masm->code_section();
 124   if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
 125     BAILOUT("CodeBuffer overflow");
 126   }
 127 }
 128 
 129 
 130 void LIR_Assembler::append_code_stub(CodeStub* stub) {
 131   _immediate_oops_patched += stub->nr_immediate_oops_patched();
 132   _slow_case_stubs->append(stub);
 133 }
 134 
 135 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
 136   for (int m = 0; m < stub_list->length(); m++) {
 137     CodeStub* s = stub_list->at(m);
 138 
 139     check_codespace();
 140     CHECK_BAILOUT();
 141 
 142 #ifndef PRODUCT
 143     if (CommentedAssembly) {
 144       stringStream st;
 145       s->print_name(&st);
 146       st.print(" slow case");
 147       _masm->block_comment(st.as_string());
 148     }
 149 #endif
 150     s->emit_code(this);
 151 #ifdef ASSERT
 152     s->assert_no_unbound_labels();
 153 #endif
 154   }
 155 }
 156 
 157 
 158 void LIR_Assembler::emit_slow_case_stubs() {
 159   emit_stubs(_slow_case_stubs);
 160 }
 161 
 162 
 163 bool LIR_Assembler::needs_icache(ciMethod* method) const {
 164   return !method->is_static();
 165 }
 166 
 167 bool LIR_Assembler::needs_clinit_barrier_on_entry(ciMethod* method) const {
 168   return VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier();
 169 }
 170 
 171 int LIR_Assembler::code_offset() const {
 172   return _masm->offset();
 173 }
 174 
 175 
 176 address LIR_Assembler::pc() const {
 177   return _masm->pc();
 178 }
 179 
 180 // To bang the stack of this compiled method we use the stack size
 181 // that the interpreter would need in case of a deoptimization. This
 182 // removes the need to bang the stack in the deoptimization blob which
 183 // in turn simplifies stack overflow handling.
 184 int LIR_Assembler::bang_size_in_bytes() const {
 185   return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
 186 }
 187 
 188 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
 189   for (int i = 0; i < info_list->length(); i++) {
 190     XHandlers* handlers = info_list->at(i)->exception_handlers();
 191 
 192     for (int j = 0; j < handlers->length(); j++) {
 193       XHandler* handler = handlers->handler_at(j);
 194       assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
 195       assert(handler->entry_code() == NULL ||
 196              handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
 197              handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
 198 
 199       if (handler->entry_pco() == -1) {
 200         // entry code not emitted yet
 201         if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
 202           handler->set_entry_pco(code_offset());
 203           if (CommentedAssembly) {
 204             _masm->block_comment("Exception adapter block");
 205           }
 206           emit_lir_list(handler->entry_code());
 207         } else {
 208           handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
 209         }
 210 
 211         assert(handler->entry_pco() != -1, "must be set now");
 212       }
 213     }
 214   }
 215 }
 216 
 217 
 218 void LIR_Assembler::emit_code(BlockList* hir) {
 219   if (PrintLIR) {
 220     print_LIR(hir);
 221   }
 222 
 223   int n = hir->length();
 224   for (int i = 0; i < n; i++) {
 225     emit_block(hir->at(i));
 226     CHECK_BAILOUT();
 227   }
 228 
 229   flush_debug_info(code_offset());
 230 
 231   DEBUG_ONLY(check_no_unbound_labels());
 232 }
 233 
 234 
 235 void LIR_Assembler::emit_block(BlockBegin* block) {
 236   if (block->is_set(BlockBegin::backward_branch_target_flag)) {
 237     align_backward_branch_target();
 238   }
 239 
 240   // if this block is the start of an exception handler, record the
 241   // PC offset of the first instruction for later construction of
 242   // the ExceptionHandlerTable
 243   if (block->is_set(BlockBegin::exception_entry_flag)) {
 244     block->set_exception_handler_pco(code_offset());
 245   }
 246 
 247 #ifndef PRODUCT
 248   if (PrintLIRWithAssembly) {
 249     // don't print Phi's
 250     InstructionPrinter ip(false);
 251     block->print(ip);
 252   }
 253 #endif /* PRODUCT */
 254 
 255   assert(block->lir() != NULL, "must have LIR");
 256   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
 257 
 258 #ifndef PRODUCT
 259   if (CommentedAssembly) {
 260     stringStream st;
 261     st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
 262     _masm->block_comment(st.as_string());
 263   }
 264 #endif
 265 
 266   emit_lir_list(block->lir());
 267 
 268   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
 269 }
 270 
 271 
 272 void LIR_Assembler::emit_lir_list(LIR_List* list) {
 273   peephole(list);
 274 
 275   int n = list->length();
 276   for (int i = 0; i < n; i++) {
 277     LIR_Op* op = list->at(i);
 278 
 279     check_codespace();
 280     CHECK_BAILOUT();
 281 
 282 #ifndef PRODUCT
 283     if (CommentedAssembly) {
 284       // Don't record out every op since that's too verbose.  Print
 285       // branches since they include block and stub names.  Also print
 286       // patching moves since they generate funny looking code.
 287       if (op->code() == lir_branch ||
 288           (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
 289           (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
 290         stringStream st;
 291         op->print_on(&st);
 292         _masm->block_comment(st.as_string());
 293       }
 294     }
 295     if (PrintLIRWithAssembly) {
 296       // print out the LIR operation followed by the resulting assembly
 297       list->at(i)->print(); tty->cr();
 298     }
 299 #endif /* PRODUCT */
 300 
 301     op->emit_code(this);
 302 
 303     if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
 304       process_debug_info(op);
 305     }
 306 
 307 #ifndef PRODUCT
 308     if (PrintLIRWithAssembly) {
 309       _masm->code()->decode();
 310     }
 311 #endif /* PRODUCT */
 312   }
 313 }
 314 
 315 #ifdef ASSERT
 316 void LIR_Assembler::check_no_unbound_labels() {
 317   CHECK_BAILOUT();
 318 
 319   for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
 320     if (!_branch_target_blocks.at(i)->label()->is_bound()) {
 321       tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
 322       assert(false, "unbound label");
 323     }
 324   }
 325 }
 326 #endif
 327 
 328 //----------------------------------debug info--------------------------------
 329 
 330 
 331 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
 332   int pc_offset = code_offset();
 333   flush_debug_info(pc_offset);
 334   info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
 335   if (info->exception_handlers() != NULL) {
 336     compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
 337   }
 338 }
 339 
 340 
 341 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
 342   flush_debug_info(pc_offset);
 343   cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
 344   if (cinfo->exception_handlers() != NULL) {
 345     compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
 346   }
 347 }
 348 
 349 static ValueStack* debug_info(Instruction* ins) {
 350   StateSplit* ss = ins->as_StateSplit();
 351   if (ss != NULL) return ss->state();
 352   return ins->state_before();
 353 }
 354 
 355 void LIR_Assembler::process_debug_info(LIR_Op* op) {
 356   Instruction* src = op->source();
 357   if (src == NULL)  return;
 358   int pc_offset = code_offset();
 359   if (_pending_non_safepoint == src) {
 360     _pending_non_safepoint_offset = pc_offset;
 361     return;
 362   }
 363   ValueStack* vstack = debug_info(src);
 364   if (vstack == NULL)  return;
 365   if (_pending_non_safepoint != NULL) {
 366     // Got some old debug info.  Get rid of it.
 367     if (debug_info(_pending_non_safepoint) == vstack) {
 368       _pending_non_safepoint_offset = pc_offset;
 369       return;
 370     }
 371     if (_pending_non_safepoint_offset < pc_offset) {
 372       record_non_safepoint_debug_info();
 373     }
 374     _pending_non_safepoint = NULL;
 375   }
 376   // Remember the debug info.
 377   if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
 378     _pending_non_safepoint = src;
 379     _pending_non_safepoint_offset = pc_offset;
 380   }
 381 }
 382 
 383 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
 384 // Return NULL if n is too large.
 385 // Returns the caller_bci for the next-younger state, also.
 386 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
 387   ValueStack* t = s;
 388   for (int i = 0; i < n; i++) {
 389     if (t == NULL)  break;
 390     t = t->caller_state();
 391   }
 392   if (t == NULL)  return NULL;
 393   for (;;) {
 394     ValueStack* tc = t->caller_state();
 395     if (tc == NULL)  return s;
 396     t = tc;
 397     bci_result = tc->bci();
 398     s = s->caller_state();
 399   }
 400 }
 401 
 402 void LIR_Assembler::record_non_safepoint_debug_info() {
 403   int         pc_offset = _pending_non_safepoint_offset;
 404   ValueStack* vstack    = debug_info(_pending_non_safepoint);
 405   int         bci       = vstack->bci();
 406 
 407   DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
 408   assert(debug_info->recording_non_safepoints(), "sanity");
 409 
 410   debug_info->add_non_safepoint(pc_offset);
 411 
 412   // Visit scopes from oldest to youngest.
 413   for (int n = 0; ; n++) {
 414     int s_bci = bci;
 415     ValueStack* s = nth_oldest(vstack, n, s_bci);
 416     if (s == NULL)  break;
 417     IRScope* scope = s->scope();
 418     //Always pass false for reexecute since these ScopeDescs are never used for deopt
 419     methodHandle null_mh;
 420     debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
 421   }
 422 
 423   debug_info->end_non_safepoint(pc_offset);
 424 }
 425 
 426 
 427 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
 428   return add_debug_info_for_null_check(code_offset(), cinfo);
 429 }
 430 
 431 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
 432   ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
 433   append_code_stub(stub);
 434   return stub;
 435 }
 436 
 437 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
 438   add_debug_info_for_div0(code_offset(), info);
 439 }
 440 
 441 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
 442   DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
 443   append_code_stub(stub);
 444 }
 445 
 446 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
 447   rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
 448 }
 449 
 450 
 451 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
 452   verify_oop_map(op->info());
 453 
 454   // must align calls sites, otherwise they can't be updated atomically
 455   align_call(op->code());
 456 
 457   // emit the static call stub stuff out of line
 458   emit_static_call_stub();
 459   CHECK_BAILOUT();
 460 
 461   switch (op->code()) {
 462   case lir_static_call:
 463   case lir_dynamic_call:
 464     call(op, relocInfo::static_call_type);
 465     break;
 466   case lir_optvirtual_call:
 467     call(op, relocInfo::opt_virtual_call_type);
 468     break;
 469   case lir_icvirtual_call:
 470     ic_call(op);
 471     break;
 472   case lir_virtual_call:
 473     vtable_call(op);
 474     break;
 475   default:
 476     fatal("unexpected op code: %s", op->name());
 477     break;
 478   }
 479   // oopmap_metadata(-1); // TODO: maybe here instead of in call and ic_call ?
 480 
 481   // JSR 292
 482   // Record if this method has MethodHandle invokes.
 483   if (op->is_method_handle_invoke()) {
 484     compilation()->set_has_method_handle_invokes(true);
 485   }
 486 
 487 #if defined(X86) && defined(TIERED)
 488   // C2 leave fpu stack dirty clean it
 489   if (UseSSE < 2) {
 490     int i;
 491     for ( i = 1; i <= 7 ; i++ ) {
 492       ffree(i);
 493     }
 494     if (!op->result_opr()->is_float_kind()) {
 495       ffree(0);
 496     }
 497   }
 498 #endif // X86 && TIERED
 499 }
 500 
 501 
 502 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
 503   _masm->bind (*(op->label()));
 504 }
 505 
 506 
 507 void LIR_Assembler::emit_op1(LIR_Op1* op) {
 508   switch (op->code()) {
 509     case lir_move:
 510       if (op->move_kind() == lir_move_volatile) {
 511         assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
 512         volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
 513       } else {
 514         move_op(op->in_opr(), op->result_opr(), op->type(),
 515                 op->patch_code(), op->info(), op->pop_fpu_stack(),
 516                 op->move_kind() == lir_move_unaligned,
 517                 op->move_kind() == lir_move_wide);
 518       }
 519       break;
 520 
 521     case lir_roundfp: {
 522       LIR_OpRoundFP* round_op = op->as_OpRoundFP();
 523       roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
 524       break;
 525     }
 526 
 527     case lir_return:
 528       return_op(op->in_opr());
 529       break;
 530 
 531     case lir_safepoint:
 532       if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
 533         _masm->nop();
 534       }
 535       safepoint_poll(op->in_opr(), op->info());
 536       break;
 537 
 538     case lir_fxch:
 539       fxch(op->in_opr()->as_jint());
 540       break;
 541 
 542     case lir_fld:
 543       fld(op->in_opr()->as_jint());
 544       break;
 545 
 546     case lir_ffree:
 547       ffree(op->in_opr()->as_jint());
 548       break;
 549 
 550     case lir_branch:
 551       break;
 552 
 553     case lir_push:
 554       push(op->in_opr());
 555       break;
 556 
 557     case lir_pop:
 558       pop(op->in_opr());
 559       break;
 560 
 561     case lir_leal:
 562       leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
 563       break;
 564 
 565     case lir_null_check: {
 566       ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
 567 
 568       if (op->in_opr()->is_single_cpu()) {
 569         _masm->null_check(op->in_opr()->as_register(), stub->entry());
 570       } else {
 571         Unimplemented();
 572       }
 573       break;
 574     }
 575 
 576     case lir_monaddr:
 577       monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
 578       break;
 579 
 580 #ifdef SPARC
 581     case lir_pack64:
 582       pack64(op->in_opr(), op->result_opr());
 583       break;
 584 
 585     case lir_unpack64:
 586       unpack64(op->in_opr(), op->result_opr());
 587       break;
 588 #endif
 589 
 590     case lir_unwind:
 591       unwind_op(op->in_opr());
 592       break;
 593 
 594     default:
 595       Unimplemented();
 596       break;
 597   }
 598 }
 599 
 600 
 601 void LIR_Assembler::emit_op0(LIR_Op0* op) {
 602   switch (op->code()) {
 603     case lir_word_align: {
 604       _masm->align(BytesPerWord);
 605       break;
 606     }
 607 
 608     case lir_nop:
 609       assert(op->info() == NULL, "not supported");
 610       _masm->nop();
 611       break;
 612 
 613     case lir_label:
 614       Unimplemented();
 615       break;
 616 
 617     case lir_build_frame:
 618       build_frame();
 619       break;
 620 
 621     case lir_std_entry:
 622       // init offsets
 623       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
 624       _masm->align(CodeEntryAlignment);
 625       if (needs_icache(compilation()->method())) {
 626         check_icache();
 627       }
 628       offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
 629       _masm->verified_entry();
 630       if (needs_clinit_barrier_on_entry(compilation()->method())) {
 631         clinit_barrier(compilation()->method());
 632       }
 633       build_frame();
 634       offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
 635       break;
 636 
 637     case lir_osr_entry:
 638       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
 639       osr_entry();
 640       break;
 641 
 642     case lir_24bit_FPU:
 643       set_24bit_FPU();
 644       break;
 645 
 646     case lir_reset_FPU:
 647       reset_FPU();
 648       break;
 649 
 650     case lir_breakpoint:
 651       breakpoint();
 652       break;
 653 
 654     case lir_fpop_raw:
 655       fpop();
 656       break;
 657 
 658     case lir_membar:
 659       membar();
 660       break;
 661 
 662     case lir_membar_acquire:
 663       membar_acquire();
 664       break;
 665 
 666     case lir_membar_release:
 667       membar_release();
 668       break;
 669 
 670     case lir_membar_loadload:
 671       membar_loadload();
 672       break;
 673 
 674     case lir_membar_storestore:
 675       membar_storestore();
 676       break;
 677 
 678     case lir_membar_loadstore:
 679       membar_loadstore();
 680       break;
 681 
 682     case lir_membar_storeload:
 683       membar_storeload();
 684       break;
 685 
 686     case lir_get_thread:
 687       get_thread(op->result_opr());
 688       break;
 689 
 690     case lir_on_spin_wait:
 691       on_spin_wait();
 692       break;
 693 
 694     case lir_getfp:
 695       getfp(op->result_opr());
 696       break;
 697 
 698     case lir_getsp:
 699       getsp(op->result_opr());
 700       break;
 701 
 702 
 703     default:
 704       ShouldNotReachHere();
 705       break;
 706   }
 707 }
 708 
 709 
 710 void LIR_Assembler::emit_op2(LIR_Op2* op) {
 711   switch (op->code()) {
 712     case lir_cmp:
 713       if (op->info() != NULL) {
 714         assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
 715                "shouldn't be codeemitinfo for non-address operands");
 716         add_debug_info_for_null_check_here(op->info()); // exception possible
 717       }
 718       comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
 719       break;
 720 
 721     case lir_cmp_l2i:
 722     case lir_cmp_fd2i:
 723     case lir_ucmp_fd2i:
 724       comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
 725       break;
 726 
 727     case lir_cmove:
 728       cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
 729       break;
 730 
 731     case lir_shl:
 732     case lir_shr:
 733     case lir_ushr:
 734       if (op->in_opr2()->is_constant()) {
 735         shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
 736       } else {
 737         shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
 738       }
 739       break;
 740 
 741     case lir_add:
 742     case lir_sub:
 743     case lir_mul:
 744     case lir_mul_strictfp:
 745     case lir_div:
 746     case lir_div_strictfp:
 747     case lir_rem:
 748       assert(op->fpu_pop_count() < 2, "");
 749       arith_op(
 750         op->code(),
 751         op->in_opr1(),
 752         op->in_opr2(),
 753         op->result_opr(),
 754         op->info(),
 755         op->fpu_pop_count() == 1);
 756       break;
 757 
 758     case lir_abs:
 759     case lir_sqrt:
 760     case lir_tan:
 761     case lir_log10:
 762       intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
 763       break;
 764 
 765     case lir_neg:
 766       negate(op->in_opr1(), op->result_opr(), op->in_opr2());
 767       break;
 768 
 769     case lir_logic_and:
 770     case lir_logic_or:
 771     case lir_logic_xor:
 772       logic_op(
 773         op->code(),
 774         op->in_opr1(),
 775         op->in_opr2(),
 776         op->result_opr());
 777       break;
 778 
 779     case lir_throw:
 780       throw_op(op->in_opr1(), op->in_opr2(), op->info());
 781       break;
 782 
 783     case lir_xadd:
 784     case lir_xchg:
 785       atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
 786       break;
 787 
 788     default:
 789       Unimplemented();
 790       break;
 791   }
 792 }
 793 
 794 
 795 void LIR_Assembler::build_frame() {
 796   _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
 797 }
 798 
 799 
 800 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
 801   assert((src->is_single_fpu() && dest->is_single_stack()) ||
 802          (src->is_double_fpu() && dest->is_double_stack()),
 803          "round_fp: rounds register -> stack location");
 804 
 805   reg2stack (src, dest, src->type(), pop_fpu_stack);
 806 }
 807 
 808 
 809 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
 810   if (src->is_register()) {
 811     if (dest->is_register()) {
 812       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 813       reg2reg(src,  dest);
 814     } else if (dest->is_stack()) {
 815       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 816       reg2stack(src, dest, type, pop_fpu_stack);
 817     } else if (dest->is_address()) {
 818       reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
 819     } else {
 820       ShouldNotReachHere();
 821     }
 822 
 823   } else if (src->is_stack()) {
 824     assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 825     if (dest->is_register()) {
 826       stack2reg(src, dest, type);
 827     } else if (dest->is_stack()) {
 828       stack2stack(src, dest, type);
 829     } else {
 830       ShouldNotReachHere();
 831     }
 832 
 833   } else if (src->is_constant()) {
 834     if (dest->is_register()) {
 835       const2reg(src, dest, patch_code, info); // patching is possible
 836     } else if (dest->is_stack()) {
 837       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 838       const2stack(src, dest);
 839     } else if (dest->is_address()) {
 840       assert(patch_code == lir_patch_none, "no patching allowed here");
 841       const2mem(src, dest, type, info, wide);
 842     } else {
 843       ShouldNotReachHere();
 844     }
 845 
 846   } else if (src->is_address()) {
 847     mem2reg(src, dest, type, patch_code, info, wide, unaligned);
 848 
 849   } else {
 850     ShouldNotReachHere();
 851   }
 852 }
 853 
 854 
 855 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
 856 #ifndef PRODUCT
 857   if (VerifyOops) {
 858     OopMapStream s(info->oop_map());
 859     while (!s.is_done()) {
 860       OopMapValue v = s.current();
 861       if (v.is_oop()) {
 862         VMReg r = v.reg();
 863         if (!r->is_stack()) {
 864           stringStream st;
 865           st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
 866 #ifdef SPARC
 867           _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__);
 868 #else
 869           _masm->verify_oop(r->as_Register());
 870 #endif
 871         } else {
 872           _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
 873         }
 874       }
 875       check_codespace();
 876       CHECK_BAILOUT();
 877 
 878       s.next();
 879     }
 880   }
 881 #endif
 882 }