1 /*
   2  * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
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  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
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  24 
  25 #ifndef CPU_X86_ASSEMBLER_X86_HPP
  26 #define CPU_X86_ASSEMBLER_X86_HPP
  27 
  28 #include "asm/register.hpp"
  29 #include "utilities/powerOfTwo.hpp"
  30 
  31 // Contains all the definitions needed for x86 assembly code generation.
  32 
  33 // Calling convention
  34 class Argument {
  35  public:
  36   enum {
  37 #ifdef _LP64
  38 #ifdef _WIN64
  39     n_int_register_parameters_c   = 4, // rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
  40     n_float_register_parameters_c = 4,  // xmm0 - xmm3 (c_farg0, c_farg1, ... )
  41     n_int_register_returns_c = 1, // rax
  42     n_float_register_returns_c = 1, // xmm0
  43 #else
  44     n_int_register_parameters_c   = 6, // rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
  45     n_float_register_parameters_c = 8,  // xmm0 - xmm7 (c_farg0, c_farg1, ... )
  46     n_int_register_returns_c = 2, // rax, rdx
  47     n_float_register_returns_c = 2, // xmm0, xmm1
  48 #endif // _WIN64
  49     n_int_register_parameters_j   = 6, // j_rarg0, j_rarg1, ...
  50     n_float_register_parameters_j = 8  // j_farg0, j_farg1, ...
  51 #else
  52     n_register_parameters = 0,   // 0 registers used to pass arguments
  53     n_int_register_parameters_j   = 0,
  54     n_float_register_parameters_j = 0
  55 #endif // _LP64
  56   };
  57 };
  58 
  59 
  60 #ifdef _LP64
  61 // Symbolically name the register arguments used by the c calling convention.
  62 // Windows is different from linux/solaris. So much for standards...
  63 
  64 #ifdef _WIN64
  65 
  66 REGISTER_DECLARATION(Register, c_rarg0, rcx);
  67 REGISTER_DECLARATION(Register, c_rarg1, rdx);
  68 REGISTER_DECLARATION(Register, c_rarg2, r8);
  69 REGISTER_DECLARATION(Register, c_rarg3, r9);
  70 
  71 REGISTER_DECLARATION(XMMRegister, c_farg0, xmm0);
  72 REGISTER_DECLARATION(XMMRegister, c_farg1, xmm1);
  73 REGISTER_DECLARATION(XMMRegister, c_farg2, xmm2);
  74 REGISTER_DECLARATION(XMMRegister, c_farg3, xmm3);
  75 
  76 #else
  77 
  78 REGISTER_DECLARATION(Register, c_rarg0, rdi);
  79 REGISTER_DECLARATION(Register, c_rarg1, rsi);
  80 REGISTER_DECLARATION(Register, c_rarg2, rdx);
  81 REGISTER_DECLARATION(Register, c_rarg3, rcx);
  82 REGISTER_DECLARATION(Register, c_rarg4, r8);
  83 REGISTER_DECLARATION(Register, c_rarg5, r9);
  84 
  85 REGISTER_DECLARATION(XMMRegister, c_farg0, xmm0);
  86 REGISTER_DECLARATION(XMMRegister, c_farg1, xmm1);
  87 REGISTER_DECLARATION(XMMRegister, c_farg2, xmm2);
  88 REGISTER_DECLARATION(XMMRegister, c_farg3, xmm3);
  89 REGISTER_DECLARATION(XMMRegister, c_farg4, xmm4);
  90 REGISTER_DECLARATION(XMMRegister, c_farg5, xmm5);
  91 REGISTER_DECLARATION(XMMRegister, c_farg6, xmm6);
  92 REGISTER_DECLARATION(XMMRegister, c_farg7, xmm7);
  93 
  94 #endif // _WIN64
  95 
  96 // Symbolically name the register arguments used by the Java calling convention.
  97 // We have control over the convention for java so we can do what we please.
  98 // What pleases us is to offset the java calling convention so that when
  99 // we call a suitable jni method the arguments are lined up and we don't
 100 // have to do little shuffling. A suitable jni method is non-static and a
 101 // small number of arguments (two fewer args on windows)
 102 //
 103 //        |-------------------------------------------------------|
 104 //        | c_rarg0   c_rarg1  c_rarg2 c_rarg3 c_rarg4 c_rarg5    |
 105 //        |-------------------------------------------------------|
 106 //        | rcx       rdx      r8      r9      rdi*    rsi*       | windows (* not a c_rarg)
 107 //        | rdi       rsi      rdx     rcx     r8      r9         | solaris/linux
 108 //        |-------------------------------------------------------|
 109 //        | j_rarg5   j_rarg0  j_rarg1 j_rarg2 j_rarg3 j_rarg4    |
 110 //        |-------------------------------------------------------|
 111 
 112 REGISTER_DECLARATION(Register, j_rarg0, c_rarg1);
 113 REGISTER_DECLARATION(Register, j_rarg1, c_rarg2);
 114 REGISTER_DECLARATION(Register, j_rarg2, c_rarg3);
 115 // Windows runs out of register args here
 116 #ifdef _WIN64
 117 REGISTER_DECLARATION(Register, j_rarg3, rdi);
 118 REGISTER_DECLARATION(Register, j_rarg4, rsi);
 119 #else
 120 REGISTER_DECLARATION(Register, j_rarg3, c_rarg4);
 121 REGISTER_DECLARATION(Register, j_rarg4, c_rarg5);
 122 #endif /* _WIN64 */
 123 REGISTER_DECLARATION(Register, j_rarg5, c_rarg0);
 124 
 125 REGISTER_DECLARATION(XMMRegister, j_farg0, xmm0);
 126 REGISTER_DECLARATION(XMMRegister, j_farg1, xmm1);
 127 REGISTER_DECLARATION(XMMRegister, j_farg2, xmm2);
 128 REGISTER_DECLARATION(XMMRegister, j_farg3, xmm3);
 129 REGISTER_DECLARATION(XMMRegister, j_farg4, xmm4);
 130 REGISTER_DECLARATION(XMMRegister, j_farg5, xmm5);
 131 REGISTER_DECLARATION(XMMRegister, j_farg6, xmm6);
 132 REGISTER_DECLARATION(XMMRegister, j_farg7, xmm7);
 133 
 134 REGISTER_DECLARATION(Register, rscratch1, r10);  // volatile
 135 REGISTER_DECLARATION(Register, rscratch2, r11);  // volatile
 136 
 137 REGISTER_DECLARATION(Register, r12_heapbase, r12); // callee-saved
 138 REGISTER_DECLARATION(Register, r15_thread, r15); // callee-saved
 139 
 140 #else
 141 // rscratch1 will appear in 32bit code that is dead but of course must compile
 142 // Using noreg ensures if the dead code is incorrectly live and executed it
 143 // will cause an assertion failure
 144 #define rscratch1 noreg
 145 #define rscratch2 noreg
 146 
 147 #endif // _LP64
 148 
 149 // JSR 292
 150 // On x86, the SP does not have to be saved when invoking method handle intrinsics
 151 // or compiled lambda forms. We indicate that by setting rbp_mh_SP_save to noreg.
 152 REGISTER_DECLARATION(Register, rbp_mh_SP_save, noreg);
 153 
 154 // Address is an abstraction used to represent a memory location
 155 // using any of the amd64 addressing modes with one object.
 156 //
 157 // Note: A register location is represented via a Register, not
 158 //       via an address for efficiency & simplicity reasons.
 159 
 160 class ArrayAddress;
 161 
 162 class Address {
 163  public:
 164   enum ScaleFactor {
 165     no_scale = -1,
 166     times_1  =  0,
 167     times_2  =  1,
 168     times_4  =  2,
 169     times_8  =  3,
 170     times_ptr = LP64_ONLY(times_8) NOT_LP64(times_4)
 171   };
 172   static ScaleFactor times(int size) {
 173     assert(size >= 1 && size <= 8 && is_power_of_2(size), "bad scale size");
 174     if (size == 8)  return times_8;
 175     if (size == 4)  return times_4;
 176     if (size == 2)  return times_2;
 177     return times_1;
 178   }
 179   static int scale_size(ScaleFactor scale) {
 180     assert(scale != no_scale, "");
 181     assert(((1 << (int)times_1) == 1 &&
 182             (1 << (int)times_2) == 2 &&
 183             (1 << (int)times_4) == 4 &&
 184             (1 << (int)times_8) == 8), "");
 185     return (1 << (int)scale);
 186   }
 187 
 188  private:
 189   Register         _base;
 190   Register         _index;
 191   XMMRegister      _xmmindex;
 192   ScaleFactor      _scale;
 193   int              _disp;
 194   bool             _isxmmindex;
 195   RelocationHolder _rspec;
 196 
 197   // Easily misused constructors make them private
 198   // %%% can we make these go away?
 199   NOT_LP64(Address(address loc, RelocationHolder spec);)
 200   Address(int disp, address loc, relocInfo::relocType rtype);
 201   Address(int disp, address loc, RelocationHolder spec);
 202 
 203  public:
 204 
 205  int disp() { return _disp; }
 206   // creation
 207   Address()
 208     : _base(noreg),
 209       _index(noreg),
 210       _xmmindex(xnoreg),
 211       _scale(no_scale),
 212       _disp(0),
 213       _isxmmindex(false){
 214   }
 215 
 216   // No default displacement otherwise Register can be implicitly
 217   // converted to 0(Register) which is quite a different animal.
 218 
 219   Address(Register base, int disp)
 220     : _base(base),
 221       _index(noreg),
 222       _xmmindex(xnoreg),
 223       _scale(no_scale),
 224       _disp(disp),
 225       _isxmmindex(false){
 226   }
 227 
 228   Address(Register base, Register index, ScaleFactor scale, int disp = 0)
 229     : _base (base),
 230       _index(index),
 231       _xmmindex(xnoreg),
 232       _scale(scale),
 233       _disp (disp),
 234       _isxmmindex(false) {
 235     assert(!index->is_valid() == (scale == Address::no_scale),
 236            "inconsistent address");
 237   }
 238 
 239   Address(Register base, RegisterOrConstant index, ScaleFactor scale = times_1, int disp = 0)
 240     : _base (base),
 241       _index(index.register_or_noreg()),
 242       _xmmindex(xnoreg),
 243       _scale(scale),
 244       _disp (disp + (index.constant_or_zero() * scale_size(scale))),
 245       _isxmmindex(false){
 246     if (!index.is_register())  scale = Address::no_scale;
 247     assert(!_index->is_valid() == (scale == Address::no_scale),
 248            "inconsistent address");
 249   }
 250 
 251   Address(Register base, XMMRegister index, ScaleFactor scale, int disp = 0)
 252     : _base (base),
 253       _index(noreg),
 254       _xmmindex(index),
 255       _scale(scale),
 256       _disp(disp),
 257       _isxmmindex(true) {
 258       assert(!index->is_valid() == (scale == Address::no_scale),
 259              "inconsistent address");
 260   }
 261 
 262   // The following overloads are used in connection with the
 263   // ByteSize type (see sizes.hpp).  They simplify the use of
 264   // ByteSize'd arguments in assembly code.
 265 
 266   Address(Register base, ByteSize disp)
 267     : Address(base, in_bytes(disp)) {}
 268 
 269   Address(Register base, Register index, ScaleFactor scale, ByteSize disp)
 270     : Address(base, index, scale, in_bytes(disp)) {}
 271 
 272   Address(Register base, RegisterOrConstant index, ScaleFactor scale, ByteSize disp)
 273     : Address(base, index, scale, in_bytes(disp)) {}
 274 
 275   Address plus_disp(int disp) const {
 276     Address a = (*this);
 277     a._disp += disp;
 278     return a;
 279   }
 280   Address plus_disp(RegisterOrConstant disp, ScaleFactor scale = times_1) const {
 281     Address a = (*this);
 282     a._disp += disp.constant_or_zero() * scale_size(scale);
 283     if (disp.is_register()) {
 284       assert(!a.index()->is_valid(), "competing indexes");
 285       a._index = disp.as_register();
 286       a._scale = scale;
 287     }
 288     return a;
 289   }
 290   bool is_same_address(Address a) const {
 291     // disregard _rspec
 292     return _base == a._base && _disp == a._disp && _index == a._index && _scale == a._scale;
 293   }
 294 
 295   // accessors
 296   bool        uses(Register reg) const { return _base == reg || _index == reg; }
 297   Register    base()             const { return _base;  }
 298   Register    index()            const { return _index; }
 299   XMMRegister xmmindex()         const { return _xmmindex; }
 300   ScaleFactor scale()            const { return _scale; }
 301   int         disp()             const { return _disp;  }
 302   bool        isxmmindex()       const { return _isxmmindex; }
 303 
 304   // Convert the raw encoding form into the form expected by the constructor for
 305   // Address.  An index of 4 (rsp) corresponds to having no index, so convert
 306   // that to noreg for the Address constructor.
 307   static Address make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc);
 308 
 309   static Address make_array(ArrayAddress);
 310 
 311  private:
 312   bool base_needs_rex() const {
 313     return _base->is_valid() && _base->encoding() >= 8;
 314   }
 315 
 316   bool index_needs_rex() const {
 317     return _index->is_valid() &&_index->encoding() >= 8;
 318   }
 319 
 320   bool xmmindex_needs_rex() const {
 321     return _xmmindex->is_valid() && _xmmindex->encoding() >= 8;
 322   }
 323 
 324   relocInfo::relocType reloc() const { return _rspec.type(); }
 325 
 326   friend class Assembler;
 327   friend class MacroAssembler;
 328   friend class LIR_Assembler; // base/index/scale/disp
 329 };
 330 
 331 //
 332 // AddressLiteral has been split out from Address because operands of this type
 333 // need to be treated specially on 32bit vs. 64bit platforms. By splitting it out
 334 // the few instructions that need to deal with address literals are unique and the
 335 // MacroAssembler does not have to implement every instruction in the Assembler
 336 // in order to search for address literals that may need special handling depending
 337 // on the instruction and the platform. As small step on the way to merging i486/amd64
 338 // directories.
 339 //
 340 class AddressLiteral {
 341   friend class ArrayAddress;
 342   RelocationHolder _rspec;
 343   // Typically we use AddressLiterals we want to use their rval
 344   // However in some situations we want the lval (effect address) of the item.
 345   // We provide a special factory for making those lvals.
 346   bool _is_lval;
 347 
 348   // If the target is far we'll need to load the ea of this to
 349   // a register to reach it. Otherwise if near we can do rip
 350   // relative addressing.
 351 
 352   address          _target;
 353 
 354  protected:
 355   // creation
 356   AddressLiteral()
 357     : _is_lval(false),
 358       _target(NULL)
 359   {}
 360 
 361   public:
 362 
 363 
 364   AddressLiteral(address target, relocInfo::relocType rtype);
 365 
 366   AddressLiteral(address target, RelocationHolder const& rspec)
 367     : _rspec(rspec),
 368       _is_lval(false),
 369       _target(target)
 370   {}
 371 
 372   AddressLiteral addr() {
 373     AddressLiteral ret = *this;
 374     ret._is_lval = true;
 375     return ret;
 376   }
 377 
 378 
 379  private:
 380 
 381   address target() { return _target; }
 382   bool is_lval() const { return _is_lval; }
 383 
 384   relocInfo::relocType reloc() const { return _rspec.type(); }
 385   const RelocationHolder& rspec() const { return _rspec; }
 386 
 387   friend class Assembler;
 388   friend class MacroAssembler;
 389   friend class Address;
 390   friend class LIR_Assembler;
 391 };
 392 
 393 // Convenience classes
 394 class RuntimeAddress: public AddressLiteral {
 395 
 396   public:
 397 
 398   RuntimeAddress(address target) : AddressLiteral(target, relocInfo::runtime_call_type) {}
 399 
 400 };
 401 
 402 class ExternalAddress: public AddressLiteral {
 403  private:
 404   static relocInfo::relocType reloc_for_target(address target) {
 405     // Sometimes ExternalAddress is used for values which aren't
 406     // exactly addresses, like the card table base.
 407     // external_word_type can't be used for values in the first page
 408     // so just skip the reloc in that case.
 409     return external_word_Relocation::can_be_relocated(target) ? relocInfo::external_word_type : relocInfo::none;
 410   }
 411 
 412  public:
 413 
 414   ExternalAddress(address target) : AddressLiteral(target, reloc_for_target(target)) {}
 415 
 416 };
 417 
 418 class InternalAddress: public AddressLiteral {
 419 
 420   public:
 421 
 422   InternalAddress(address target) : AddressLiteral(target, relocInfo::internal_word_type) {}
 423 
 424 };
 425 
 426 // x86 can do array addressing as a single operation since disp can be an absolute
 427 // address amd64 can't. We create a class that expresses the concept but does extra
 428 // magic on amd64 to get the final result
 429 
 430 class ArrayAddress {
 431   private:
 432 
 433   AddressLiteral _base;
 434   Address        _index;
 435 
 436   public:
 437 
 438   ArrayAddress() {};
 439   ArrayAddress(AddressLiteral base, Address index): _base(base), _index(index) {};
 440   AddressLiteral base() { return _base; }
 441   Address index() { return _index; }
 442 
 443 };
 444 
 445 class InstructionAttr;
 446 
 447 // 64-bit reflect the fxsave size which is 512 bytes and the new xsave area on EVEX which is another 2176 bytes
 448 // See fxsave and xsave(EVEX enabled) documentation for layout
 449 const int FPUStateSizeInWords = NOT_LP64(27) LP64_ONLY(2688 / wordSize);
 450 
 451 // The Intel x86/Amd64 Assembler: Pure assembler doing NO optimizations on the instruction
 452 // level (e.g. mov rax, 0 is not translated into xor rax, rax!); i.e., what you write
 453 // is what you get. The Assembler is generating code into a CodeBuffer.
 454 
 455 class Assembler : public AbstractAssembler  {
 456   friend class AbstractAssembler; // for the non-virtual hack
 457   friend class LIR_Assembler; // as_Address()
 458   friend class StubGenerator;
 459 
 460  public:
 461   enum Condition {                     // The x86 condition codes used for conditional jumps/moves.
 462     zero          = 0x4,
 463     notZero       = 0x5,
 464     equal         = 0x4,
 465     notEqual      = 0x5,
 466     less          = 0xc,
 467     lessEqual     = 0xe,
 468     greater       = 0xf,
 469     greaterEqual  = 0xd,
 470     below         = 0x2,
 471     belowEqual    = 0x6,
 472     above         = 0x7,
 473     aboveEqual    = 0x3,
 474     overflow      = 0x0,
 475     noOverflow    = 0x1,
 476     carrySet      = 0x2,
 477     carryClear    = 0x3,
 478     negative      = 0x8,
 479     positive      = 0x9,
 480     parity        = 0xa,
 481     noParity      = 0xb
 482   };
 483 
 484   enum Prefix {
 485     // segment overrides
 486     CS_segment = 0x2e,
 487     SS_segment = 0x36,
 488     DS_segment = 0x3e,
 489     ES_segment = 0x26,
 490     FS_segment = 0x64,
 491     GS_segment = 0x65,
 492 
 493     REX        = 0x40,
 494 
 495     REX_B      = 0x41,
 496     REX_X      = 0x42,
 497     REX_XB     = 0x43,
 498     REX_R      = 0x44,
 499     REX_RB     = 0x45,
 500     REX_RX     = 0x46,
 501     REX_RXB    = 0x47,
 502 
 503     REX_W      = 0x48,
 504 
 505     REX_WB     = 0x49,
 506     REX_WX     = 0x4A,
 507     REX_WXB    = 0x4B,
 508     REX_WR     = 0x4C,
 509     REX_WRB    = 0x4D,
 510     REX_WRX    = 0x4E,
 511     REX_WRXB   = 0x4F,
 512 
 513     VEX_3bytes = 0xC4,
 514     VEX_2bytes = 0xC5,
 515     EVEX_4bytes = 0x62,
 516     Prefix_EMPTY = 0x0
 517   };
 518 
 519   enum VexPrefix {
 520     VEX_B = 0x20,
 521     VEX_X = 0x40,
 522     VEX_R = 0x80,
 523     VEX_W = 0x80
 524   };
 525 
 526   enum ExexPrefix {
 527     EVEX_F  = 0x04,
 528     EVEX_V  = 0x08,
 529     EVEX_Rb = 0x10,
 530     EVEX_X  = 0x40,
 531     EVEX_Z  = 0x80
 532   };
 533 
 534   enum VexSimdPrefix {
 535     VEX_SIMD_NONE = 0x0,
 536     VEX_SIMD_66   = 0x1,
 537     VEX_SIMD_F3   = 0x2,
 538     VEX_SIMD_F2   = 0x3
 539   };
 540 
 541   enum VexOpcode {
 542     VEX_OPCODE_NONE  = 0x0,
 543     VEX_OPCODE_0F    = 0x1,
 544     VEX_OPCODE_0F_38 = 0x2,
 545     VEX_OPCODE_0F_3A = 0x3,
 546     VEX_OPCODE_MASK  = 0x1F
 547   };
 548 
 549   enum AvxVectorLen {
 550     AVX_128bit = 0x0,
 551     AVX_256bit = 0x1,
 552     AVX_512bit = 0x2,
 553     AVX_NoVec  = 0x4
 554   };
 555 
 556   enum EvexTupleType {
 557     EVEX_FV   = 0,
 558     EVEX_HV   = 4,
 559     EVEX_FVM  = 6,
 560     EVEX_T1S  = 7,
 561     EVEX_T1F  = 11,
 562     EVEX_T2   = 13,
 563     EVEX_T4   = 15,
 564     EVEX_T8   = 17,
 565     EVEX_HVM  = 18,
 566     EVEX_QVM  = 19,
 567     EVEX_OVM  = 20,
 568     EVEX_M128 = 21,
 569     EVEX_DUP  = 22,
 570     EVEX_ETUP = 23
 571   };
 572 
 573   enum EvexInputSizeInBits {
 574     EVEX_8bit  = 0,
 575     EVEX_16bit = 1,
 576     EVEX_32bit = 2,
 577     EVEX_64bit = 3,
 578     EVEX_NObit = 4
 579   };
 580 
 581   enum WhichOperand {
 582     // input to locate_operand, and format code for relocations
 583     imm_operand  = 0,            // embedded 32-bit|64-bit immediate operand
 584     disp32_operand = 1,          // embedded 32-bit displacement or address
 585     call32_operand = 2,          // embedded 32-bit self-relative displacement
 586 #ifndef _LP64
 587     _WhichOperand_limit = 3
 588 #else
 589      narrow_oop_operand = 3,     // embedded 32-bit immediate narrow oop
 590     _WhichOperand_limit = 4
 591 #endif
 592   };
 593 
 594   // Comparison predicates for integral types & FP types when using SSE
 595   enum ComparisonPredicate {
 596     eq = 0,
 597     lt = 1,
 598     le = 2,
 599     _false = 3,
 600     neq = 4,
 601     nlt = 5,
 602     nle = 6,
 603     _true = 7
 604   };
 605 
 606   // Comparison predicates for FP types when using AVX
 607   // O means ordered. U is unordered. When using ordered, any NaN comparison is false. Otherwise, it is true.
 608   // S means signaling. Q means non-signaling. When signaling is true, instruction signals #IA on NaN.
 609   enum ComparisonPredicateFP {
 610     EQ_OQ = 0,
 611     LT_OS = 1,
 612     LE_OS = 2,
 613     UNORD_Q = 3,
 614     NEQ_UQ = 4,
 615     NLT_US = 5,
 616     NLE_US = 6,
 617     ORD_Q = 7,
 618     EQ_UQ = 8,
 619     NGE_US = 9,
 620     NGT_US = 0xA,
 621     FALSE_OQ = 0XB,
 622     NEQ_OQ = 0xC,
 623     GE_OS = 0xD,
 624     GT_OS = 0xE,
 625     TRUE_UQ = 0xF,
 626     EQ_OS = 0x10,
 627     LT_OQ = 0x11,
 628     LE_OQ = 0x12,
 629     UNORD_S = 0x13,
 630     NEQ_US = 0x14,
 631     NLT_UQ = 0x15,
 632     NLE_UQ = 0x16,
 633     ORD_S = 0x17,
 634     EQ_US = 0x18,
 635     NGE_UQ = 0x19,
 636     NGT_UQ = 0x1A,
 637     FALSE_OS = 0x1B,
 638     NEQ_OS = 0x1C,
 639     GE_OQ = 0x1D,
 640     GT_OQ = 0x1E,
 641     TRUE_US =0x1F
 642   };
 643 
 644   enum Width {
 645     B = 0,
 646     W = 1,
 647     D = 2,
 648     Q = 3
 649   };
 650 
 651   //---<  calculate length of instruction  >---
 652   // As instruction size can't be found out easily on x86/x64,
 653   // we just use '4' for len and maxlen.
 654   // instruction must start at passed address
 655   static unsigned int instr_len(unsigned char *instr) { return 4; }
 656 
 657   //---<  longest instructions  >---
 658   // Max instruction length is not specified in architecture documentation.
 659   // We could use a "safe enough" estimate (15), but just default to
 660   // instruction length guess from above.
 661   static unsigned int instr_maxlen() { return 4; }
 662 
 663   // NOTE: The general philopsophy of the declarations here is that 64bit versions
 664   // of instructions are freely declared without the need for wrapping them an ifdef.
 665   // (Some dangerous instructions are ifdef's out of inappropriate jvm's.)
 666   // In the .cpp file the implementations are wrapped so that they are dropped out
 667   // of the resulting jvm. This is done mostly to keep the footprint of MINIMAL
 668   // to the size it was prior to merging up the 32bit and 64bit assemblers.
 669   //
 670   // This does mean you'll get a linker/runtime error if you use a 64bit only instruction
 671   // in a 32bit vm. This is somewhat unfortunate but keeps the ifdef noise down.
 672 
 673 private:
 674 
 675   bool _legacy_mode_bw;
 676   bool _legacy_mode_dq;
 677   bool _legacy_mode_vl;
 678   bool _legacy_mode_vlbw;
 679   NOT_LP64(bool _is_managed;)
 680 
 681   class InstructionAttr *_attributes;
 682 
 683   // 64bit prefixes
 684   void prefix(Register reg);
 685   void prefix(Register dst, Register src, Prefix p);
 686   void prefix(Register dst, Address adr, Prefix p);
 687 
 688   void prefix(Address adr);
 689   void prefix(Address adr, Register reg,  bool byteinst = false);
 690   void prefix(Address adr, XMMRegister reg);
 691 
 692   int prefix_and_encode(int reg_enc, bool byteinst = false);
 693   int prefix_and_encode(int dst_enc, int src_enc) {
 694     return prefix_and_encode(dst_enc, false, src_enc, false);
 695   }
 696   int prefix_and_encode(int dst_enc, bool dst_is_byte, int src_enc, bool src_is_byte);
 697 
 698   // Some prefixq variants always emit exactly one prefix byte, so besides a
 699   // prefix-emitting method we provide a method to get the prefix byte to emit,
 700   // which can then be folded into a byte stream.
 701   int8_t get_prefixq(Address adr);
 702   int8_t get_prefixq(Address adr, Register reg);
 703 
 704   void prefixq(Address adr);
 705   void prefixq(Address adr, Register reg);
 706   void prefixq(Address adr, XMMRegister reg);
 707 
 708   int prefixq_and_encode(int reg_enc);
 709   int prefixq_and_encode(int dst_enc, int src_enc);
 710 
 711   void rex_prefix(Address adr, XMMRegister xreg,
 712                   VexSimdPrefix pre, VexOpcode opc, bool rex_w);
 713   int  rex_prefix_and_encode(int dst_enc, int src_enc,
 714                              VexSimdPrefix pre, VexOpcode opc, bool rex_w);
 715 
 716   void vex_prefix(bool vex_r, bool vex_b, bool vex_x, int nds_enc, VexSimdPrefix pre, VexOpcode opc);
 717 
 718   void evex_prefix(bool vex_r, bool vex_b, bool vex_x, bool evex_r, bool evex_v,
 719                    int nds_enc, VexSimdPrefix pre, VexOpcode opc);
 720 
 721   void vex_prefix(Address adr, int nds_enc, int xreg_enc,
 722                   VexSimdPrefix pre, VexOpcode opc,
 723                   InstructionAttr *attributes);
 724 
 725   int  vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc,
 726                              VexSimdPrefix pre, VexOpcode opc,
 727                              InstructionAttr *attributes);
 728 
 729   void simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre,
 730                    VexOpcode opc, InstructionAttr *attributes);
 731 
 732   int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre,
 733                              VexOpcode opc, InstructionAttr *attributes);
 734 
 735   // Helper functions for groups of instructions
 736   void emit_arith_b(int op1, int op2, Register dst, int imm8);
 737 
 738   void emit_arith(int op1, int op2, Register dst, int32_t imm32);
 739   // Force generation of a 4 byte immediate value even if it fits into 8bit
 740   void emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32);
 741   void emit_arith(int op1, int op2, Register dst, Register src);
 742 
 743   bool emit_compressed_disp_byte(int &disp);
 744 
 745   void emit_modrm(int mod, int dst_enc, int src_enc);
 746   void emit_modrm_disp8(int mod, int dst_enc, int src_enc,
 747                         int disp);
 748   void emit_modrm_sib(int mod, int dst_enc, int src_enc,
 749                       Address::ScaleFactor scale, int index_enc, int base_enc);
 750   void emit_modrm_sib_disp8(int mod, int dst_enc, int src_enc,
 751                             Address::ScaleFactor scale, int index_enc, int base_enc,
 752                             int disp);
 753 
 754   void emit_operand_helper(int reg_enc,
 755                            int base_enc, int index_enc, Address::ScaleFactor scale,
 756                            int disp,
 757                            RelocationHolder const& rspec,
 758                            int rip_relative_correction = 0);
 759 
 760   void emit_operand(Register reg,
 761                     Register base, Register index, Address::ScaleFactor scale,
 762                     int disp,
 763                     RelocationHolder const& rspec,
 764                     int rip_relative_correction = 0);
 765 
 766   void emit_operand(Register reg,
 767                     Register base, XMMRegister index, Address::ScaleFactor scale,
 768                     int disp,
 769                     RelocationHolder const& rspec);
 770 
 771   void emit_operand(XMMRegister xreg,
 772                     Register base, XMMRegister xindex, Address::ScaleFactor scale,
 773                     int disp,
 774                     RelocationHolder const& rspec);
 775 
 776   void emit_operand(Register reg, Address adr,
 777                     int rip_relative_correction = 0);
 778 
 779   void emit_operand(XMMRegister reg,
 780                     Register base, Register index, Address::ScaleFactor scale,
 781                     int disp,
 782                     RelocationHolder const& rspec);
 783 
 784   void emit_operand(XMMRegister reg, Address adr);
 785 
 786   // Immediate-to-memory forms
 787   void emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32);
 788 
 789  protected:
 790   #ifdef ASSERT
 791   void check_relocation(RelocationHolder const& rspec, int format);
 792   #endif
 793 
 794   void emit_data(jint data, relocInfo::relocType    rtype, int format);
 795   void emit_data(jint data, RelocationHolder const& rspec, int format);
 796   void emit_data64(jlong data, relocInfo::relocType rtype, int format = 0);
 797   void emit_data64(jlong data, RelocationHolder const& rspec, int format = 0);
 798 
 799   bool reachable(AddressLiteral adr) NOT_LP64({ return true;});
 800 
 801   // These are all easily abused and hence protected
 802 
 803   // 32BIT ONLY SECTION
 804 #ifndef _LP64
 805   // Make these disappear in 64bit mode since they would never be correct
 806   void cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec);   // 32BIT ONLY
 807   void cmp_literal32(Address src1, int32_t imm32, RelocationHolder const& rspec);    // 32BIT ONLY
 808 
 809   void mov_literal32(Register dst, int32_t imm32, RelocationHolder const& rspec);    // 32BIT ONLY
 810   void mov_literal32(Address dst, int32_t imm32, RelocationHolder const& rspec);     // 32BIT ONLY
 811 
 812   void push_literal32(int32_t imm32, RelocationHolder const& rspec);                 // 32BIT ONLY
 813 #else
 814   // 64BIT ONLY SECTION
 815   void mov_literal64(Register dst, intptr_t imm64, RelocationHolder const& rspec);   // 64BIT ONLY
 816 
 817   void cmp_narrow_oop(Register src1, int32_t imm32, RelocationHolder const& rspec);
 818   void cmp_narrow_oop(Address src1, int32_t imm32, RelocationHolder const& rspec);
 819 
 820   void mov_narrow_oop(Register dst, int32_t imm32, RelocationHolder const& rspec);
 821   void mov_narrow_oop(Address dst, int32_t imm32, RelocationHolder const& rspec);
 822 #endif // _LP64
 823 
 824   // These are unique in that we are ensured by the caller that the 32bit
 825   // relative in these instructions will always be able to reach the potentially
 826   // 64bit address described by entry. Since they can take a 64bit address they
 827   // don't have the 32 suffix like the other instructions in this class.
 828 
 829   void call_literal(address entry, RelocationHolder const& rspec);
 830   void jmp_literal(address entry, RelocationHolder const& rspec);
 831 
 832   // Avoid using directly section
 833   // Instructions in this section are actually usable by anyone without danger
 834   // of failure but have performance issues that are addressed my enhanced
 835   // instructions which will do the proper thing base on the particular cpu.
 836   // We protect them because we don't trust you...
 837 
 838   // Don't use next inc() and dec() methods directly. INC & DEC instructions
 839   // could cause a partial flag stall since they don't set CF flag.
 840   // Use MacroAssembler::decrement() & MacroAssembler::increment() methods
 841   // which call inc() & dec() or add() & sub() in accordance with
 842   // the product flag UseIncDec value.
 843 
 844   void decl(Register dst);
 845   void decl(Address dst);
 846   void decq(Address dst);
 847 
 848   void incl(Register dst);
 849   void incl(Address dst);
 850   void incq(Register dst);
 851   void incq(Address dst);
 852 
 853   // New cpus require use of movsd and movss to avoid partial register stall
 854   // when loading from memory. But for old Opteron use movlpd instead of movsd.
 855   // The selection is done in MacroAssembler::movdbl() and movflt().
 856 
 857   // Move Scalar Single-Precision Floating-Point Values
 858   void movss(XMMRegister dst, Address src);
 859   void movss(XMMRegister dst, XMMRegister src);
 860   void movss(Address dst, XMMRegister src);
 861 
 862   // Move Scalar Double-Precision Floating-Point Values
 863   void movsd(XMMRegister dst, Address src);
 864   void movsd(XMMRegister dst, XMMRegister src);
 865   void movsd(Address dst, XMMRegister src);
 866   void movlpd(XMMRegister dst, Address src);
 867 
 868   // New cpus require use of movaps and movapd to avoid partial register stall
 869   // when moving between registers.
 870   void movaps(XMMRegister dst, XMMRegister src);
 871   void movapd(XMMRegister dst, XMMRegister src);
 872 
 873   // End avoid using directly
 874 
 875 
 876   // Instruction prefixes
 877   void prefix(Prefix p);
 878 
 879   public:
 880 
 881   // Creation
 882   Assembler(CodeBuffer* code) : AbstractAssembler(code) {
 883     init_attributes();
 884   }
 885 
 886   // Decoding
 887   static address locate_operand(address inst, WhichOperand which);
 888   static address locate_next_instruction(address inst);
 889 
 890   // Utilities
 891   static bool query_compressed_disp_byte(int disp, bool is_evex_inst, int vector_len,
 892                                          int cur_tuple_type, int in_size_in_bits, int cur_encoding);
 893 
 894   // Generic instructions
 895   // Does 32bit or 64bit as needed for the platform. In some sense these
 896   // belong in macro assembler but there is no need for both varieties to exist
 897 
 898   void init_attributes(void);
 899 
 900   void set_attributes(InstructionAttr *attributes) { _attributes = attributes; }
 901   void clear_attributes(void) { _attributes = NULL; }
 902 
 903   void set_managed(void) { NOT_LP64(_is_managed = true;) }
 904   void clear_managed(void) { NOT_LP64(_is_managed = false;) }
 905   bool is_managed(void) {
 906     NOT_LP64(return _is_managed;)
 907     LP64_ONLY(return false;) }
 908 
 909   void lea(Register dst, Address src);
 910 
 911   void mov(Register dst, Register src);
 912 
 913 #ifdef _LP64
 914   // support caching the result of some routines
 915 
 916   // must be called before pusha(), popa(), vzeroupper() - checked with asserts
 917   static void precompute_instructions();
 918 
 919   void pusha_uncached();
 920   void popa_uncached();
 921 #endif
 922   void vzeroupper_uncached();
 923   void decq(Register dst);
 924 
 925   void pusha();
 926   void popa();
 927 
 928   void pushf();
 929   void popf();
 930 
 931   void push(int32_t imm32);
 932 
 933   void push(Register src);
 934 
 935   void pop(Register dst);
 936 
 937   // These are dummies to prevent surprise implicit conversions to Register
 938   void push(void* v);
 939   void pop(void* v);
 940 
 941   // These do register sized moves/scans
 942   void rep_mov();
 943   void rep_stos();
 944   void rep_stosb();
 945   void repne_scan();
 946 #ifdef _LP64
 947   void repne_scanl();
 948 #endif
 949 
 950   // Vanilla instructions in lexical order
 951 
 952   void adcl(Address dst, int32_t imm32);
 953   void adcl(Address dst, Register src);
 954   void adcl(Register dst, int32_t imm32);
 955   void adcl(Register dst, Address src);
 956   void adcl(Register dst, Register src);
 957 
 958   void adcq(Register dst, int32_t imm32);
 959   void adcq(Register dst, Address src);
 960   void adcq(Register dst, Register src);
 961 
 962   void addb(Address dst, int imm8);
 963   void addw(Register dst, Register src);
 964   void addw(Address dst, int imm16);
 965 
 966   void addl(Address dst, int32_t imm32);
 967   void addl(Address dst, Register src);
 968   void addl(Register dst, int32_t imm32);
 969   void addl(Register dst, Address src);
 970   void addl(Register dst, Register src);
 971 
 972   void addq(Address dst, int32_t imm32);
 973   void addq(Address dst, Register src);
 974   void addq(Register dst, int32_t imm32);
 975   void addq(Register dst, Address src);
 976   void addq(Register dst, Register src);
 977 
 978 #ifdef _LP64
 979  //Add Unsigned Integers with Carry Flag
 980   void adcxq(Register dst, Register src);
 981 
 982  //Add Unsigned Integers with Overflow Flag
 983   void adoxq(Register dst, Register src);
 984 #endif
 985 
 986   void addr_nop_4();
 987   void addr_nop_5();
 988   void addr_nop_7();
 989   void addr_nop_8();
 990 
 991   // Add Scalar Double-Precision Floating-Point Values
 992   void addsd(XMMRegister dst, Address src);
 993   void addsd(XMMRegister dst, XMMRegister src);
 994 
 995   // Add Scalar Single-Precision Floating-Point Values
 996   void addss(XMMRegister dst, Address src);
 997   void addss(XMMRegister dst, XMMRegister src);
 998 
 999   // AES instructions
1000   void aesdec(XMMRegister dst, Address src);
1001   void aesdec(XMMRegister dst, XMMRegister src);
1002   void aesdeclast(XMMRegister dst, Address src);
1003   void aesdeclast(XMMRegister dst, XMMRegister src);
1004   void aesenc(XMMRegister dst, Address src);
1005   void aesenc(XMMRegister dst, XMMRegister src);
1006   void aesenclast(XMMRegister dst, Address src);
1007   void aesenclast(XMMRegister dst, XMMRegister src);
1008   // Vector AES instructions
1009   void vaesenc(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1010   void vaesenclast(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1011   void vaesdec(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1012   void vaesdeclast(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1013 
1014   void andw(Register dst, Register src);
1015   void andb(Address dst, Register src);
1016 
1017   void andl(Address  dst, int32_t imm32);
1018   void andl(Register dst, int32_t imm32);
1019   void andl(Register dst, Address src);
1020   void andl(Register dst, Register src);
1021   void andl(Address dst, Register src);
1022 
1023   void andq(Address  dst, int32_t imm32);
1024   void andq(Register dst, int32_t imm32);
1025   void andq(Register dst, Address src);
1026   void andq(Register dst, Register src);
1027   void andq(Address dst, Register src);
1028 
1029   // BMI instructions
1030   void andnl(Register dst, Register src1, Register src2);
1031   void andnl(Register dst, Register src1, Address src2);
1032   void andnq(Register dst, Register src1, Register src2);
1033   void andnq(Register dst, Register src1, Address src2);
1034 
1035   void blsil(Register dst, Register src);
1036   void blsil(Register dst, Address src);
1037   void blsiq(Register dst, Register src);
1038   void blsiq(Register dst, Address src);
1039 
1040   void blsmskl(Register dst, Register src);
1041   void blsmskl(Register dst, Address src);
1042   void blsmskq(Register dst, Register src);
1043   void blsmskq(Register dst, Address src);
1044 
1045   void blsrl(Register dst, Register src);
1046   void blsrl(Register dst, Address src);
1047   void blsrq(Register dst, Register src);
1048   void blsrq(Register dst, Address src);
1049 
1050   void bsfl(Register dst, Register src);
1051   void bsrl(Register dst, Register src);
1052 
1053 #ifdef _LP64
1054   void bsfq(Register dst, Register src);
1055   void bsrq(Register dst, Register src);
1056 #endif
1057 
1058   void bswapl(Register reg);
1059 
1060   void bswapq(Register reg);
1061 
1062   void call(Label& L, relocInfo::relocType rtype);
1063   void call(Register reg);  // push pc; pc <- reg
1064   void call(Address adr);   // push pc; pc <- adr
1065 
1066   void cdql();
1067 
1068   void cdqq();
1069 
1070   void cld();
1071 
1072   void clflush(Address adr);
1073   void clflushopt(Address adr);
1074   void clwb(Address adr);
1075 
1076   void cmovl(Condition cc, Register dst, Register src);
1077   void cmovl(Condition cc, Register dst, Address src);
1078 
1079   void cmovq(Condition cc, Register dst, Register src);
1080   void cmovq(Condition cc, Register dst, Address src);
1081 
1082 
1083   void cmpb(Address dst, int imm8);
1084 
1085   void cmpl(Address dst, int32_t imm32);
1086   void cmpl(Register dst, int32_t imm32);
1087   void cmpl(Register dst, Register src);
1088   void cmpl(Register dst, Address src);
1089 
1090   void cmpq(Address dst, int32_t imm32);
1091   void cmpq(Address dst, Register src);
1092   void cmpq(Register dst, int32_t imm32);
1093   void cmpq(Register dst, Register src);
1094   void cmpq(Register dst, Address src);
1095 
1096   // these are dummies used to catch attempting to convert NULL to Register
1097   void cmpl(Register dst, void* junk); // dummy
1098   void cmpq(Register dst, void* junk); // dummy
1099 
1100   void cmpw(Address dst, int imm16);
1101 
1102   void cmpxchg8 (Address adr);
1103 
1104   void cmpxchgb(Register reg, Address adr);
1105   void cmpxchgl(Register reg, Address adr);
1106 
1107   void cmpxchgq(Register reg, Address adr);
1108   void cmpxchgw(Register reg, Address adr);
1109 
1110   // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1111   void comisd(XMMRegister dst, Address src);
1112   void comisd(XMMRegister dst, XMMRegister src);
1113 
1114   // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1115   void comiss(XMMRegister dst, Address src);
1116   void comiss(XMMRegister dst, XMMRegister src);
1117 
1118   // Identify processor type and features
1119   void cpuid();
1120 
1121   // CRC32C
1122   void crc32(Register crc, Register v, int8_t sizeInBytes);
1123   void crc32(Register crc, Address adr, int8_t sizeInBytes);
1124 
1125   // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
1126   void cvtsd2ss(XMMRegister dst, XMMRegister src);
1127   void cvtsd2ss(XMMRegister dst, Address src);
1128 
1129   // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
1130   void cvtsi2sdl(XMMRegister dst, Register src);
1131   void cvtsi2sdl(XMMRegister dst, Address src);
1132   void cvtsi2sdq(XMMRegister dst, Register src);
1133   void cvtsi2sdq(XMMRegister dst, Address src);
1134 
1135   // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
1136   void cvtsi2ssl(XMMRegister dst, Register src);
1137   void cvtsi2ssl(XMMRegister dst, Address src);
1138   void cvtsi2ssq(XMMRegister dst, Register src);
1139   void cvtsi2ssq(XMMRegister dst, Address src);
1140 
1141   // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value
1142   void cvtdq2pd(XMMRegister dst, XMMRegister src);
1143   void vcvtdq2pd(XMMRegister dst, XMMRegister src, int vector_len);
1144 
1145   // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value
1146   void cvtdq2ps(XMMRegister dst, XMMRegister src);
1147   void vcvtdq2ps(XMMRegister dst, XMMRegister src, int vector_len);
1148 
1149   // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
1150   void cvtss2sd(XMMRegister dst, XMMRegister src);
1151   void cvtss2sd(XMMRegister dst, Address src);
1152 
1153   // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
1154   void cvtsd2siq(Register dst, XMMRegister src);
1155   void cvttsd2sil(Register dst, Address src);
1156   void cvttsd2sil(Register dst, XMMRegister src);
1157   void cvttsd2siq(Register dst, Address src);
1158   void cvttsd2siq(Register dst, XMMRegister src);
1159 
1160   // Convert with Truncation Scalar Single-Precision Floating-Point Value to Doubleword Integer
1161   void cvttss2sil(Register dst, XMMRegister src);
1162   void cvttss2siq(Register dst, XMMRegister src);
1163   void cvtss2sil(Register dst, XMMRegister src);
1164 
1165   // Convert vector double to int
1166   void cvttpd2dq(XMMRegister dst, XMMRegister src);
1167 
1168   // Convert vector float and double
1169   void vcvtps2pd(XMMRegister dst, XMMRegister src, int vector_len);
1170   void vcvtpd2ps(XMMRegister dst, XMMRegister src, int vector_len);
1171 
1172   // Convert vector float to int/long
1173   void vcvtps2dq(XMMRegister dst, XMMRegister src, int vector_len);
1174   void vcvttps2dq(XMMRegister dst, XMMRegister src, int vector_len);
1175   void evcvttps2qq(XMMRegister dst, XMMRegister src, int vector_len);
1176 
1177   // Convert vector long to vector FP
1178   void evcvtqq2ps(XMMRegister dst, XMMRegister src, int vector_len);
1179   void evcvtqq2pd(XMMRegister dst, XMMRegister src, int vector_len);
1180 
1181   // Convert vector double to long
1182   void evcvtpd2qq(XMMRegister dst, XMMRegister src, int vector_len);
1183   void evcvttpd2qq(XMMRegister dst, XMMRegister src, int vector_len);
1184 
1185   // Evex casts with truncation
1186   void evpmovwb(XMMRegister dst, XMMRegister src, int vector_len);
1187   void evpmovdw(XMMRegister dst, XMMRegister src, int vector_len);
1188   void evpmovdb(XMMRegister dst, XMMRegister src, int vector_len);
1189   void evpmovqd(XMMRegister dst, XMMRegister src, int vector_len);
1190   void evpmovqb(XMMRegister dst, XMMRegister src, int vector_len);
1191   void evpmovqw(XMMRegister dst, XMMRegister src, int vector_len);
1192 
1193   // Evex casts with signed saturation
1194   void evpmovsqd(XMMRegister dst, XMMRegister src, int vector_len);
1195 
1196   //Abs of packed Integer values
1197   void pabsb(XMMRegister dst, XMMRegister src);
1198   void pabsw(XMMRegister dst, XMMRegister src);
1199   void pabsd(XMMRegister dst, XMMRegister src);
1200   void vpabsb(XMMRegister dst, XMMRegister src, int vector_len);
1201   void vpabsw(XMMRegister dst, XMMRegister src, int vector_len);
1202   void vpabsd(XMMRegister dst, XMMRegister src, int vector_len);
1203   void evpabsq(XMMRegister dst, XMMRegister src, int vector_len);
1204 
1205   // Divide Scalar Double-Precision Floating-Point Values
1206   void divsd(XMMRegister dst, Address src);
1207   void divsd(XMMRegister dst, XMMRegister src);
1208 
1209   // Divide Scalar Single-Precision Floating-Point Values
1210   void divss(XMMRegister dst, Address src);
1211   void divss(XMMRegister dst, XMMRegister src);
1212 
1213 
1214 #ifndef _LP64
1215  private:
1216 
1217   void emit_farith(int b1, int b2, int i);
1218 
1219  public:
1220   void emms();
1221 
1222   void fabs();
1223 
1224   void fadd(int i);
1225 
1226   void fadd_d(Address src);
1227   void fadd_s(Address src);
1228 
1229   // "Alternate" versions of x87 instructions place result down in FPU
1230   // stack instead of on TOS
1231 
1232   void fadda(int i); // "alternate" fadd
1233   void faddp(int i = 1);
1234 
1235   void fchs();
1236 
1237   void fcom(int i);
1238 
1239   void fcomp(int i = 1);
1240   void fcomp_d(Address src);
1241   void fcomp_s(Address src);
1242 
1243   void fcompp();
1244 
1245   void fcos();
1246 
1247   void fdecstp();
1248 
1249   void fdiv(int i);
1250   void fdiv_d(Address src);
1251   void fdivr_s(Address src);
1252   void fdiva(int i);  // "alternate" fdiv
1253   void fdivp(int i = 1);
1254 
1255   void fdivr(int i);
1256   void fdivr_d(Address src);
1257   void fdiv_s(Address src);
1258 
1259   void fdivra(int i); // "alternate" reversed fdiv
1260 
1261   void fdivrp(int i = 1);
1262 
1263   void ffree(int i = 0);
1264 
1265   void fild_d(Address adr);
1266   void fild_s(Address adr);
1267 
1268   void fincstp();
1269 
1270   void finit();
1271 
1272   void fist_s (Address adr);
1273   void fistp_d(Address adr);
1274   void fistp_s(Address adr);
1275 
1276   void fld1();
1277 
1278   void fld_d(Address adr);
1279   void fld_s(Address adr);
1280   void fld_s(int index);
1281 
1282   void fldcw(Address src);
1283 
1284   void fldenv(Address src);
1285 
1286   void fldlg2();
1287 
1288   void fldln2();
1289 
1290   void fldz();
1291 
1292   void flog();
1293   void flog10();
1294 
1295   void fmul(int i);
1296 
1297   void fmul_d(Address src);
1298   void fmul_s(Address src);
1299 
1300   void fmula(int i);  // "alternate" fmul
1301 
1302   void fmulp(int i = 1);
1303 
1304   void fnsave(Address dst);
1305 
1306   void fnstcw(Address src);
1307 
1308   void fnstsw_ax();
1309 
1310   void fprem();
1311   void fprem1();
1312 
1313   void frstor(Address src);
1314 
1315   void fsin();
1316 
1317   void fsqrt();
1318 
1319   void fst_d(Address adr);
1320   void fst_s(Address adr);
1321 
1322   void fstp_d(Address adr);
1323   void fstp_d(int index);
1324   void fstp_s(Address adr);
1325 
1326   void fsub(int i);
1327   void fsub_d(Address src);
1328   void fsub_s(Address src);
1329 
1330   void fsuba(int i);  // "alternate" fsub
1331 
1332   void fsubp(int i = 1);
1333 
1334   void fsubr(int i);
1335   void fsubr_d(Address src);
1336   void fsubr_s(Address src);
1337 
1338   void fsubra(int i); // "alternate" reversed fsub
1339 
1340   void fsubrp(int i = 1);
1341 
1342   void ftan();
1343 
1344   void ftst();
1345 
1346   void fucomi(int i = 1);
1347   void fucomip(int i = 1);
1348 
1349   void fwait();
1350 
1351   void fxch(int i = 1);
1352 
1353   void fyl2x();
1354   void frndint();
1355   void f2xm1();
1356   void fldl2e();
1357 #endif // !_LP64
1358 
1359   // operands that only take the original 32bit registers
1360   void emit_operand32(Register reg, Address adr);
1361 
1362   void fld_x(Address adr);  // extended-precision (80-bit) format
1363   void fstp_x(Address adr); // extended-precision (80-bit) format
1364   void fxrstor(Address src);
1365   void xrstor(Address src);
1366 
1367   void fxsave(Address dst);
1368   void xsave(Address dst);
1369 
1370   void hlt();
1371 
1372   void idivl(Register src);
1373   void divl(Register src); // Unsigned division
1374 
1375 #ifdef _LP64
1376   void idivq(Register src);
1377   void divq(Register src); // Unsigned division
1378 #endif
1379 
1380   void imull(Register src);
1381   void imull(Register dst, Register src);
1382   void imull(Register dst, Register src, int value);
1383   void imull(Register dst, Address src, int value);
1384   void imull(Register dst, Address src);
1385 
1386 #ifdef _LP64
1387   void imulq(Register dst, Register src);
1388   void imulq(Register dst, Register src, int value);
1389   void imulq(Register dst, Address src, int value);
1390   void imulq(Register dst, Address src);
1391   void imulq(Register dst);
1392 #endif
1393 
1394   // jcc is the generic conditional branch generator to run-
1395   // time routines, jcc is used for branches to labels. jcc
1396   // takes a branch opcode (cc) and a label (L) and generates
1397   // either a backward branch or a forward branch and links it
1398   // to the label fixup chain. Usage:
1399   //
1400   // Label L;      // unbound label
1401   // jcc(cc, L);   // forward branch to unbound label
1402   // bind(L);      // bind label to the current pc
1403   // jcc(cc, L);   // backward branch to bound label
1404   // bind(L);      // illegal: a label may be bound only once
1405   //
1406   // Note: The same Label can be used for forward and backward branches
1407   // but it may be bound only once.
1408 
1409   void jcc(Condition cc, Label& L, bool maybe_short = true);
1410 
1411   // Conditional jump to a 8-bit offset to L.
1412   // WARNING: be very careful using this for forward jumps.  If the label is
1413   // not bound within an 8-bit offset of this instruction, a run-time error
1414   // will occur.
1415 
1416   // Use macro to record file and line number.
1417   #define jccb(cc, L) jccb_0(cc, L, __FILE__, __LINE__)
1418 
1419   void jccb_0(Condition cc, Label& L, const char* file, int line);
1420 
1421   void jmp(Address entry);    // pc <- entry
1422 
1423   // Label operations & relative jumps (PPUM Appendix D)
1424   void jmp(Label& L, bool maybe_short = true);   // unconditional jump to L
1425 
1426   void jmp(Register entry); // pc <- entry
1427 
1428   // Unconditional 8-bit offset jump to L.
1429   // WARNING: be very careful using this for forward jumps.  If the label is
1430   // not bound within an 8-bit offset of this instruction, a run-time error
1431   // will occur.
1432 
1433   // Use macro to record file and line number.
1434   #define jmpb(L) jmpb_0(L, __FILE__, __LINE__)
1435 
1436   void jmpb_0(Label& L, const char* file, int line);
1437 
1438   void ldmxcsr( Address src );
1439 
1440   void leal(Register dst, Address src);
1441 
1442   void leaq(Register dst, Address src);
1443 
1444   void lfence();
1445 
1446   void lock();
1447   void size_prefix();
1448 
1449   void lzcntl(Register dst, Register src);
1450   void lzcntl(Register dst, Address src);
1451 
1452 #ifdef _LP64
1453   void lzcntq(Register dst, Register src);
1454   void lzcntq(Register dst, Address src);
1455 #endif
1456 
1457   enum Membar_mask_bits {
1458     StoreStore = 1 << 3,
1459     LoadStore  = 1 << 2,
1460     StoreLoad  = 1 << 1,
1461     LoadLoad   = 1 << 0
1462   };
1463 
1464   // Serializes memory and blows flags
1465   void membar(Membar_mask_bits order_constraint);
1466 
1467   void mfence();
1468   void sfence();
1469 
1470   // Moves
1471 
1472   void mov64(Register dst, int64_t imm64);
1473   void mov64(Register dst, int64_t imm64, relocInfo::relocType rtype, int format);
1474 
1475   void movb(Address dst, Register src);
1476   void movb(Address dst, int imm8);
1477   void movb(Register dst, Address src);
1478 
1479   void movddup(XMMRegister dst, XMMRegister src);
1480   void vmovddup(XMMRegister dst, Address src, int vector_len);
1481 
1482   void kandbl(KRegister dst, KRegister src1, KRegister src2);
1483   void kandwl(KRegister dst, KRegister src1, KRegister src2);
1484   void kanddl(KRegister dst, KRegister src1, KRegister src2);
1485   void kandql(KRegister dst, KRegister src1, KRegister src2);
1486 
1487   void korbl(KRegister dst, KRegister src1, KRegister src2);
1488   void korwl(KRegister dst, KRegister src1, KRegister src2);
1489   void kordl(KRegister dst, KRegister src1, KRegister src2);
1490   void korql(KRegister dst, KRegister src1, KRegister src2);
1491 
1492   void kxorbl(KRegister dst, KRegister src1, KRegister src2);
1493   void kxorwl(KRegister dst, KRegister src1, KRegister src2);
1494   void kxordl(KRegister dst, KRegister src1, KRegister src2);
1495   void kxorql(KRegister dst, KRegister src1, KRegister src2);
1496   void kmovbl(KRegister dst, Register src);
1497   void kmovbl(Register dst, KRegister src);
1498   void kmovbl(KRegister dst, KRegister src);
1499   void kmovwl(KRegister dst, Register src);
1500   void kmovwl(KRegister dst, Address src);
1501   void kmovwl(Register dst, KRegister src);
1502   void kmovwl(Address dst, KRegister src);
1503   void kmovwl(KRegister dst, KRegister src);
1504   void kmovdl(KRegister dst, Register src);
1505   void kmovdl(Register dst, KRegister src);
1506   void kmovql(KRegister dst, KRegister src);
1507   void kmovql(Address dst, KRegister src);
1508   void kmovql(KRegister dst, Address src);
1509   void kmovql(KRegister dst, Register src);
1510   void kmovql(Register dst, KRegister src);
1511 
1512   void knotbl(KRegister dst, KRegister src);
1513   void knotwl(KRegister dst, KRegister src);
1514   void knotdl(KRegister dst, KRegister src);
1515   void knotql(KRegister dst, KRegister src);
1516 
1517   void kortestbl(KRegister dst, KRegister src);
1518   void kortestwl(KRegister dst, KRegister src);
1519   void kortestdl(KRegister dst, KRegister src);
1520   void kortestql(KRegister dst, KRegister src);
1521 
1522   void kxnorbl(KRegister dst, KRegister src1, KRegister src2);
1523   void kshiftlbl(KRegister dst, KRegister src, int imm8);
1524   void kshiftlql(KRegister dst, KRegister src, int imm8);
1525   void kshiftrbl(KRegister dst, KRegister src, int imm8);
1526   void kshiftrwl(KRegister dst, KRegister src, int imm8);
1527   void kshiftrdl(KRegister dst, KRegister src, int imm8);
1528   void kshiftrql(KRegister dst, KRegister src, int imm8);
1529   void ktestq(KRegister src1, KRegister src2);
1530   void ktestd(KRegister src1, KRegister src2);
1531   void kunpckdql(KRegister dst, KRegister src1, KRegister src2);
1532 
1533 
1534   void ktestql(KRegister dst, KRegister src);
1535   void ktestdl(KRegister dst, KRegister src);
1536   void ktestwl(KRegister dst, KRegister src);
1537   void ktestbl(KRegister dst, KRegister src);
1538 
1539   void movdl(XMMRegister dst, Register src);
1540   void movdl(Register dst, XMMRegister src);
1541   void movdl(XMMRegister dst, Address src);
1542   void movdl(Address dst, XMMRegister src);
1543 
1544   // Move Double Quadword
1545   void movdq(XMMRegister dst, Register src);
1546   void movdq(Register dst, XMMRegister src);
1547 
1548   // Move Aligned Double Quadword
1549   void movdqa(XMMRegister dst, XMMRegister src);
1550   void movdqa(XMMRegister dst, Address src);
1551 
1552   // Move Unaligned Double Quadword
1553   void movdqu(Address     dst, XMMRegister src);
1554   void movdqu(XMMRegister dst, Address src);
1555   void movdqu(XMMRegister dst, XMMRegister src);
1556 
1557   // Move Unaligned 256bit Vector
1558   void vmovdqu(Address dst, XMMRegister src);
1559   void vmovdqu(XMMRegister dst, Address src);
1560   void vmovdqu(XMMRegister dst, XMMRegister src);
1561 
1562    // Move Unaligned 512bit Vector
1563   void evmovdqub(XMMRegister dst, XMMRegister src, int vector_len);
1564   void evmovdqub(XMMRegister dst, Address src, int vector_len);
1565   void evmovdqub(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1566   void evmovdqub(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
1567   void evmovdqub(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1568 
1569   void evmovdquw(XMMRegister dst, Address src, int vector_len);
1570   void evmovdquw(Address dst, XMMRegister src, int vector_len);
1571   void evmovdquw(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1572   void evmovdquw(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
1573   void evmovdquw(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1574 
1575   void evmovdqul(XMMRegister dst, XMMRegister src, int vector_len);
1576   void evmovdqul(XMMRegister dst, Address src, int vector_len);
1577   void evmovdqul(Address dst, XMMRegister src, int vector_len);
1578 
1579   void evmovdqul(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1580   void evmovdqul(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
1581   void evmovdqul(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1582 
1583   void evmovdquq(Address dst, XMMRegister src, int vector_len);
1584   void evmovdquq(XMMRegister dst, Address src, int vector_len);
1585   void evmovdquq(XMMRegister dst, XMMRegister src, int vector_len);
1586 
1587   void evmovdquq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1588   void evmovdquq(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
1589   void evmovdquq(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1590 
1591   // Move lower 64bit to high 64bit in 128bit register
1592   void movlhps(XMMRegister dst, XMMRegister src);
1593 
1594   void movl(Register dst, int32_t imm32);
1595   void movl(Address dst, int32_t imm32);
1596   void movl(Register dst, Register src);
1597   void movl(Register dst, Address src);
1598   void movl(Address dst, Register src);
1599 
1600   // These dummies prevent using movl from converting a zero (like NULL) into Register
1601   // by giving the compiler two choices it can't resolve
1602 
1603   void movl(Address  dst, void* junk);
1604   void movl(Register dst, void* junk);
1605 
1606 #ifdef _LP64
1607   void movq(Register dst, Register src);
1608   void movq(Register dst, Address src);
1609   void movq(Address  dst, Register src);
1610   void movq(Address  dst, int32_t imm32);
1611   void movq(Register  dst, int32_t imm32);
1612 
1613   // These dummies prevent using movq from converting a zero (like NULL) into Register
1614   // by giving the compiler two choices it can't resolve
1615 
1616   void movq(Address  dst, void* dummy);
1617   void movq(Register dst, void* dummy);
1618 #endif
1619 
1620   // Move Quadword
1621   void movq(Address     dst, XMMRegister src);
1622   void movq(XMMRegister dst, Address src);
1623   void movq(XMMRegister dst, XMMRegister src);
1624   void movq(Register dst, XMMRegister src);
1625   void movq(XMMRegister dst, Register src);
1626 
1627   void movsbl(Register dst, Address src);
1628   void movsbl(Register dst, Register src);
1629 
1630 #ifdef _LP64
1631   void movsbq(Register dst, Address src);
1632   void movsbq(Register dst, Register src);
1633 
1634   // Move signed 32bit immediate to 64bit extending sign
1635   void movslq(Address  dst, int32_t imm64);
1636   void movslq(Register dst, int32_t imm64);
1637 
1638   void movslq(Register dst, Address src);
1639   void movslq(Register dst, Register src);
1640   void movslq(Register dst, void* src); // Dummy declaration to cause NULL to be ambiguous
1641 #endif
1642 
1643   void movswl(Register dst, Address src);
1644   void movswl(Register dst, Register src);
1645 
1646 #ifdef _LP64
1647   void movswq(Register dst, Address src);
1648   void movswq(Register dst, Register src);
1649 #endif
1650 
1651   void movw(Address dst, int imm16);
1652   void movw(Register dst, Address src);
1653   void movw(Address dst, Register src);
1654 
1655   void movzbl(Register dst, Address src);
1656   void movzbl(Register dst, Register src);
1657 
1658 #ifdef _LP64
1659   void movzbq(Register dst, Address src);
1660   void movzbq(Register dst, Register src);
1661 #endif
1662 
1663   void movzwl(Register dst, Address src);
1664   void movzwl(Register dst, Register src);
1665 
1666 #ifdef _LP64
1667   void movzwq(Register dst, Address src);
1668   void movzwq(Register dst, Register src);
1669 #endif
1670 
1671   // Unsigned multiply with RAX destination register
1672   void mull(Address src);
1673   void mull(Register src);
1674 
1675 #ifdef _LP64
1676   void mulq(Address src);
1677   void mulq(Register src);
1678   void mulxq(Register dst1, Register dst2, Register src);
1679 #endif
1680 
1681   // Multiply Scalar Double-Precision Floating-Point Values
1682   void mulsd(XMMRegister dst, Address src);
1683   void mulsd(XMMRegister dst, XMMRegister src);
1684 
1685   // Multiply Scalar Single-Precision Floating-Point Values
1686   void mulss(XMMRegister dst, Address src);
1687   void mulss(XMMRegister dst, XMMRegister src);
1688 
1689   void negl(Register dst);
1690   void negl(Address dst);
1691 
1692 #ifdef _LP64
1693   void negq(Register dst);
1694   void negq(Address dst);
1695 #endif
1696 
1697   void nop(int i = 1);
1698 
1699   void notl(Register dst);
1700 
1701 #ifdef _LP64
1702   void notq(Register dst);
1703 
1704   void btsq(Address dst, int imm8);
1705   void btrq(Address dst, int imm8);
1706 #endif
1707 
1708   void orw(Register dst, Register src);
1709 
1710   void orl(Address dst, int32_t imm32);
1711   void orl(Register dst, int32_t imm32);
1712   void orl(Register dst, Address src);
1713   void orl(Register dst, Register src);
1714   void orl(Address dst, Register src);
1715 
1716   void orb(Address dst, int imm8);
1717   void orb(Address dst, Register src);
1718 
1719   void orq(Address dst, int32_t imm32);
1720   void orq(Address dst, Register src);
1721   void orq(Register dst, int32_t imm32);
1722   void orq(Register dst, Address src);
1723   void orq(Register dst, Register src);
1724 
1725   // Pack with signed saturation
1726   void packsswb(XMMRegister dst, XMMRegister src);
1727   void vpacksswb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1728   void packssdw(XMMRegister dst, XMMRegister src);
1729   void vpackssdw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1730 
1731   // Pack with unsigned saturation
1732   void packuswb(XMMRegister dst, XMMRegister src);
1733   void packuswb(XMMRegister dst, Address src);
1734   void packusdw(XMMRegister dst, XMMRegister src);
1735   void vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1736   void vpackusdw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1737 
1738   // Permutations
1739   void vpermq(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1740   void vpermq(XMMRegister dst, XMMRegister src, int imm8);
1741   void vpermq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1742   void vpermb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1743   void vpermb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1744   void vpermw(XMMRegister dst,  XMMRegister nds, XMMRegister src, int vector_len);
1745   void vpermd(XMMRegister dst,  XMMRegister nds, Address src, int vector_len);
1746   void vpermd(XMMRegister dst,  XMMRegister nds, XMMRegister src, int vector_len);
1747   void vperm2i128(XMMRegister dst,  XMMRegister nds, XMMRegister src, int imm8);
1748   void vperm2f128(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8);
1749   void vpermilps(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1750   void vpermilpd(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1751   void vpermpd(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1752   void evpermi2q(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1753   void evpermt2b(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1754   void evpmultishiftqb(XMMRegister dst, XMMRegister ctl, XMMRegister src, int vector_len);
1755 
1756   void pause();
1757 
1758   // Undefined Instruction
1759   void ud2();
1760 
1761   // SSE4.2 string instructions
1762   void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
1763   void pcmpestri(XMMRegister xmm1, Address src, int imm8);
1764 
1765   void pcmpeqb(XMMRegister dst, XMMRegister src);
1766   void vpcmpCCbwd(XMMRegister dst, XMMRegister nds, XMMRegister src, int cond_encoding, int vector_len);
1767 
1768   void vpcmpeqb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1769   void evpcmpeqb(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1770   void evpcmpeqb(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1771   void evpcmpeqb(KRegister kdst, KRegister mask, XMMRegister nds, Address src, int vector_len);
1772 
1773   void vpcmpgtb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1774   void evpcmpgtb(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1775   void evpcmpgtb(KRegister kdst, KRegister mask, XMMRegister nds, Address src, int vector_len);
1776 
1777   void evpcmpuw(KRegister kdst, XMMRegister nds, XMMRegister src, ComparisonPredicate vcc, int vector_len);
1778   void evpcmpuw(KRegister kdst, XMMRegister nds, Address src, ComparisonPredicate vcc, int vector_len);
1779 
1780   void pcmpeqw(XMMRegister dst, XMMRegister src);
1781   void vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1782   void evpcmpeqw(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1783   void evpcmpeqw(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1784 
1785   void vpcmpgtw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1786 
1787   void pcmpeqd(XMMRegister dst, XMMRegister src);
1788   void vpcmpeqd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1789   void evpcmpeqd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src, int vector_len);
1790   void evpcmpeqd(KRegister kdst, KRegister mask, XMMRegister nds, Address src, int vector_len);
1791 
1792   void pcmpeqq(XMMRegister dst, XMMRegister src);
1793   void evpcmpeqq(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src, int vector_len);
1794   void vpcmpCCq(XMMRegister dst, XMMRegister nds, XMMRegister src, int cond_encoding, int vector_len);
1795   void vpcmpeqq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1796   void evpcmpeqq(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1797   void evpcmpeqq(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1798 
1799   void pcmpgtq(XMMRegister dst, XMMRegister src);
1800   void vpcmpgtq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1801 
1802   void pmovmskb(Register dst, XMMRegister src);
1803   void vpmovmskb(Register dst, XMMRegister src, int vec_enc);
1804   void vmovmskps(Register dst, XMMRegister src, int vec_enc);
1805   void vmovmskpd(Register dst, XMMRegister src, int vec_enc);
1806   void vpmaskmovd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1807   void vpmaskmovq(XMMRegister dst, XMMRegister mask, Address src, int vector_len);
1808 
1809 
1810   void vmaskmovps(XMMRegister dst, Address src, XMMRegister mask, int vector_len);
1811   void vmaskmovpd(XMMRegister dst, Address src, XMMRegister mask, int vector_len);
1812   void vmaskmovps(Address dst, XMMRegister src, XMMRegister mask, int vector_len);
1813   void vmaskmovpd(Address dst, XMMRegister src, XMMRegister mask, int vector_len);
1814 
1815   // SSE 4.1 extract
1816   void pextrd(Register dst, XMMRegister src, int imm8);
1817   void pextrq(Register dst, XMMRegister src, int imm8);
1818   void pextrd(Address dst, XMMRegister src, int imm8);
1819   void pextrq(Address dst, XMMRegister src, int imm8);
1820   void pextrb(Register dst, XMMRegister src, int imm8);
1821   void pextrb(Address dst, XMMRegister src, int imm8);
1822   // SSE 2 extract
1823   void pextrw(Register dst, XMMRegister src, int imm8);
1824   void pextrw(Address dst, XMMRegister src, int imm8);
1825 
1826   // SSE 4.1 insert
1827   void pinsrd(XMMRegister dst, Register src, int imm8);
1828   void pinsrq(XMMRegister dst, Register src, int imm8);
1829   void pinsrb(XMMRegister dst, Register src, int imm8);
1830   void pinsrd(XMMRegister dst, Address src, int imm8);
1831   void pinsrq(XMMRegister dst, Address src, int imm8);
1832   void pinsrb(XMMRegister dst, Address src, int imm8);
1833   void insertps(XMMRegister dst, XMMRegister src, int imm8);
1834   // SSE 2 insert
1835   void pinsrw(XMMRegister dst, Register src, int imm8);
1836   void pinsrw(XMMRegister dst, Address src, int imm8);
1837 
1838   // AVX insert
1839   void vpinsrd(XMMRegister dst, XMMRegister nds, Register src, int imm8);
1840   void vpinsrb(XMMRegister dst, XMMRegister nds, Register src, int imm8);
1841   void vpinsrq(XMMRegister dst, XMMRegister nds, Register src, int imm8);
1842   void vpinsrw(XMMRegister dst, XMMRegister nds, Register src, int imm8);
1843   void vinsertps(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8);
1844 
1845   // Zero extend moves
1846   void pmovzxbw(XMMRegister dst, XMMRegister src);
1847   void pmovzxbw(XMMRegister dst, Address src);
1848   void pmovzxbd(XMMRegister dst, XMMRegister src);
1849   void vpmovzxbw(XMMRegister dst, Address src, int vector_len);
1850   void vpmovzxbw(XMMRegister dst, XMMRegister src, int vector_len);
1851   void vpmovzxbd(XMMRegister dst, XMMRegister src, int vector_len);
1852   void vpmovzxbq(XMMRegister dst, XMMRegister src, int vector_len);
1853   void vpmovzxwd(XMMRegister dst, XMMRegister src, int vector_len);
1854   void vpmovzxwq(XMMRegister dst, XMMRegister src, int vector_len);
1855   void pmovzxdq(XMMRegister dst, XMMRegister src);
1856   void vpmovzxdq(XMMRegister dst, XMMRegister src, int vector_len);
1857   void evpmovzxbw(XMMRegister dst, KRegister mask, Address src, int vector_len);
1858 
1859   // Sign extend moves
1860   void pmovsxbd(XMMRegister dst, XMMRegister src);
1861   void pmovsxbq(XMMRegister dst, XMMRegister src);
1862   void pmovsxbw(XMMRegister dst, XMMRegister src);
1863   void pmovsxwd(XMMRegister dst, XMMRegister src);
1864   void vpmovsxbd(XMMRegister dst, XMMRegister src, int vector_len);
1865   void vpmovsxbq(XMMRegister dst, XMMRegister src, int vector_len);
1866   void vpmovsxbw(XMMRegister dst, XMMRegister src, int vector_len);
1867   void vpmovsxwd(XMMRegister dst, XMMRegister src, int vector_len);
1868   void vpmovsxwq(XMMRegister dst, XMMRegister src, int vector_len);
1869   void vpmovsxdq(XMMRegister dst, XMMRegister src, int vector_len);
1870 
1871   void evpmovwb(Address dst, XMMRegister src, int vector_len);
1872   void evpmovwb(Address dst, KRegister mask, XMMRegister src, int vector_len);
1873   void evpmovdb(Address dst, XMMRegister src, int vector_len);
1874 
1875   // Multiply add
1876   void pmaddwd(XMMRegister dst, XMMRegister src);
1877   void vpmaddwd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1878   void vpmaddubsw(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
1879 
1880   // Multiply add accumulate
1881   void evpdpwssd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1882 
1883 #ifndef _LP64 // no 32bit push/pop on amd64
1884   void popl(Address dst);
1885 #endif
1886 
1887 #ifdef _LP64
1888   void popq(Address dst);
1889   void popq(Register dst);
1890 #endif
1891 
1892   void popcntl(Register dst, Address src);
1893   void popcntl(Register dst, Register src);
1894 
1895   void evpopcntb(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1896   void evpopcntw(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1897   void evpopcntd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1898   void evpopcntq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
1899 
1900 #ifdef _LP64
1901   void popcntq(Register dst, Address src);
1902   void popcntq(Register dst, Register src);
1903 #endif
1904 
1905   // Prefetches (SSE, SSE2, 3DNOW only)
1906 
1907   void prefetchnta(Address src);
1908   void prefetchr(Address src);
1909   void prefetcht0(Address src);
1910   void prefetcht1(Address src);
1911   void prefetcht2(Address src);
1912   void prefetchw(Address src);
1913 
1914   // Shuffle Bytes
1915   void pshufb(XMMRegister dst, XMMRegister src);
1916   void pshufb(XMMRegister dst, Address src);
1917   void vpshufb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1918 
1919   // Shuffle Packed Doublewords
1920   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1921   void pshufd(XMMRegister dst, Address src,     int mode);
1922   void vpshufd(XMMRegister dst, XMMRegister src, int mode, int vector_len);
1923 
1924   // Shuffle Packed High/Low Words
1925   void pshufhw(XMMRegister dst, XMMRegister src, int mode);
1926   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1927   void pshuflw(XMMRegister dst, Address src,     int mode);
1928 
1929   //shuffle floats and doubles
1930   void pshufps(XMMRegister, XMMRegister, int);
1931   void pshufpd(XMMRegister, XMMRegister, int);
1932   void vpshufps(XMMRegister, XMMRegister, XMMRegister, int, int);
1933   void vpshufpd(XMMRegister, XMMRegister, XMMRegister, int, int);
1934 
1935   // Shuffle packed values at 128 bit granularity
1936   void evshufi64x2(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8, int vector_len);
1937 
1938   // Shift Right by bytes Logical DoubleQuadword Immediate
1939   void psrldq(XMMRegister dst, int shift);
1940   // Shift Left by bytes Logical DoubleQuadword Immediate
1941   void pslldq(XMMRegister dst, int shift);
1942 
1943   // Logical Compare 128bit
1944   void ptest(XMMRegister dst, XMMRegister src);
1945   void ptest(XMMRegister dst, Address src);
1946   // Logical Compare 256bit
1947   void vptest(XMMRegister dst, XMMRegister src);
1948   void vptest(XMMRegister dst, Address src);
1949 
1950   void evptestmb(KRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1951 
1952   // Vector compare
1953   void vptest(XMMRegister dst, XMMRegister src, int vector_len);
1954 
1955   // Interleave Low Bytes
1956   void punpcklbw(XMMRegister dst, XMMRegister src);
1957   void punpcklbw(XMMRegister dst, Address src);
1958 
1959   // Interleave Low Doublewords
1960   void punpckldq(XMMRegister dst, XMMRegister src);
1961   void punpckldq(XMMRegister dst, Address src);
1962   void vpunpckldq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1963 
1964   // Interleave High Word
1965   void vpunpckhwd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1966 
1967   // Interleave Low Word
1968   void vpunpcklwd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1969 
1970   // Interleave High Doublewords
1971   void vpunpckhdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1972 
1973   // Interleave Low Quadwords
1974   void punpcklqdq(XMMRegister dst, XMMRegister src);
1975 
1976   // Vector sum of absolute difference.
1977   void vpsadbw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1978 
1979 #ifndef _LP64 // no 32bit push/pop on amd64
1980   void pushl(Address src);
1981 #endif
1982 
1983   void pushq(Address src);
1984 
1985   void rcll(Register dst, int imm8);
1986 
1987   void rclq(Register dst, int imm8);
1988 
1989   void rcrq(Register dst, int imm8);
1990 
1991   void rcpps(XMMRegister dst, XMMRegister src);
1992 
1993   void rcpss(XMMRegister dst, XMMRegister src);
1994 
1995   void rdtsc();
1996   void rdtscp();
1997 
1998   void ret(int imm16);
1999 
2000   void roll(Register dst);
2001 
2002   void roll(Register dst, int imm8);
2003 
2004   void rorl(Register dst);
2005 
2006   void rorl(Register dst, int imm8);
2007 
2008 #ifdef _LP64
2009   void rolq(Register dst);
2010   void rolq(Register dst, int imm8);
2011   void rorq(Register dst);
2012   void rorq(Register dst, int imm8);
2013   void rorxl(Register dst, Register src, int imm8);
2014   void rorxl(Register dst, Address src, int imm8);
2015   void rorxq(Register dst, Register src, int imm8);
2016   void rorxq(Register dst, Address src, int imm8);
2017 #endif
2018 
2019   void sahf();
2020 
2021   void sall(Register dst, int imm8);
2022   void sall(Register dst);
2023   void sall(Address dst, int imm8);
2024   void sall(Address dst);
2025 
2026   void sarl(Address dst, int imm8);
2027   void sarl(Address dst);
2028   void sarl(Register dst, int imm8);
2029   void sarl(Register dst);
2030 
2031 #ifdef _LP64
2032   void salq(Register dst, int imm8);
2033   void salq(Register dst);
2034   void salq(Address dst, int imm8);
2035   void salq(Address dst);
2036 
2037   void sarq(Address dst, int imm8);
2038   void sarq(Address dst);
2039   void sarq(Register dst, int imm8);
2040   void sarq(Register dst);
2041 #endif
2042 
2043   void sbbl(Address dst, int32_t imm32);
2044   void sbbl(Register dst, int32_t imm32);
2045   void sbbl(Register dst, Address src);
2046   void sbbl(Register dst, Register src);
2047 
2048   void sbbq(Address dst, int32_t imm32);
2049   void sbbq(Register dst, int32_t imm32);
2050   void sbbq(Register dst, Address src);
2051   void sbbq(Register dst, Register src);
2052 
2053   void setb(Condition cc, Register dst);
2054 
2055   void sete(Register dst);
2056   void setl(Register dst);
2057   void setne(Register dst);
2058 
2059   void palignr(XMMRegister dst, XMMRegister src, int imm8);
2060   void vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, int imm8, int vector_len);
2061   void evalignq(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2062 
2063   void pblendw(XMMRegister dst, XMMRegister src, int imm8);
2064   void vblendps(XMMRegister dst, XMMRegister src1, XMMRegister src2, int imm8, int vector_len);
2065 
2066   void sha1rnds4(XMMRegister dst, XMMRegister src, int imm8);
2067   void sha1nexte(XMMRegister dst, XMMRegister src);
2068   void sha1msg1(XMMRegister dst, XMMRegister src);
2069   void sha1msg2(XMMRegister dst, XMMRegister src);
2070   // xmm0 is implicit additional source to the following instruction.
2071   void sha256rnds2(XMMRegister dst, XMMRegister src);
2072   void sha256msg1(XMMRegister dst, XMMRegister src);
2073   void sha256msg2(XMMRegister dst, XMMRegister src);
2074 
2075   void shldl(Register dst, Register src);
2076   void shldl(Register dst, Register src, int8_t imm8);
2077   void shrdl(Register dst, Register src);
2078   void shrdl(Register dst, Register src, int8_t imm8);
2079 
2080   void shll(Register dst, int imm8);
2081   void shll(Register dst);
2082 
2083   void shlq(Register dst, int imm8);
2084   void shlq(Register dst);
2085 
2086   void shrl(Register dst, int imm8);
2087   void shrl(Register dst);
2088   void shrl(Address dst);
2089   void shrl(Address dst, int imm8);
2090 
2091   void shrq(Register dst, int imm8);
2092   void shrq(Register dst);
2093   void shrq(Address dst);
2094   void shrq(Address dst, int imm8);
2095 
2096   void smovl(); // QQQ generic?
2097 
2098   // Compute Square Root of Scalar Double-Precision Floating-Point Value
2099   void sqrtsd(XMMRegister dst, Address src);
2100   void sqrtsd(XMMRegister dst, XMMRegister src);
2101 
2102   void roundsd(XMMRegister dst, Address src, int32_t rmode);
2103   void roundsd(XMMRegister dst, XMMRegister src, int32_t rmode);
2104 
2105   // Compute Square Root of Scalar Single-Precision Floating-Point Value
2106   void sqrtss(XMMRegister dst, Address src);
2107   void sqrtss(XMMRegister dst, XMMRegister src);
2108 
2109   void std();
2110 
2111   void stmxcsr( Address dst );
2112 
2113   void subl(Address dst, int32_t imm32);
2114   void subl(Address dst, Register src);
2115   void subl(Register dst, int32_t imm32);
2116   void subl(Register dst, Address src);
2117   void subl(Register dst, Register src);
2118 
2119   void subq(Address dst, int32_t imm32);
2120   void subq(Address dst, Register src);
2121   void subq(Register dst, int32_t imm32);
2122   void subq(Register dst, Address src);
2123   void subq(Register dst, Register src);
2124 
2125   // Force generation of a 4 byte immediate value even if it fits into 8bit
2126   void subl_imm32(Register dst, int32_t imm32);
2127   void subq_imm32(Register dst, int32_t imm32);
2128 
2129   // Subtract Scalar Double-Precision Floating-Point Values
2130   void subsd(XMMRegister dst, Address src);
2131   void subsd(XMMRegister dst, XMMRegister src);
2132 
2133   // Subtract Scalar Single-Precision Floating-Point Values
2134   void subss(XMMRegister dst, Address src);
2135   void subss(XMMRegister dst, XMMRegister src);
2136 
2137   void testb(Address dst, int imm8);
2138   void testb(Register dst, int imm8);
2139 
2140   void testl(Address dst, int32_t imm32);
2141   void testl(Register dst, int32_t imm32);
2142   void testl(Register dst, Register src);
2143   void testl(Register dst, Address src);
2144 
2145   void testq(Address dst, int32_t imm32);
2146   void testq(Register dst, int32_t imm32);
2147   void testq(Register dst, Register src);
2148   void testq(Register dst, Address src);
2149 
2150   // BMI - count trailing zeros
2151   void tzcntl(Register dst, Register src);
2152   void tzcntl(Register dst, Address src);
2153   void tzcntq(Register dst, Register src);
2154   void tzcntq(Register dst, Address src);
2155 
2156   // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
2157   void ucomisd(XMMRegister dst, Address src);
2158   void ucomisd(XMMRegister dst, XMMRegister src);
2159 
2160   // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
2161   void ucomiss(XMMRegister dst, Address src);
2162   void ucomiss(XMMRegister dst, XMMRegister src);
2163 
2164   void xabort(int8_t imm8);
2165 
2166   void xaddb(Address dst, Register src);
2167   void xaddw(Address dst, Register src);
2168   void xaddl(Address dst, Register src);
2169   void xaddq(Address dst, Register src);
2170 
2171   void xbegin(Label& abort, relocInfo::relocType rtype = relocInfo::none);
2172 
2173   void xchgb(Register reg, Address adr);
2174   void xchgw(Register reg, Address adr);
2175   void xchgl(Register reg, Address adr);
2176   void xchgl(Register dst, Register src);
2177 
2178   void xchgq(Register reg, Address adr);
2179   void xchgq(Register dst, Register src);
2180 
2181   void xend();
2182 
2183   // Get Value of Extended Control Register
2184   void xgetbv();
2185 
2186   void xorl(Register dst, int32_t imm32);
2187   void xorl(Address dst, int32_t imm32);
2188   void xorl(Register dst, Address src);
2189   void xorl(Register dst, Register src);
2190   void xorl(Address dst, Register src);
2191 
2192   void xorb(Address dst, Register src);
2193   void xorb(Register dst, Address src);
2194   void xorw(Register dst, Register src);
2195 
2196   void xorq(Register dst, Address src);
2197   void xorq(Address dst, int32_t imm32);
2198   void xorq(Register dst, Register src);
2199   void xorq(Register dst, int32_t imm32);
2200   void xorq(Address dst, Register src);
2201 
2202   void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0
2203 
2204   // AVX 3-operands scalar instructions (encoded with VEX prefix)
2205 
2206   void vaddsd(XMMRegister dst, XMMRegister nds, Address src);
2207   void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2208   void vaddss(XMMRegister dst, XMMRegister nds, Address src);
2209   void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2210   void vdivsd(XMMRegister dst, XMMRegister nds, Address src);
2211   void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2212   void vdivss(XMMRegister dst, XMMRegister nds, Address src);
2213   void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2214   void vfmadd231sd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2215   void vfmadd231ss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2216   void vmulsd(XMMRegister dst, XMMRegister nds, Address src);
2217   void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2218   void vmulss(XMMRegister dst, XMMRegister nds, Address src);
2219   void vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2220   void vsubsd(XMMRegister dst, XMMRegister nds, Address src);
2221   void vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2222   void vsubss(XMMRegister dst, XMMRegister nds, Address src);
2223   void vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2224 
2225   void vmaxss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2226   void vmaxsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2227   void vminss(XMMRegister dst, XMMRegister nds, XMMRegister src);
2228   void vminsd(XMMRegister dst, XMMRegister nds, XMMRegister src);
2229 
2230   void sarxl(Register dst, Register src1, Register src2);
2231   void sarxl(Register dst, Address src1, Register src2);
2232   void sarxq(Register dst, Register src1, Register src2);
2233   void sarxq(Register dst, Address src1, Register src2);
2234   void shlxl(Register dst, Register src1, Register src2);
2235   void shlxl(Register dst, Address src1, Register src2);
2236   void shlxq(Register dst, Register src1, Register src2);
2237   void shlxq(Register dst, Address src1, Register src2);
2238   void shrxl(Register dst, Register src1, Register src2);
2239   void shrxl(Register dst, Address src1, Register src2);
2240   void shrxq(Register dst, Register src1, Register src2);
2241   void shrxq(Register dst, Address src1, Register src2);
2242 
2243   void bzhiq(Register dst, Register src1, Register src2);
2244 
2245   void pextl(Register dst, Register src1, Register src2);
2246   void pdepl(Register dst, Register src1, Register src2);
2247   void pextq(Register dst, Register src1, Register src2);
2248   void pdepq(Register dst, Register src1, Register src2);
2249   void pextl(Register dst, Register src1, Address src2);
2250   void pdepl(Register dst, Register src1, Address src2);
2251   void pextq(Register dst, Register src1, Address src2);
2252   void pdepq(Register dst, Register src1, Address src2);
2253 
2254 
2255   //====================VECTOR ARITHMETIC=====================================
2256   // Add Packed Floating-Point Values
2257   void addpd(XMMRegister dst, XMMRegister src);
2258   void addpd(XMMRegister dst, Address src);
2259   void addps(XMMRegister dst, XMMRegister src);
2260   void vaddpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2261   void vaddps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2262   void vaddpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2263   void vaddps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2264 
2265   // Subtract Packed Floating-Point Values
2266   void subpd(XMMRegister dst, XMMRegister src);
2267   void subps(XMMRegister dst, XMMRegister src);
2268   void vsubpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2269   void vsubps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2270   void vsubpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2271   void vsubps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2272 
2273   // Multiply Packed Floating-Point Values
2274   void mulpd(XMMRegister dst, XMMRegister src);
2275   void mulpd(XMMRegister dst, Address src);
2276   void mulps(XMMRegister dst, XMMRegister src);
2277   void vmulpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2278   void vmulps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2279   void vmulpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2280   void vmulps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2281 
2282   void vfmadd231pd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2283   void vfmadd231ps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2284   void vfmadd231pd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2285   void vfmadd231ps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2286 
2287   // Divide Packed Floating-Point Values
2288   void divpd(XMMRegister dst, XMMRegister src);
2289   void divps(XMMRegister dst, XMMRegister src);
2290   void vdivpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2291   void vdivps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2292   void vdivpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2293   void vdivps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2294 
2295   // Sqrt Packed Floating-Point Values
2296   void vsqrtpd(XMMRegister dst, XMMRegister src, int vector_len);
2297   void vsqrtpd(XMMRegister dst, Address src, int vector_len);
2298   void vsqrtps(XMMRegister dst, XMMRegister src, int vector_len);
2299   void vsqrtps(XMMRegister dst, Address src, int vector_len);
2300 
2301   // Round Packed Double precision value.
2302   void vroundpd(XMMRegister dst, XMMRegister src, int32_t rmode, int vector_len);
2303   void vroundpd(XMMRegister dst, Address src, int32_t rmode, int vector_len);
2304   void vrndscalepd(XMMRegister dst,  XMMRegister src,  int32_t rmode, int vector_len);
2305   void vrndscalepd(XMMRegister dst, Address src, int32_t rmode, int vector_len);
2306 
2307   // Bitwise Logical AND of Packed Floating-Point Values
2308   void andpd(XMMRegister dst, XMMRegister src);
2309   void andps(XMMRegister dst, XMMRegister src);
2310   void vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2311   void vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2312   void vandpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2313   void vandps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2314 
2315   void unpckhpd(XMMRegister dst, XMMRegister src);
2316   void unpcklpd(XMMRegister dst, XMMRegister src);
2317 
2318   // Bitwise Logical XOR of Packed Floating-Point Values
2319   void xorpd(XMMRegister dst, XMMRegister src);
2320   void xorps(XMMRegister dst, XMMRegister src);
2321   void vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2322   void vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2323   void vxorpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2324   void vxorps(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2325 
2326   // Add horizontal packed integers
2327   void vphaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2328   void vphaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2329   void phaddw(XMMRegister dst, XMMRegister src);
2330   void phaddd(XMMRegister dst, XMMRegister src);
2331 
2332   // Add packed integers
2333   void paddb(XMMRegister dst, XMMRegister src);
2334   void paddw(XMMRegister dst, XMMRegister src);
2335   void paddd(XMMRegister dst, XMMRegister src);
2336   void paddd(XMMRegister dst, Address src);
2337   void paddq(XMMRegister dst, XMMRegister src);
2338   void vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2339   void vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2340   void vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2341   void vpaddq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2342   void vpaddb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2343   void vpaddw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2344   void vpaddd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2345   void vpaddq(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2346 
2347   // Leaf level assembler routines for masked operations.
2348   void evpaddb(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2349   void evpaddb(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2350   void evpaddw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2351   void evpaddw(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2352   void evpaddd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2353   void evpaddd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2354   void evpaddq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2355   void evpaddq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2356   void evaddps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2357   void evaddps(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2358   void evaddpd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2359   void evaddpd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2360   void evpsubb(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2361   void evpsubb(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2362   void evpsubw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2363   void evpsubw(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2364   void evpsubd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2365   void evpsubd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2366   void evpsubq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2367   void evpsubq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2368   void evsubps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2369   void evsubps(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2370   void evsubpd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2371   void evsubpd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2372   void evpmullw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2373   void evpmullw(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2374   void evpmulld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2375   void evpmulld(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2376   void evpmullq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2377   void evpmullq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2378   void evmulps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2379   void evmulps(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2380   void evmulpd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2381   void evmulpd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2382   void evdivps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2383   void evdivps(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2384   void evdivpd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2385   void evdivpd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2386   void evpabsb(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2387   void evpabsb(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
2388   void evpabsw(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2389   void evpabsw(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
2390   void evpabsd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2391   void evpabsd(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
2392   void evpabsq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2393   void evpabsq(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len);
2394   void evpfma213ps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2395   void evpfma213ps(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2396   void evpfma213pd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2397   void evpfma213pd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2398   void evpermb(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2399   void evpermb(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2400   void evpermw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2401   void evpermw(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2402   void evpermd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2403   void evpermd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2404   void evpermq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2405   void evpermq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2406   void evpsllw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2407   void evpslld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2408   void evpsllq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2409   void evpsrlw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2410   void evpsrld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2411   void evpsrlq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2412   void evpsraw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2413   void evpsrad(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2414   void evpsraq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2415   void evsqrtps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2416   void evsqrtps(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2417   void evsqrtpd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2418   void evsqrtpd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2419 
2420   void evpsllw(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2421   void evpslld(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2422   void evpsllq(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2423   void evpsrlw(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2424   void evpsrld(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2425   void evpsrlq(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2426   void evpsraw(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2427   void evpsrad(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2428   void evpsraq(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2429 
2430   void evpsllvw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2431   void evpsllvd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2432   void evpsllvq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2433   void evpsrlvw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2434   void evpsrlvd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2435   void evpsrlvq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2436   void evpsravw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2437   void evpsravd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2438   void evpsravq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2439   void evpmaxsb(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2440   void evpmaxsw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2441   void evpmaxsd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2442   void evpmaxsq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2443   void evpminsb(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2444   void evpminsw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2445   void evpminsd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2446   void evpminsq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2447   void evpmaxsb(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2448   void evpmaxsw(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2449   void evpmaxsd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2450   void evpmaxsq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2451   void evpminsb(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2452   void evpminsw(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2453   void evpminsd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2454   void evpminsq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2455   void evpord(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2456   void evpord(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2457   void evporq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2458   void evporq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2459   void evpandd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2460   void evpandd(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2461   void evpandq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2462   void evpandq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2463   void evpxord(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2464   void evpxord(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2465   void evpxorq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2466   void evpxorq(XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
2467 
2468   void evprold(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2469   void evprolq(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2470   void evprolvd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2471   void evprolvq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2472   void evprord(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2473   void evprorq(XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vector_len);
2474   void evprorvd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2475   void evprorvq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2476 
2477   void evpternlogd(XMMRegister dst, int imm8, KRegister mask, XMMRegister src2, XMMRegister src3, bool merge, int vector_len);
2478   void evpternlogd(XMMRegister dst, int imm8, KRegister mask, XMMRegister src2, Address src3, bool merge, int vector_len);
2479   void evpternlogq(XMMRegister dst, int imm8, KRegister mask, XMMRegister src2, XMMRegister src3, bool merge, int vector_len);
2480   void evpternlogq(XMMRegister dst, int imm8, KRegister mask, XMMRegister src2, Address src3, bool merge, int vector_len);
2481 
2482   void evplzcntd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2483   void evplzcntq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2484 
2485   // Sub packed integers
2486   void psubb(XMMRegister dst, XMMRegister src);
2487   void psubw(XMMRegister dst, XMMRegister src);
2488   void psubd(XMMRegister dst, XMMRegister src);
2489   void psubq(XMMRegister dst, XMMRegister src);
2490   void vpsubusb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2491   void vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2492   void vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2493   void vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2494   void vpsubq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2495   void vpsubb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2496   void vpsubw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2497   void vpsubd(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2498   void vpsubq(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2499 
2500   // Multiply packed integers (only shorts and ints)
2501   void pmullw(XMMRegister dst, XMMRegister src);
2502   void pmulld(XMMRegister dst, XMMRegister src);
2503   void pmuludq(XMMRegister dst, XMMRegister src);
2504   void vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2505   void vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2506   void vpmullq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2507   void vpmuludq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2508   void vpmullw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2509   void vpmulld(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2510   void vpmullq(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2511   void vpmulhuw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2512 
2513   // Minimum of packed integers
2514   void pminsb(XMMRegister dst, XMMRegister src);
2515   void vpminsb(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2516   void pminsw(XMMRegister dst, XMMRegister src);
2517   void vpminsw(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2518   void pminsd(XMMRegister dst, XMMRegister src);
2519   void vpminsd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2520   void vpminsq(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2521   void minps(XMMRegister dst, XMMRegister src);
2522   void vminps(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2523   void minpd(XMMRegister dst, XMMRegister src);
2524   void vminpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2525 
2526   // Maximum of packed integers
2527   void pmaxsb(XMMRegister dst, XMMRegister src);
2528   void vpmaxsb(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2529   void pmaxsw(XMMRegister dst, XMMRegister src);
2530   void vpmaxsw(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2531   void pmaxsd(XMMRegister dst, XMMRegister src);
2532   void vpmaxsd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2533   void vpmaxsq(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2534   void maxps(XMMRegister dst, XMMRegister src);
2535   void vmaxps(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2536   void maxpd(XMMRegister dst, XMMRegister src);
2537   void vmaxpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len);
2538 
2539   // Shift left packed integers
2540   void psllw(XMMRegister dst, int shift);
2541   void pslld(XMMRegister dst, int shift);
2542   void psllq(XMMRegister dst, int shift);
2543   void psllw(XMMRegister dst, XMMRegister shift);
2544   void pslld(XMMRegister dst, XMMRegister shift);
2545   void psllq(XMMRegister dst, XMMRegister shift);
2546   void vpsllw(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2547   void vpslld(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2548   void vpsllq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2549   void vpsllw(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2550   void vpslld(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2551   void vpsllq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2552   void vpslldq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2553 
2554   // Logical shift right packed integers
2555   void psrlw(XMMRegister dst, int shift);
2556   void psrld(XMMRegister dst, int shift);
2557   void psrlq(XMMRegister dst, int shift);
2558   void psrlw(XMMRegister dst, XMMRegister shift);
2559   void psrld(XMMRegister dst, XMMRegister shift);
2560   void psrlq(XMMRegister dst, XMMRegister shift);
2561   void vpsrlw(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2562   void vpsrld(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2563   void vpsrlq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2564   void vpsrlw(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2565   void vpsrld(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2566   void vpsrlq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2567   void vpsrldq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2568   void evpsrlvw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2569   void evpsllvw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2570 
2571   // Arithmetic shift right packed integers (only shorts and ints, no instructions for longs)
2572   void psraw(XMMRegister dst, int shift);
2573   void psrad(XMMRegister dst, int shift);
2574   void psraw(XMMRegister dst, XMMRegister shift);
2575   void psrad(XMMRegister dst, XMMRegister shift);
2576   void vpsraw(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2577   void vpsrad(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2578   void vpsraw(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2579   void vpsrad(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2580   void evpsravw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2581   void evpsraq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2582   void evpsraq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2583 
2584   // Variable shift left packed integers
2585   void vpsllvd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2586   void vpsllvq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2587 
2588   // Variable shift right packed integers
2589   void vpsrlvd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2590   void vpsrlvq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2591 
2592   // Variable shift right arithmetic packed integers
2593   void vpsravd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2594   void evpsravq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2595 
2596   void vpshldvd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2597   void vpshrdvd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2598 
2599   // And packed integers
2600   void pand(XMMRegister dst, XMMRegister src);
2601   void vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2602   void vpand(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2603   void vpandq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2604 
2605   // Andn packed integers
2606   void pandn(XMMRegister dst, XMMRegister src);
2607   void vpandn(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2608 
2609   // Or packed integers
2610   void por(XMMRegister dst, XMMRegister src);
2611   void vpor(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2612   void vpor(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2613   void vporq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2614 
2615   // Xor packed integers
2616   void pxor(XMMRegister dst, XMMRegister src);
2617   void vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2618   void vpxor(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2619   void vpxorq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2620   void evpxorq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2621   void evpxorq(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
2622 
2623   // Ternary logic instruction.
2624   void vpternlogd(XMMRegister dst, int imm8, XMMRegister src2, XMMRegister src3, int vector_len);
2625   void vpternlogd(XMMRegister dst, int imm8, XMMRegister src2, Address     src3, int vector_len);
2626   void vpternlogq(XMMRegister dst, int imm8, XMMRegister src2, XMMRegister src3, int vector_len);
2627 
2628   // Vector compress/expand instructions.
2629   void evpcompressb(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2630   void evpcompressw(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2631   void evpcompressd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2632   void evpcompressq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2633   void evcompressps(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2634   void evcompresspd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2635 
2636   void evpexpandb(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2637   void evpexpandw(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2638   void evpexpandd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2639   void evpexpandq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2640   void evexpandps(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2641   void evexpandpd(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len);
2642 
2643   // Vector Rotate Left/Right instruction.
2644   void evprolvd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2645   void evprolvq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2646   void evprorvd(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2647   void evprorvq(XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
2648   void evprold(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2649   void evprolq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2650   void evprord(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2651   void evprorq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
2652 
2653   // vinserti forms
2654   void vinserti128(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2655   void vinserti128(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8);
2656   void vinserti32x4(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2657   void vinserti32x4(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8);
2658   void vinserti64x4(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2659 
2660   // vinsertf forms
2661   void vinsertf128(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2662   void vinsertf128(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8);
2663   void vinsertf32x4(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2664   void vinsertf32x4(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8);
2665   void vinsertf64x4(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8);
2666   void vinsertf64x4(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8);
2667 
2668   // vextracti forms
2669   void vextracti128(XMMRegister dst, XMMRegister src, uint8_t imm8);
2670   void vextracti128(Address dst, XMMRegister src, uint8_t imm8);
2671   void vextracti32x4(XMMRegister dst, XMMRegister src, uint8_t imm8);
2672   void vextracti32x4(Address dst, XMMRegister src, uint8_t imm8);
2673   void vextracti64x2(XMMRegister dst, XMMRegister src, uint8_t imm8);
2674   void vextracti64x4(XMMRegister dst, XMMRegister src, uint8_t imm8);
2675   void vextracti64x4(Address dst, XMMRegister src, uint8_t imm8);
2676 
2677   // vextractf forms
2678   void vextractf128(XMMRegister dst, XMMRegister src, uint8_t imm8);
2679   void vextractf128(Address dst, XMMRegister src, uint8_t imm8);
2680   void vextractf32x4(XMMRegister dst, XMMRegister src, uint8_t imm8);
2681   void vextractf32x4(Address dst, XMMRegister src, uint8_t imm8);
2682   void vextractf64x2(XMMRegister dst, XMMRegister src, uint8_t imm8);
2683   void vextractf64x4(XMMRegister dst, XMMRegister src, uint8_t imm8);
2684   void vextractf64x4(Address dst, XMMRegister src, uint8_t imm8);
2685 
2686   // xmm/mem sourced byte/word/dword/qword replicate
2687   void vpbroadcastb(XMMRegister dst, XMMRegister src, int vector_len);
2688   void vpbroadcastb(XMMRegister dst, Address src, int vector_len);
2689   void vpbroadcastw(XMMRegister dst, XMMRegister src, int vector_len);
2690   void vpbroadcastw(XMMRegister dst, Address src, int vector_len);
2691   void vpbroadcastd(XMMRegister dst, XMMRegister src, int vector_len);
2692   void vpbroadcastd(XMMRegister dst, Address src, int vector_len);
2693   void vpbroadcastq(XMMRegister dst, XMMRegister src, int vector_len);
2694   void vpbroadcastq(XMMRegister dst, Address src, int vector_len);
2695 
2696   void evbroadcasti32x4(XMMRegister dst, Address src, int vector_len);
2697   void evbroadcasti64x2(XMMRegister dst, XMMRegister src, int vector_len);
2698   void evbroadcasti64x2(XMMRegister dst, Address src, int vector_len);
2699 
2700   // scalar single/double/128bit precision replicate
2701   void vbroadcastss(XMMRegister dst, XMMRegister src, int vector_len);
2702   void vbroadcastss(XMMRegister dst, Address src, int vector_len);
2703   void vbroadcastsd(XMMRegister dst, XMMRegister src, int vector_len);
2704   void vbroadcastsd(XMMRegister dst, Address src, int vector_len);
2705   void vbroadcastf128(XMMRegister dst, Address src, int vector_len);
2706 
2707   // gpr sourced byte/word/dword/qword replicate
2708   void evpbroadcastb(XMMRegister dst, Register src, int vector_len);
2709   void evpbroadcastw(XMMRegister dst, Register src, int vector_len);
2710   void evpbroadcastd(XMMRegister dst, Register src, int vector_len);
2711   void evpbroadcastq(XMMRegister dst, Register src, int vector_len);
2712 
2713   // Gather AVX2 and AVX3
2714   void vpgatherdd(XMMRegister dst, Address src, XMMRegister mask, int vector_len);
2715   void vpgatherdq(XMMRegister dst, Address src, XMMRegister mask, int vector_len);
2716   void vgatherdpd(XMMRegister dst, Address src, XMMRegister mask, int vector_len);
2717   void vgatherdps(XMMRegister dst, Address src, XMMRegister mask, int vector_len);
2718   void evpgatherdd(XMMRegister dst, KRegister mask, Address src, int vector_len);
2719   void evpgatherdq(XMMRegister dst, KRegister mask, Address src, int vector_len);
2720   void evgatherdpd(XMMRegister dst, KRegister mask, Address src, int vector_len);
2721   void evgatherdps(XMMRegister dst, KRegister mask, Address src, int vector_len);
2722 
2723   //Scatter AVX3 only
2724   void evpscatterdd(Address dst, KRegister mask, XMMRegister src, int vector_len);
2725   void evpscatterdq(Address dst, KRegister mask, XMMRegister src, int vector_len);
2726   void evscatterdps(Address dst, KRegister mask, XMMRegister src, int vector_len);
2727   void evscatterdpd(Address dst, KRegister mask, XMMRegister src, int vector_len);
2728 
2729   // Carry-Less Multiplication Quadword
2730   void pclmulqdq(XMMRegister dst, XMMRegister src, int mask);
2731   void vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask);
2732   void evpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask, int vector_len);
2733   // AVX instruction which is used to clear upper 128 bits of YMM registers and
2734   // to avoid transaction penalty between AVX and SSE states. There is no
2735   // penalty if legacy SSE instructions are encoded using VEX prefix because
2736   // they always clear upper 128 bits. It should be used before calling
2737   // runtime code and native libraries.
2738   void vzeroupper();
2739 
2740   // Vector double compares
2741   void vcmppd(XMMRegister dst, XMMRegister nds, XMMRegister src, int cop, int vector_len);
2742   void evcmppd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
2743                ComparisonPredicateFP comparison, int vector_len);
2744 
2745   // Vector float compares
2746   void vcmpps(XMMRegister dst, XMMRegister nds, XMMRegister src, int comparison, int vector_len);
2747   void evcmpps(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
2748                ComparisonPredicateFP comparison, int vector_len);
2749 
2750   // Vector integer compares
2751   void vpcmpgtd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
2752   void evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
2753                int comparison, bool is_signed, int vector_len);
2754   void evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
2755                int comparison, bool is_signed, int vector_len);
2756 
2757   // Vector long compares
2758   void evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
2759                int comparison, bool is_signed, int vector_len);
2760   void evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
2761                int comparison, bool is_signed, int vector_len);
2762 
2763   // Vector byte compares
2764   void evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
2765                int comparison, bool is_signed, int vector_len);
2766   void evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
2767                int comparison, bool is_signed, int vector_len);
2768 
2769   // Vector short compares
2770   void evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
2771                int comparison, bool is_signed, int vector_len);
2772   void evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
2773                int comparison, bool is_signed, int vector_len);
2774 
2775   void evpmovb2m(KRegister dst, XMMRegister src, int vector_len);
2776   void evpmovw2m(KRegister dst, XMMRegister src, int vector_len);
2777   void evpmovd2m(KRegister dst, XMMRegister src, int vector_len);
2778   void evpmovq2m(KRegister dst, XMMRegister src, int vector_len);
2779   void evpmovm2b(XMMRegister dst, KRegister src, int vector_len);
2780   void evpmovm2w(XMMRegister dst, KRegister src, int vector_len);
2781   void evpmovm2d(XMMRegister dst, KRegister src, int vector_len);
2782   void evpmovm2q(XMMRegister dst, KRegister src, int vector_len);
2783 
2784   // floating point class tests
2785   void vfpclassss(KRegister kdst, XMMRegister src, uint8_t imm8);
2786   void vfpclasssd(KRegister kdst, XMMRegister src, uint8_t imm8);
2787 
2788   // Vector blends
2789   void blendvps(XMMRegister dst, XMMRegister src);
2790   void blendvpd(XMMRegister dst, XMMRegister src);
2791   void pblendvb(XMMRegister dst, XMMRegister src);
2792   void blendvpb(XMMRegister dst, XMMRegister nds, XMMRegister src1, XMMRegister src2, int vector_len);
2793   void vblendvps(XMMRegister dst, XMMRegister nds, XMMRegister src, XMMRegister mask, int vector_len);
2794   void vblendvpd(XMMRegister dst, XMMRegister nds, XMMRegister src1, XMMRegister src2, int vector_len);
2795   void vpblendvb(XMMRegister dst, XMMRegister nds, XMMRegister src, XMMRegister mask, int vector_len);
2796   void vpblendd(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8, int vector_len);
2797   void evblendmpd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2798   void evblendmps(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2799   void evpblendmb(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2800   void evpblendmw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2801   void evpblendmd(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2802   void evpblendmq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
2803 
2804   // Galois field affine transformation instructions.
2805   void gf2p8affineqb(XMMRegister dst, XMMRegister src, int imm8);
2806   void vgf2p8affineqb(XMMRegister dst, XMMRegister src2, XMMRegister src3, int imm8, int vector_len);
2807 
2808  protected:
2809   // Next instructions require address alignment 16 bytes SSE mode.
2810   // They should be called only from corresponding MacroAssembler instructions.
2811   void andpd(XMMRegister dst, Address src);
2812   void andps(XMMRegister dst, Address src);
2813   void xorpd(XMMRegister dst, Address src);
2814   void xorps(XMMRegister dst, Address src);
2815 
2816 };
2817 
2818 // The Intel x86/Amd64 Assembler attributes: All fields enclosed here are to guide encoding level decisions.
2819 // Specific set functions are for specialized use, else defaults or whatever was supplied to object construction
2820 // are applied.
2821 class InstructionAttr {
2822 public:
2823   InstructionAttr(
2824     int vector_len,     // The length of vector to be applied in encoding - for both AVX and EVEX
2825     bool rex_vex_w,     // Width of data: if 32-bits or less, false, else if 64-bit or specially defined, true
2826     bool legacy_mode,   // Details if either this instruction is conditionally encoded to AVX or earlier if true else possibly EVEX
2827     bool no_reg_mask,   // when true, k0 is used when EVEX encoding is chosen, else embedded_opmask_register_specifier is used
2828     bool uses_vl)       // This instruction may have legacy constraints based on vector length for EVEX
2829     :
2830       _rex_vex_w(rex_vex_w),
2831       _legacy_mode(legacy_mode || UseAVX < 3),
2832       _no_reg_mask(no_reg_mask),
2833       _uses_vl(uses_vl),
2834       _rex_vex_w_reverted(false),
2835       _is_evex_instruction(false),
2836       _is_clear_context(true),
2837       _is_extended_context(false),
2838       _avx_vector_len(vector_len),
2839       _tuple_type(Assembler::EVEX_ETUP),
2840       _input_size_in_bits(Assembler::EVEX_NObit),
2841       _evex_encoding(0),
2842       _embedded_opmask_register_specifier(0), // hard code k0
2843       _current_assembler(NULL) { }
2844 
2845   ~InstructionAttr() {
2846     if (_current_assembler != NULL) {
2847       _current_assembler->clear_attributes();
2848     }
2849     _current_assembler = NULL;
2850   }
2851 
2852 private:
2853   bool _rex_vex_w;
2854   bool _legacy_mode;
2855   bool _no_reg_mask;
2856   bool _uses_vl;
2857   bool _rex_vex_w_reverted;
2858   bool _is_evex_instruction;
2859   bool _is_clear_context;
2860   bool _is_extended_context;
2861   int  _avx_vector_len;
2862   int  _tuple_type;
2863   int  _input_size_in_bits;
2864   int  _evex_encoding;
2865   int _embedded_opmask_register_specifier;
2866 
2867   Assembler *_current_assembler;
2868 
2869 public:
2870   // query functions for field accessors
2871   bool is_rex_vex_w(void) const { return _rex_vex_w; }
2872   bool is_legacy_mode(void) const { return _legacy_mode; }
2873   bool is_no_reg_mask(void) const { return _no_reg_mask; }
2874   bool uses_vl(void) const { return _uses_vl; }
2875   bool is_rex_vex_w_reverted(void) { return _rex_vex_w_reverted; }
2876   bool is_evex_instruction(void) const { return _is_evex_instruction; }
2877   bool is_clear_context(void) const { return _is_clear_context; }
2878   bool is_extended_context(void) const { return _is_extended_context; }
2879   int  get_vector_len(void) const { return _avx_vector_len; }
2880   int  get_tuple_type(void) const { return _tuple_type; }
2881   int  get_input_size(void) const { return _input_size_in_bits; }
2882   int  get_evex_encoding(void) const { return _evex_encoding; }
2883   int  get_embedded_opmask_register_specifier(void) const { return _embedded_opmask_register_specifier; }
2884 
2885   // Set the vector len manually
2886   void set_vector_len(int vector_len) { _avx_vector_len = vector_len; }
2887 
2888   // Set revert rex_vex_w for avx encoding
2889   void set_rex_vex_w_reverted(void) { _rex_vex_w_reverted = true; }
2890 
2891   // Set rex_vex_w based on state
2892   void set_rex_vex_w(bool state) { _rex_vex_w = state; }
2893 
2894   // Set the instruction to be encoded in AVX mode
2895   void set_is_legacy_mode(void) { _legacy_mode = true; }
2896 
2897   // Set the current instruction to be encoded as an EVEX instruction
2898   void set_is_evex_instruction(void) { _is_evex_instruction = true; }
2899 
2900   // Internal encoding data used in compressed immediate offset programming
2901   void set_evex_encoding(int value) { _evex_encoding = value; }
2902 
2903   // When the Evex.Z field is set (true), it is used to clear all non directed XMM/YMM/ZMM components.
2904   // This method unsets it so that merge semantics are used instead.
2905   void reset_is_clear_context(void) { _is_clear_context = false; }
2906 
2907   // Map back to current assembler so that we can manage object level association
2908   void set_current_assembler(Assembler *current_assembler) { _current_assembler = current_assembler; }
2909 
2910   // Address modifiers used for compressed displacement calculation
2911   void set_address_attributes(int tuple_type, int input_size_in_bits);
2912 
2913   // Set embedded opmask register specifier.
2914   void set_embedded_opmask_register_specifier(KRegister mask) {
2915     _embedded_opmask_register_specifier = (*mask).encoding() & 0x7;
2916   }
2917 
2918 };
2919 
2920 #endif // CPU_X86_ASSEMBLER_X86_HPP