1 /*
   2  * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2016, 2019 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "code/debugInfoRec.hpp"
  29 #include "code/icBuffer.hpp"
  30 #include "code/vtableStubs.hpp"
  31 #include "compiler/oopMap.hpp"
  32 #include "gc/shared/gcLocker.hpp"
  33 #include "interpreter/interpreter.hpp"
  34 #include "interpreter/interp_masm.hpp"
  35 #include "memory/resourceArea.hpp"
  36 #include "nativeInst_s390.hpp"
  37 #include "oops/compiledICHolder.hpp"
  38 #include "oops/klass.inline.hpp"
  39 #include "prims/methodHandles.hpp"
  40 #include "registerSaver_s390.hpp"
  41 #include "runtime/jniHandles.hpp"
  42 #include "runtime/safepointMechanism.hpp"
  43 #include "runtime/sharedRuntime.hpp"
  44 #include "runtime/signature.hpp"
  45 #include "runtime/stubRoutines.hpp"
  46 #include "runtime/vframeArray.hpp"
  47 #include "utilities/align.hpp"
  48 #include "utilities/macros.hpp"
  49 #include "vmreg_s390.inline.hpp"
  50 #ifdef COMPILER1
  51 #include "c1/c1_Runtime1.hpp"
  52 #endif
  53 #ifdef COMPILER2
  54 #include "opto/ad.hpp"
  55 #include "opto/runtime.hpp"
  56 #endif
  57 
  58 #ifdef PRODUCT
  59 #define __ masm->
  60 #else
  61 #define __ (Verbose ? (masm->block_comment(FILE_AND_LINE),masm):masm)->
  62 #endif
  63 
  64 #define BLOCK_COMMENT(str) __ block_comment(str)
  65 #define BIND(label)        bind(label); BLOCK_COMMENT(#label ":")
  66 
  67 #define RegisterSaver_LiveIntReg(regname) \
  68   { RegisterSaver::int_reg,   regname->encoding(), regname->as_VMReg() }
  69 
  70 #define RegisterSaver_LiveFloatReg(regname) \
  71   { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() }
  72 
  73 // Registers which are not saved/restored, but still they have got a frame slot.
  74 // Used to get same frame size for RegisterSaver_LiveRegs and RegisterSaver_LiveRegsWithoutR2
  75 #define RegisterSaver_ExcludedIntReg(regname) \
  76   { RegisterSaver::excluded_reg, regname->encoding(), regname->as_VMReg() }
  77 
  78 // Registers which are not saved/restored, but still they have got a frame slot.
  79 // Used to get same frame size for RegisterSaver_LiveRegs and RegisterSaver_LiveRegsWithoutR2.
  80 #define RegisterSaver_ExcludedFloatReg(regname) \
  81   { RegisterSaver::excluded_reg, regname->encoding(), regname->as_VMReg() }
  82 
  83 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
  84   // Live registers which get spilled to the stack. Register positions
  85   // in this array correspond directly to the stack layout.
  86   //
  87   // live float registers:
  88   //
  89   RegisterSaver_LiveFloatReg(Z_F0 ),
  90   // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1)
  91   RegisterSaver_LiveFloatReg(Z_F2 ),
  92   RegisterSaver_LiveFloatReg(Z_F3 ),
  93   RegisterSaver_LiveFloatReg(Z_F4 ),
  94   RegisterSaver_LiveFloatReg(Z_F5 ),
  95   RegisterSaver_LiveFloatReg(Z_F6 ),
  96   RegisterSaver_LiveFloatReg(Z_F7 ),
  97   RegisterSaver_LiveFloatReg(Z_F8 ),
  98   RegisterSaver_LiveFloatReg(Z_F9 ),
  99   RegisterSaver_LiveFloatReg(Z_F10),
 100   RegisterSaver_LiveFloatReg(Z_F11),
 101   RegisterSaver_LiveFloatReg(Z_F12),
 102   RegisterSaver_LiveFloatReg(Z_F13),
 103   RegisterSaver_LiveFloatReg(Z_F14),
 104   RegisterSaver_LiveFloatReg(Z_F15),
 105   //
 106   // RegisterSaver_ExcludedIntReg(Z_R0), // scratch
 107   // RegisterSaver_ExcludedIntReg(Z_R1), // scratch
 108   RegisterSaver_LiveIntReg(Z_R2 ),
 109   RegisterSaver_LiveIntReg(Z_R3 ),
 110   RegisterSaver_LiveIntReg(Z_R4 ),
 111   RegisterSaver_LiveIntReg(Z_R5 ),
 112   RegisterSaver_LiveIntReg(Z_R6 ),
 113   RegisterSaver_LiveIntReg(Z_R7 ),
 114   RegisterSaver_LiveIntReg(Z_R8 ),
 115   RegisterSaver_LiveIntReg(Z_R9 ),
 116   RegisterSaver_LiveIntReg(Z_R10),
 117   RegisterSaver_LiveIntReg(Z_R11),
 118   RegisterSaver_LiveIntReg(Z_R12),
 119   RegisterSaver_LiveIntReg(Z_R13),
 120   // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.)
 121   // RegisterSaver_ExcludedIntReg(Z_R15)  // stack pointer
 122 };
 123 
 124 static const RegisterSaver::LiveRegType RegisterSaver_LiveIntRegs[] = {
 125   // Live registers which get spilled to the stack. Register positions
 126   // in this array correspond directly to the stack layout.
 127   //
 128   // live float registers: All excluded, but still they get a stack slot to get same frame size.
 129   //
 130   RegisterSaver_ExcludedFloatReg(Z_F0 ),
 131   // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1)
 132   RegisterSaver_ExcludedFloatReg(Z_F2 ),
 133   RegisterSaver_ExcludedFloatReg(Z_F3 ),
 134   RegisterSaver_ExcludedFloatReg(Z_F4 ),
 135   RegisterSaver_ExcludedFloatReg(Z_F5 ),
 136   RegisterSaver_ExcludedFloatReg(Z_F6 ),
 137   RegisterSaver_ExcludedFloatReg(Z_F7 ),
 138   RegisterSaver_ExcludedFloatReg(Z_F8 ),
 139   RegisterSaver_ExcludedFloatReg(Z_F9 ),
 140   RegisterSaver_ExcludedFloatReg(Z_F10),
 141   RegisterSaver_ExcludedFloatReg(Z_F11),
 142   RegisterSaver_ExcludedFloatReg(Z_F12),
 143   RegisterSaver_ExcludedFloatReg(Z_F13),
 144   RegisterSaver_ExcludedFloatReg(Z_F14),
 145   RegisterSaver_ExcludedFloatReg(Z_F15),
 146   //
 147   // RegisterSaver_ExcludedIntReg(Z_R0), // scratch
 148   // RegisterSaver_ExcludedIntReg(Z_R1), // scratch
 149   RegisterSaver_LiveIntReg(Z_R2 ),
 150   RegisterSaver_LiveIntReg(Z_R3 ),
 151   RegisterSaver_LiveIntReg(Z_R4 ),
 152   RegisterSaver_LiveIntReg(Z_R5 ),
 153   RegisterSaver_LiveIntReg(Z_R6 ),
 154   RegisterSaver_LiveIntReg(Z_R7 ),
 155   RegisterSaver_LiveIntReg(Z_R8 ),
 156   RegisterSaver_LiveIntReg(Z_R9 ),
 157   RegisterSaver_LiveIntReg(Z_R10),
 158   RegisterSaver_LiveIntReg(Z_R11),
 159   RegisterSaver_LiveIntReg(Z_R12),
 160   RegisterSaver_LiveIntReg(Z_R13),
 161   // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.)
 162   // RegisterSaver_ExcludedIntReg(Z_R15)  // stack pointer
 163 };
 164 
 165 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegsWithoutR2[] = {
 166   // Live registers which get spilled to the stack. Register positions
 167   // in this array correspond directly to the stack layout.
 168   //
 169   // live float registers:
 170   //
 171   RegisterSaver_LiveFloatReg(Z_F0 ),
 172   // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1)
 173   RegisterSaver_LiveFloatReg(Z_F2 ),
 174   RegisterSaver_LiveFloatReg(Z_F3 ),
 175   RegisterSaver_LiveFloatReg(Z_F4 ),
 176   RegisterSaver_LiveFloatReg(Z_F5 ),
 177   RegisterSaver_LiveFloatReg(Z_F6 ),
 178   RegisterSaver_LiveFloatReg(Z_F7 ),
 179   RegisterSaver_LiveFloatReg(Z_F8 ),
 180   RegisterSaver_LiveFloatReg(Z_F9 ),
 181   RegisterSaver_LiveFloatReg(Z_F10),
 182   RegisterSaver_LiveFloatReg(Z_F11),
 183   RegisterSaver_LiveFloatReg(Z_F12),
 184   RegisterSaver_LiveFloatReg(Z_F13),
 185   RegisterSaver_LiveFloatReg(Z_F14),
 186   RegisterSaver_LiveFloatReg(Z_F15),
 187   //
 188   // RegisterSaver_ExcludedIntReg(Z_R0), // scratch
 189   // RegisterSaver_ExcludedIntReg(Z_R1), // scratch
 190   RegisterSaver_ExcludedIntReg(Z_R2), // Omit saving R2.
 191   RegisterSaver_LiveIntReg(Z_R3 ),
 192   RegisterSaver_LiveIntReg(Z_R4 ),
 193   RegisterSaver_LiveIntReg(Z_R5 ),
 194   RegisterSaver_LiveIntReg(Z_R6 ),
 195   RegisterSaver_LiveIntReg(Z_R7 ),
 196   RegisterSaver_LiveIntReg(Z_R8 ),
 197   RegisterSaver_LiveIntReg(Z_R9 ),
 198   RegisterSaver_LiveIntReg(Z_R10),
 199   RegisterSaver_LiveIntReg(Z_R11),
 200   RegisterSaver_LiveIntReg(Z_R12),
 201   RegisterSaver_LiveIntReg(Z_R13),
 202   // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.)
 203   // RegisterSaver_ExcludedIntReg(Z_R15)  // stack pointer
 204 };
 205 
 206 // Live argument registers which get spilled to the stack.
 207 static const RegisterSaver::LiveRegType RegisterSaver_LiveArgRegs[] = {
 208   RegisterSaver_LiveFloatReg(Z_FARG1),
 209   RegisterSaver_LiveFloatReg(Z_FARG2),
 210   RegisterSaver_LiveFloatReg(Z_FARG3),
 211   RegisterSaver_LiveFloatReg(Z_FARG4),
 212   RegisterSaver_LiveIntReg(Z_ARG1),
 213   RegisterSaver_LiveIntReg(Z_ARG2),
 214   RegisterSaver_LiveIntReg(Z_ARG3),
 215   RegisterSaver_LiveIntReg(Z_ARG4),
 216   RegisterSaver_LiveIntReg(Z_ARG5)
 217 };
 218 
 219 static const RegisterSaver::LiveRegType RegisterSaver_LiveVolatileRegs[] = {
 220   // Live registers which get spilled to the stack. Register positions
 221   // in this array correspond directly to the stack layout.
 222   //
 223   // live float registers:
 224   //
 225   RegisterSaver_LiveFloatReg(Z_F0 ),
 226   // RegisterSaver_ExcludedFloatReg(Z_F1 ), // scratch (Z_fscratch_1)
 227   RegisterSaver_LiveFloatReg(Z_F2 ),
 228   RegisterSaver_LiveFloatReg(Z_F3 ),
 229   RegisterSaver_LiveFloatReg(Z_F4 ),
 230   RegisterSaver_LiveFloatReg(Z_F5 ),
 231   RegisterSaver_LiveFloatReg(Z_F6 ),
 232   RegisterSaver_LiveFloatReg(Z_F7 ),
 233   // RegisterSaver_LiveFloatReg(Z_F8 ), // non-volatile
 234   // RegisterSaver_LiveFloatReg(Z_F9 ), // non-volatile
 235   // RegisterSaver_LiveFloatReg(Z_F10), // non-volatile
 236   // RegisterSaver_LiveFloatReg(Z_F11), // non-volatile
 237   // RegisterSaver_LiveFloatReg(Z_F12), // non-volatile
 238   // RegisterSaver_LiveFloatReg(Z_F13), // non-volatile
 239   // RegisterSaver_LiveFloatReg(Z_F14), // non-volatile
 240   // RegisterSaver_LiveFloatReg(Z_F15), // non-volatile
 241   //
 242   // RegisterSaver_ExcludedIntReg(Z_R0), // scratch
 243   // RegisterSaver_ExcludedIntReg(Z_R1), // scratch
 244   RegisterSaver_LiveIntReg(Z_R2 ),
 245   RegisterSaver_LiveIntReg(Z_R3 ),
 246   RegisterSaver_LiveIntReg(Z_R4 ),
 247   RegisterSaver_LiveIntReg(Z_R5 ),
 248   // RegisterSaver_LiveIntReg(Z_R6 ), // non-volatile
 249   // RegisterSaver_LiveIntReg(Z_R7 ), // non-volatile
 250   // RegisterSaver_LiveIntReg(Z_R8 ), // non-volatile
 251   // RegisterSaver_LiveIntReg(Z_R9 ), // non-volatile
 252   // RegisterSaver_LiveIntReg(Z_R10), // non-volatile
 253   // RegisterSaver_LiveIntReg(Z_R11), // non-volatile
 254   // RegisterSaver_LiveIntReg(Z_R12), // non-volatile
 255   // RegisterSaver_LiveIntReg(Z_R13), // non-volatile
 256   // RegisterSaver_ExcludedIntReg(Z_R14), // return pc (Saved in caller frame.)
 257   // RegisterSaver_ExcludedIntReg(Z_R15)  // stack pointer
 258 };
 259 
 260 int RegisterSaver::live_reg_save_size(RegisterSet reg_set) {
 261   int reg_space = -1;
 262   switch (reg_set) {
 263     case all_registers:           reg_space = sizeof(RegisterSaver_LiveRegs); break;
 264     case all_registers_except_r2: reg_space = sizeof(RegisterSaver_LiveRegsWithoutR2); break;
 265     case all_integer_registers:   reg_space = sizeof(RegisterSaver_LiveIntRegs); break;
 266     case all_volatile_registers:  reg_space = sizeof(RegisterSaver_LiveVolatileRegs); break;
 267     case arg_registers:           reg_space = sizeof(RegisterSaver_LiveArgRegs); break;
 268     default: ShouldNotReachHere();
 269   }
 270   return (reg_space / sizeof(RegisterSaver::LiveRegType)) * reg_size;
 271 }
 272 
 273 
 274 int RegisterSaver::live_reg_frame_size(RegisterSet reg_set) {
 275   return live_reg_save_size(reg_set) + frame::z_abi_160_size;
 276 }
 277 
 278 
 279 // return_pc: Specify the register that should be stored as the return pc in the current frame.
 280 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, RegisterSet reg_set, Register return_pc) {
 281   // Record volatile registers as callee-save values in an OopMap so
 282   // their save locations will be propagated to the caller frame's
 283   // RegisterMap during StackFrameStream construction (needed for
 284   // deoptimization; see compiledVFrame::create_stack_value).
 285 
 286   // Calculate frame size.
 287   const int frame_size_in_bytes  = live_reg_frame_size(reg_set);
 288   const int frame_size_in_slots  = frame_size_in_bytes / sizeof(jint);
 289   const int register_save_offset = frame_size_in_bytes - live_reg_save_size(reg_set);
 290 
 291   // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
 292   OopMap* map = new OopMap(frame_size_in_slots, 0);
 293 
 294   int regstosave_num = 0;
 295   const RegisterSaver::LiveRegType* live_regs = NULL;
 296 
 297   switch (reg_set) {
 298     case all_registers:
 299       regstosave_num = sizeof(RegisterSaver_LiveRegs)/sizeof(RegisterSaver::LiveRegType);
 300       live_regs      = RegisterSaver_LiveRegs;
 301       break;
 302     case all_registers_except_r2:
 303       regstosave_num = sizeof(RegisterSaver_LiveRegsWithoutR2)/sizeof(RegisterSaver::LiveRegType);;
 304       live_regs      = RegisterSaver_LiveRegsWithoutR2;
 305       break;
 306     case all_integer_registers:
 307       regstosave_num = sizeof(RegisterSaver_LiveIntRegs)/sizeof(RegisterSaver::LiveRegType);
 308       live_regs      = RegisterSaver_LiveIntRegs;
 309       break;
 310     case all_volatile_registers:
 311       regstosave_num = sizeof(RegisterSaver_LiveVolatileRegs)/sizeof(RegisterSaver::LiveRegType);
 312       live_regs      = RegisterSaver_LiveVolatileRegs;
 313       break;
 314     case arg_registers:
 315       regstosave_num = sizeof(RegisterSaver_LiveArgRegs)/sizeof(RegisterSaver::LiveRegType);;
 316       live_regs      = RegisterSaver_LiveArgRegs;
 317       break;
 318     default: ShouldNotReachHere();
 319   }
 320 
 321   // Save return pc in old frame.
 322   __ save_return_pc(return_pc);
 323 
 324   // Push a new frame (includes stack linkage).
 325   // Use return_pc as scratch for push_frame. Z_R0_scratch (the default) and Z_R1_scratch are
 326   // illegally used to pass parameters by RangeCheckStub::emit_code().
 327   __ push_frame(frame_size_in_bytes, return_pc);
 328   // We have to restore return_pc right away.
 329   // Nobody else will. Furthermore, return_pc isn't necessarily the default (Z_R14).
 330   // Nobody else knows which register we saved.
 331   __ z_lg(return_pc, _z_abi16(return_pc) + frame_size_in_bytes, Z_SP);
 332 
 333   // Register save area in new frame starts above z_abi_160 area.
 334   int offset = register_save_offset;
 335 
 336   Register first = noreg;
 337   Register last  = noreg;
 338   int      first_offset = -1;
 339   bool     float_spilled = false;
 340 
 341   for (int i = 0; i < regstosave_num; i++, offset += reg_size) {
 342     int reg_num  = live_regs[i].reg_num;
 343     int reg_type = live_regs[i].reg_type;
 344 
 345     switch (reg_type) {
 346       case RegisterSaver::int_reg: {
 347         Register reg = as_Register(reg_num);
 348         if (last != reg->predecessor()) {
 349           if (first != noreg) {
 350             __ z_stmg(first, last, first_offset, Z_SP);
 351           }
 352           first = reg;
 353           first_offset = offset;
 354           DEBUG_ONLY(float_spilled = false);
 355         }
 356         last = reg;
 357         assert(last != Z_R0, "r0 would require special treatment");
 358         assert(!float_spilled, "for simplicity, do not mix up ints and floats in RegisterSaver_LiveRegs[]");
 359         break;
 360       }
 361 
 362       case RegisterSaver::excluded_reg: // Not saved/restored, but with dedicated slot.
 363         continue; // Continue with next loop iteration.
 364 
 365       case RegisterSaver::float_reg: {
 366         FloatRegister freg = as_FloatRegister(reg_num);
 367         __ z_std(freg, offset, Z_SP);
 368         DEBUG_ONLY(float_spilled = true);
 369         break;
 370       }
 371 
 372       default:
 373         ShouldNotReachHere();
 374         break;
 375     }
 376 
 377     // Second set_callee_saved is really a waste but we'll keep things as they were for now
 378     map->set_callee_saved(VMRegImpl::stack2reg(offset >> 2), live_regs[i].vmreg);
 379     map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size) >> 2), live_regs[i].vmreg->next());
 380   }
 381   assert(first != noreg, "Should spill at least one int reg.");
 382   __ z_stmg(first, last, first_offset, Z_SP);
 383 
 384   // And we're done.
 385   return map;
 386 }
 387 
 388 
 389 // Generate the OopMap (again, regs where saved before).
 390 OopMap* RegisterSaver::generate_oop_map(MacroAssembler* masm, RegisterSet reg_set) {
 391   // Calculate frame size.
 392   const int frame_size_in_bytes  = live_reg_frame_size(reg_set);
 393   const int frame_size_in_slots  = frame_size_in_bytes / sizeof(jint);
 394   const int register_save_offset = frame_size_in_bytes - live_reg_save_size(reg_set);
 395 
 396   // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
 397   OopMap* map = new OopMap(frame_size_in_slots, 0);
 398 
 399   int regstosave_num = 0;
 400   const RegisterSaver::LiveRegType* live_regs = NULL;
 401 
 402   switch (reg_set) {
 403     case all_registers:
 404       regstosave_num = sizeof(RegisterSaver_LiveRegs)/sizeof(RegisterSaver::LiveRegType);
 405       live_regs      = RegisterSaver_LiveRegs;
 406       break;
 407     case all_registers_except_r2:
 408       regstosave_num = sizeof(RegisterSaver_LiveRegsWithoutR2)/sizeof(RegisterSaver::LiveRegType);;
 409       live_regs      = RegisterSaver_LiveRegsWithoutR2;
 410       break;
 411     case all_integer_registers:
 412       regstosave_num = sizeof(RegisterSaver_LiveIntRegs)/sizeof(RegisterSaver::LiveRegType);
 413       live_regs      = RegisterSaver_LiveIntRegs;
 414       break;
 415     case all_volatile_registers:
 416       regstosave_num = sizeof(RegisterSaver_LiveVolatileRegs)/sizeof(RegisterSaver::LiveRegType);
 417       live_regs      = RegisterSaver_LiveVolatileRegs;
 418       break;
 419     case arg_registers:
 420       regstosave_num = sizeof(RegisterSaver_LiveArgRegs)/sizeof(RegisterSaver::LiveRegType);;
 421       live_regs      = RegisterSaver_LiveArgRegs;
 422       break;
 423     default: ShouldNotReachHere();
 424   }
 425 
 426   // Register save area in new frame starts above z_abi_160 area.
 427   int offset = register_save_offset;
 428   for (int i = 0; i < regstosave_num; i++) {
 429     if (live_regs[i].reg_type < RegisterSaver::excluded_reg) {
 430       map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), live_regs[i].vmreg);
 431       map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2), live_regs[i].vmreg->next());
 432     }
 433     offset += reg_size;
 434   }
 435   return map;
 436 }
 437 
 438 
 439 // Pop the current frame and restore all the registers that we saved.
 440 void RegisterSaver::restore_live_registers(MacroAssembler* masm, RegisterSet reg_set) {
 441   int offset;
 442   const int register_save_offset = live_reg_frame_size(reg_set) - live_reg_save_size(reg_set);
 443 
 444   Register first = noreg;
 445   Register last = noreg;
 446   int      first_offset = -1;
 447   bool     float_spilled = false;
 448 
 449   int regstosave_num = 0;
 450   const RegisterSaver::LiveRegType* live_regs = NULL;
 451 
 452   switch (reg_set) {
 453     case all_registers:
 454       regstosave_num = sizeof(RegisterSaver_LiveRegs)/sizeof(RegisterSaver::LiveRegType);;
 455       live_regs      = RegisterSaver_LiveRegs;
 456       break;
 457     case all_registers_except_r2:
 458       regstosave_num = sizeof(RegisterSaver_LiveRegsWithoutR2)/sizeof(RegisterSaver::LiveRegType);;
 459       live_regs      = RegisterSaver_LiveRegsWithoutR2;
 460       break;
 461     case all_integer_registers:
 462       regstosave_num = sizeof(RegisterSaver_LiveIntRegs)/sizeof(RegisterSaver::LiveRegType);
 463       live_regs      = RegisterSaver_LiveIntRegs;
 464       break;
 465     case all_volatile_registers:
 466       regstosave_num = sizeof(RegisterSaver_LiveVolatileRegs)/sizeof(RegisterSaver::LiveRegType);;
 467       live_regs      = RegisterSaver_LiveVolatileRegs;
 468       break;
 469     case arg_registers:
 470       regstosave_num = sizeof(RegisterSaver_LiveArgRegs)/sizeof(RegisterSaver::LiveRegType);;
 471       live_regs      = RegisterSaver_LiveArgRegs;
 472       break;
 473     default: ShouldNotReachHere();
 474   }
 475 
 476   // Restore all registers (ints and floats).
 477 
 478   // Register save area in new frame starts above z_abi_160 area.
 479   offset = register_save_offset;
 480 
 481   for (int i = 0; i < regstosave_num; i++, offset += reg_size) {
 482     int reg_num  = live_regs[i].reg_num;
 483     int reg_type = live_regs[i].reg_type;
 484 
 485     switch (reg_type) {
 486       case RegisterSaver::excluded_reg:
 487         continue; // Continue with next loop iteration.
 488 
 489       case RegisterSaver::int_reg: {
 490         Register reg = as_Register(reg_num);
 491         if (last != reg->predecessor()) {
 492           if (first != noreg) {
 493             __ z_lmg(first, last, first_offset, Z_SP);
 494           }
 495           first = reg;
 496           first_offset = offset;
 497           DEBUG_ONLY(float_spilled = false);
 498         }
 499         last = reg;
 500         assert(last != Z_R0, "r0 would require special treatment");
 501         assert(!float_spilled, "for simplicity, do not mix up ints and floats in RegisterSaver_LiveRegs[]");
 502         break;
 503       }
 504 
 505       case RegisterSaver::float_reg: {
 506         FloatRegister freg = as_FloatRegister(reg_num);
 507         __ z_ld(freg, offset, Z_SP);
 508         DEBUG_ONLY(float_spilled = true);
 509         break;
 510       }
 511 
 512       default:
 513         ShouldNotReachHere();
 514     }
 515   }
 516   assert(first != noreg, "Should spill at least one int reg.");
 517   __ z_lmg(first, last, first_offset, Z_SP);
 518 
 519   // Pop the frame.
 520   __ pop_frame();
 521 
 522   // Restore the flags.
 523   __ restore_return_pc();
 524 }
 525 
 526 
 527 // Pop the current frame and restore the registers that might be holding a result.
 528 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 529   int i;
 530   int offset;
 531   const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /
 532                                    sizeof(RegisterSaver::LiveRegType);
 533   const int register_save_offset = live_reg_frame_size(all_registers) - live_reg_save_size(all_registers);
 534 
 535   // Restore all result registers (ints and floats).
 536   offset = register_save_offset;
 537   for (int i = 0; i < regstosave_num; i++, offset += reg_size) {
 538     int reg_num = RegisterSaver_LiveRegs[i].reg_num;
 539     int reg_type = RegisterSaver_LiveRegs[i].reg_type;
 540     switch (reg_type) {
 541       case RegisterSaver::excluded_reg:
 542         continue; // Continue with next loop iteration.
 543       case RegisterSaver::int_reg: {
 544         if (as_Register(reg_num) == Z_RET) { // int result_reg
 545           __ z_lg(as_Register(reg_num), offset, Z_SP);
 546         }
 547         break;
 548       }
 549       case RegisterSaver::float_reg: {
 550         if (as_FloatRegister(reg_num) == Z_FRET) { // float result_reg
 551           __ z_ld(as_FloatRegister(reg_num), offset, Z_SP);
 552         }
 553         break;
 554       }
 555       default:
 556         ShouldNotReachHere();
 557     }
 558   }
 559 }
 560 
 561 // ---------------------------------------------------------------------------
 562 void SharedRuntime::save_native_result(MacroAssembler * masm,
 563                                        BasicType ret_type,
 564                                        int frame_slots) {
 565   Address memaddr(Z_SP, frame_slots * VMRegImpl::stack_slot_size);
 566 
 567   switch (ret_type) {
 568     case T_BOOLEAN:  // Save shorter types as int. Do we need sign extension at restore??
 569     case T_BYTE:
 570     case T_CHAR:
 571     case T_SHORT:
 572     case T_INT:
 573       __ reg2mem_opt(Z_RET, memaddr, false);
 574       break;
 575     case T_OBJECT:   // Save pointer types as long.
 576     case T_ARRAY:
 577     case T_ADDRESS:
 578     case T_VOID:
 579     case T_LONG:
 580       __ reg2mem_opt(Z_RET, memaddr);
 581       break;
 582     case T_FLOAT:
 583       __ freg2mem_opt(Z_FRET, memaddr, false);
 584       break;
 585     case T_DOUBLE:
 586       __ freg2mem_opt(Z_FRET, memaddr);
 587       break;
 588     default:
 589       ShouldNotReachHere();
 590       break;
 591   }
 592 }
 593 
 594 void SharedRuntime::restore_native_result(MacroAssembler *masm,
 595                                           BasicType       ret_type,
 596                                           int             frame_slots) {
 597   Address memaddr(Z_SP, frame_slots * VMRegImpl::stack_slot_size);
 598 
 599   switch (ret_type) {
 600     case T_BOOLEAN:  // Restore shorter types as int. Do we need sign extension at restore??
 601     case T_BYTE:
 602     case T_CHAR:
 603     case T_SHORT:
 604     case T_INT:
 605       __ mem2reg_opt(Z_RET, memaddr, false);
 606       break;
 607     case T_OBJECT:   // Restore pointer types as long.
 608     case T_ARRAY:
 609     case T_ADDRESS:
 610     case T_VOID:
 611     case T_LONG:
 612       __ mem2reg_opt(Z_RET, memaddr);
 613       break;
 614     case T_FLOAT:
 615       __ mem2freg_opt(Z_FRET, memaddr, false);
 616       break;
 617     case T_DOUBLE:
 618       __ mem2freg_opt(Z_FRET, memaddr);
 619       break;
 620     default:
 621       ShouldNotReachHere();
 622       break;
 623   }
 624 }
 625 
 626 // ---------------------------------------------------------------------------
 627 // Read the array of BasicTypes from a signature, and compute where the
 628 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
 629 // quantities. Values less than VMRegImpl::stack0 are registers, those above
 630 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
 631 // as framesizes are fixed.
 632 // VMRegImpl::stack0 refers to the first slot 0(sp).
 633 // VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Registers
 634 // up to RegisterImpl::number_of_registers are the 64-bit integer registers.
 635 
 636 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 637 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
 638 // units regardless of build.
 639 
 640 // The Java calling convention is a "shifted" version of the C ABI.
 641 // By skipping the first C ABI register we can call non-static jni methods
 642 // with small numbers of arguments without having to shuffle the arguments
 643 // at all. Since we control the java ABI we ought to at least get some
 644 // advantage out of it.
 645 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 646                                            VMRegPair *regs,
 647                                            int total_args_passed) {
 648   // c2c calling conventions for compiled-compiled calls.
 649 
 650   // An int/float occupies 1 slot here.
 651   const int inc_stk_for_intfloat   = 1; // 1 slots for ints and floats.
 652   const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles.
 653 
 654   const VMReg z_iarg_reg[5] = {
 655     Z_R2->as_VMReg(),
 656     Z_R3->as_VMReg(),
 657     Z_R4->as_VMReg(),
 658     Z_R5->as_VMReg(),
 659     Z_R6->as_VMReg()
 660   };
 661   const VMReg z_farg_reg[4] = {
 662     Z_F0->as_VMReg(),
 663     Z_F2->as_VMReg(),
 664     Z_F4->as_VMReg(),
 665     Z_F6->as_VMReg()
 666   };
 667   const int z_num_iarg_registers = sizeof(z_iarg_reg) / sizeof(z_iarg_reg[0]);
 668   const int z_num_farg_registers = sizeof(z_farg_reg) / sizeof(z_farg_reg[0]);
 669 
 670   assert(RegisterImpl::number_of_arg_registers == z_num_iarg_registers, "iarg reg count mismatch");
 671   assert(FloatRegisterImpl::number_of_arg_registers == z_num_farg_registers, "farg reg count mismatch");
 672 
 673   int i;
 674   int stk = 0;
 675   int ireg = 0;
 676   int freg = 0;
 677 
 678   for (int i = 0; i < total_args_passed; ++i) {
 679     switch (sig_bt[i]) {
 680       case T_BOOLEAN:
 681       case T_CHAR:
 682       case T_BYTE:
 683       case T_SHORT:
 684       case T_INT:
 685         if (ireg < z_num_iarg_registers) {
 686           // Put int/ptr in register.
 687           regs[i].set1(z_iarg_reg[ireg]);
 688           ++ireg;
 689         } else {
 690           // Put int/ptr on stack.
 691           regs[i].set1(VMRegImpl::stack2reg(stk));
 692           stk += inc_stk_for_intfloat;
 693         }
 694         break;
 695       case T_LONG:
 696         assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half");
 697         if (ireg < z_num_iarg_registers) {
 698           // Put long in register.
 699           regs[i].set2(z_iarg_reg[ireg]);
 700           ++ireg;
 701         } else {
 702           // Put long on stack and align to 2 slots.
 703           if (stk & 0x1) { ++stk; }
 704           regs[i].set2(VMRegImpl::stack2reg(stk));
 705           stk += inc_stk_for_longdouble;
 706         }
 707         break;
 708       case T_OBJECT:
 709       case T_ARRAY:
 710       case T_ADDRESS:
 711         if (ireg < z_num_iarg_registers) {
 712           // Put ptr in register.
 713           regs[i].set2(z_iarg_reg[ireg]);
 714           ++ireg;
 715         } else {
 716           // Put ptr on stack and align to 2 slots, because
 717           // "64-bit pointers record oop-ishness on 2 aligned adjacent
 718           // registers." (see OopFlow::build_oop_map).
 719           if (stk & 0x1) { ++stk; }
 720           regs[i].set2(VMRegImpl::stack2reg(stk));
 721           stk += inc_stk_for_longdouble;
 722         }
 723         break;
 724       case T_FLOAT:
 725         if (freg < z_num_farg_registers) {
 726           // Put float in register.
 727           regs[i].set1(z_farg_reg[freg]);
 728           ++freg;
 729         } else {
 730           // Put float on stack.
 731           regs[i].set1(VMRegImpl::stack2reg(stk));
 732           stk += inc_stk_for_intfloat;
 733         }
 734         break;
 735       case T_DOUBLE:
 736         assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half");
 737         if (freg < z_num_farg_registers) {
 738           // Put double in register.
 739           regs[i].set2(z_farg_reg[freg]);
 740           ++freg;
 741         } else {
 742           // Put double on stack and align to 2 slots.
 743           if (stk & 0x1) { ++stk; }
 744           regs[i].set2(VMRegImpl::stack2reg(stk));
 745           stk += inc_stk_for_longdouble;
 746         }
 747         break;
 748       case T_VOID:
 749         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 750         // Do not count halves.
 751         regs[i].set_bad();
 752         break;
 753       default:
 754         ShouldNotReachHere();
 755     }
 756   }
 757   return align_up(stk, 2);
 758 }
 759 
 760 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 761                                         VMRegPair *regs,
 762                                         VMRegPair *regs2,
 763                                         int total_args_passed) {
 764   assert(regs2 == NULL, "second VMRegPair array not used on this platform");
 765 
 766   // Calling conventions for C runtime calls and calls to JNI native methods.
 767   const VMReg z_iarg_reg[5] = {
 768     Z_R2->as_VMReg(),
 769     Z_R3->as_VMReg(),
 770     Z_R4->as_VMReg(),
 771     Z_R5->as_VMReg(),
 772     Z_R6->as_VMReg()
 773   };
 774   const VMReg z_farg_reg[4] = {
 775     Z_F0->as_VMReg(),
 776     Z_F2->as_VMReg(),
 777     Z_F4->as_VMReg(),
 778     Z_F6->as_VMReg()
 779   };
 780   const int z_num_iarg_registers = sizeof(z_iarg_reg) / sizeof(z_iarg_reg[0]);
 781   const int z_num_farg_registers = sizeof(z_farg_reg) / sizeof(z_farg_reg[0]);
 782 
 783   // Check calling conventions consistency.
 784   assert(RegisterImpl::number_of_arg_registers == z_num_iarg_registers, "iarg reg count mismatch");
 785   assert(FloatRegisterImpl::number_of_arg_registers == z_num_farg_registers, "farg reg count mismatch");
 786 
 787   // Avoid passing C arguments in the wrong stack slots.
 788 
 789   // 'Stk' counts stack slots. Due to alignment, 32 bit values occupy
 790   // 2 such slots, like 64 bit values do.
 791   const int inc_stk_for_intfloat   = 2; // 2 slots for ints and floats.
 792   const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles.
 793 
 794   int i;
 795   // Leave room for C-compatible ABI
 796   int stk = (frame::z_abi_160_size - frame::z_jit_out_preserve_size) / VMRegImpl::stack_slot_size;
 797   int freg = 0;
 798   int ireg = 0;
 799 
 800   // We put the first 5 arguments into registers and the rest on the
 801   // stack. Float arguments are already in their argument registers
 802   // due to c2c calling conventions (see calling_convention).
 803   for (int i = 0; i < total_args_passed; ++i) {
 804     switch (sig_bt[i]) {
 805       case T_BOOLEAN:
 806       case T_CHAR:
 807       case T_BYTE:
 808       case T_SHORT:
 809       case T_INT:
 810         // Fall through, handle as long.
 811       case T_LONG:
 812       case T_OBJECT:
 813       case T_ARRAY:
 814       case T_ADDRESS:
 815       case T_METADATA:
 816         // Oops are already boxed if required (JNI).
 817         if (ireg < z_num_iarg_registers) {
 818           regs[i].set2(z_iarg_reg[ireg]);
 819           ++ireg;
 820         } else {
 821           regs[i].set2(VMRegImpl::stack2reg(stk));
 822           stk += inc_stk_for_longdouble;
 823         }
 824         break;
 825       case T_FLOAT:
 826         if (freg < z_num_farg_registers) {
 827           regs[i].set1(z_farg_reg[freg]);
 828           ++freg;
 829         } else {
 830           regs[i].set1(VMRegImpl::stack2reg(stk+1));
 831           stk +=  inc_stk_for_intfloat;
 832         }
 833         break;
 834       case T_DOUBLE:
 835         assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half");
 836         if (freg < z_num_farg_registers) {
 837           regs[i].set2(z_farg_reg[freg]);
 838           ++freg;
 839         } else {
 840           // Put double on stack.
 841           regs[i].set2(VMRegImpl::stack2reg(stk));
 842           stk += inc_stk_for_longdouble;
 843         }
 844         break;
 845       case T_VOID:
 846         // Do not count halves.
 847         regs[i].set_bad();
 848         break;
 849       default:
 850         ShouldNotReachHere();
 851     }
 852   }
 853   return align_up(stk, 2);
 854 }
 855 
 856 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
 857                                              uint num_bits,
 858                                              uint total_args_passed) {
 859   Unimplemented();
 860   return 0;
 861 }
 862 
 863 ////////////////////////////////////////////////////////////////////////
 864 //
 865 //  Argument shufflers
 866 //
 867 ////////////////////////////////////////////////////////////////////////
 868 
 869 //----------------------------------------------------------------------
 870 // The java_calling_convention describes stack locations as ideal slots on
 871 // a frame with no abi restrictions. Since we must observe abi restrictions
 872 // (like the placement of the register window) the slots must be biased by
 873 // the following value.
 874 //----------------------------------------------------------------------
 875 static int reg2slot(VMReg r) {
 876   return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();
 877 }
 878 
 879 static int reg2offset(VMReg r) {
 880   return reg2slot(r) * VMRegImpl::stack_slot_size;
 881 }
 882 
 883 static void verify_oop_args(MacroAssembler *masm,
 884                             int total_args_passed,
 885                             const BasicType *sig_bt,
 886                             const VMRegPair *regs) {
 887   if (!VerifyOops) { return; }
 888 
 889   for (int i = 0; i < total_args_passed; i++) {
 890     if (is_reference_type(sig_bt[i])) {
 891       VMReg r = regs[i].first();
 892       assert(r->is_valid(), "bad oop arg");
 893 
 894       if (r->is_stack()) {
 895         __ z_lg(Z_R0_scratch,
 896                 Address(Z_SP, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
 897         __ verify_oop(Z_R0_scratch, FILE_AND_LINE);
 898       } else {
 899         __ verify_oop(r->as_Register(), FILE_AND_LINE);
 900       }
 901     }
 902   }
 903 }
 904 
 905 static void gen_special_dispatch(MacroAssembler *masm,
 906                                  int total_args_passed,
 907                                  vmIntrinsics::ID special_dispatch,
 908                                  const BasicType *sig_bt,
 909                                  const VMRegPair *regs) {
 910   verify_oop_args(masm, total_args_passed, sig_bt, regs);
 911 
 912   // Now write the args into the outgoing interpreter space.
 913   bool     has_receiver   = false;
 914   Register receiver_reg   = noreg;
 915   int      member_arg_pos = -1;
 916   Register member_reg     = noreg;
 917   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch);
 918 
 919   if (ref_kind != 0) {
 920     member_arg_pos = total_args_passed - 1;  // trailing MemberName argument
 921     member_reg = Z_R9;                       // Known to be free at this point.
 922     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
 923   } else {
 924     guarantee(special_dispatch == vmIntrinsics::_invokeBasic || special_dispatch == vmIntrinsics::_linkToNative,
 925               "special_dispatch=%d", vmIntrinsics::as_int(special_dispatch));
 926     has_receiver = true;
 927   }
 928 
 929   if (member_reg != noreg) {
 930     // Load the member_arg into register, if necessary.
 931     assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob");
 932     assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object");
 933 
 934     VMReg r = regs[member_arg_pos].first();
 935     assert(r->is_valid(), "bad member arg");
 936 
 937     if (r->is_stack()) {
 938       __ z_lg(member_reg, Address(Z_SP, reg2offset(r)));
 939     } else {
 940       // No data motion is needed.
 941       member_reg = r->as_Register();
 942     }
 943   }
 944 
 945   if (has_receiver) {
 946     // Make sure the receiver is loaded into a register.
 947     assert(total_args_passed > 0, "oob");
 948     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
 949 
 950     VMReg r = regs[0].first();
 951     assert(r->is_valid(), "bad receiver arg");
 952 
 953     if (r->is_stack()) {
 954       // Porting note: This assumes that compiled calling conventions always
 955       // pass the receiver oop in a register. If this is not true on some
 956       // platform, pick a temp and load the receiver from stack.
 957       assert(false, "receiver always in a register");
 958       receiver_reg = Z_R13;  // Known to be free at this point.
 959       __ z_lg(receiver_reg, Address(Z_SP, reg2offset(r)));
 960     } else {
 961       // No data motion is needed.
 962       receiver_reg = r->as_Register();
 963     }
 964   }
 965 
 966   // Figure out which address we are really jumping to:
 967   MethodHandles::generate_method_handle_dispatch(masm, special_dispatch,
 968                                                  receiver_reg, member_reg,
 969                                                  /*for_compiler_entry:*/ true);
 970 }
 971 
 972 ////////////////////////////////////////////////////////////////////////
 973 //
 974 //  Argument shufflers
 975 //
 976 ////////////////////////////////////////////////////////////////////////
 977 
 978 // Is the size of a vector size (in bytes) bigger than a size saved by default?
 979 // 8 bytes registers are saved by default on z/Architecture.
 980 bool SharedRuntime::is_wide_vector(int size) {
 981   // Note, MaxVectorSize == 8 on this platform.
 982   assert(size <= 8, "%d bytes vectors are not supported", size);
 983   return size > 8;
 984 }
 985 
 986 //----------------------------------------------------------------------
 987 // An oop arg. Must pass a handle not the oop itself
 988 //----------------------------------------------------------------------
 989 static void object_move(MacroAssembler *masm,
 990                         OopMap *map,
 991                         int oop_handle_offset,
 992                         int framesize_in_slots,
 993                         VMRegPair src,
 994                         VMRegPair dst,
 995                         bool is_receiver,
 996                         int *receiver_offset) {
 997   int frame_offset = framesize_in_slots*VMRegImpl::stack_slot_size;
 998 
 999   assert(!is_receiver || (is_receiver && (*receiver_offset == -1)), "only one receiving object per call, please.");
1000 
1001   // Must pass a handle. First figure out the location we use as a handle.
1002 
1003   if (src.first()->is_stack()) {
1004     // Oop is already on the stack, put handle on stack or in register
1005     // If handle will be on the stack, use temp reg to calculate it.
1006     Register rHandle = dst.first()->is_stack() ? Z_R1 : dst.first()->as_Register();
1007     Label    skip;
1008     int      slot_in_older_frame = reg2slot(src.first());
1009 
1010     guarantee(!is_receiver, "expecting receiver in register");
1011     map->set_oop(VMRegImpl::stack2reg(slot_in_older_frame + framesize_in_slots));
1012 
1013     __ add2reg(rHandle, reg2offset(src.first())+frame_offset, Z_SP);
1014     __ load_and_test_long(Z_R0, Address(rHandle));
1015     __ z_brne(skip);
1016     // Use a NULL handle if oop is NULL.
1017     __ clear_reg(rHandle, true, false);
1018     __ bind(skip);
1019 
1020     // Copy handle to the right place (register or stack).
1021     if (dst.first()->is_stack()) {
1022       __ z_stg(rHandle, reg2offset(dst.first()), Z_SP);
1023     } // else
1024       // nothing to do. rHandle uses the correct register
1025   } else {
1026     // Oop is passed in an input register. We must flush it to the stack.
1027     const Register rOop = src.first()->as_Register();
1028     const Register rHandle = dst.first()->is_stack() ? Z_R1 : dst.first()->as_Register();
1029     int            oop_slot = (rOop->encoding()-Z_ARG1->encoding()) * VMRegImpl::slots_per_word + oop_handle_offset;
1030     int            oop_slot_offset = oop_slot*VMRegImpl::stack_slot_size;
1031     NearLabel skip;
1032 
1033     if (is_receiver) {
1034       *receiver_offset = oop_slot_offset;
1035     }
1036     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1037 
1038     // Flush Oop to stack, calculate handle.
1039     __ z_stg(rOop, oop_slot_offset, Z_SP);
1040     __ add2reg(rHandle, oop_slot_offset, Z_SP);
1041 
1042     // If Oop == NULL, use a NULL handle.
1043     __ compare64_and_branch(rOop, (RegisterOrConstant)0L, Assembler::bcondNotEqual, skip);
1044     __ clear_reg(rHandle, true, false);
1045     __ bind(skip);
1046 
1047     // Copy handle to the right place (register or stack).
1048     if (dst.first()->is_stack()) {
1049       __ z_stg(rHandle, reg2offset(dst.first()), Z_SP);
1050     } // else
1051       // nothing to do here, since rHandle = dst.first()->as_Register in this case.
1052   }
1053 }
1054 
1055 //----------------------------------------------------------------------
1056 // A float arg. May have to do float reg to int reg conversion
1057 //----------------------------------------------------------------------
1058 static void float_move(MacroAssembler *masm,
1059                        VMRegPair src,
1060                        VMRegPair dst,
1061                        int framesize_in_slots,
1062                        int workspace_slot_offset) {
1063   int frame_offset = framesize_in_slots * VMRegImpl::stack_slot_size;
1064   int workspace_offset = workspace_slot_offset * VMRegImpl::stack_slot_size;
1065 
1066   // We do not accept an argument in a VMRegPair to be spread over two slots,
1067   // no matter what physical location (reg or stack) the slots may have.
1068   // We just check for the unaccepted slot to be invalid.
1069   assert(!src.second()->is_valid(), "float in arg spread over two slots");
1070   assert(!dst.second()->is_valid(), "float out arg spread over two slots");
1071 
1072   if (src.first()->is_stack()) {
1073     if (dst.first()->is_stack()) {
1074       // stack -> stack. The easiest of the bunch.
1075       __ z_mvc(Address(Z_SP, reg2offset(dst.first())),
1076                Address(Z_SP, reg2offset(src.first()) + frame_offset), sizeof(float));
1077     } else {
1078       // stack to reg
1079       Address memaddr(Z_SP, reg2offset(src.first()) + frame_offset);
1080       if (dst.first()->is_Register()) {
1081         __ mem2reg_opt(dst.first()->as_Register(), memaddr, false);
1082       } else {
1083         __ mem2freg_opt(dst.first()->as_FloatRegister(), memaddr, false);
1084       }
1085     }
1086   } else if (src.first()->is_Register()) {
1087     if (dst.first()->is_stack()) {
1088       // gpr -> stack
1089       __ reg2mem_opt(src.first()->as_Register(),
1090                      Address(Z_SP, reg2offset(dst.first()), false ));
1091     } else {
1092       if (dst.first()->is_Register()) {
1093         // gpr -> gpr
1094         __ move_reg_if_needed(dst.first()->as_Register(), T_INT,
1095                               src.first()->as_Register(), T_INT);
1096       } else {
1097         if (VM_Version::has_FPSupportEnhancements()) {
1098           // gpr -> fpr. Exploit z10 capability of direct transfer.
1099           __ z_ldgr(dst.first()->as_FloatRegister(), src.first()->as_Register());
1100         } else {
1101           // gpr -> fpr. Use work space on stack to transfer data.
1102           Address   stackaddr(Z_SP, workspace_offset);
1103 
1104           __ reg2mem_opt(src.first()->as_Register(), stackaddr, false);
1105           __ mem2freg_opt(dst.first()->as_FloatRegister(), stackaddr, false);
1106         }
1107       }
1108     }
1109   } else {
1110     if (dst.first()->is_stack()) {
1111       // fpr -> stack
1112       __ freg2mem_opt(src.first()->as_FloatRegister(),
1113                       Address(Z_SP, reg2offset(dst.first())), false);
1114     } else {
1115       if (dst.first()->is_Register()) {
1116         if (VM_Version::has_FPSupportEnhancements()) {
1117           // fpr -> gpr.
1118           __ z_lgdr(dst.first()->as_Register(), src.first()->as_FloatRegister());
1119         } else {
1120           // fpr -> gpr. Use work space on stack to transfer data.
1121           Address   stackaddr(Z_SP, workspace_offset);
1122 
1123           __ freg2mem_opt(src.first()->as_FloatRegister(), stackaddr, false);
1124           __ mem2reg_opt(dst.first()->as_Register(), stackaddr, false);
1125         }
1126       } else {
1127         // fpr -> fpr
1128         __ move_freg_if_needed(dst.first()->as_FloatRegister(), T_FLOAT,
1129                                src.first()->as_FloatRegister(), T_FLOAT);
1130       }
1131     }
1132   }
1133 }
1134 
1135 //----------------------------------------------------------------------
1136 // A double arg. May have to do double reg to long reg conversion
1137 //----------------------------------------------------------------------
1138 static void double_move(MacroAssembler *masm,
1139                         VMRegPair src,
1140                         VMRegPair dst,
1141                         int framesize_in_slots,
1142                         int workspace_slot_offset) {
1143   int frame_offset = framesize_in_slots*VMRegImpl::stack_slot_size;
1144   int workspace_offset = workspace_slot_offset*VMRegImpl::stack_slot_size;
1145 
1146   // Since src is always a java calling convention we know that the
1147   // src pair is always either all registers or all stack (and aligned?)
1148 
1149   if (src.first()->is_stack()) {
1150     if (dst.first()->is_stack()) {
1151       // stack -> stack. The easiest of the bunch.
1152       __ z_mvc(Address(Z_SP, reg2offset(dst.first())),
1153                Address(Z_SP, reg2offset(src.first()) + frame_offset), sizeof(double));
1154     } else {
1155       // stack to reg
1156       Address stackaddr(Z_SP, reg2offset(src.first()) + frame_offset);
1157 
1158       if (dst.first()->is_Register()) {
1159         __ mem2reg_opt(dst.first()->as_Register(), stackaddr);
1160       } else {
1161         __ mem2freg_opt(dst.first()->as_FloatRegister(), stackaddr);
1162       }
1163     }
1164   } else if (src.first()->is_Register()) {
1165     if (dst.first()->is_stack()) {
1166       // gpr -> stack
1167       __ reg2mem_opt(src.first()->as_Register(),
1168                      Address(Z_SP, reg2offset(dst.first())));
1169     } else {
1170       if (dst.first()->is_Register()) {
1171         // gpr -> gpr
1172         __ move_reg_if_needed(dst.first()->as_Register(), T_LONG,
1173                               src.first()->as_Register(), T_LONG);
1174       } else {
1175         if (VM_Version::has_FPSupportEnhancements()) {
1176           // gpr -> fpr. Exploit z10 capability of direct transfer.
1177           __ z_ldgr(dst.first()->as_FloatRegister(), src.first()->as_Register());
1178         } else {
1179           // gpr -> fpr. Use work space on stack to transfer data.
1180           Address stackaddr(Z_SP, workspace_offset);
1181           __ reg2mem_opt(src.first()->as_Register(), stackaddr);
1182           __ mem2freg_opt(dst.first()->as_FloatRegister(), stackaddr);
1183         }
1184       }
1185     }
1186   } else {
1187     if (dst.first()->is_stack()) {
1188       // fpr -> stack
1189       __ freg2mem_opt(src.first()->as_FloatRegister(),
1190                       Address(Z_SP, reg2offset(dst.first())));
1191     } else {
1192       if (dst.first()->is_Register()) {
1193         if (VM_Version::has_FPSupportEnhancements()) {
1194           // fpr -> gpr. Exploit z10 capability of direct transfer.
1195           __ z_lgdr(dst.first()->as_Register(), src.first()->as_FloatRegister());
1196         } else {
1197           // fpr -> gpr. Use work space on stack to transfer data.
1198           Address stackaddr(Z_SP, workspace_offset);
1199 
1200           __ freg2mem_opt(src.first()->as_FloatRegister(), stackaddr);
1201           __ mem2reg_opt(dst.first()->as_Register(), stackaddr);
1202         }
1203       } else {
1204         // fpr -> fpr
1205         // In theory these overlap but the ordering is such that this is likely a nop.
1206         __ move_freg_if_needed(dst.first()->as_FloatRegister(), T_DOUBLE,
1207                                src.first()->as_FloatRegister(), T_DOUBLE);
1208       }
1209     }
1210   }
1211 }
1212 
1213 //----------------------------------------------------------------------
1214 // A long arg.
1215 //----------------------------------------------------------------------
1216 static void long_move(MacroAssembler *masm,
1217                       VMRegPair src,
1218                       VMRegPair dst,
1219                       int framesize_in_slots) {
1220   int frame_offset = framesize_in_slots*VMRegImpl::stack_slot_size;
1221 
1222   if (src.first()->is_stack()) {
1223     if (dst.first()->is_stack()) {
1224       // stack -> stack. The easiest of the bunch.
1225       __ z_mvc(Address(Z_SP, reg2offset(dst.first())),
1226                Address(Z_SP, reg2offset(src.first()) + frame_offset), sizeof(long));
1227     } else {
1228       // stack to reg
1229       assert(dst.first()->is_Register(), "long dst value must be in GPR");
1230       __ mem2reg_opt(dst.first()->as_Register(),
1231                       Address(Z_SP, reg2offset(src.first()) + frame_offset));
1232     }
1233   } else {
1234     // reg to reg
1235     assert(src.first()->is_Register(), "long src value must be in GPR");
1236     if (dst.first()->is_stack()) {
1237       // reg -> stack
1238       __ reg2mem_opt(src.first()->as_Register(),
1239                      Address(Z_SP, reg2offset(dst.first())));
1240     } else {
1241       // reg -> reg
1242       assert(dst.first()->is_Register(), "long dst value must be in GPR");
1243       __ move_reg_if_needed(dst.first()->as_Register(),
1244                             T_LONG, src.first()->as_Register(), T_LONG);
1245     }
1246   }
1247 }
1248 
1249 
1250 //----------------------------------------------------------------------
1251 // A int-like arg.
1252 //----------------------------------------------------------------------
1253 // On z/Architecture we will store integer like items to the stack as 64 bit
1254 // items, according to the z/Architecture ABI, even though Java would only store
1255 // 32 bits for a parameter.
1256 // We do sign extension for all base types. That is ok since the only
1257 // unsigned base type is T_CHAR, and T_CHAR uses only 16 bits of an int.
1258 // Sign extension 32->64 bit will thus not affect the value.
1259 //----------------------------------------------------------------------
1260 static void move32_64(MacroAssembler *masm,
1261                       VMRegPair src,
1262                       VMRegPair dst,
1263                       int framesize_in_slots) {
1264   int frame_offset = framesize_in_slots * VMRegImpl::stack_slot_size;
1265 
1266   if (src.first()->is_stack()) {
1267     Address memaddr(Z_SP, reg2offset(src.first()) + frame_offset);
1268     if (dst.first()->is_stack()) {
1269       // stack -> stack. MVC not possible due to sign extension.
1270       Address firstaddr(Z_SP, reg2offset(dst.first()));
1271       __ mem2reg_signed_opt(Z_R0_scratch, memaddr);
1272       __ reg2mem_opt(Z_R0_scratch, firstaddr);
1273     } else {
1274       // stack -> reg, sign extended
1275       __ mem2reg_signed_opt(dst.first()->as_Register(), memaddr);
1276     }
1277   } else {
1278     if (dst.first()->is_stack()) {
1279       // reg -> stack, sign extended
1280       Address firstaddr(Z_SP, reg2offset(dst.first()));
1281       __ z_lgfr(src.first()->as_Register(), src.first()->as_Register());
1282       __ reg2mem_opt(src.first()->as_Register(), firstaddr);
1283     } else {
1284       // reg -> reg, sign extended
1285       __ z_lgfr(dst.first()->as_Register(), src.first()->as_Register());
1286     }
1287   }
1288 }
1289 
1290 //----------------------------------------------------------------------
1291 // Wrap a JNI call.
1292 //----------------------------------------------------------------------
1293 #undef USE_RESIZE_FRAME
1294 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1295                                                 const methodHandle& method,
1296                                                 int compile_id,
1297                                                 BasicType *in_sig_bt,
1298                                                 VMRegPair *in_regs,
1299                                                 BasicType ret_type) {
1300   int total_in_args = method->size_of_parameters();
1301   if (method->is_method_handle_intrinsic()) {
1302     vmIntrinsics::ID iid = method->intrinsic_id();
1303     intptr_t start = (intptr_t) __ pc();
1304     int vep_offset = ((intptr_t) __ pc()) - start;
1305 
1306     gen_special_dispatch(masm, total_in_args,
1307                          method->intrinsic_id(), in_sig_bt, in_regs);
1308 
1309     int frame_complete = ((intptr_t)__ pc()) - start; // Not complete, period.
1310 
1311     __ flush();
1312 
1313     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // No out slots at all, actually.
1314 
1315     return nmethod::new_native_nmethod(method,
1316                                        compile_id,
1317                                        masm->code(),
1318                                        vep_offset,
1319                                        frame_complete,
1320                                        stack_slots / VMRegImpl::slots_per_word,
1321                                        in_ByteSize(-1),
1322                                        in_ByteSize(-1),
1323                                        (OopMapSet *) NULL);
1324   }
1325 
1326 
1327   ///////////////////////////////////////////////////////////////////////
1328   //
1329   //  Precalculations before generating any code
1330   //
1331   ///////////////////////////////////////////////////////////////////////
1332 
1333   address native_func = method->native_function();
1334   assert(native_func != NULL, "must have function");
1335 
1336   //---------------------------------------------------------------------
1337   // We have received a description of where all the java args are located
1338   // on entry to the wrapper. We need to convert these args to where
1339   // the jni function will expect them. To figure out where they go
1340   // we convert the java signature to a C signature by inserting
1341   // the hidden arguments as arg[0] and possibly arg[1] (static method).
1342   //
1343   // The first hidden argument arg[0] is a pointer to the JNI environment.
1344   // It is generated for every call.
1345   // The second argument arg[1] to the JNI call, which is hidden for static
1346   // methods, is the boxed lock object. For static calls, the lock object
1347   // is the static method itself. The oop is constructed here. for instance
1348   // calls, the lock is performed on the object itself, the pointer of
1349   // which is passed as the first visible argument.
1350   //---------------------------------------------------------------------
1351 
1352   // Additionally, on z/Architecture we must convert integers
1353   // to longs in the C signature. We do this in advance in order to have
1354   // no trouble with indexes into the bt-arrays.
1355   // So convert the signature and registers now, and adjust the total number
1356   // of in-arguments accordingly.
1357   bool method_is_static = method->is_static();
1358   int  total_c_args     = total_in_args + (method_is_static ? 2 : 1);
1359 
1360   BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1361   VMRegPair *out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1362   BasicType* in_elem_bt = NULL;
1363 
1364   // Create the signature for the C call:
1365   //   1) add the JNIEnv*
1366   //   2) add the class if the method is static
1367   //   3) copy the rest of the incoming signature (shifted by the number of
1368   //      hidden arguments)
1369 
1370   int argc = 0;
1371   out_sig_bt[argc++] = T_ADDRESS;
1372   if (method->is_static()) {
1373     out_sig_bt[argc++] = T_OBJECT;
1374   }
1375 
1376   for (int i = 0; i < total_in_args; i++) {
1377     out_sig_bt[argc++] = in_sig_bt[i];
1378   }
1379 
1380   ///////////////////////////////////////////////////////////////////////
1381   // Now figure out where the args must be stored and how much stack space
1382   // they require (neglecting out_preserve_stack_slots but providing space
1383   // for storing the first five register arguments).
1384   // It's weird, see int_stk_helper.
1385   ///////////////////////////////////////////////////////////////////////
1386 
1387   //---------------------------------------------------------------------
1388   // Compute framesize for the wrapper.
1389   //
1390   // - We need to handlize all oops passed in registers.
1391   // - We must create space for them here that is disjoint from the save area.
1392   // - We always just allocate 5 words for storing down these object.
1393   //   This allows us to simply record the base and use the Ireg number to
1394   //   decide which slot to use.
1395   // - Note that the reg number used to index the stack slot is the inbound
1396   //   number, not the outbound number.
1397   // - We must shuffle args to match the native convention,
1398   //   and to include var-args space.
1399   //---------------------------------------------------------------------
1400 
1401   //---------------------------------------------------------------------
1402   // Calculate the total number of stack slots we will need:
1403   // - 1) abi requirements
1404   // - 2) outgoing args
1405   // - 3) space for inbound oop handle area
1406   // - 4) space for handlizing a klass if static method
1407   // - 5) space for a lock if synchronized method
1408   // - 6) workspace (save rtn value, int<->float reg moves, ...)
1409   // - 7) filler slots for alignment
1410   //---------------------------------------------------------------------
1411   // Here is how the space we have allocated will look like.
1412   // Since we use resize_frame, we do not create a new stack frame,
1413   // but just extend the one we got with our own data area.
1414   //
1415   // If an offset or pointer name points to a separator line, it is
1416   // assumed that addressing with offset 0 selects storage starting
1417   // at the first byte above the separator line.
1418   //
1419   //
1420   //     ...                   ...
1421   //      | caller's frame      |
1422   // FP-> |---------------------|
1423   //      | filler slots, if any|
1424   //     7| #slots == mult of 2 |
1425   //      |---------------------|
1426   //      | work space          |
1427   //     6| 2 slots = 8 bytes   |
1428   //      |---------------------|
1429   //     5| lock box (if sync)  |
1430   //      |---------------------| <- lock_slot_offset
1431   //     4| klass (if static)   |
1432   //      |---------------------| <- klass_slot_offset
1433   //     3| oopHandle area      |
1434   //      |                     |
1435   //      |                     |
1436   //      |---------------------| <- oop_handle_offset
1437   //     2| outbound memory     |
1438   //     ...                   ...
1439   //      | based arguments     |
1440   //      |---------------------|
1441   //      | vararg              |
1442   //     ...                   ...
1443   //      | area                |
1444   //      |---------------------| <- out_arg_slot_offset
1445   //     1| out_preserved_slots |
1446   //     ...                   ...
1447   //      | (z_abi spec)        |
1448   // SP-> |---------------------| <- FP_slot_offset (back chain)
1449   //     ...                   ...
1450   //
1451   //---------------------------------------------------------------------
1452 
1453   // *_slot_offset indicates offset from SP in #stack slots
1454   // *_offset      indicates offset from SP in #bytes
1455 
1456   int stack_slots = c_calling_convention(out_sig_bt, out_regs, /*regs2=*/NULL, total_c_args) + // 1+2
1457                     SharedRuntime::out_preserve_stack_slots(); // see c_calling_convention
1458 
1459   // Now the space for the inbound oop handle area.
1460   int total_save_slots = RegisterImpl::number_of_arg_registers * VMRegImpl::slots_per_word;
1461 
1462   int oop_handle_slot_offset = stack_slots;
1463   stack_slots += total_save_slots;                                        // 3)
1464 
1465   int klass_slot_offset = 0;
1466   int klass_offset      = -1;
1467   if (method_is_static) {                                                 // 4)
1468     klass_slot_offset  = stack_slots;
1469     klass_offset       = klass_slot_offset * VMRegImpl::stack_slot_size;
1470     stack_slots       += VMRegImpl::slots_per_word;
1471   }
1472 
1473   int lock_slot_offset = 0;
1474   int lock_offset      = -1;
1475   if (method->is_synchronized()) {                                        // 5)
1476     lock_slot_offset   = stack_slots;
1477     lock_offset        = lock_slot_offset * VMRegImpl::stack_slot_size;
1478     stack_slots       += VMRegImpl::slots_per_word;
1479   }
1480 
1481   int workspace_slot_offset= stack_slots;                                 // 6)
1482   stack_slots         += 2;
1483 
1484   // Now compute actual number of stack words we need.
1485   // Round to align stack properly.
1486   stack_slots = align_up(stack_slots,                                     // 7)
1487                          frame::alignment_in_bytes / VMRegImpl::stack_slot_size);
1488   int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size;
1489 
1490 
1491   ///////////////////////////////////////////////////////////////////////
1492   // Now we can start generating code
1493   ///////////////////////////////////////////////////////////////////////
1494 
1495   unsigned int wrapper_CodeStart  = __ offset();
1496   unsigned int wrapper_UEPStart;
1497   unsigned int wrapper_VEPStart;
1498   unsigned int wrapper_FrameDone;
1499   unsigned int wrapper_CRegsSet;
1500   Label     handle_pending_exception;
1501   Label     ic_miss;
1502 
1503   //---------------------------------------------------------------------
1504   // Unverified entry point (UEP)
1505   //---------------------------------------------------------------------
1506   wrapper_UEPStart = __ offset();
1507 
1508   // check ic: object class <-> cached class
1509   if (!method_is_static) __ nmethod_UEP(ic_miss);
1510   // Fill with nops (alignment of verified entry point).
1511   __ align(CodeEntryAlignment);
1512 
1513   //---------------------------------------------------------------------
1514   // Verified entry point (VEP)
1515   //---------------------------------------------------------------------
1516   wrapper_VEPStart = __ offset();
1517 
1518   if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1519     Label L_skip_barrier;
1520     Register klass = Z_R1_scratch;
1521     // Notify OOP recorder (don't need the relocation)
1522     AddressLiteral md = __ constant_metadata_address(method->method_holder());
1523     __ load_const_optimized(klass, md.value());
1524     __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/);
1525 
1526     __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub());
1527     __ z_br(klass);
1528 
1529     __ bind(L_skip_barrier);
1530   }
1531 
1532   __ save_return_pc();
1533   __ generate_stack_overflow_check(frame_size_in_bytes);  // Check before creating frame.
1534 #ifndef USE_RESIZE_FRAME
1535   __ push_frame(frame_size_in_bytes);                     // Create a new frame for the wrapper.
1536 #else
1537   __ resize_frame(-frame_size_in_bytes, Z_R0_scratch);    // No new frame for the wrapper.
1538                                                           // Just resize the existing one.
1539 #endif
1540 
1541   wrapper_FrameDone = __ offset();
1542 
1543   __ verify_thread();
1544 
1545   // Native nmethod wrappers never take possession of the oop arguments.
1546   // So the caller will gc the arguments.
1547   // The only thing we need an oopMap for is if the call is static.
1548   //
1549   // An OopMap for lock (and class if static), and one for the VM call itself
1550   OopMapSet  *oop_maps        = new OopMapSet();
1551   OopMap     *map             = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1552 
1553   //////////////////////////////////////////////////////////////////////
1554   //
1555   // The Grand Shuffle
1556   //
1557   //////////////////////////////////////////////////////////////////////
1558   //
1559   // We immediately shuffle the arguments so that for any vm call we have
1560   // to make from here on out (sync slow path, jvmti, etc.) we will have
1561   // captured the oops from our caller and have a valid oopMap for them.
1562   //
1563   //--------------------------------------------------------------------
1564   // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1565   // (derived from JavaThread* which is in Z_thread) and, if static,
1566   // the class mirror instead of a receiver. This pretty much guarantees that
1567   // register layout will not match. We ignore these extra arguments during
1568   // the shuffle. The shuffle is described by the two calling convention
1569   // vectors we have in our possession. We simply walk the java vector to
1570   // get the source locations and the c vector to get the destinations.
1571   //
1572   // This is a trick. We double the stack slots so we can claim
1573   // the oops in the caller's frame. Since we are sure to have
1574   // more args than the caller doubling is enough to make
1575   // sure we can capture all the incoming oop args from the caller.
1576   //--------------------------------------------------------------------
1577 
1578   // Record sp-based slot for receiver on stack for non-static methods.
1579   int receiver_offset = -1;
1580 
1581   //--------------------------------------------------------------------
1582   // We move the arguments backwards because the floating point registers
1583   // destination will always be to a register with a greater or equal
1584   // register number or the stack.
1585   //   jix is the index of the incoming Java arguments.
1586   //   cix is the index of the outgoing C arguments.
1587   //--------------------------------------------------------------------
1588 
1589 #ifdef ASSERT
1590   bool reg_destroyed[RegisterImpl::number_of_registers];
1591   bool freg_destroyed[FloatRegisterImpl::number_of_registers];
1592   for (int r = 0; r < RegisterImpl::number_of_registers; r++) {
1593     reg_destroyed[r] = false;
1594   }
1595   for (int f = 0; f < FloatRegisterImpl::number_of_registers; f++) {
1596     freg_destroyed[f] = false;
1597   }
1598 #endif // ASSERT
1599 
1600   for (int jix = total_in_args - 1, cix = total_c_args - 1; jix >= 0; jix--, cix--) {
1601 #ifdef ASSERT
1602     if (in_regs[jix].first()->is_Register()) {
1603       assert(!reg_destroyed[in_regs[jix].first()->as_Register()->encoding()], "ack!");
1604     } else {
1605       if (in_regs[jix].first()->is_FloatRegister()) {
1606         assert(!freg_destroyed[in_regs[jix].first()->as_FloatRegister()->encoding()], "ack!");
1607       }
1608     }
1609     if (out_regs[cix].first()->is_Register()) {
1610       reg_destroyed[out_regs[cix].first()->as_Register()->encoding()] = true;
1611     } else {
1612       if (out_regs[cix].first()->is_FloatRegister()) {
1613         freg_destroyed[out_regs[cix].first()->as_FloatRegister()->encoding()] = true;
1614       }
1615     }
1616 #endif // ASSERT
1617 
1618     switch (in_sig_bt[jix]) {
1619       // Due to casting, small integers should only occur in pairs with type T_LONG.
1620       case T_BOOLEAN:
1621       case T_CHAR:
1622       case T_BYTE:
1623       case T_SHORT:
1624       case T_INT:
1625         // Move int and do sign extension.
1626         move32_64(masm, in_regs[jix], out_regs[cix], stack_slots);
1627         break;
1628 
1629       case T_LONG :
1630         long_move(masm, in_regs[jix], out_regs[cix], stack_slots);
1631         break;
1632 
1633       case T_ARRAY:
1634       case T_OBJECT:
1635         object_move(masm, map, oop_handle_slot_offset, stack_slots, in_regs[jix], out_regs[cix],
1636                     ((jix == 0) && (!method_is_static)),
1637                     &receiver_offset);
1638         break;
1639       case T_VOID:
1640         break;
1641 
1642       case T_FLOAT:
1643         float_move(masm, in_regs[jix], out_regs[cix], stack_slots, workspace_slot_offset);
1644         break;
1645 
1646       case T_DOUBLE:
1647         assert(jix+1 <  total_in_args && in_sig_bt[jix+1]  == T_VOID && out_sig_bt[cix+1] == T_VOID, "bad arg list");
1648         double_move(masm, in_regs[jix], out_regs[cix], stack_slots, workspace_slot_offset);
1649         break;
1650 
1651       case T_ADDRESS:
1652         assert(false, "found T_ADDRESS in java args");
1653         break;
1654 
1655       default:
1656         ShouldNotReachHere();
1657     }
1658   }
1659 
1660   //--------------------------------------------------------------------
1661   // Pre-load a static method's oop into ARG2.
1662   // Used both by locking code and the normal JNI call code.
1663   //--------------------------------------------------------------------
1664   if (method_is_static) {
1665     __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()), Z_ARG2);
1666 
1667     // Now handlize the static class mirror in ARG2. It's known not-null.
1668     __ z_stg(Z_ARG2, klass_offset, Z_SP);
1669     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1670     __ add2reg(Z_ARG2, klass_offset, Z_SP);
1671   }
1672 
1673   // Get JNIEnv* which is first argument to native.
1674   __ add2reg(Z_ARG1, in_bytes(JavaThread::jni_environment_offset()), Z_thread);
1675 
1676   //////////////////////////////////////////////////////////////////////
1677   // We have all of the arguments setup at this point.
1678   // We MUST NOT touch any outgoing regs from this point on.
1679   // So if we must call out we must push a new frame.
1680   //////////////////////////////////////////////////////////////////////
1681 
1682 
1683   // Calc the current pc into Z_R10 and into wrapper_CRegsSet.
1684   // Both values represent the same position.
1685   __ get_PC(Z_R10);                // PC into register
1686   wrapper_CRegsSet = __ offset();  // and into into variable.
1687 
1688   // Z_R10 now has the pc loaded that we will use when we finally call to native.
1689 
1690   // We use the same pc/oopMap repeatedly when we call out.
1691   oop_maps->add_gc_map((int)(wrapper_CRegsSet-wrapper_CodeStart), map);
1692 
1693   // Lock a synchronized method.
1694 
1695   if (method->is_synchronized()) {
1696 
1697     // ATTENTION: args and Z_R10 must be preserved.
1698     Register r_oop  = Z_R11;
1699     Register r_box  = Z_R12;
1700     Register r_tmp1 = Z_R13;
1701     Register r_tmp2 = Z_R7;
1702     Label done;
1703 
1704     // Load the oop for the object or class. R_carg2_classorobject contains
1705     // either the handlized oop from the incoming arguments or the handlized
1706     // class mirror (if the method is static).
1707     __ z_lg(r_oop, 0, Z_ARG2);
1708 
1709     lock_offset = (lock_slot_offset * VMRegImpl::stack_slot_size);
1710     // Get the lock box slot's address.
1711     __ add2reg(r_box, lock_offset, Z_SP);
1712 
1713     // Try fastpath for locking.
1714     // Fast_lock kills r_temp_1, r_temp_2. (Don't use R1 as temp, won't work!)
1715     __ compiler_fast_lock_object(r_oop, r_box, r_tmp1, r_tmp2);
1716     __ z_bre(done);
1717 
1718     //-------------------------------------------------------------------------
1719     // None of the above fast optimizations worked so we have to get into the
1720     // slow case of monitor enter. Inline a special case of call_VM that
1721     // disallows any pending_exception.
1722     //-------------------------------------------------------------------------
1723 
1724     Register oldSP = Z_R11;
1725 
1726     __ z_lgr(oldSP, Z_SP);
1727 
1728     RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers);
1729 
1730     // Prepare arguments for call.
1731     __ z_lg(Z_ARG1, 0, Z_ARG2); // Ynboxed class mirror or unboxed object.
1732     __ add2reg(Z_ARG2, lock_offset, oldSP);
1733     __ z_lgr(Z_ARG3, Z_thread);
1734 
1735     __ set_last_Java_frame(oldSP, Z_R10 /* gc map pc */);
1736 
1737     // Do the call.
1738     __ load_const_optimized(Z_R1_scratch, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C));
1739     __ call(Z_R1_scratch);
1740 
1741     __ reset_last_Java_frame();
1742 
1743     RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers);
1744 #ifdef ASSERT
1745     { Label L;
1746       __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset()));
1747       __ z_bre(L);
1748       __ stop("no pending exception allowed on exit from IR::monitorenter");
1749       __ bind(L);
1750     }
1751 #endif
1752     __ bind(done);
1753   } // lock for synchronized methods
1754 
1755 
1756   //////////////////////////////////////////////////////////////////////
1757   // Finally just about ready to make the JNI call.
1758   //////////////////////////////////////////////////////////////////////
1759 
1760   // Use that pc we placed in Z_R10 a while back as the current frame anchor.
1761   __ set_last_Java_frame(Z_SP, Z_R10);
1762 
1763   // Transition from _thread_in_Java to _thread_in_native.
1764   __ set_thread_state(_thread_in_native);
1765 
1766   //////////////////////////////////////////////////////////////////////
1767   // This is the JNI call.
1768   //////////////////////////////////////////////////////////////////////
1769 
1770   __ call_c(native_func);
1771 
1772 
1773   //////////////////////////////////////////////////////////////////////
1774   // We have survived the call once we reach here.
1775   //////////////////////////////////////////////////////////////////////
1776 
1777 
1778   //--------------------------------------------------------------------
1779   // Unpack native results.
1780   //--------------------------------------------------------------------
1781   // For int-types, we do any needed sign-extension required.
1782   // Care must be taken that the return value (in Z_ARG1 = Z_RET = Z_R2
1783   // or in Z_FARG0 = Z_FRET = Z_F0) will survive any VM calls for
1784   // blocking or unlocking.
1785   // An OOP result (handle) is done specially in the slow-path code.
1786   //--------------------------------------------------------------------
1787   switch (ret_type) {
1788     case T_VOID:    break;         // Nothing to do!
1789     case T_FLOAT:   break;         // Got it where we want it (unless slow-path)
1790     case T_DOUBLE:  break;         // Got it where we want it (unless slow-path)
1791     case T_LONG:    break;         // Got it where we want it (unless slow-path)
1792     case T_OBJECT:  break;         // Really a handle.
1793                                    // Cannot de-handlize until after reclaiming jvm_lock.
1794     case T_ARRAY:   break;
1795 
1796     case T_BOOLEAN:                // 0 -> false(0); !0 -> true(1)
1797       __ z_lngfr(Z_RET, Z_RET);    // Force sign bit on except for zero.
1798       __ z_srlg(Z_RET, Z_RET, 63); // Shift sign bit into least significant pos.
1799       break;
1800     case T_BYTE:    __ z_lgbr(Z_RET, Z_RET);  break; // sign extension
1801     case T_CHAR:    __ z_llghr(Z_RET, Z_RET); break; // unsigned result
1802     case T_SHORT:   __ z_lghr(Z_RET, Z_RET);  break; // sign extension
1803     case T_INT:     __ z_lgfr(Z_RET, Z_RET);  break; // sign-extend for beauty.
1804 
1805     default:
1806       ShouldNotReachHere();
1807       break;
1808   }
1809 
1810   Label after_transition;
1811 
1812   // Switch thread to "native transition" state before reading the synchronization state.
1813   // This additional state is necessary because reading and testing the synchronization
1814   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1815   //   - Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1816   //   - VM thread changes sync state to synchronizing and suspends threads for GC.
1817   //   - Thread A is resumed to finish this native method, but doesn't block here since it
1818   //     didn't see any synchronization in progress, and escapes.
1819 
1820   // Transition from _thread_in_native to _thread_in_native_trans.
1821   __ set_thread_state(_thread_in_native_trans);
1822 
1823   // Safepoint synchronization
1824   //--------------------------------------------------------------------
1825   // Must we block?
1826   //--------------------------------------------------------------------
1827   // Block, if necessary, before resuming in _thread_in_Java state.
1828   // In order for GC to work, don't clear the last_Java_sp until after blocking.
1829   //--------------------------------------------------------------------
1830   {
1831     Label no_block, sync;
1832 
1833     save_native_result(masm, ret_type, workspace_slot_offset); // Make Z_R2 available as work reg.
1834 
1835     // Force this write out before the read below.
1836     __ z_fence();
1837 
1838     __ safepoint_poll(sync, Z_R1);
1839 
1840     __ load_and_test_int(Z_R0, Address(Z_thread, JavaThread::suspend_flags_offset()));
1841     __ z_bre(no_block);
1842 
1843     // Block. Save any potential method result value before the operation and
1844     // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this
1845     // lets us share the oopMap we used when we went native rather than create
1846     // a distinct one for this pc.
1847     //
1848     __ bind(sync);
1849     __ z_acquire();
1850 
1851     address entry_point = CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans);
1852 
1853     __ call_VM_leaf(entry_point, Z_thread);
1854 
1855     __ bind(no_block);
1856     restore_native_result(masm, ret_type, workspace_slot_offset);
1857   }
1858 
1859   //--------------------------------------------------------------------
1860   // Thread state is thread_in_native_trans. Any safepoint blocking has
1861   // already happened so we can now change state to _thread_in_Java.
1862   //--------------------------------------------------------------------
1863   // Transition from _thread_in_native_trans to _thread_in_Java.
1864   __ set_thread_state(_thread_in_Java);
1865   __ bind(after_transition);
1866 
1867   //--------------------------------------------------------------------
1868   // Reguard any pages if necessary.
1869   // Protect native result from being destroyed.
1870   //--------------------------------------------------------------------
1871 
1872   Label no_reguard;
1873 
1874   __ z_cli(Address(Z_thread, JavaThread::stack_guard_state_offset() + in_ByteSize(sizeof(StackOverflow::StackGuardState) - 1)),
1875            StackOverflow::stack_guard_yellow_reserved_disabled);
1876 
1877   __ z_bre(no_reguard);
1878 
1879   save_native_result(masm, ret_type, workspace_slot_offset);
1880   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages), Z_method);
1881   restore_native_result(masm, ret_type, workspace_slot_offset);
1882 
1883   __ bind(no_reguard);
1884 
1885 
1886   // Synchronized methods (slow path only)
1887   // No pending exceptions for now.
1888   //--------------------------------------------------------------------
1889   // Handle possibly pending exception (will unlock if necessary).
1890   // Native result is, if any is live, in Z_FRES or Z_RES.
1891   //--------------------------------------------------------------------
1892   // Unlock
1893   //--------------------------------------------------------------------
1894   if (method->is_synchronized()) {
1895     const Register r_oop        = Z_R11;
1896     const Register r_box        = Z_R12;
1897     const Register r_tmp1       = Z_R13;
1898     const Register r_tmp2       = Z_R7;
1899     Label done;
1900 
1901     // Get unboxed oop of class mirror or object ...
1902     int   offset = method_is_static ? klass_offset : receiver_offset;
1903 
1904     assert(offset != -1, "");
1905     __ z_lg(r_oop, offset, Z_SP);
1906 
1907     // ... and address of lock object box.
1908     __ add2reg(r_box, lock_offset, Z_SP);
1909 
1910     // Try fastpath for unlocking.
1911     __ compiler_fast_unlock_object(r_oop, r_box, r_tmp1, r_tmp2); // Don't use R1 as temp.
1912     __ z_bre(done);
1913 
1914     // Slow path for unlocking.
1915     // Save and restore any potential method result value around the unlocking operation.
1916     const Register R_exc = Z_R11;
1917 
1918     save_native_result(masm, ret_type, workspace_slot_offset);
1919 
1920     // Must save pending exception around the slow-path VM call. Since it's a
1921     // leaf call, the pending exception (if any) can be kept in a register.
1922     __ z_lg(R_exc, Address(Z_thread, Thread::pending_exception_offset()));
1923     assert(R_exc->is_nonvolatile(), "exception register must be non-volatile");
1924 
1925     // Must clear pending-exception before re-entering the VM. Since this is
1926     // a leaf call, pending-exception-oop can be safely kept in a register.
1927     __ clear_mem(Address(Z_thread, Thread::pending_exception_offset()), sizeof(intptr_t));
1928 
1929     // Inline a special case of call_VM that disallows any pending_exception.
1930 
1931     // Get locked oop from the handle we passed to jni.
1932     __ z_lg(Z_ARG1, offset, Z_SP);
1933     __ add2reg(Z_ARG2, lock_offset, Z_SP);
1934     __ z_lgr(Z_ARG3, Z_thread);
1935 
1936     __ load_const_optimized(Z_R1_scratch, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
1937 
1938     __ call(Z_R1_scratch);
1939 
1940 #ifdef ASSERT
1941     {
1942       Label L;
1943       __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset()));
1944       __ z_bre(L);
1945       __ stop("no pending exception allowed on exit from IR::monitorexit");
1946       __ bind(L);
1947     }
1948 #endif
1949 
1950     // Check_forward_pending_exception jump to forward_exception if any pending
1951     // exception is set. The forward_exception routine expects to see the
1952     // exception in pending_exception and not in a register. Kind of clumsy,
1953     // since all folks who branch to forward_exception must have tested
1954     // pending_exception first and hence have it in a register already.
1955     __ z_stg(R_exc, Address(Z_thread, Thread::pending_exception_offset()));
1956     restore_native_result(masm, ret_type, workspace_slot_offset);
1957     __ z_bru(done);
1958     __ z_illtrap(0x66);
1959 
1960     __ bind(done);
1961   }
1962 
1963 
1964   //--------------------------------------------------------------------
1965   // Clear "last Java frame" SP and PC.
1966   //--------------------------------------------------------------------
1967   __ verify_thread(); // Z_thread must be correct.
1968 
1969   __ reset_last_Java_frame();
1970 
1971   // Unpack oop result, e.g. JNIHandles::resolve result.
1972   if (is_reference_type(ret_type)) {
1973     __ resolve_jobject(Z_RET, /* tmp1 */ Z_R13, /* tmp2 */ Z_R7);
1974   }
1975 
1976   if (CheckJNICalls) {
1977     // clear_pending_jni_exception_check
1978     __ clear_mem(Address(Z_thread, JavaThread::pending_jni_exception_check_fn_offset()), sizeof(oop));
1979   }
1980 
1981   // Reset handle block.
1982   __ z_lg(Z_R1_scratch, Address(Z_thread, JavaThread::active_handles_offset()));
1983   __ clear_mem(Address(Z_R1_scratch, JNIHandleBlock::top_offset_in_bytes()), 4);
1984 
1985   // Check for pending exceptions.
1986   __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset()));
1987   __ z_brne(handle_pending_exception);
1988 
1989 
1990   //////////////////////////////////////////////////////////////////////
1991   // Return
1992   //////////////////////////////////////////////////////////////////////
1993 
1994 
1995 #ifndef USE_RESIZE_FRAME
1996   __ pop_frame();                     // Pop wrapper frame.
1997 #else
1998   __ resize_frame(frame_size_in_bytes, Z_R0_scratch);  // Revert stack extension.
1999 #endif
2000   __ restore_return_pc();             // This is the way back to the caller.
2001   __ z_br(Z_R14);
2002 
2003 
2004   //////////////////////////////////////////////////////////////////////
2005   // Out-of-line calls to the runtime.
2006   //////////////////////////////////////////////////////////////////////
2007 
2008 
2009   //---------------------------------------------------------------------
2010   // Handler for pending exceptions (out-of-line).
2011   //---------------------------------------------------------------------
2012   // Since this is a native call, we know the proper exception handler
2013   // is the empty function. We just pop this frame and then jump to
2014   // forward_exception_entry. Z_R14 will contain the native caller's
2015   // return PC.
2016   __ bind(handle_pending_exception);
2017   __ pop_frame();
2018   __ load_const_optimized(Z_R1_scratch, StubRoutines::forward_exception_entry());
2019   __ restore_return_pc();
2020   __ z_br(Z_R1_scratch);
2021 
2022   //---------------------------------------------------------------------
2023   // Handler for a cache miss (out-of-line)
2024   //---------------------------------------------------------------------
2025   __ call_ic_miss_handler(ic_miss, 0x77, 0, Z_R1_scratch);
2026   __ flush();
2027 
2028 
2029   //////////////////////////////////////////////////////////////////////
2030   // end of code generation
2031   //////////////////////////////////////////////////////////////////////
2032 
2033 
2034   nmethod *nm = nmethod::new_native_nmethod(method,
2035                                             compile_id,
2036                                             masm->code(),
2037                                             (int)(wrapper_VEPStart-wrapper_CodeStart),
2038                                             (int)(wrapper_FrameDone-wrapper_CodeStart),
2039                                             stack_slots / VMRegImpl::slots_per_word,
2040                                             (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2041                                             in_ByteSize(lock_offset),
2042                                             oop_maps);
2043 
2044   return nm;
2045 }
2046 
2047 static address gen_c2i_adapter(MacroAssembler  *masm,
2048                                int total_args_passed,
2049                                int comp_args_on_stack,
2050                                const BasicType *sig_bt,
2051                                const VMRegPair *regs,
2052                                Label &skip_fixup) {
2053   // Before we get into the guts of the C2I adapter, see if we should be here
2054   // at all. We've come from compiled code and are attempting to jump to the
2055   // interpreter, which means the caller made a static call to get here
2056   // (vcalls always get a compiled target if there is one). Check for a
2057   // compiled target. If there is one, we need to patch the caller's call.
2058 
2059   // These two defs MUST MATCH code in gen_i2c2i_adapter!
2060   const Register ientry = Z_R11;
2061   const Register code   = Z_R11;
2062 
2063   address c2i_entrypoint;
2064   Label   patch_callsite;
2065 
2066   // Regular (verified) c2i entry point.
2067   c2i_entrypoint = __ pc();
2068 
2069   // Call patching needed?
2070   __ load_and_test_long(Z_R0_scratch, method_(code));
2071   __ z_lg(ientry, method_(interpreter_entry));  // Preload interpreter entry (also if patching).
2072   __ z_brne(patch_callsite);                    // Patch required if code != NULL (compiled target exists).
2073 
2074   __ bind(skip_fixup);  // Return point from patch_callsite.
2075 
2076   // Since all args are passed on the stack, total_args_passed*wordSize is the
2077   // space we need. We need ABI scratch area but we use the caller's since
2078   // it has already been allocated.
2079 
2080   const int abi_scratch = frame::z_top_ijava_frame_abi_size;
2081   int       extraspace  = align_up(total_args_passed, 2)*wordSize + abi_scratch;
2082   Register  sender_SP   = Z_R10;
2083   Register  value       = Z_R12;
2084 
2085   // Remember the senderSP so we can pop the interpreter arguments off of the stack.
2086   // In addition, frame manager expects initial_caller_sp in Z_R10.
2087   __ z_lgr(sender_SP, Z_SP);
2088 
2089   // This should always fit in 14 bit immediate.
2090   __ resize_frame(-extraspace, Z_R0_scratch);
2091 
2092   // We use the caller's ABI scratch area (out_preserved_stack_slots) for the initial
2093   // args. This essentially moves the callers ABI scratch area from the top to the
2094   // bottom of the arg area.
2095 
2096   int st_off =  extraspace - wordSize;
2097 
2098   // Now write the args into the outgoing interpreter space.
2099   for (int i = 0; i < total_args_passed; i++) {
2100     VMReg r_1 = regs[i].first();
2101     VMReg r_2 = regs[i].second();
2102     if (!r_1->is_valid()) {
2103       assert(!r_2->is_valid(), "");
2104       continue;
2105     }
2106     if (r_1->is_stack()) {
2107       // The calling convention produces OptoRegs that ignore the preserve area (abi scratch).
2108       // We must account for it here.
2109       int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
2110 
2111       if (!r_2->is_valid()) {
2112         __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*));
2113       } else {
2114         // longs are given 2 64-bit slots in the interpreter,
2115         // but the data is passed in only 1 slot.
2116         if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2117 #ifdef ASSERT
2118           __ clear_mem(Address(Z_SP, st_off), sizeof(void *));
2119 #endif
2120           st_off -= wordSize;
2121         }
2122         __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*));
2123       }
2124     } else {
2125       if (r_1->is_Register()) {
2126         if (!r_2->is_valid()) {
2127           __ z_st(r_1->as_Register(), st_off, Z_SP);
2128         } else {
2129           // longs are given 2 64-bit slots in the interpreter, but the
2130           // data is passed in only 1 slot.
2131           if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2132 #ifdef ASSERT
2133             __ clear_mem(Address(Z_SP, st_off), sizeof(void *));
2134 #endif
2135             st_off -= wordSize;
2136           }
2137           __ z_stg(r_1->as_Register(), st_off, Z_SP);
2138         }
2139       } else {
2140         assert(r_1->is_FloatRegister(), "");
2141         if (!r_2->is_valid()) {
2142           __ z_ste(r_1->as_FloatRegister(), st_off, Z_SP);
2143         } else {
2144           // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
2145           // data is passed in only 1 slot.
2146           // One of these should get known junk...
2147 #ifdef ASSERT
2148           __ z_lzdr(Z_F1);
2149           __ z_std(Z_F1, st_off, Z_SP);
2150 #endif
2151           st_off-=wordSize;
2152           __ z_std(r_1->as_FloatRegister(), st_off, Z_SP);
2153         }
2154       }
2155     }
2156     st_off -= wordSize;
2157   }
2158 
2159 
2160   // Jump to the interpreter just as if interpreter was doing it.
2161   __ add2reg(Z_esp, st_off, Z_SP);
2162 
2163   // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in Z_R10.
2164   __ z_br(ientry);
2165 
2166 
2167   // Prevent illegal entry to out-of-line code.
2168   __ z_illtrap(0x22);
2169 
2170   // Generate out-of-line runtime call to patch caller,
2171   // then continue as interpreted.
2172 
2173   // IF you lose the race you go interpreted.
2174   // We don't see any possible endless c2i -> i2c -> c2i ...
2175   // transitions no matter how rare.
2176   __ bind(patch_callsite);
2177 
2178   RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers);
2179   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), Z_method, Z_R14);
2180   RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers);
2181   __ z_bru(skip_fixup);
2182 
2183   // end of out-of-line code
2184 
2185   return c2i_entrypoint;
2186 }
2187 
2188 // On entry, the following registers are set
2189 //
2190 //    Z_thread  r8  - JavaThread*
2191 //    Z_method  r9  - callee's method (method to be invoked)
2192 //    Z_esp     r7  - operand (or expression) stack pointer of caller. one slot above last arg.
2193 //    Z_SP      r15 - SP prepared by call stub such that caller's outgoing args are near top
2194 //
2195 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
2196                                     int total_args_passed,
2197                                     int comp_args_on_stack,
2198                                     const BasicType *sig_bt,
2199                                     const VMRegPair *regs) {
2200   const Register value = Z_R12;
2201   const Register ld_ptr= Z_esp;
2202 
2203   int ld_offset = total_args_passed * wordSize;
2204 
2205   // Cut-out for having no stack args.
2206   if (comp_args_on_stack) {
2207     // Sig words on the stack are greater than VMRegImpl::stack0. Those in
2208     // registers are below. By subtracting stack0, we either get a negative
2209     // number (all values in registers) or the maximum stack slot accessed.
2210     // Convert VMRegImpl (4 byte) stack slots to words.
2211     int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
2212     // Round up to miminum stack alignment, in wordSize
2213     comp_words_on_stack = align_up(comp_words_on_stack, 2);
2214 
2215     __ resize_frame(-comp_words_on_stack*wordSize, Z_R0_scratch);
2216   }
2217 
2218   // Now generate the shuffle code. Pick up all register args and move the
2219   // rest through register value=Z_R12.
2220   for (int i = 0; i < total_args_passed; i++) {
2221     if (sig_bt[i] == T_VOID) {
2222       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
2223       continue;
2224     }
2225 
2226     // Pick up 0, 1 or 2 words from ld_ptr.
2227     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
2228            "scrambled load targets?");
2229     VMReg r_1 = regs[i].first();
2230     VMReg r_2 = regs[i].second();
2231     if (!r_1->is_valid()) {
2232       assert(!r_2->is_valid(), "");
2233       continue;
2234     }
2235     if (r_1->is_FloatRegister()) {
2236       if (!r_2->is_valid()) {
2237         __ z_le(r_1->as_FloatRegister(), ld_offset, ld_ptr);
2238         ld_offset-=wordSize;
2239       } else {
2240         // Skip the unused interpreter slot.
2241         __ z_ld(r_1->as_FloatRegister(), ld_offset - wordSize, ld_ptr);
2242         ld_offset -= 2 * wordSize;
2243       }
2244     } else {
2245       if (r_1->is_stack()) {
2246         // Must do a memory to memory move.
2247         int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
2248 
2249         if (!r_2->is_valid()) {
2250           __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*));
2251         } else {
2252           // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
2253           // data is passed in only 1 slot.
2254           if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2255             ld_offset -= wordSize;
2256           }
2257           __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*));
2258         }
2259       } else {
2260         if (!r_2->is_valid()) {
2261           // Not sure we need to do this but it shouldn't hurt.
2262           if (is_reference_type(sig_bt[i]) || sig_bt[i] == T_ADDRESS) {
2263             __ z_lg(r_1->as_Register(), ld_offset, ld_ptr);
2264           } else {
2265             __ z_l(r_1->as_Register(), ld_offset, ld_ptr);
2266           }
2267         } else {
2268           // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
2269           // data is passed in only 1 slot.
2270           if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2271             ld_offset -= wordSize;
2272           }
2273           __ z_lg(r_1->as_Register(), ld_offset, ld_ptr);
2274         }
2275       }
2276       ld_offset -= wordSize;
2277     }
2278   }
2279 
2280   // Jump to the compiled code just as if compiled code was doing it.
2281   // load target address from method:
2282   __ z_lg(Z_R1_scratch, Address(Z_method, Method::from_compiled_offset()));
2283 
2284   // Store method into thread->callee_target.
2285   // 6243940: We might end up in handle_wrong_method if
2286   // the callee is deoptimized as we race thru here. If that
2287   // happens we don't want to take a safepoint because the
2288   // caller frame will look interpreted and arguments are now
2289   // "compiled" so it is much better to make this transition
2290   // invisible to the stack walking code. Unfortunately, if
2291   // we try and find the callee by normal means a safepoint
2292   // is possible. So we stash the desired callee in the thread
2293   // and the vm will find it there should this case occur.
2294   __ z_stg(Z_method, thread_(callee_target));
2295 
2296   __ z_br(Z_R1_scratch);
2297 }
2298 
2299 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
2300                                                             int total_args_passed,
2301                                                             int comp_args_on_stack,
2302                                                             const BasicType *sig_bt,
2303                                                             const VMRegPair *regs,
2304                                                             AdapterFingerPrint* fingerprint) {
2305   __ align(CodeEntryAlignment);
2306   address i2c_entry = __ pc();
2307   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
2308 
2309   address c2i_unverified_entry;
2310 
2311   Label skip_fixup;
2312   {
2313     Label ic_miss;
2314     const int klass_offset           = oopDesc::klass_offset_in_bytes();
2315     const int holder_klass_offset    = CompiledICHolder::holder_klass_offset();
2316     const int holder_metadata_offset = CompiledICHolder::holder_metadata_offset();
2317 
2318     // Out-of-line call to ic_miss handler.
2319     __ call_ic_miss_handler(ic_miss, 0x11, 0, Z_R1_scratch);
2320 
2321     // Unverified Entry Point UEP
2322     __ align(CodeEntryAlignment);
2323     c2i_unverified_entry = __ pc();
2324 
2325     // Check the pointers.
2326     if (!ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(klass_offset)) {
2327       __ z_ltgr(Z_ARG1, Z_ARG1);
2328       __ z_bre(ic_miss);
2329     }
2330     __ verify_oop(Z_ARG1, FILE_AND_LINE);
2331 
2332     // Check ic: object class <-> cached class
2333     // Compress cached class for comparison. That's more efficient.
2334     if (UseCompressedClassPointers) {
2335       __ z_lg(Z_R11, holder_klass_offset, Z_method);             // Z_R11 is overwritten a few instructions down anyway.
2336       __ compare_klass_ptr(Z_R11, klass_offset, Z_ARG1, false); // Cached class can't be zero.
2337     } else {
2338       __ z_clc(klass_offset, sizeof(void *)-1, Z_ARG1, holder_klass_offset, Z_method);
2339     }
2340     __ z_brne(ic_miss);  // Cache miss: call runtime to handle this.
2341 
2342     // This def MUST MATCH code in gen_c2i_adapter!
2343     const Register code = Z_R11;
2344 
2345     __ z_lg(Z_method, holder_metadata_offset, Z_method);
2346     __ load_and_test_long(Z_R0, method_(code));
2347     __ z_brne(ic_miss);  // Cache miss: call runtime to handle this.
2348 
2349     // Fallthru to VEP. Duplicate LTG, but saved taken branch.
2350   }
2351 
2352   address c2i_entry = __ pc();
2353 
2354   // Class initialization barrier for static methods
2355   address c2i_no_clinit_check_entry = NULL;
2356   if (VM_Version::supports_fast_class_init_checks()) {
2357     Label L_skip_barrier;
2358 
2359     { // Bypass the barrier for non-static methods
2360       __ testbit(Address(Z_method, Method::access_flags_offset()), JVM_ACC_STATIC_BIT);
2361       __ z_bfalse(L_skip_barrier); // non-static
2362     }
2363 
2364     Register klass = Z_R11;
2365     __ load_method_holder(klass, Z_method);
2366     __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/);
2367 
2368     __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub());
2369     __ z_br(klass);
2370 
2371     __ bind(L_skip_barrier);
2372     c2i_no_clinit_check_entry = __ pc();
2373   }
2374 
2375   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
2376 
2377   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
2378 }
2379 
2380 // This function returns the adjust size (in number of words) to a c2i adapter
2381 // activation for use during deoptimization.
2382 //
2383 // Actually only compiled frames need to be adjusted, but it
2384 // doesn't harm to adjust entry and interpreter frames, too.
2385 //
2386 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2387   assert(callee_locals >= callee_parameters,
2388           "test and remove; got more parms than locals");
2389   // Handle the abi adjustment here instead of doing it in push_skeleton_frames.
2390   return (callee_locals - callee_parameters) * Interpreter::stackElementWords +
2391          frame::z_parent_ijava_frame_abi_size / BytesPerWord;
2392 }
2393 
2394 uint SharedRuntime::in_preserve_stack_slots() {
2395   return frame::jit_in_preserve_size_in_4_byte_units;
2396 }
2397 
2398 uint SharedRuntime::out_preserve_stack_slots() {
2399   return frame::z_jit_out_preserve_size/VMRegImpl::stack_slot_size;
2400 }
2401 
2402 //
2403 // Frame generation for deopt and uncommon trap blobs.
2404 //
2405 static void push_skeleton_frame(MacroAssembler* masm,
2406                           /* Unchanged */
2407                           Register frame_sizes_reg,
2408                           Register pcs_reg,
2409                           /* Invalidate */
2410                           Register frame_size_reg,
2411                           Register pc_reg) {
2412   BLOCK_COMMENT("  push_skeleton_frame {");
2413    __ z_lg(pc_reg, 0, pcs_reg);
2414    __ z_lg(frame_size_reg, 0, frame_sizes_reg);
2415    __ z_stg(pc_reg, _z_abi(return_pc), Z_SP);
2416    Register fp = pc_reg;
2417    __ push_frame(frame_size_reg, fp);
2418 #ifdef ASSERT
2419    // The magic is required for successful walking skeletal frames.
2420    __ load_const_optimized(frame_size_reg/*tmp*/, frame::z_istate_magic_number);
2421    __ z_stg(frame_size_reg, _z_ijava_state_neg(magic), fp);
2422    // Fill other slots that are supposedly not necessary with eye catchers.
2423    __ load_const_optimized(frame_size_reg/*use as tmp*/, 0xdeadbad1);
2424    __ z_stg(frame_size_reg, _z_ijava_state_neg(top_frame_sp), fp);
2425    // The sender_sp of the bottom frame is set before pushing it.
2426    // The sender_sp of non bottom frames is their caller's top_frame_sp, which
2427    // is unknown here. Luckily it is not needed before filling the frame in
2428    // layout_activation(), we assert this by setting an eye catcher (see
2429    // comments on sender_sp in frame_s390.hpp).
2430    __ z_stg(frame_size_reg, _z_ijava_state_neg(sender_sp), Z_SP);
2431 #endif // ASSERT
2432   BLOCK_COMMENT("  } push_skeleton_frame");
2433 }
2434 
2435 // Loop through the UnrollBlock info and create new frames.
2436 static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
2437                             /* read */
2438                             Register unroll_block_reg,
2439                             /* invalidate */
2440                             Register frame_sizes_reg,
2441                             Register number_of_frames_reg,
2442                             Register pcs_reg,
2443                             Register tmp1,
2444                             Register tmp2) {
2445   BLOCK_COMMENT("push_skeleton_frames {");
2446   // _number_of_frames is of type int (deoptimization.hpp).
2447   __ z_lgf(number_of_frames_reg,
2448            Address(unroll_block_reg, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2449   __ z_lg(pcs_reg,
2450           Address(unroll_block_reg, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2451   __ z_lg(frame_sizes_reg,
2452           Address(unroll_block_reg, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2453 
2454   // stack: (caller_of_deoptee, ...).
2455 
2456   // If caller_of_deoptee is a compiled frame, then we extend it to make
2457   // room for the callee's locals and the frame::z_parent_ijava_frame_abi.
2458   // See also Deoptimization::last_frame_adjust() above.
2459   // Note: entry and interpreted frames are adjusted, too. But this doesn't harm.
2460 
2461   __ z_lgf(Z_R1_scratch,
2462            Address(unroll_block_reg, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2463   __ z_lgr(tmp1, Z_SP);  // Save the sender sp before extending the frame.
2464   __ resize_frame_sub(Z_R1_scratch, tmp2/*tmp*/);
2465   // The oldest skeletal frame requires a valid sender_sp to make it walkable
2466   // (it is required to find the original pc of caller_of_deoptee if it is marked
2467   // for deoptimization - see nmethod::orig_pc_addr()).
2468   __ z_stg(tmp1, _z_ijava_state_neg(sender_sp), Z_SP);
2469 
2470   // Now push the new interpreter frames.
2471   Label loop, loop_entry;
2472 
2473   // Make sure that there is at least one entry in the array.
2474   DEBUG_ONLY(__ z_ltgr(number_of_frames_reg, number_of_frames_reg));
2475   __ asm_assert_ne("array_size must be > 0", 0x205);
2476 
2477   __ z_bru(loop_entry);
2478 
2479   __ bind(loop);
2480 
2481   __ add2reg(frame_sizes_reg, wordSize);
2482   __ add2reg(pcs_reg, wordSize);
2483 
2484   __ bind(loop_entry);
2485 
2486   // Allocate a new frame, fill in the pc.
2487   push_skeleton_frame(masm, frame_sizes_reg, pcs_reg, tmp1, tmp2);
2488 
2489   __ z_aghi(number_of_frames_reg, -1);  // Emit AGHI, because it sets the condition code
2490   __ z_brne(loop);
2491 
2492   // Set the top frame's return pc.
2493   __ add2reg(pcs_reg, wordSize);
2494   __ z_lg(Z_R0_scratch, 0, pcs_reg);
2495   __ z_stg(Z_R0_scratch, _z_abi(return_pc), Z_SP);
2496   BLOCK_COMMENT("} push_skeleton_frames");
2497 }
2498 
2499 //------------------------------generate_deopt_blob----------------------------
2500 void SharedRuntime::generate_deopt_blob() {
2501   // Allocate space for the code.
2502   ResourceMark rm;
2503   // Setup code generation tools.
2504   CodeBuffer buffer("deopt_blob", 2048, 1024);
2505   InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2506   Label exec_mode_initialized;
2507   OopMap* map = NULL;
2508   OopMapSet *oop_maps = new OopMapSet();
2509 
2510   unsigned int start_off = __ offset();
2511   Label cont;
2512 
2513   // --------------------------------------------------------------------------
2514   // Normal entry (non-exception case)
2515   //
2516   // We have been called from the deopt handler of the deoptee.
2517   // Z_R14 points behind the call in the deopt handler. We adjust
2518   // it such that it points to the start of the deopt handler.
2519   // The return_pc has been stored in the frame of the deoptee and
2520   // will replace the address of the deopt_handler in the call
2521   // to Deoptimization::fetch_unroll_info below.
2522   // The (int) cast is necessary, because -((unsigned int)14)
2523   // is an unsigned int.
2524   __ add2reg(Z_R14, -(int)NativeCall::max_instruction_size());
2525 
2526   const Register   exec_mode_reg = Z_tmp_1;
2527 
2528   // stack: (deoptee, caller of deoptee, ...)
2529 
2530   // pushes an "unpack" frame
2531   // R14 contains the return address pointing into the deoptimized
2532   // nmethod that was valid just before the nmethod was deoptimized.
2533   // save R14 into the deoptee frame.  the `fetch_unroll_info'
2534   // procedure called below will read it from there.
2535   map = RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers);
2536 
2537   // note the entry point.
2538   __ load_const_optimized(exec_mode_reg, Deoptimization::Unpack_deopt);
2539   __ z_bru(exec_mode_initialized);
2540 
2541 #ifndef COMPILER1
2542   int reexecute_offset = 1; // odd offset will produce odd pc, which triggers an hardware trap
2543 #else
2544   // --------------------------------------------------------------------------
2545   // Reexecute entry
2546   // - Z_R14 = Deopt Handler in nmethod
2547 
2548   int reexecute_offset = __ offset() - start_off;
2549 
2550   // No need to update map as each call to save_live_registers will produce identical oopmap
2551   (void) RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers);
2552 
2553   __ load_const_optimized(exec_mode_reg, Deoptimization::Unpack_reexecute);
2554   __ z_bru(exec_mode_initialized);
2555 #endif
2556 
2557 
2558   // --------------------------------------------------------------------------
2559   // Exception entry. We reached here via a branch. Registers on entry:
2560   // - Z_EXC_OOP (Z_ARG1) = exception oop
2561   // - Z_EXC_PC  (Z_ARG2) = the exception pc.
2562 
2563   int exception_offset = __ offset() - start_off;
2564 
2565   // all registers are dead at this entry point, except for Z_EXC_OOP, and
2566   // Z_EXC_PC which contain the exception oop and exception pc
2567   // respectively.  Set them in TLS and fall thru to the
2568   // unpack_with_exception_in_tls entry point.
2569 
2570   // Store exception oop and pc in thread (location known to GC).
2571   // Need this since the call to "fetch_unroll_info()" may safepoint.
2572   __ z_stg(Z_EXC_OOP, Address(Z_thread, JavaThread::exception_oop_offset()));
2573   __ z_stg(Z_EXC_PC,  Address(Z_thread, JavaThread::exception_pc_offset()));
2574 
2575   // fall through
2576 
2577   int exception_in_tls_offset = __ offset() - start_off;
2578 
2579   // new implementation because exception oop is now passed in JavaThread
2580 
2581   // Prolog for exception case
2582   // All registers must be preserved because they might be used by LinearScan
2583   // Exceptiop oop and throwing PC are passed in JavaThread
2584 
2585   // load throwing pc from JavaThread and us it as the return address of the current frame.
2586   __ z_lg(Z_R1_scratch, Address(Z_thread, JavaThread::exception_pc_offset()));
2587 
2588   // Save everything in sight.
2589   (void) RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers, Z_R1_scratch);
2590 
2591   // Now it is safe to overwrite any register
2592 
2593   // Clear the exception pc field in JavaThread
2594   __ clear_mem(Address(Z_thread, JavaThread::exception_pc_offset()), 8);
2595 
2596   // Deopt during an exception.  Save exec mode for unpack_frames.
2597   __ load_const_optimized(exec_mode_reg, Deoptimization::Unpack_exception);
2598 
2599 
2600 #ifdef ASSERT
2601   // verify that there is really an exception oop in JavaThread
2602   __ z_lg(Z_ARG1, Address(Z_thread, JavaThread::exception_oop_offset()));
2603   __ MacroAssembler::verify_oop(Z_ARG1, FILE_AND_LINE);
2604 
2605   // verify that there is no pending exception
2606   __ asm_assert_mem8_is_zero(in_bytes(Thread::pending_exception_offset()), Z_thread,
2607                              "must not have pending exception here", __LINE__);
2608 #endif
2609 
2610   // --------------------------------------------------------------------------
2611   // At this point, the live registers are saved and
2612   // the exec_mode_reg has been set up correctly.
2613   __ bind(exec_mode_initialized);
2614 
2615   // stack: ("unpack" frame, deoptee, caller_of_deoptee, ...).
2616 
2617   {
2618   const Register unroll_block_reg  = Z_tmp_2;
2619 
2620   // we need to set `last_Java_frame' because `fetch_unroll_info' will
2621   // call `last_Java_frame()'.  however we can't block and no gc will
2622   // occur so we don't need an oopmap. the value of the pc in the
2623   // frame is not particularly important.  it just needs to identify the blob.
2624 
2625   // Don't set last_Java_pc anymore here (is implicitly NULL then).
2626   // the correct PC is retrieved in pd_last_frame() in that case.
2627   __ set_last_Java_frame(/*sp*/Z_SP, noreg);
2628   // With EscapeAnalysis turned on, this call may safepoint
2629   // despite it's marked as "leaf call"!
2630   __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), Z_thread, exec_mode_reg);
2631   // Set an oopmap for the call site this describes all our saved volatile registers
2632   int offs = __ offset();
2633   oop_maps->add_gc_map(offs, map);
2634 
2635   __ reset_last_Java_frame();
2636   // save the return value.
2637   __ z_lgr(unroll_block_reg, Z_RET);
2638   // restore the return registers that have been saved
2639   // (among other registers) by save_live_registers(...).
2640   RegisterSaver::restore_result_registers(masm);
2641 
2642   // reload the exec mode from the UnrollBlock (it might have changed)
2643   __ z_llgf(exec_mode_reg, Address(unroll_block_reg, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2644 
2645   // In excp_deopt_mode, restore and clear exception oop which we
2646   // stored in the thread during exception entry above. The exception
2647   // oop will be the return value of this stub.
2648   NearLabel skip_restore_excp;
2649   __ compare64_and_branch(exec_mode_reg, Deoptimization::Unpack_exception, Assembler::bcondNotEqual, skip_restore_excp);
2650   __ z_lg(Z_RET, thread_(exception_oop));
2651   __ clear_mem(thread_(exception_oop), 8);
2652   __ bind(skip_restore_excp);
2653 
2654   // remove the "unpack" frame
2655   __ pop_frame();
2656 
2657   // stack: (deoptee, caller of deoptee, ...).
2658 
2659   // pop the deoptee's frame
2660   __ pop_frame();
2661 
2662   // stack: (caller_of_deoptee, ...).
2663 
2664   // loop through the `UnrollBlock' info and create interpreter frames.
2665   push_skeleton_frames(masm, true/*deopt*/,
2666                   unroll_block_reg,
2667                   Z_tmp_3,
2668                   Z_tmp_4,
2669                   Z_ARG5,
2670                   Z_ARG4,
2671                   Z_ARG3);
2672 
2673   // stack: (skeletal interpreter frame, ..., optional skeletal
2674   // interpreter frame, caller of deoptee, ...).
2675   }
2676 
2677   // push an "unpack" frame taking care of float / int return values.
2678   __ push_frame(RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers));
2679 
2680   // stack: (unpack frame, skeletal interpreter frame, ..., optional
2681   // skeletal interpreter frame, caller of deoptee, ...).
2682 
2683   // spill live volatile registers since we'll do a call.
2684   __ z_stg(Z_RET, offset_of(frame::z_abi_160_spill, spill[0]), Z_SP);
2685   __ z_std(Z_FRET, offset_of(frame::z_abi_160_spill, spill[1]), Z_SP);
2686 
2687   // let the unpacker layout information in the skeletal frames just allocated.
2688   __ get_PC(Z_RET);
2689   __ set_last_Java_frame(/*sp*/Z_SP, /*pc*/Z_RET);
2690   __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
2691                   Z_thread/*thread*/, exec_mode_reg/*exec_mode*/);
2692 
2693   __ reset_last_Java_frame();
2694 
2695   // restore the volatiles saved above.
2696   __ z_lg(Z_RET, offset_of(frame::z_abi_160_spill, spill[0]), Z_SP);
2697   __ z_ld(Z_FRET, offset_of(frame::z_abi_160_spill, spill[1]), Z_SP);
2698 
2699   // pop the "unpack" frame.
2700   __ pop_frame();
2701   __ restore_return_pc();
2702 
2703   // stack: (top interpreter frame, ..., optional interpreter frame,
2704   // caller of deoptee, ...).
2705 
2706   __ z_lg(Z_fp, _z_abi(callers_sp), Z_SP); // restore frame pointer
2707   __ restore_bcp();
2708   __ restore_locals();
2709   __ restore_esp();
2710 
2711   // return to the interpreter entry point.
2712   __ z_br(Z_R14);
2713 
2714   // Make sure all code is generated
2715   masm->flush();
2716 
2717   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)/wordSize);
2718   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2719 }
2720 
2721 
2722 #ifdef COMPILER2
2723 //------------------------------generate_uncommon_trap_blob--------------------
2724 void SharedRuntime::generate_uncommon_trap_blob() {
2725   // Allocate space for the code
2726   ResourceMark rm;
2727   // Setup code generation tools
2728   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2729   InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2730 
2731   Register unroll_block_reg = Z_tmp_1;
2732   Register klass_index_reg  = Z_ARG2;
2733   Register unc_trap_reg     = Z_ARG2;
2734 
2735   // stack: (deoptee, caller_of_deoptee, ...).
2736 
2737   // push a dummy "unpack" frame and call
2738   // `Deoptimization::uncommon_trap' to pack the compiled frame into a
2739   // vframe array and return the `UnrollBlock' information.
2740 
2741   // save R14 to compiled frame.
2742   __ save_return_pc();
2743   // push the "unpack_frame".
2744   __ push_frame_abi160(0);
2745 
2746   // stack: (unpack frame, deoptee, caller_of_deoptee, ...).
2747 
2748   // set the "unpack" frame as last_Java_frame.
2749   // `Deoptimization::uncommon_trap' expects it and considers its
2750   // sender frame as the deoptee frame.
2751   __ get_PC(Z_R1_scratch);
2752   __ set_last_Java_frame(/*sp*/Z_SP, /*pc*/Z_R1_scratch);
2753 
2754   __ z_lgr(klass_index_reg, Z_ARG1);  // passed implicitly as ARG2
2755   __ z_lghi(Z_ARG3, Deoptimization::Unpack_uncommon_trap);  // passed implicitly as ARG3
2756   BLOCK_COMMENT("call Deoptimization::uncommon_trap()");
2757   __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), Z_thread);
2758 
2759   __ reset_last_Java_frame();
2760 
2761   // pop the "unpack" frame
2762   __ pop_frame();
2763 
2764   // stack: (deoptee, caller_of_deoptee, ...).
2765 
2766   // save the return value.
2767   __ z_lgr(unroll_block_reg, Z_RET);
2768 
2769   // pop the deoptee frame.
2770   __ pop_frame();
2771 
2772   // stack: (caller_of_deoptee, ...).
2773 
2774 #ifdef ASSERT
2775   assert(Immediate::is_uimm8(Deoptimization::Unpack_LIMIT), "Code not fit for larger immediates");
2776   assert(Immediate::is_uimm8(Deoptimization::Unpack_uncommon_trap), "Code not fit for larger immediates");
2777   const int unpack_kind_byte_offset = Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()
2778 #ifndef VM_LITTLE_ENDIAN
2779   + 3
2780 #endif
2781   ;
2782   if (Displacement::is_shortDisp(unpack_kind_byte_offset)) {
2783     __ z_cli(unpack_kind_byte_offset, unroll_block_reg, Deoptimization::Unpack_uncommon_trap);
2784   } else {
2785     __ z_cliy(unpack_kind_byte_offset, unroll_block_reg, Deoptimization::Unpack_uncommon_trap);
2786   }
2787   __ asm_assert_eq("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap", 0);
2788 #endif
2789 
2790   __ zap_from_to(Z_SP, Z_SP, Z_R0_scratch, Z_R1, 500, -1);
2791 
2792   // allocate new interpreter frame(s) and possibly resize the caller's frame
2793   // (no more adapters !)
2794   push_skeleton_frames(masm, false/*deopt*/,
2795                   unroll_block_reg,
2796                   Z_tmp_2,
2797                   Z_tmp_3,
2798                   Z_tmp_4,
2799                   Z_ARG5,
2800                   Z_ARG4);
2801 
2802   // stack: (skeletal interpreter frame, ..., optional skeletal
2803   // interpreter frame, (resized) caller of deoptee, ...).
2804 
2805   // push a dummy "unpack" frame taking care of float return values.
2806   // call `Deoptimization::unpack_frames' to layout information in the
2807   // interpreter frames just created
2808 
2809   // push the "unpack" frame
2810    const unsigned int framesize_in_bytes = __ push_frame_abi160(0);
2811 
2812   // stack: (unpack frame, skeletal interpreter frame, ..., optional
2813   // skeletal interpreter frame, (resized) caller of deoptee, ...).
2814 
2815   // set the "unpack" frame as last_Java_frame
2816   __ get_PC(Z_R1_scratch);
2817   __ set_last_Java_frame(/*sp*/Z_SP, /*pc*/Z_R1_scratch);
2818 
2819   // indicate it is the uncommon trap case
2820   BLOCK_COMMENT("call Deoptimization::Unpack_uncommon_trap()");
2821   __ load_const_optimized(unc_trap_reg, Deoptimization::Unpack_uncommon_trap);
2822   // let the unpacker layout information in the skeletal frames just allocated.
2823   __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), Z_thread);
2824 
2825   __ reset_last_Java_frame();
2826   // pop the "unpack" frame
2827   __ pop_frame();
2828   // restore LR from top interpreter frame
2829   __ restore_return_pc();
2830 
2831   // stack: (top interpreter frame, ..., optional interpreter frame,
2832   // (resized) caller of deoptee, ...).
2833 
2834   __ z_lg(Z_fp, _z_abi(callers_sp), Z_SP); // restore frame pointer
2835   __ restore_bcp();
2836   __ restore_locals();
2837   __ restore_esp();
2838 
2839   // return to the interpreter entry point
2840   __ z_br(Z_R14);
2841 
2842   masm->flush();
2843   _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, NULL, framesize_in_bytes/wordSize);
2844 }
2845 #endif // COMPILER2
2846 
2847 
2848 //------------------------------generate_handler_blob------
2849 //
2850 // Generate a special Compile2Runtime blob that saves all registers,
2851 // and setup oopmap.
2852 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2853   assert(StubRoutines::forward_exception_entry() != NULL,
2854          "must be generated before");
2855 
2856   ResourceMark rm;
2857   OopMapSet *oop_maps = new OopMapSet();
2858   OopMap* map;
2859 
2860   // Allocate space for the code. Setup code generation tools.
2861   CodeBuffer buffer("handler_blob", 2048, 1024);
2862   MacroAssembler* masm = new MacroAssembler(&buffer);
2863 
2864   unsigned int start_off = __ offset();
2865   address call_pc = NULL;
2866   int frame_size_in_bytes;
2867 
2868   bool cause_return = (poll_type == POLL_AT_RETURN);
2869   // Make room for return address (or push it again)
2870   if (!cause_return) {
2871     __ z_lg(Z_R14, Address(Z_thread, JavaThread::saved_exception_pc_offset()));
2872   }
2873 
2874   // Save registers, fpu state, and flags
2875   map = RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers);
2876 
2877   if (!cause_return) {
2878     // Keep a copy of the return pc to detect if it gets modified.
2879     __ z_lgr(Z_R6, Z_R14);
2880   }
2881 
2882   // The following is basically a call_VM. However, we need the precise
2883   // address of the call in order to generate an oopmap. Hence, we do all the
2884   // work ourselves.
2885   __ set_last_Java_frame(Z_SP, noreg);
2886 
2887   // call into the runtime to handle the safepoint poll
2888   __ call_VM_leaf(call_ptr, Z_thread);
2889 
2890 
2891   // Set an oopmap for the call site. This oopmap will map all
2892   // oop-registers and debug-info registers as callee-saved. This
2893   // will allow deoptimization at this safepoint to find all possible
2894   // debug-info recordings, as well as let GC find all oops.
2895 
2896   oop_maps->add_gc_map((int)(__ offset()-start_off), map);
2897 
2898   Label noException;
2899 
2900   __ reset_last_Java_frame();
2901 
2902   __ load_and_test_long(Z_R1, thread_(pending_exception));
2903   __ z_bre(noException);
2904 
2905   // Pending exception case, used (sporadically) by
2906   // api/java_lang/Thread.State/index#ThreadState et al.
2907   RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers);
2908 
2909   // Jump to forward_exception_entry, with the issuing PC in Z_R14
2910   // so it looks like the original nmethod called forward_exception_entry.
2911   __ load_const_optimized(Z_R1_scratch, StubRoutines::forward_exception_entry());
2912   __ z_br(Z_R1_scratch);
2913 
2914   // No exception case
2915   __ bind(noException);
2916 
2917   if (!cause_return) {
2918     Label no_adjust;
2919      // If our stashed return pc was modified by the runtime we avoid touching it
2920     const int offset_of_return_pc = _z_abi16(return_pc) + RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers);
2921     __ z_cg(Z_R6, offset_of_return_pc, Z_SP);
2922     __ z_brne(no_adjust);
2923 
2924     // Adjust return pc forward to step over the safepoint poll instruction
2925     __ instr_size(Z_R1_scratch, Z_R6);
2926     __ z_agr(Z_R6, Z_R1_scratch);
2927     __ z_stg(Z_R6, offset_of_return_pc, Z_SP);
2928 
2929     __ bind(no_adjust);
2930   }
2931 
2932   // Normal exit, restore registers and exit.
2933   RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers);
2934 
2935   __ z_br(Z_R14);
2936 
2937   // Make sure all code is generated
2938   masm->flush();
2939 
2940   // Fill-out other meta info
2941   return SafepointBlob::create(&buffer, oop_maps, RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)/wordSize);
2942 }
2943 
2944 
2945 //
2946 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2947 //
2948 // Generate a stub that calls into vm to find out the proper destination
2949 // of a Java call. All the argument registers are live at this point
2950 // but since this is generic code we don't know what they are and the caller
2951 // must do any gc of the args.
2952 //
2953 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2954   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2955 
2956   // allocate space for the code
2957   ResourceMark rm;
2958 
2959   CodeBuffer buffer(name, 1000, 512);
2960   MacroAssembler* masm                = new MacroAssembler(&buffer);
2961 
2962   OopMapSet *oop_maps = new OopMapSet();
2963   OopMap* map = NULL;
2964 
2965   unsigned int start_off = __ offset();
2966 
2967   map = RegisterSaver::save_live_registers(masm, RegisterSaver::all_registers);
2968 
2969   // We must save a PC from within the stub as return PC
2970   // C code doesn't store the LR where we expect the PC,
2971   // so we would run into trouble upon stack walking.
2972   __ get_PC(Z_R1_scratch);
2973 
2974   unsigned int frame_complete = __ offset();
2975 
2976   __ set_last_Java_frame(/*sp*/Z_SP, Z_R1_scratch);
2977 
2978   __ call_VM_leaf(destination, Z_thread, Z_method);
2979 
2980 
2981   // Set an oopmap for the call site.
2982   // We need this not only for callee-saved registers, but also for volatile
2983   // registers that the compiler might be keeping live across a safepoint.
2984 
2985   oop_maps->add_gc_map((int)(frame_complete-start_off), map);
2986 
2987   // clear last_Java_sp
2988   __ reset_last_Java_frame();
2989 
2990   // check for pending exceptions
2991   Label pending;
2992   __ load_and_test_long(Z_R0, Address(Z_thread, Thread::pending_exception_offset()));
2993   __ z_brne(pending);
2994 
2995   __ z_lgr(Z_R1_scratch, Z_R2); // r1 is neither saved nor restored, r2 contains the continuation.
2996   RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers);
2997 
2998   // get the returned method
2999   __ get_vm_result_2(Z_method);
3000 
3001   // We are back the the original state on entry and ready to go.
3002   __ z_br(Z_R1_scratch);
3003 
3004   // Pending exception after the safepoint
3005 
3006   __ bind(pending);
3007 
3008   RegisterSaver::restore_live_registers(masm, RegisterSaver::all_registers);
3009 
3010   // exception pending => remove activation and forward to exception handler
3011 
3012   __ z_lgr(Z_R2, Z_R0); // pending_exception
3013   __ clear_mem(Address(Z_thread, JavaThread::vm_result_offset()), sizeof(jlong));
3014   __ load_const_optimized(Z_R1_scratch, StubRoutines::forward_exception_entry());
3015   __ z_br(Z_R1_scratch);
3016 
3017   // -------------
3018   // make sure all code is generated
3019   masm->flush();
3020 
3021   // return the blob
3022   // frame_size_words or bytes??
3023   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers)/wordSize,
3024                                        oop_maps, true);
3025 
3026 }
3027 
3028 //------------------------------Montgomery multiplication------------------------
3029 //
3030 
3031 // Subtract 0:b from carry:a. Return carry.
3032 static unsigned long
3033 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3034   unsigned long i, c = 8 * (unsigned long)(len - 1);
3035   __asm__ __volatile__ (
3036     "SLGR   %[i], %[i]         \n" // initialize to 0 and pre-set carry
3037     "LGHI   0, 8               \n" // index increment (for BRXLG)
3038     "LGR    1, %[c]            \n" // index limit (for BRXLG)
3039     "0:                        \n"
3040     "LG     %[c], 0(%[i],%[a]) \n"
3041     "SLBG   %[c], 0(%[i],%[b]) \n" // subtract with borrow
3042     "STG    %[c], 0(%[i],%[a]) \n"
3043     "BRXLG  %[i], 0, 0b        \n" // while ((i+=8)<limit);
3044     "SLBGR  %[c], %[c]         \n" // save carry - 1
3045     : [i]"=&a"(i), [c]"+r"(c)
3046     : [a]"a"(a), [b]"a"(b)
3047     : "cc", "memory", "r0", "r1"
3048  );
3049   return carry + c;
3050 }
3051 
3052 // Multiply (unsigned) Long A by Long B, accumulating the double-
3053 // length result into the accumulator formed of T0, T1, and T2.
3054 inline void MACC(unsigned long A[], long A_ind,
3055                  unsigned long B[], long B_ind,
3056                  unsigned long &T0, unsigned long &T1, unsigned long &T2) {
3057   long A_si = 8 * A_ind,
3058        B_si = 8 * B_ind;
3059   __asm__ __volatile__ (
3060     "LG     1, 0(%[A_si],%[A]) \n"
3061     "MLG    0, 0(%[B_si],%[B]) \n" // r0r1 = A * B
3062     "ALGR   %[T0], 1           \n"
3063     "LGHI   1, 0               \n" // r1 = 0
3064     "ALCGR  %[T1], 0           \n"
3065     "ALCGR  %[T2], 1           \n"
3066     : [T0]"+r"(T0), [T1]"+r"(T1), [T2]"+r"(T2)
3067     : [A]"r"(A), [A_si]"r"(A_si), [B]"r"(B), [B_si]"r"(B_si)
3068     : "cc", "r0", "r1"
3069  );
3070 }
3071 
3072 // As above, but add twice the double-length result into the
3073 // accumulator.
3074 inline void MACC2(unsigned long A[], long A_ind,
3075                   unsigned long B[], long B_ind,
3076                   unsigned long &T0, unsigned long &T1, unsigned long &T2) {
3077   const unsigned long zero = 0;
3078   long A_si = 8 * A_ind,
3079        B_si = 8 * B_ind;
3080   __asm__ __volatile__ (
3081     "LG     1, 0(%[A_si],%[A]) \n"
3082     "MLG    0, 0(%[B_si],%[B]) \n" // r0r1 = A * B
3083     "ALGR   %[T0], 1           \n"
3084     "ALCGR  %[T1], 0           \n"
3085     "ALCGR  %[T2], %[zero]     \n"
3086     "ALGR   %[T0], 1           \n"
3087     "ALCGR  %[T1], 0           \n"
3088     "ALCGR  %[T2], %[zero]     \n"
3089     : [T0]"+r"(T0), [T1]"+r"(T1), [T2]"+r"(T2)
3090     : [A]"r"(A), [A_si]"r"(A_si), [B]"r"(B), [B_si]"r"(B_si), [zero]"r"(zero)
3091     : "cc", "r0", "r1"
3092  );
3093 }
3094 
3095 // Fast Montgomery multiplication. The derivation of the algorithm is
3096 // in "A Cryptographic Library for the Motorola DSP56000,
3097 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237".
3098 static void
3099 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3100                     unsigned long m[], unsigned long inv, int len) {
3101   unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3102   int i;
3103 
3104   assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3105 
3106   for (i = 0; i < len; i++) {
3107     int j;
3108     for (j = 0; j < i; j++) {
3109       MACC(a, j, b, i-j, t0, t1, t2);
3110       MACC(m, j, n, i-j, t0, t1, t2);
3111     }
3112     MACC(a, i, b, 0, t0, t1, t2);
3113     m[i] = t0 * inv;
3114     MACC(m, i, n, 0, t0, t1, t2);
3115 
3116     assert(t0 == 0, "broken Montgomery multiply");
3117 
3118     t0 = t1; t1 = t2; t2 = 0;
3119   }
3120 
3121   for (i = len; i < 2 * len; i++) {
3122     int j;
3123     for (j = i - len + 1; j < len; j++) {
3124       MACC(a, j, b, i-j, t0, t1, t2);
3125       MACC(m, j, n, i-j, t0, t1, t2);
3126     }
3127     m[i-len] = t0;
3128     t0 = t1; t1 = t2; t2 = 0;
3129   }
3130 
3131   while (t0) {
3132     t0 = sub(m, n, t0, len);
3133   }
3134 }
3135 
3136 // Fast Montgomery squaring. This uses asymptotically 25% fewer
3137 // multiplies so it should be up to 25% faster than Montgomery
3138 // multiplication. However, its loop control is more complex and it
3139 // may actually run slower on some machines.
3140 static void
3141 montgomery_square(unsigned long a[], unsigned long n[],
3142                   unsigned long m[], unsigned long inv, int len) {
3143   unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3144   int i;
3145 
3146   assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3147 
3148   for (i = 0; i < len; i++) {
3149     int j;
3150     int end = (i+1)/2;
3151     for (j = 0; j < end; j++) {
3152       MACC2(a, j, a, i-j, t0, t1, t2);
3153       MACC(m, j, n, i-j, t0, t1, t2);
3154     }
3155     if ((i & 1) == 0) {
3156       MACC(a, j, a, j, t0, t1, t2);
3157     }
3158     for (; j < i; j++) {
3159       MACC(m, j, n, i-j, t0, t1, t2);
3160     }
3161     m[i] = t0 * inv;
3162     MACC(m, i, n, 0, t0, t1, t2);
3163 
3164     assert(t0 == 0, "broken Montgomery square");
3165 
3166     t0 = t1; t1 = t2; t2 = 0;
3167   }
3168 
3169   for (i = len; i < 2*len; i++) {
3170     int start = i-len+1;
3171     int end = start + (len - start)/2;
3172     int j;
3173     for (j = start; j < end; j++) {
3174       MACC2(a, j, a, i-j, t0, t1, t2);
3175       MACC(m, j, n, i-j, t0, t1, t2);
3176     }
3177     if ((i & 1) == 0) {
3178       MACC(a, j, a, j, t0, t1, t2);
3179     }
3180     for (; j < len; j++) {
3181       MACC(m, j, n, i-j, t0, t1, t2);
3182     }
3183     m[i-len] = t0;
3184     t0 = t1; t1 = t2; t2 = 0;
3185   }
3186 
3187   while (t0) {
3188     t0 = sub(m, n, t0, len);
3189   }
3190 }
3191 
3192 // The threshold at which squaring is advantageous was determined
3193 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
3194 // Value seems to be ok for other platforms, too.
3195 #define MONTGOMERY_SQUARING_THRESHOLD 64
3196 
3197 // Copy len longwords from s to d, word-swapping as we go. The
3198 // destination array is reversed.
3199 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
3200   d += len;
3201   while(len-- > 0) {
3202     d--;
3203     unsigned long s_val = *s;
3204     // Swap words in a longword on little endian machines.
3205 #ifdef VM_LITTLE_ENDIAN
3206      Unimplemented();
3207 #endif
3208     *d = s_val;
3209     s++;
3210   }
3211 }
3212 
3213 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
3214                                         jint len, jlong inv,
3215                                         jint *m_ints) {
3216   len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls.
3217   assert(len % 2 == 0, "array length in montgomery_multiply must be even");
3218   int longwords = len/2;
3219 
3220   // Make very sure we don't use so much space that the stack might
3221   // overflow. 512 jints corresponds to an 16384-bit integer and
3222   // will use here a total of 8k bytes of stack space.
3223   int divisor = sizeof(unsigned long) * 4;
3224   guarantee(longwords <= 8192 / divisor, "must be");
3225   int total_allocation = longwords * sizeof (unsigned long) * 4;
3226   unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3227 
3228   // Local scratch arrays
3229   unsigned long
3230     *a = scratch + 0 * longwords,
3231     *b = scratch + 1 * longwords,
3232     *n = scratch + 2 * longwords,
3233     *m = scratch + 3 * longwords;
3234 
3235   reverse_words((unsigned long *)a_ints, a, longwords);
3236   reverse_words((unsigned long *)b_ints, b, longwords);
3237   reverse_words((unsigned long *)n_ints, n, longwords);
3238 
3239   ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
3240 
3241   reverse_words(m, (unsigned long *)m_ints, longwords);
3242 }
3243 
3244 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
3245                                       jint len, jlong inv,
3246                                       jint *m_ints) {
3247   len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls.
3248   assert(len % 2 == 0, "array length in montgomery_square must be even");
3249   int longwords = len/2;
3250 
3251   // Make very sure we don't use so much space that the stack might
3252   // overflow. 512 jints corresponds to an 16384-bit integer and
3253   // will use here a total of 6k bytes of stack space.
3254   int divisor = sizeof(unsigned long) * 3;
3255   guarantee(longwords <= (8192 / divisor), "must be");
3256   int total_allocation = longwords * sizeof (unsigned long) * 3;
3257   unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3258 
3259   // Local scratch arrays
3260   unsigned long
3261     *a = scratch + 0 * longwords,
3262     *n = scratch + 1 * longwords,
3263     *m = scratch + 2 * longwords;
3264 
3265   reverse_words((unsigned long *)a_ints, a, longwords);
3266   reverse_words((unsigned long *)n_ints, n, longwords);
3267 
3268   if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
3269     ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
3270   } else {
3271     ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
3272   }
3273 
3274   reverse_words(m, (unsigned long *)m_ints, longwords);
3275 }
3276 
3277 extern "C"
3278 int SpinPause() {
3279   return 0;
3280 }
3281 
3282 #ifdef COMPILER2
3283 RuntimeStub* SharedRuntime::make_native_invoker(address call_target,
3284                                                 int shadow_space_bytes,
3285                                                 const GrowableArray<VMReg>& input_registers,
3286                                                 const GrowableArray<VMReg>& output_registers) {
3287   Unimplemented();
3288   return nullptr;
3289 }
3290 #endif