895 Disassembler::decode((address)pc-64, (address)pc);
896 tty->print_cr("--------");
897 Disassembler::decode((address)pc, (address)pc+32);
898 }
899
900 // The java_calling_convention describes stack locations as ideal slots on
901 // a frame with no abi restrictions. Since we must observe abi restrictions
902 // (like the placement of the register window) the slots must be biased by
903 // the following value.
904 static int reg2offset_in(VMReg r) {
905 // Account for saved rbp and return address
906 // This should really be in_preserve_stack_slots
907 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
908 }
909
910 static int reg2offset_out(VMReg r) {
911 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
912 }
913
914 // A long move
915 void MacroAssembler::long_move(VMRegPair src, VMRegPair dst) {
916
917 // The calling conventions assures us that each VMregpair is either
918 // all really one physical register or adjacent stack slots.
919
920 if (src.is_single_phys_reg() ) {
921 if (dst.is_single_phys_reg()) {
922 if (dst.first() != src.first()) {
923 mov(dst.first()->as_Register(), src.first()->as_Register());
924 }
925 } else {
926 assert(dst.is_single_reg(), "not a stack pair");
927 movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
928 }
929 } else if (dst.is_single_phys_reg()) {
930 assert(src.is_single_reg(), "not a stack pair");
931 movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
932 } else {
933 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
934 movq(rax, Address(rbp, reg2offset_in(src.first())));
935 movq(Address(rsp, reg2offset_out(dst.first())), rax);
936 }
937 }
938
939 // A double move
940 void MacroAssembler::double_move(VMRegPair src, VMRegPair dst) {
941
942 // The calling conventions assures us that each VMregpair is either
943 // all really one physical register or adjacent stack slots.
944
945 if (src.is_single_phys_reg() ) {
946 if (dst.is_single_phys_reg()) {
947 // In theory these overlap but the ordering is such that this is likely a nop
948 if ( src.first() != dst.first()) {
949 movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
950 }
951 } else {
952 assert(dst.is_single_reg(), "not a stack pair");
953 movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
954 }
955 } else if (dst.is_single_phys_reg()) {
956 assert(src.is_single_reg(), "not a stack pair");
957 movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
958 } else {
959 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
960 movq(rax, Address(rbp, reg2offset_in(src.first())));
961 movq(Address(rsp, reg2offset_out(dst.first())), rax);
962 }
963 }
964
965
966 // A float arg may have to do float reg int reg conversion
967 void MacroAssembler::float_move(VMRegPair src, VMRegPair dst) {
968 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
969
970 // The calling conventions assures us that each VMregpair is either
971 // all really one physical register or adjacent stack slots.
972
973 if (src.first()->is_stack()) {
974 if (dst.first()->is_stack()) {
975 movl(rax, Address(rbp, reg2offset_in(src.first())));
976 movptr(Address(rsp, reg2offset_out(dst.first())), rax);
977 } else {
978 // stack to reg
979 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
980 movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
981 }
982 } else if (dst.first()->is_stack()) {
983 // reg to stack
984 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
985 movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
986 } else {
987 // reg to reg
988 // In theory these overlap but the ordering is such that this is likely a nop
989 if ( src.first() != dst.first()) {
990 movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
991 }
992 }
993 }
994
995 // On 64 bit we will store integer like items to the stack as
996 // 64 bits items (x86_32/64 abi) even though java would only store
997 // 32bits for a parameter. On 32bit it will simply be 32 bits
998 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
999 void MacroAssembler::move32_64(VMRegPair src, VMRegPair dst) {
1000 if (src.first()->is_stack()) {
1001 if (dst.first()->is_stack()) {
1002 // stack to stack
1003 movslq(rax, Address(rbp, reg2offset_in(src.first())));
1004 movq(Address(rsp, reg2offset_out(dst.first())), rax);
1005 } else {
1006 // stack to reg
1007 movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1008 }
1009 } else if (dst.first()->is_stack()) {
1010 // reg to stack
1011 // Do we really have to sign extend???
1012 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1013 movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1014 } else {
1015 // Do we really have to sign extend???
1016 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1017 if (dst.first() != src.first()) {
1018 movq(dst.first()->as_Register(), src.first()->as_Register());
1019 }
1020 }
1021 }
1022
1023 void MacroAssembler::move_ptr(VMRegPair src, VMRegPair dst) {
1024 if (src.first()->is_stack()) {
1025 if (dst.first()->is_stack()) {
1026 // stack to stack
1027 movq(rax, Address(rbp, reg2offset_in(src.first())));
1028 movq(Address(rsp, reg2offset_out(dst.first())), rax);
1029 } else {
1030 // stack to reg
1031 movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1032 }
1033 } else if (dst.first()->is_stack()) {
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895 Disassembler::decode((address)pc-64, (address)pc);
896 tty->print_cr("--------");
897 Disassembler::decode((address)pc, (address)pc+32);
898 }
899
900 // The java_calling_convention describes stack locations as ideal slots on
901 // a frame with no abi restrictions. Since we must observe abi restrictions
902 // (like the placement of the register window) the slots must be biased by
903 // the following value.
904 static int reg2offset_in(VMReg r) {
905 // Account for saved rbp and return address
906 // This should really be in_preserve_stack_slots
907 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
908 }
909
910 static int reg2offset_out(VMReg r) {
911 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
912 }
913
914 // A long move
915 void MacroAssembler::long_move(VMRegPair src, VMRegPair dst, Register tmp, int in_stk_bias, int out_stk_bias) {
916
917 // The calling conventions assures us that each VMregpair is either
918 // all really one physical register or adjacent stack slots.
919
920 if (src.is_single_phys_reg() ) {
921 if (dst.is_single_phys_reg()) {
922 if (dst.first() != src.first()) {
923 mov(dst.first()->as_Register(), src.first()->as_Register());
924 }
925 } else {
926 assert(dst.is_single_reg(), "not a stack pair: (%s, %s), (%s, %s)",
927 src.first()->name(), src.second()->name(), dst.first()->name(), dst.second()->name());
928 movq(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), src.first()->as_Register());
929 }
930 } else if (dst.is_single_phys_reg()) {
931 assert(src.is_single_reg(), "not a stack pair");
932 movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
933 } else {
934 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
935 movq(tmp, Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
936 movq(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), tmp);
937 }
938 }
939
940 // A double move
941 void MacroAssembler::double_move(VMRegPair src, VMRegPair dst, Register tmp, int in_stk_bias, int out_stk_bias) {
942
943 // The calling conventions assures us that each VMregpair is either
944 // all really one physical register or adjacent stack slots.
945
946 if (src.is_single_phys_reg() ) {
947 if (dst.is_single_phys_reg()) {
948 // In theory these overlap but the ordering is such that this is likely a nop
949 if ( src.first() != dst.first()) {
950 movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
951 }
952 } else {
953 assert(dst.is_single_reg(), "not a stack pair");
954 movdbl(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), src.first()->as_XMMRegister());
955 }
956 } else if (dst.is_single_phys_reg()) {
957 assert(src.is_single_reg(), "not a stack pair");
958 movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
959 } else {
960 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
961 movq(tmp, Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
962 movq(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), tmp);
963 }
964 }
965
966
967 // A float arg may have to do float reg int reg conversion
968 void MacroAssembler::float_move(VMRegPair src, VMRegPair dst, Register tmp, int in_stk_bias, int out_stk_bias) {
969 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
970
971 // The calling conventions assures us that each VMregpair is either
972 // all really one physical register or adjacent stack slots.
973
974 if (src.first()->is_stack()) {
975 if (dst.first()->is_stack()) {
976 movl(tmp, Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
977 movptr(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), tmp);
978 } else {
979 // stack to reg
980 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
981 movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
982 }
983 } else if (dst.first()->is_stack()) {
984 // reg to stack
985 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
986 movflt(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), src.first()->as_XMMRegister());
987 } else {
988 // reg to reg
989 // In theory these overlap but the ordering is such that this is likely a nop
990 if ( src.first() != dst.first()) {
991 movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
992 }
993 }
994 }
995
996 // On 64 bit we will store integer like items to the stack as
997 // 64 bits items (x86_32/64 abi) even though java would only store
998 // 32bits for a parameter. On 32bit it will simply be 32 bits
999 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
1000 void MacroAssembler::move32_64(VMRegPair src, VMRegPair dst, Register tmp, int in_stk_bias, int out_stk_bias) {
1001 if (src.first()->is_stack()) {
1002 if (dst.first()->is_stack()) {
1003 // stack to stack
1004 movslq(tmp, Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
1005 movq(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), tmp);
1006 } else {
1007 // stack to reg
1008 movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()) + in_stk_bias));
1009 }
1010 } else if (dst.first()->is_stack()) {
1011 // reg to stack
1012 // Do we really have to sign extend???
1013 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1014 movq(Address(rsp, reg2offset_out(dst.first()) + out_stk_bias), src.first()->as_Register());
1015 } else {
1016 // Do we really have to sign extend???
1017 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1018 if (dst.first() != src.first()) {
1019 movq(dst.first()->as_Register(), src.first()->as_Register());
1020 }
1021 }
1022 }
1023
1024 void MacroAssembler::move_ptr(VMRegPair src, VMRegPair dst) {
1025 if (src.first()->is_stack()) {
1026 if (dst.first()->is_stack()) {
1027 // stack to stack
1028 movq(rax, Address(rbp, reg2offset_in(src.first())));
1029 movq(Address(rsp, reg2offset_out(dst.first())), rax);
1030 } else {
1031 // stack to reg
1032 movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1033 }
1034 } else if (dst.first()->is_stack()) {
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