1 /*
   2  * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "code/vmreg.inline.hpp"
  30 #include "compiler/oopMap.hpp"
  31 #include "utilities/macros.hpp"
  32 #include "runtime/rtmLocking.hpp"
  33 #include "runtime/vm_version.hpp"
  34 
  35 // MacroAssembler extends Assembler by frequently used macros.
  36 //
  37 // Instructions for which a 'better' code sequence exists depending
  38 // on arguments should also go in here.
  39 
  40 class MacroAssembler: public Assembler {
  41   friend class LIR_Assembler;
  42   friend class Runtime1;      // as_Address()
  43 
  44  public:
  45   // Support for VM calls
  46   //
  47   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  48   // may customize this version by overriding it for its purposes (e.g., to save/restore
  49   // additional registers when doing a VM call).
  50 
  51   virtual void call_VM_leaf_base(
  52     address entry_point,               // the entry point
  53     int     number_of_arguments        // the number of arguments to pop after the call
  54   );
  55 
  56  protected:
  57   // This is the base routine called by the different versions of call_VM. The interpreter
  58   // may customize this version by overriding it for its purposes (e.g., to save/restore
  59   // additional registers when doing a VM call).
  60   //
  61   // If no java_thread register is specified (noreg) than rdi will be used instead. call_VM_base
  62   // returns the register which contains the thread upon return. If a thread register has been
  63   // specified, the return value will correspond to that register. If no last_java_sp is specified
  64   // (noreg) than rsp will be used instead.
  65   virtual void call_VM_base(           // returns the register containing the thread upon return
  66     Register oop_result,               // where an oop-result ends up if any; use noreg otherwise
  67     Register java_thread,              // the thread if computed before     ; use noreg otherwise
  68     Register last_java_sp,             // to set up last_Java_frame in stubs; use noreg otherwise
  69     address  entry_point,              // the entry point
  70     int      number_of_arguments,      // the number of arguments (w/o thread) to pop after the call
  71     bool     check_exceptions          // whether to check for pending exceptions after return
  72   );
  73 
  74   void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions = true);
  75 
  76   // helpers for FPU flag access
  77   // tmp is a temporary register, if none is available use noreg
  78   void save_rax   (Register tmp);
  79   void restore_rax(Register tmp);
  80 
  81  public:
  82   MacroAssembler(CodeBuffer* code) : Assembler(code) {}
  83 
  84  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  85  // The implementation is only non-empty for the InterpreterMacroAssembler,
  86  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  87  virtual void check_and_handle_popframe(Register java_thread);
  88  virtual void check_and_handle_earlyret(Register java_thread);
  89 
  90   Address as_Address(AddressLiteral adr);
  91   Address as_Address(ArrayAddress adr);
  92 
  93   // Support for NULL-checks
  94   //
  95   // Generates code that causes a NULL OS exception if the content of reg is NULL.
  96   // If the accessed location is M[reg + offset] and the offset is known, provide the
  97   // offset. No explicit code generation is needed if the offset is within a certain
  98   // range (0 <= offset <= page_size).
  99 
 100   void null_check(Register reg, int offset = -1);
 101   static bool needs_explicit_null_check(intptr_t offset);
 102   static bool uses_implicit_null_check(void* address);
 103 
 104   // Required platform-specific helpers for Label::patch_instructions.
 105   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 106   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 107     unsigned char op = branch[0];
 108     assert(op == 0xE8 /* call */ ||
 109         op == 0xE9 /* jmp */ ||
 110         op == 0xEB /* short jmp */ ||
 111         (op & 0xF0) == 0x70 /* short jcc */ ||
 112         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
 113         op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
 114         "Invalid opcode at patch point");
 115 
 116     if (op == 0xEB || (op & 0xF0) == 0x70) {
 117       // short offset operators (jmp and jcc)
 118       char* disp = (char*) &branch[1];
 119       int imm8 = target - (address) &disp[1];
 120       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
 121                 file == NULL ? "<NULL>" : file, line);
 122       *disp = imm8;
 123     } else {
 124       int* disp = (int*) &branch[(op == 0x0F || op == 0xC7)? 2: 1];
 125       int imm32 = target - (address) &disp[1];
 126       *disp = imm32;
 127     }
 128   }
 129 
 130   // The following 4 methods return the offset of the appropriate move instruction
 131 
 132   // Support for fast byte/short loading with zero extension (depending on particular CPU)
 133   int load_unsigned_byte(Register dst, Address src);
 134   int load_unsigned_short(Register dst, Address src);
 135 
 136   // Support for fast byte/short loading with sign extension (depending on particular CPU)
 137   int load_signed_byte(Register dst, Address src);
 138   int load_signed_short(Register dst, Address src);
 139 
 140   // Support for sign-extension (hi:lo = extend_sign(lo))
 141   void extend_sign(Register hi, Register lo);
 142 
 143   // Load and store values by size and signed-ness
 144   void load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed, Register dst2 = noreg);
 145   void store_sized_value(Address dst, Register src, size_t size_in_bytes, Register src2 = noreg);
 146 
 147   // Support for inc/dec with optimal instruction selection depending on value
 148 
 149   void increment(Register reg, int value = 1) { LP64_ONLY(incrementq(reg, value)) NOT_LP64(incrementl(reg, value)) ; }
 150   void decrement(Register reg, int value = 1) { LP64_ONLY(decrementq(reg, value)) NOT_LP64(decrementl(reg, value)) ; }
 151 
 152   void decrementl(Address dst, int value = 1);
 153   void decrementl(Register reg, int value = 1);
 154 
 155   void decrementq(Register reg, int value = 1);
 156   void decrementq(Address dst, int value = 1);
 157 
 158   void incrementl(Address dst, int value = 1);
 159   void incrementl(Register reg, int value = 1);
 160 
 161   void incrementq(Register reg, int value = 1);
 162   void incrementq(Address dst, int value = 1);
 163 
 164   // Support optimal SSE move instructions.
 165   void movflt(XMMRegister dst, XMMRegister src) {
 166     if (dst-> encoding() == src->encoding()) return;
 167     if (UseXmmRegToRegMoveAll) { movaps(dst, src); return; }
 168     else                       { movss (dst, src); return; }
 169   }
 170   void movflt(XMMRegister dst, Address src) { movss(dst, src); }
 171   void movflt(XMMRegister dst, AddressLiteral src);
 172   void movflt(Address dst, XMMRegister src) { movss(dst, src); }
 173 
 174   // Move with zero extension
 175   void movfltz(XMMRegister dst, XMMRegister src) { movss(dst, src); }
 176 
 177   void movdbl(XMMRegister dst, XMMRegister src) {
 178     if (dst-> encoding() == src->encoding()) return;
 179     if (UseXmmRegToRegMoveAll) { movapd(dst, src); return; }
 180     else                       { movsd (dst, src); return; }
 181   }
 182 
 183   void movdbl(XMMRegister dst, AddressLiteral src);
 184 
 185   void movdbl(XMMRegister dst, Address src) {
 186     if (UseXmmLoadAndClearUpper) { movsd (dst, src); return; }
 187     else                         { movlpd(dst, src); return; }
 188   }
 189   void movdbl(Address dst, XMMRegister src) { movsd(dst, src); }
 190 
 191   void incrementl(AddressLiteral dst);
 192   void incrementl(ArrayAddress dst);
 193 
 194   void incrementq(AddressLiteral dst);
 195 
 196   // Alignment
 197   void align32();
 198   void align64();
 199   void align(int modulus);
 200   void align(int modulus, int target);
 201 
 202   // A 5 byte nop that is safe for patching (see patch_verified_entry)
 203   void fat_nop();
 204 
 205   // Stack frame creation/removal
 206   void enter();
 207   void leave();
 208 
 209   // Support for getting the JavaThread pointer (i.e.; a reference to thread-local information)
 210   // The pointer will be loaded into the thread register.
 211   void get_thread(Register thread);
 212 
 213 #ifdef _LP64
 214   // Support for argument shuffling
 215 
 216   // bias in bytes
 217   void move32_64(VMRegPair src, VMRegPair dst, Register tmp = rax, int in_stk_bias = 0, int out_stk_bias = 0);
 218   void long_move(VMRegPair src, VMRegPair dst, Register tmp = rax, int in_stk_bias = 0, int out_stk_bias = 0);
 219   void float_move(VMRegPair src, VMRegPair dst, Register tmp = rax, int in_stk_bias = 0, int out_stk_bias = 0);
 220   void double_move(VMRegPair src, VMRegPair dst, Register tmp = rax, int in_stk_bias = 0, int out_stk_bias = 0);
 221   void move_ptr(VMRegPair src, VMRegPair dst);
 222   void object_move(OopMap* map,
 223                    int oop_handle_offset,
 224                    int framesize_in_slots,
 225                    VMRegPair src,
 226                    VMRegPair dst,
 227                    bool is_receiver,
 228                    int* receiver_offset);
 229 #endif // _LP64
 230 
 231   // Support for VM calls
 232   //
 233   // It is imperative that all calls into the VM are handled via the call_VM macros.
 234   // They make sure that the stack linkage is setup correctly. call_VM's correspond
 235   // to ENTRY/ENTRY_X entry points while call_VM_leaf's correspond to LEAF entry points.
 236 
 237 
 238   void call_VM(Register oop_result,
 239                address entry_point,
 240                bool check_exceptions = true);
 241   void call_VM(Register oop_result,
 242                address entry_point,
 243                Register arg_1,
 244                bool check_exceptions = true);
 245   void call_VM(Register oop_result,
 246                address entry_point,
 247                Register arg_1, Register arg_2,
 248                bool check_exceptions = true);
 249   void call_VM(Register oop_result,
 250                address entry_point,
 251                Register arg_1, Register arg_2, Register arg_3,
 252                bool check_exceptions = true);
 253 
 254   // Overloadings with last_Java_sp
 255   void call_VM(Register oop_result,
 256                Register last_java_sp,
 257                address entry_point,
 258                int number_of_arguments = 0,
 259                bool check_exceptions = true);
 260   void call_VM(Register oop_result,
 261                Register last_java_sp,
 262                address entry_point,
 263                Register arg_1, bool
 264                check_exceptions = true);
 265   void call_VM(Register oop_result,
 266                Register last_java_sp,
 267                address entry_point,
 268                Register arg_1, Register arg_2,
 269                bool check_exceptions = true);
 270   void call_VM(Register oop_result,
 271                Register last_java_sp,
 272                address entry_point,
 273                Register arg_1, Register arg_2, Register arg_3,
 274                bool check_exceptions = true);
 275 
 276   void get_vm_result  (Register oop_result, Register thread);
 277   void get_vm_result_2(Register metadata_result, Register thread);
 278 
 279   // These always tightly bind to MacroAssembler::call_VM_base
 280   // bypassing the virtual implementation
 281   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, int number_of_arguments = 0, bool check_exceptions = true);
 282   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, bool check_exceptions = true);
 283   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
 284   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions = true);
 285   void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, Register arg_4, bool check_exceptions = true);
 286 
 287   void call_VM_leaf0(address entry_point);
 288   void call_VM_leaf(address entry_point,
 289                     int number_of_arguments = 0);
 290   void call_VM_leaf(address entry_point,
 291                     Register arg_1);
 292   void call_VM_leaf(address entry_point,
 293                     Register arg_1, Register arg_2);
 294   void call_VM_leaf(address entry_point,
 295                     Register arg_1, Register arg_2, Register arg_3);
 296 
 297   // These always tightly bind to MacroAssembler::call_VM_leaf_base
 298   // bypassing the virtual implementation
 299   void super_call_VM_leaf(address entry_point);
 300   void super_call_VM_leaf(address entry_point, Register arg_1);
 301   void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2);
 302   void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3);
 303   void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3, Register arg_4);
 304 
 305   // last Java Frame (fills frame anchor)
 306   void set_last_Java_frame(Register thread,
 307                            Register last_java_sp,
 308                            Register last_java_fp,
 309                            address last_java_pc);
 310 
 311   // thread in the default location (r15_thread on 64bit)
 312   void set_last_Java_frame(Register last_java_sp,
 313                            Register last_java_fp,
 314                            address last_java_pc);
 315 
 316   void reset_last_Java_frame(Register thread, bool clear_fp);
 317 
 318   // thread in the default location (r15_thread on 64bit)
 319   void reset_last_Java_frame(bool clear_fp);
 320 
 321   // jobjects
 322   void clear_jweak_tag(Register possibly_jweak);
 323   void resolve_jobject(Register value, Register thread, Register tmp);
 324 
 325   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 326   void c2bool(Register x);
 327 
 328   // C++ bool manipulation
 329 
 330   void movbool(Register dst, Address src);
 331   void movbool(Address dst, bool boolconst);
 332   void movbool(Address dst, Register src);
 333   void testbool(Register dst);
 334 
 335   void resolve_oop_handle(Register result, Register tmp = rscratch2);
 336   void resolve_weak_handle(Register result, Register tmp);
 337   void load_mirror(Register mirror, Register method, Register tmp = rscratch2);
 338   void load_method_holder_cld(Register rresult, Register rmethod);
 339 
 340   void load_method_holder(Register holder, Register method);
 341 
 342   // oop manipulations
 343   void load_klass(Register dst, Register src, Register tmp);
 344   void store_klass(Register dst, Register src, Register tmp);
 345 
 346   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 347                       Register tmp1, Register thread_tmp);
 348   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 349                        Register tmp1, Register tmp2);
 350 
 351   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 352                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 353   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 354                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 355   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 356                       Register tmp2 = noreg, DecoratorSet decorators = 0);
 357 
 358   // Used for storing NULL. All other oop constants should be
 359   // stored using routines that take a jobject.
 360   void store_heap_oop_null(Address dst);
 361 
 362 #ifdef _LP64
 363   void store_klass_gap(Register dst, Register src);
 364 
 365   // This dummy is to prevent a call to store_heap_oop from
 366   // converting a zero (like NULL) into a Register by giving
 367   // the compiler two choices it can't resolve
 368 
 369   void store_heap_oop(Address dst, void* dummy);
 370 
 371   void encode_heap_oop(Register r);
 372   void decode_heap_oop(Register r);
 373   void encode_heap_oop_not_null(Register r);
 374   void decode_heap_oop_not_null(Register r);
 375   void encode_heap_oop_not_null(Register dst, Register src);
 376   void decode_heap_oop_not_null(Register dst, Register src);
 377 
 378   void set_narrow_oop(Register dst, jobject obj);
 379   void set_narrow_oop(Address dst, jobject obj);
 380   void cmp_narrow_oop(Register dst, jobject obj);
 381   void cmp_narrow_oop(Address dst, jobject obj);
 382 
 383   void encode_klass_not_null(Register r, Register tmp);
 384   void decode_klass_not_null(Register r, Register tmp);
 385   void encode_and_move_klass_not_null(Register dst, Register src);
 386   void decode_and_move_klass_not_null(Register dst, Register src);
 387   void set_narrow_klass(Register dst, Klass* k);
 388   void set_narrow_klass(Address dst, Klass* k);
 389   void cmp_narrow_klass(Register dst, Klass* k);
 390   void cmp_narrow_klass(Address dst, Klass* k);
 391 
 392   // if heap base register is used - reinit it with the correct value
 393   void reinit_heapbase();
 394 
 395   DEBUG_ONLY(void verify_heapbase(const char* msg);)
 396 
 397 #endif // _LP64
 398 
 399   // Int division/remainder for Java
 400   // (as idivl, but checks for special case as described in JVM spec.)
 401   // returns idivl instruction offset for implicit exception handling
 402   int corrected_idivl(Register reg);
 403 
 404   // Long division/remainder for Java
 405   // (as idivq, but checks for special case as described in JVM spec.)
 406   // returns idivq instruction offset for implicit exception handling
 407   int corrected_idivq(Register reg);
 408 
 409   void int3();
 410 
 411   // Long operation macros for a 32bit cpu
 412   // Long negation for Java
 413   void lneg(Register hi, Register lo);
 414 
 415   // Long multiplication for Java
 416   // (destroys contents of eax, ebx, ecx and edx)
 417   void lmul(int x_rsp_offset, int y_rsp_offset); // rdx:rax = x * y
 418 
 419   // Long shifts for Java
 420   // (semantics as described in JVM spec.)
 421   void lshl(Register hi, Register lo);                               // hi:lo << (rcx & 0x3f)
 422   void lshr(Register hi, Register lo, bool sign_extension = false);  // hi:lo >> (rcx & 0x3f)
 423 
 424   // Long compare for Java
 425   // (semantics as described in JVM spec.)
 426   void lcmp2int(Register x_hi, Register x_lo, Register y_hi, Register y_lo); // x_hi = lcmp(x, y)
 427 
 428 
 429   // misc
 430 
 431   // Sign extension
 432   void sign_extend_short(Register reg);
 433   void sign_extend_byte(Register reg);
 434 
 435   // Division by power of 2, rounding towards 0
 436   void division_with_shift(Register reg, int shift_value);
 437 
 438 #ifndef _LP64
 439   // Compares the top-most stack entries on the FPU stack and sets the eflags as follows:
 440   //
 441   // CF (corresponds to C0) if x < y
 442   // PF (corresponds to C2) if unordered
 443   // ZF (corresponds to C3) if x = y
 444   //
 445   // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
 446   // tmp is a temporary register, if none is available use noreg (only matters for non-P6 code)
 447   void fcmp(Register tmp);
 448   // Variant of the above which allows y to be further down the stack
 449   // and which only pops x and y if specified. If pop_right is
 450   // specified then pop_left must also be specified.
 451   void fcmp(Register tmp, int index, bool pop_left, bool pop_right);
 452 
 453   // Floating-point comparison for Java
 454   // Compares the top-most stack entries on the FPU stack and stores the result in dst.
 455   // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
 456   // (semantics as described in JVM spec.)
 457   void fcmp2int(Register dst, bool unordered_is_less);
 458   // Variant of the above which allows y to be further down the stack
 459   // and which only pops x and y if specified. If pop_right is
 460   // specified then pop_left must also be specified.
 461   void fcmp2int(Register dst, bool unordered_is_less, int index, bool pop_left, bool pop_right);
 462 
 463   // Floating-point remainder for Java (ST0 = ST0 fremr ST1, ST1 is empty afterwards)
 464   // tmp is a temporary register, if none is available use noreg
 465   void fremr(Register tmp);
 466 
 467   // only if +VerifyFPU
 468   void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
 469 #endif // !LP64
 470 
 471   // dst = c = a * b + c
 472   void fmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
 473   void fmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
 474 
 475   void vfmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
 476   void vfmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
 477   void vfmad(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
 478   void vfmaf(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
 479 
 480 
 481   // same as fcmp2int, but using SSE2
 482   void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
 483   void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
 484 
 485   // branch to L if FPU flag C2 is set/not set
 486   // tmp is a temporary register, if none is available use noreg
 487   void jC2 (Register tmp, Label& L);
 488   void jnC2(Register tmp, Label& L);
 489 
 490   // Load float value from 'address'. If UseSSE >= 1, the value is loaded into
 491   // register xmm0. Otherwise, the value is loaded onto the FPU stack.
 492   void load_float(Address src);
 493 
 494   // Store float value to 'address'. If UseSSE >= 1, the value is stored
 495   // from register xmm0. Otherwise, the value is stored from the FPU stack.
 496   void store_float(Address dst);
 497 
 498   // Load double value from 'address'. If UseSSE >= 2, the value is loaded into
 499   // register xmm0. Otherwise, the value is loaded onto the FPU stack.
 500   void load_double(Address src);
 501 
 502   // Store double value to 'address'. If UseSSE >= 2, the value is stored
 503   // from register xmm0. Otherwise, the value is stored from the FPU stack.
 504   void store_double(Address dst);
 505 
 506 #ifndef _LP64
 507   // Pop ST (ffree & fincstp combined)
 508   void fpop();
 509 
 510   void empty_FPU_stack();
 511 #endif // !_LP64
 512 
 513   void push_IU_state();
 514   void pop_IU_state();
 515 
 516   void push_FPU_state();
 517   void pop_FPU_state();
 518 
 519   void push_CPU_state();
 520   void pop_CPU_state();
 521 
 522   // Round up to a power of two
 523   void round_to(Register reg, int modulus);
 524 
 525   // Callee saved registers handling
 526   void push_callee_saved_registers();
 527   void pop_callee_saved_registers();
 528 
 529   // allocation
 530   void eden_allocate(
 531     Register thread,                   // Current thread
 532     Register obj,                      // result: pointer to object after successful allocation
 533     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 534     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 535     Register t1,                       // temp register
 536     Label&   slow_case                 // continuation point if fast allocation fails
 537   );
 538   void tlab_allocate(
 539     Register thread,                   // Current thread
 540     Register obj,                      // result: pointer to object after successful allocation
 541     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 542     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 543     Register t1,                       // temp register
 544     Register t2,                       // temp register
 545     Label&   slow_case                 // continuation point if fast allocation fails
 546   );
 547   void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
 548 
 549   // interface method calling
 550   void lookup_interface_method(Register recv_klass,
 551                                Register intf_klass,
 552                                RegisterOrConstant itable_index,
 553                                Register method_result,
 554                                Register scan_temp,
 555                                Label& no_such_interface,
 556                                bool return_method = true);
 557 
 558   // virtual method calling
 559   void lookup_virtual_method(Register recv_klass,
 560                              RegisterOrConstant vtable_index,
 561                              Register method_result);
 562 
 563   // Test sub_klass against super_klass, with fast and slow paths.
 564 
 565   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 566   // One of the three labels can be NULL, meaning take the fall-through.
 567   // If super_check_offset is -1, the value is loaded up from super_klass.
 568   // No registers are killed, except temp_reg.
 569   void check_klass_subtype_fast_path(Register sub_klass,
 570                                      Register super_klass,
 571                                      Register temp_reg,
 572                                      Label* L_success,
 573                                      Label* L_failure,
 574                                      Label* L_slow_path,
 575                 RegisterOrConstant super_check_offset = RegisterOrConstant(-1));
 576 
 577   // The rest of the type check; must be wired to a corresponding fast path.
 578   // It does not repeat the fast path logic, so don't use it standalone.
 579   // The temp_reg and temp2_reg can be noreg, if no temps are available.
 580   // Updates the sub's secondary super cache as necessary.
 581   // If set_cond_codes, condition codes will be Z on success, NZ on failure.
 582   void check_klass_subtype_slow_path(Register sub_klass,
 583                                      Register super_klass,
 584                                      Register temp_reg,
 585                                      Register temp2_reg,
 586                                      Label* L_success,
 587                                      Label* L_failure,
 588                                      bool set_cond_codes = false);
 589 
 590   // Simplified, combined version, good for typical uses.
 591   // Falls through on failure.
 592   void check_klass_subtype(Register sub_klass,
 593                            Register super_klass,
 594                            Register temp_reg,
 595                            Label& L_success);
 596 
 597   void clinit_barrier(Register klass,
 598                       Register thread,
 599                       Label* L_fast_path = NULL,
 600                       Label* L_slow_path = NULL);
 601 
 602   // method handles (JSR 292)
 603   Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
 604 
 605   // Debugging
 606 
 607   // only if +VerifyOops
 608   void _verify_oop(Register reg, const char* s, const char* file, int line);
 609   void _verify_oop_addr(Address addr, const char* s, const char* file, int line);
 610 
 611   void _verify_oop_checked(Register reg, const char* s, const char* file, int line) {
 612     if (VerifyOops) {
 613       _verify_oop(reg, s, file, line);
 614     }
 615   }
 616   void _verify_oop_addr_checked(Address reg, const char* s, const char* file, int line) {
 617     if (VerifyOops) {
 618       _verify_oop_addr(reg, s, file, line);
 619     }
 620   }
 621 
 622   // TODO: verify method and klass metadata (compare against vptr?)
 623   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
 624   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
 625 
 626 #define verify_oop(reg) _verify_oop_checked(reg, "broken oop " #reg, __FILE__, __LINE__)
 627 #define verify_oop_msg(reg, msg) _verify_oop_checked(reg, "broken oop " #reg ", " #msg, __FILE__, __LINE__)
 628 #define verify_oop_addr(addr) _verify_oop_addr_checked(addr, "broken oop addr " #addr, __FILE__, __LINE__)
 629 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 630 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 631 
 632   // Verify or restore cpu control state after JNI call
 633   void restore_cpu_control_state_after_jni();
 634 
 635   // prints msg, dumps registers and stops execution
 636   void stop(const char* msg);
 637 
 638   // prints msg and continues
 639   void warn(const char* msg);
 640 
 641   // dumps registers and other state
 642   void print_state();
 643 
 644   static void debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg);
 645   static void debug64(char* msg, int64_t pc, int64_t regs[]);
 646   static void print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip);
 647   static void print_state64(int64_t pc, int64_t regs[]);
 648 
 649   void os_breakpoint();
 650 
 651   void untested()                                { stop("untested"); }
 652 
 653   void unimplemented(const char* what = "");
 654 
 655   void should_not_reach_here()                   { stop("should not reach here"); }
 656 
 657   void print_CPU_state();
 658 
 659   // Stack overflow checking
 660   void bang_stack_with_offset(int offset) {
 661     // stack grows down, caller passes positive offset
 662     assert(offset > 0, "must bang with negative offset");
 663     movl(Address(rsp, (-offset)), rax);
 664   }
 665 
 666   // Writes to stack successive pages until offset reached to check for
 667   // stack overflow + shadow pages.  Also, clobbers tmp
 668   void bang_stack_size(Register size, Register tmp);
 669 
 670   // Check for reserved stack access in method being exited (for JIT)
 671   void reserved_stack_check();
 672 
 673   void safepoint_poll(Label& slow_path, Register thread_reg, bool at_return, bool in_nmethod);
 674 
 675   void verify_tlab();
 676 
 677   Condition negate_condition(Condition cond);
 678 
 679   // Instructions that use AddressLiteral operands. These instruction can handle 32bit/64bit
 680   // operands. In general the names are modified to avoid hiding the instruction in Assembler
 681   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
 682   // here in MacroAssembler. The major exception to this rule is call
 683 
 684   // Arithmetics
 685 
 686 
 687   void addptr(Address dst, int32_t src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)) ; }
 688   void addptr(Address dst, Register src);
 689 
 690   void addptr(Register dst, Address src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)); }
 691   void addptr(Register dst, int32_t src);
 692   void addptr(Register dst, Register src);
 693   void addptr(Register dst, RegisterOrConstant src) {
 694     if (src.is_constant()) addptr(dst, (int) src.as_constant());
 695     else                   addptr(dst,       src.as_register());
 696   }
 697 
 698   void andptr(Register dst, int32_t src);
 699   void andptr(Register src1, Register src2) { LP64_ONLY(andq(src1, src2)) NOT_LP64(andl(src1, src2)) ; }
 700 
 701   void cmp8(AddressLiteral src1, int imm);
 702 
 703   // renamed to drag out the casting of address to int32_t/intptr_t
 704   void cmp32(Register src1, int32_t imm);
 705 
 706   void cmp32(AddressLiteral src1, int32_t imm);
 707   // compare reg - mem, or reg - &mem
 708   void cmp32(Register src1, AddressLiteral src2);
 709 
 710   void cmp32(Register src1, Address src2);
 711 
 712 #ifndef _LP64
 713   void cmpklass(Address dst, Metadata* obj);
 714   void cmpklass(Register dst, Metadata* obj);
 715   void cmpoop(Address dst, jobject obj);
 716 #endif // _LP64
 717 
 718   void cmpoop(Register src1, Register src2);
 719   void cmpoop(Register src1, Address src2);
 720   void cmpoop(Register dst, jobject obj);
 721 
 722   // NOTE src2 must be the lval. This is NOT an mem-mem compare
 723   void cmpptr(Address src1, AddressLiteral src2);
 724 
 725   void cmpptr(Register src1, AddressLiteral src2);
 726 
 727   void cmpptr(Register src1, Register src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 728   void cmpptr(Register src1, Address src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 729   // void cmpptr(Address src1, Register src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 730 
 731   void cmpptr(Register src1, int32_t src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 732   void cmpptr(Address src1, int32_t src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
 733 
 734   // cmp64 to avoild hiding cmpq
 735   void cmp64(Register src1, AddressLiteral src);
 736 
 737   void cmpxchgptr(Register reg, Address adr);
 738 
 739   void locked_cmpxchgptr(Register reg, AddressLiteral adr);
 740 
 741 
 742   void imulptr(Register dst, Register src) { LP64_ONLY(imulq(dst, src)) NOT_LP64(imull(dst, src)); }
 743   void imulptr(Register dst, Register src, int imm32) { LP64_ONLY(imulq(dst, src, imm32)) NOT_LP64(imull(dst, src, imm32)); }
 744 
 745 
 746   void negptr(Register dst) { LP64_ONLY(negq(dst)) NOT_LP64(negl(dst)); }
 747 
 748   void notptr(Register dst) { LP64_ONLY(notq(dst)) NOT_LP64(notl(dst)); }
 749 
 750   void shlptr(Register dst, int32_t shift);
 751   void shlptr(Register dst) { LP64_ONLY(shlq(dst)) NOT_LP64(shll(dst)); }
 752 
 753   void shrptr(Register dst, int32_t shift);
 754   void shrptr(Register dst) { LP64_ONLY(shrq(dst)) NOT_LP64(shrl(dst)); }
 755 
 756   void sarptr(Register dst) { LP64_ONLY(sarq(dst)) NOT_LP64(sarl(dst)); }
 757   void sarptr(Register dst, int32_t src) { LP64_ONLY(sarq(dst, src)) NOT_LP64(sarl(dst, src)); }
 758 
 759   void subptr(Address dst, int32_t src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
 760 
 761   void subptr(Register dst, Address src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
 762   void subptr(Register dst, int32_t src);
 763   // Force generation of a 4 byte immediate value even if it fits into 8bit
 764   void subptr_imm32(Register dst, int32_t src);
 765   void subptr(Register dst, Register src);
 766   void subptr(Register dst, RegisterOrConstant src) {
 767     if (src.is_constant()) subptr(dst, (int) src.as_constant());
 768     else                   subptr(dst,       src.as_register());
 769   }
 770 
 771   void sbbptr(Address dst, int32_t src) { LP64_ONLY(sbbq(dst, src)) NOT_LP64(sbbl(dst, src)); }
 772   void sbbptr(Register dst, int32_t src) { LP64_ONLY(sbbq(dst, src)) NOT_LP64(sbbl(dst, src)); }
 773 
 774   void xchgptr(Register src1, Register src2) { LP64_ONLY(xchgq(src1, src2)) NOT_LP64(xchgl(src1, src2)) ; }
 775   void xchgptr(Register src1, Address src2) { LP64_ONLY(xchgq(src1, src2)) NOT_LP64(xchgl(src1, src2)) ; }
 776 
 777   void xaddptr(Address src1, Register src2) { LP64_ONLY(xaddq(src1, src2)) NOT_LP64(xaddl(src1, src2)) ; }
 778 
 779 
 780 
 781   // Helper functions for statistics gathering.
 782   // Conditionally (atomically, on MPs) increments passed counter address, preserving condition codes.
 783   void cond_inc32(Condition cond, AddressLiteral counter_addr);
 784   // Unconditional atomic increment.
 785   void atomic_incl(Address counter_addr);
 786   void atomic_incl(AddressLiteral counter_addr, Register scr = rscratch1);
 787 #ifdef _LP64
 788   void atomic_incq(Address counter_addr);
 789   void atomic_incq(AddressLiteral counter_addr, Register scr = rscratch1);
 790 #endif
 791   void atomic_incptr(AddressLiteral counter_addr, Register scr = rscratch1) { LP64_ONLY(atomic_incq(counter_addr, scr)) NOT_LP64(atomic_incl(counter_addr, scr)) ; }
 792   void atomic_incptr(Address counter_addr) { LP64_ONLY(atomic_incq(counter_addr)) NOT_LP64(atomic_incl(counter_addr)) ; }
 793 
 794   void lea(Register dst, AddressLiteral adr);
 795   void lea(Address dst, AddressLiteral adr);
 796   void lea(Register dst, Address adr) { Assembler::lea(dst, adr); }
 797 
 798   void leal32(Register dst, Address src) { leal(dst, src); }
 799 
 800   // Import other testl() methods from the parent class or else
 801   // they will be hidden by the following overriding declaration.
 802   using Assembler::testl;
 803   void testl(Register dst, AddressLiteral src);
 804 
 805   void orptr(Register dst, Address src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
 806   void orptr(Register dst, Register src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
 807   void orptr(Register dst, int32_t src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
 808   void orptr(Address dst, int32_t imm32) { LP64_ONLY(orq(dst, imm32)) NOT_LP64(orl(dst, imm32)); }
 809 
 810   void testptr(Register src, int32_t imm32) {  LP64_ONLY(testq(src, imm32)) NOT_LP64(testl(src, imm32)); }
 811   void testptr(Register src1, Address src2) { LP64_ONLY(testq(src1, src2)) NOT_LP64(testl(src1, src2)); }
 812   void testptr(Register src1, Register src2);
 813 
 814   void xorptr(Register dst, Register src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }
 815   void xorptr(Register dst, Address src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }
 816 
 817   // Calls
 818 
 819   void call(Label& L, relocInfo::relocType rtype);
 820   void call(Register entry);
 821   void call(Address addr) { Assembler::call(addr); }
 822 
 823   // NOTE: this call transfers to the effective address of entry NOT
 824   // the address contained by entry. This is because this is more natural
 825   // for jumps/calls.
 826   void call(AddressLiteral entry);
 827 
 828   // Emit the CompiledIC call idiom
 829   void ic_call(address entry, jint method_index = 0);
 830 
 831   // Jumps
 832 
 833   // NOTE: these jumps tranfer to the effective address of dst NOT
 834   // the address contained by dst. This is because this is more natural
 835   // for jumps/calls.
 836   void jump(AddressLiteral dst);
 837   void jump_cc(Condition cc, AddressLiteral dst);
 838 
 839   // 32bit can do a case table jump in one instruction but we no longer allow the base
 840   // to be installed in the Address class. This jump will tranfers to the address
 841   // contained in the location described by entry (not the address of entry)
 842   void jump(ArrayAddress entry);
 843 
 844   // Floating
 845 
 846   void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
 847   void andpd(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
 848   void andpd(XMMRegister dst, XMMRegister src) { Assembler::andpd(dst, src); }
 849 
 850   void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
 851   void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
 852   void andps(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
 853 
 854   void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
 855   void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
 856   void comiss(XMMRegister dst, AddressLiteral src);
 857 
 858   void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
 859   void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
 860   void comisd(XMMRegister dst, AddressLiteral src);
 861 
 862 #ifndef _LP64
 863   void fadd_s(Address src)        { Assembler::fadd_s(src); }
 864   void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
 865 
 866   void fldcw(Address src) { Assembler::fldcw(src); }
 867   void fldcw(AddressLiteral src);
 868 
 869   void fld_s(int index)   { Assembler::fld_s(index); }
 870   void fld_s(Address src) { Assembler::fld_s(src); }
 871   void fld_s(AddressLiteral src);
 872 
 873   void fld_d(Address src) { Assembler::fld_d(src); }
 874   void fld_d(AddressLiteral src);
 875 
 876   void fmul_s(Address src)        { Assembler::fmul_s(src); }
 877   void fmul_s(AddressLiteral src) { Assembler::fmul_s(as_Address(src)); }
 878 #endif // _LP64
 879 
 880   void fld_x(Address src) { Assembler::fld_x(src); }
 881   void fld_x(AddressLiteral src);
 882 
 883   void ldmxcsr(Address src) { Assembler::ldmxcsr(src); }
 884   void ldmxcsr(AddressLiteral src);
 885 
 886 #ifdef _LP64
 887  private:
 888   void sha256_AVX2_one_round_compute(
 889     Register  reg_old_h,
 890     Register  reg_a,
 891     Register  reg_b,
 892     Register  reg_c,
 893     Register  reg_d,
 894     Register  reg_e,
 895     Register  reg_f,
 896     Register  reg_g,
 897     Register  reg_h,
 898     int iter);
 899   void sha256_AVX2_four_rounds_compute_first(int start);
 900   void sha256_AVX2_four_rounds_compute_last(int start);
 901   void sha256_AVX2_one_round_and_sched(
 902         XMMRegister xmm_0,     /* == ymm4 on 0, 1, 2, 3 iterations, then rotate 4 registers left on 4, 8, 12 iterations */
 903         XMMRegister xmm_1,     /* ymm5 */  /* full cycle is 16 iterations */
 904         XMMRegister xmm_2,     /* ymm6 */
 905         XMMRegister xmm_3,     /* ymm7 */
 906         Register    reg_a,      /* == eax on 0 iteration, then rotate 8 register right on each next iteration */
 907         Register    reg_b,      /* ebx */    /* full cycle is 8 iterations */
 908         Register    reg_c,      /* edi */
 909         Register    reg_d,      /* esi */
 910         Register    reg_e,      /* r8d */
 911         Register    reg_f,      /* r9d */
 912         Register    reg_g,      /* r10d */
 913         Register    reg_h,      /* r11d */
 914         int iter);
 915 
 916   void addm(int disp, Register r1, Register r2);
 917   void gfmul(XMMRegister tmp0, XMMRegister t);
 918   void schoolbookAAD(int i, Register subkeyH, XMMRegister data, XMMRegister tmp0,
 919                      XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3);
 920   void generateHtbl_one_block(Register htbl);
 921   void generateHtbl_eight_blocks(Register htbl);
 922  public:
 923   void sha256_AVX2(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 924                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 925                    Register buf, Register state, Register ofs, Register limit, Register rsp,
 926                    bool multi_block, XMMRegister shuf_mask);
 927   void avx_ghash(Register state, Register htbl, Register data, Register blocks);
 928 #endif
 929 
 930 #ifdef _LP64
 931  private:
 932   void sha512_AVX2_one_round_compute(Register old_h, Register a, Register b, Register c, Register d,
 933                                      Register e, Register f, Register g, Register h, int iteration);
 934 
 935   void sha512_AVX2_one_round_and_schedule(XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
 936                                           Register a, Register b, Register c, Register d, Register e, Register f,
 937                                           Register g, Register h, int iteration);
 938 
 939   void addmq(int disp, Register r1, Register r2);
 940  public:
 941   void sha512_AVX2(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 942                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 943                    Register buf, Register state, Register ofs, Register limit, Register rsp, bool multi_block,
 944                    XMMRegister shuf_mask);
 945 private:
 946   void roundEnc(XMMRegister key, int rnum);
 947   void lastroundEnc(XMMRegister key, int rnum);
 948   void roundDec(XMMRegister key, int rnum);
 949   void lastroundDec(XMMRegister key, int rnum);
 950   void ev_load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask);
 951   void gfmul_avx512(XMMRegister ghash, XMMRegister hkey);
 952   void generateHtbl_48_block_zmm(Register htbl, Register avx512_subkeyHtbl);
 953   void ghash16_encrypt16_parallel(Register key, Register subkeyHtbl, XMMRegister ctr_blockx,
 954                                   XMMRegister aad_hashx, Register in, Register out, Register data, Register pos, bool reduction,
 955                                   XMMRegister addmask, bool no_ghash_input, Register rounds, Register ghash_pos,
 956                                   bool final_reduction, int index, XMMRegister counter_inc_mask);
 957 public:
 958   void aesecb_encrypt(Register source_addr, Register dest_addr, Register key, Register len);
 959   void aesecb_decrypt(Register source_addr, Register dest_addr, Register key, Register len);
 960   void aesctr_encrypt(Register src_addr, Register dest_addr, Register key, Register counter,
 961                       Register len_reg, Register used, Register used_addr, Register saved_encCounter_start);
 962   void aesgcm_encrypt(Register in, Register len, Register ct, Register out, Register key,
 963                       Register state, Register subkeyHtbl, Register avx512_subkeyHtbl, Register counter);
 964 
 965 #endif
 966 
 967   void fast_md5(Register buf, Address state, Address ofs, Address limit,
 968                 bool multi_block);
 969 
 970   void fast_sha1(XMMRegister abcd, XMMRegister e0, XMMRegister e1, XMMRegister msg0,
 971                  XMMRegister msg1, XMMRegister msg2, XMMRegister msg3, XMMRegister shuf_mask,
 972                  Register buf, Register state, Register ofs, Register limit, Register rsp,
 973                  bool multi_block);
 974 
 975 #ifdef _LP64
 976   void fast_sha256(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 977                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 978                    Register buf, Register state, Register ofs, Register limit, Register rsp,
 979                    bool multi_block, XMMRegister shuf_mask);
 980 #else
 981   void fast_sha256(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
 982                    XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
 983                    Register buf, Register state, Register ofs, Register limit, Register rsp,
 984                    bool multi_block);
 985 #endif
 986 
 987   void fast_exp(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
 988                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
 989                 Register rax, Register rcx, Register rdx, Register tmp);
 990 
 991 #ifdef _LP64
 992   void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
 993                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
 994                 Register rax, Register rcx, Register rdx, Register tmp1, Register tmp2);
 995 
 996   void fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
 997                   XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
 998                   Register rax, Register rcx, Register rdx, Register r11);
 999 
1000   void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
1001                 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
1002                 Register rdx, Register tmp1, Register tmp2, Register tmp3, Register tmp4);
1003 
1004   void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1005                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1006                 Register rax, Register rbx, Register rcx, Register rdx, Register tmp1, Register tmp2,
1007                 Register tmp3, Register tmp4);
1008 
1009   void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1010                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1011                 Register rax, Register rcx, Register rdx, Register tmp1,
1012                 Register tmp2, Register tmp3, Register tmp4);
1013   void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1014                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1015                 Register rax, Register rcx, Register rdx, Register tmp1,
1016                 Register tmp2, Register tmp3, Register tmp4);
1017 #else
1018   void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1019                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1020                 Register rax, Register rcx, Register rdx, Register tmp1);
1021 
1022   void fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1023                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1024                 Register rax, Register rcx, Register rdx, Register tmp);
1025 
1026   void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
1027                 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
1028                 Register rdx, Register tmp);
1029 
1030   void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1031                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1032                 Register rax, Register rbx, Register rdx);
1033 
1034   void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1035                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1036                 Register rax, Register rcx, Register rdx, Register tmp);
1037 
1038   void libm_sincos_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1039                         Register edx, Register ebx, Register esi, Register edi,
1040                         Register ebp, Register esp);
1041 
1042   void libm_reduce_pi04l(Register eax, Register ecx, Register edx, Register ebx,
1043                          Register esi, Register edi, Register ebp, Register esp);
1044 
1045   void libm_tancot_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1046                         Register edx, Register ebx, Register esi, Register edi,
1047                         Register ebp, Register esp);
1048 
1049   void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1050                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1051                 Register rax, Register rcx, Register rdx, Register tmp);
1052 #endif
1053 
1054 private:
1055 
1056   // these are private because users should be doing movflt/movdbl
1057 
1058   void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
1059   void movss(Address dst, XMMRegister src)     { Assembler::movss(dst, src); }
1060   void movss(XMMRegister dst, Address src)     { Assembler::movss(dst, src); }
1061   void movss(XMMRegister dst, AddressLiteral src);
1062 
1063   void movlpd(XMMRegister dst, Address src)    {Assembler::movlpd(dst, src); }
1064   void movlpd(XMMRegister dst, AddressLiteral src);
1065 
1066 public:
1067 
1068   void addsd(XMMRegister dst, XMMRegister src)    { Assembler::addsd(dst, src); }
1069   void addsd(XMMRegister dst, Address src)        { Assembler::addsd(dst, src); }
1070   void addsd(XMMRegister dst, AddressLiteral src);
1071 
1072   void addss(XMMRegister dst, XMMRegister src)    { Assembler::addss(dst, src); }
1073   void addss(XMMRegister dst, Address src)        { Assembler::addss(dst, src); }
1074   void addss(XMMRegister dst, AddressLiteral src);
1075 
1076   void addpd(XMMRegister dst, XMMRegister src)    { Assembler::addpd(dst, src); }
1077   void addpd(XMMRegister dst, Address src)        { Assembler::addpd(dst, src); }
1078   void addpd(XMMRegister dst, AddressLiteral src);
1079 
1080   void divsd(XMMRegister dst, XMMRegister src)    { Assembler::divsd(dst, src); }
1081   void divsd(XMMRegister dst, Address src)        { Assembler::divsd(dst, src); }
1082   void divsd(XMMRegister dst, AddressLiteral src);
1083 
1084   void divss(XMMRegister dst, XMMRegister src)    { Assembler::divss(dst, src); }
1085   void divss(XMMRegister dst, Address src)        { Assembler::divss(dst, src); }
1086   void divss(XMMRegister dst, AddressLiteral src);
1087 
1088   // Move Unaligned Double Quadword
1089   void movdqu(Address     dst, XMMRegister src);
1090   void movdqu(XMMRegister dst, Address src);
1091   void movdqu(XMMRegister dst, XMMRegister src);
1092   void movdqu(XMMRegister dst, AddressLiteral src, Register scratchReg = rscratch1);
1093 
1094   void kmovwl(KRegister dst, Register src) { Assembler::kmovwl(dst, src); }
1095   void kmovwl(Register dst, KRegister src) { Assembler::kmovwl(dst, src); }
1096   void kmovwl(KRegister dst, Address src) { Assembler::kmovwl(dst, src); }
1097   void kmovwl(KRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1098   void kmovwl(Address dst,  KRegister src) { Assembler::kmovwl(dst, src); }
1099   void kmovwl(KRegister dst, KRegister src) { Assembler::kmovwl(dst, src); }
1100 
1101   void kmovql(KRegister dst, KRegister src) { Assembler::kmovql(dst, src); }
1102   void kmovql(KRegister dst, Register src) { Assembler::kmovql(dst, src); }
1103   void kmovql(Register dst, KRegister src) { Assembler::kmovql(dst, src); }
1104   void kmovql(KRegister dst, Address src) { Assembler::kmovql(dst, src); }
1105   void kmovql(Address  dst, KRegister src) { Assembler::kmovql(dst, src); }
1106   void kmovql(KRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1107 
1108   // Safe move operation, lowers down to 16bit moves for targets supporting
1109   // AVX512F feature and 64bit moves for targets supporting AVX512BW feature.
1110   void kmov(Address  dst, KRegister src);
1111   void kmov(KRegister dst, Address src);
1112   void kmov(KRegister dst, KRegister src);
1113   void kmov(Register dst, KRegister src);
1114   void kmov(KRegister dst, Register src);
1115 
1116   // AVX Unaligned forms
1117   void vmovdqu(Address     dst, XMMRegister src);
1118   void vmovdqu(XMMRegister dst, Address src);
1119   void vmovdqu(XMMRegister dst, XMMRegister src);
1120   void vmovdqu(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1121   void vmovdqu(XMMRegister dst, AddressLiteral src, Register scratch_reg, int vector_len);
1122 
1123 
1124   // AVX512 Unaligned
1125   void evmovdqu(BasicType type, KRegister kmask, Address dst, XMMRegister src, int vector_len);
1126   void evmovdqu(BasicType type, KRegister kmask, XMMRegister dst, Address src, int vector_len);
1127 
1128   void evmovdqub(Address dst, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqub(dst, src, merge, vector_len); }
1129   void evmovdqub(XMMRegister dst, Address src, bool merge, int vector_len) { Assembler::evmovdqub(dst, src, merge, vector_len); }
1130   void evmovdqub(XMMRegister dst, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqub(dst, src, merge, vector_len); }
1131   void evmovdqub(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdqub(dst, mask, src, merge, vector_len); }
1132   void evmovdqub(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqub(dst, mask, src, merge, vector_len); }
1133   void evmovdqub(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1134 
1135   void evmovdquw(Address dst, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdquw(dst, src, merge, vector_len); }
1136   void evmovdquw(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdquw(dst, mask, src, merge, vector_len); }
1137   void evmovdquw(XMMRegister dst, Address src, bool merge, int vector_len) { Assembler::evmovdquw(dst, src, merge, vector_len); }
1138   void evmovdquw(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdquw(dst, mask, src, merge, vector_len); }
1139   void evmovdquw(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1140 
1141   void evmovdqul(Address dst, XMMRegister src, int vector_len) { Assembler::evmovdqul(dst, src, vector_len); }
1142   void evmovdqul(XMMRegister dst, Address src, int vector_len) { Assembler::evmovdqul(dst, src, vector_len); }
1143   void evmovdqul(XMMRegister dst, XMMRegister src, int vector_len) {
1144      if (dst->encoding() == src->encoding()) return;
1145      Assembler::evmovdqul(dst, src, vector_len);
1146   }
1147   void evmovdqul(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdqul(dst, mask, src, merge, vector_len); }
1148   void evmovdqul(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdqul(dst, mask, src, merge, vector_len); }
1149   void evmovdqul(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len) {
1150     if (dst->encoding() == src->encoding() && mask == k0) return;
1151     Assembler::evmovdqul(dst, mask, src, merge, vector_len);
1152    }
1153   void evmovdqul(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1154 
1155   void evmovdquq(XMMRegister dst, Address src, int vector_len) { Assembler::evmovdquq(dst, src, vector_len); }
1156   void evmovdquq(Address dst, XMMRegister src, int vector_len) { Assembler::evmovdquq(dst, src, vector_len); }
1157   void evmovdquq(XMMRegister dst, AddressLiteral src, int vector_len, Register rscratch);
1158   void evmovdquq(XMMRegister dst, XMMRegister src, int vector_len) {
1159     if (dst->encoding() == src->encoding()) return;
1160     Assembler::evmovdquq(dst, src, vector_len);
1161   }
1162   void evmovdquq(Address dst, KRegister mask, XMMRegister src, bool merge, int vector_len) { Assembler::evmovdquq(dst, mask, src, merge, vector_len); }
1163   void evmovdquq(XMMRegister dst, KRegister mask, Address src, bool merge, int vector_len) { Assembler::evmovdquq(dst, mask, src, merge, vector_len); }
1164   void evmovdquq(XMMRegister dst, KRegister mask, XMMRegister src, bool merge, int vector_len) {
1165     if (dst->encoding() == src->encoding() && mask == k0) return;
1166     Assembler::evmovdquq(dst, mask, src, merge, vector_len);
1167   }
1168   void evmovdquq(XMMRegister dst, KRegister mask, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1169 
1170   // Move Aligned Double Quadword
1171   void movdqa(XMMRegister dst, Address src)       { Assembler::movdqa(dst, src); }
1172   void movdqa(XMMRegister dst, XMMRegister src)   { Assembler::movdqa(dst, src); }
1173   void movdqa(XMMRegister dst, AddressLiteral src);
1174 
1175   void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); }
1176   void movsd(Address dst, XMMRegister src)     { Assembler::movsd(dst, src); }
1177   void movsd(XMMRegister dst, Address src)     { Assembler::movsd(dst, src); }
1178   void movsd(XMMRegister dst, AddressLiteral src);
1179 
1180   using Assembler::vmovddup;
1181   void vmovddup(XMMRegister dst, AddressLiteral src, int vector_len, Register rscratch = rscratch1);
1182 
1183   void mulpd(XMMRegister dst, XMMRegister src)    { Assembler::mulpd(dst, src); }
1184   void mulpd(XMMRegister dst, Address src)        { Assembler::mulpd(dst, src); }
1185   void mulpd(XMMRegister dst, AddressLiteral src);
1186 
1187   void mulsd(XMMRegister dst, XMMRegister src)    { Assembler::mulsd(dst, src); }
1188   void mulsd(XMMRegister dst, Address src)        { Assembler::mulsd(dst, src); }
1189   void mulsd(XMMRegister dst, AddressLiteral src);
1190 
1191   void mulss(XMMRegister dst, XMMRegister src)    { Assembler::mulss(dst, src); }
1192   void mulss(XMMRegister dst, Address src)        { Assembler::mulss(dst, src); }
1193   void mulss(XMMRegister dst, AddressLiteral src);
1194 
1195   // Carry-Less Multiplication Quadword
1196   void pclmulldq(XMMRegister dst, XMMRegister src) {
1197     // 0x00 - multiply lower 64 bits [0:63]
1198     Assembler::pclmulqdq(dst, src, 0x00);
1199   }
1200   void pclmulhdq(XMMRegister dst, XMMRegister src) {
1201     // 0x11 - multiply upper 64 bits [64:127]
1202     Assembler::pclmulqdq(dst, src, 0x11);
1203   }
1204 
1205   void pcmpeqb(XMMRegister dst, XMMRegister src);
1206   void pcmpeqw(XMMRegister dst, XMMRegister src);
1207 
1208   void pcmpestri(XMMRegister dst, Address src, int imm8);
1209   void pcmpestri(XMMRegister dst, XMMRegister src, int imm8);
1210 
1211   void pmovzxbw(XMMRegister dst, XMMRegister src);
1212   void pmovzxbw(XMMRegister dst, Address src);
1213 
1214   void pmovmskb(Register dst, XMMRegister src);
1215 
1216   void ptest(XMMRegister dst, XMMRegister src);
1217 
1218   void sqrtsd(XMMRegister dst, XMMRegister src)    { Assembler::sqrtsd(dst, src); }
1219   void sqrtsd(XMMRegister dst, Address src)        { Assembler::sqrtsd(dst, src); }
1220   void sqrtsd(XMMRegister dst, AddressLiteral src);
1221 
1222   void roundsd(XMMRegister dst, XMMRegister src, int32_t rmode)    { Assembler::roundsd(dst, src, rmode); }
1223   void roundsd(XMMRegister dst, Address src, int32_t rmode)        { Assembler::roundsd(dst, src, rmode); }
1224   void roundsd(XMMRegister dst, AddressLiteral src, int32_t rmode, Register scratch_reg);
1225 
1226   void sqrtss(XMMRegister dst, XMMRegister src)    { Assembler::sqrtss(dst, src); }
1227   void sqrtss(XMMRegister dst, Address src)        { Assembler::sqrtss(dst, src); }
1228   void sqrtss(XMMRegister dst, AddressLiteral src);
1229 
1230   void subsd(XMMRegister dst, XMMRegister src)    { Assembler::subsd(dst, src); }
1231   void subsd(XMMRegister dst, Address src)        { Assembler::subsd(dst, src); }
1232   void subsd(XMMRegister dst, AddressLiteral src);
1233 
1234   void subss(XMMRegister dst, XMMRegister src)    { Assembler::subss(dst, src); }
1235   void subss(XMMRegister dst, Address src)        { Assembler::subss(dst, src); }
1236   void subss(XMMRegister dst, AddressLiteral src);
1237 
1238   void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); }
1239   void ucomiss(XMMRegister dst, Address src)     { Assembler::ucomiss(dst, src); }
1240   void ucomiss(XMMRegister dst, AddressLiteral src);
1241 
1242   void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); }
1243   void ucomisd(XMMRegister dst, Address src)     { Assembler::ucomisd(dst, src); }
1244   void ucomisd(XMMRegister dst, AddressLiteral src);
1245 
1246   // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
1247   void xorpd(XMMRegister dst, XMMRegister src);
1248   void xorpd(XMMRegister dst, Address src)     { Assembler::xorpd(dst, src); }
1249   void xorpd(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1250 
1251   // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
1252   void xorps(XMMRegister dst, XMMRegister src);
1253   void xorps(XMMRegister dst, Address src)     { Assembler::xorps(dst, src); }
1254   void xorps(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
1255 
1256   // Shuffle Bytes
1257   void pshufb(XMMRegister dst, XMMRegister src) { Assembler::pshufb(dst, src); }
1258   void pshufb(XMMRegister dst, Address src)     { Assembler::pshufb(dst, src); }
1259   void pshufb(XMMRegister dst, AddressLiteral src);
1260   // AVX 3-operands instructions
1261 
1262   void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddsd(dst, nds, src); }
1263   void vaddsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vaddsd(dst, nds, src); }
1264   void vaddsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1265 
1266   void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddss(dst, nds, src); }
1267   void vaddss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vaddss(dst, nds, src); }
1268   void vaddss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1269 
1270   void vabsss(XMMRegister dst, XMMRegister nds, XMMRegister src, AddressLiteral negate_field, int vector_len);
1271   void vabssd(XMMRegister dst, XMMRegister nds, XMMRegister src, AddressLiteral negate_field, int vector_len);
1272 
1273   void vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1274   void vpaddb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1275   void vpaddb(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch);
1276 
1277   void vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1278   void vpaddw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1279 
1280   void vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpaddd(dst, nds, src, vector_len); }
1281   void vpaddd(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vpaddd(dst, nds, src, vector_len); }
1282   void vpaddd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch);
1283 
1284   void vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpand(dst, nds, src, vector_len); }
1285   void vpand(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vpand(dst, nds, src, vector_len); }
1286   void vpand(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1287 
1288   void vpbroadcastw(XMMRegister dst, XMMRegister src, int vector_len);
1289   void vpbroadcastw(XMMRegister dst, Address src, int vector_len) { Assembler::vpbroadcastw(dst, src, vector_len); }
1290 
1291   using Assembler::vbroadcastsd;
1292   void vbroadcastsd(XMMRegister dst, AddressLiteral src, int vector_len, Register rscratch = rscratch1);
1293 
1294   void vpcmpeqb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1295 
1296   void vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1297   void evpcmpeqd(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg);
1298 
1299   // Vector compares
1300   void evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1301                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpd(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1302   void evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1303                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1304   void evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1305                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpq(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1306   void evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1307                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1308   void evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1309                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpb(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1310   void evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1311                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1312   void evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
1313                int comparison, bool is_signed, int vector_len) { Assembler::evpcmpw(kdst, mask, nds, src, comparison, is_signed, vector_len); }
1314   void evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, AddressLiteral src,
1315                int comparison, bool is_signed, int vector_len, Register scratch_reg);
1316 
1317   void evpbroadcast(BasicType type, XMMRegister dst, Register src, int vector_len);
1318 
1319   // Emit comparison instruction for the specified comparison predicate.
1320   void vpcmpCCW(XMMRegister dst, XMMRegister nds, XMMRegister src, XMMRegister xtmp, ComparisonPredicate cond, Width width, int vector_len);
1321   void vpcmpCC(XMMRegister dst, XMMRegister nds, XMMRegister src, int cond_encoding, Width width, int vector_len);
1322 
1323   void vpmovzxbw(XMMRegister dst, Address src, int vector_len);
1324   void vpmovzxbw(XMMRegister dst, XMMRegister src, int vector_len) { Assembler::vpmovzxbw(dst, src, vector_len); }
1325 
1326   void vpmovmskb(Register dst, XMMRegister src, int vector_len = Assembler::AVX_256bit);
1327 
1328   void vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1329   void vpmullw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1330   void vpmulld(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
1331     Assembler::vpmulld(dst, nds, src, vector_len);
1332   };
1333   void vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1334     Assembler::vpmulld(dst, nds, src, vector_len);
1335   }
1336   void vpmulld(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg);
1337 
1338   void vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1339   void vpsubb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1340 
1341   void vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1342   void vpsubw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1343 
1344   void vpsraw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1345   void vpsraw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1346 
1347   void evpsraq(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1348   void evpsraq(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1349 
1350   void evpsllw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1351     if (!is_varshift) {
1352       Assembler::evpsllw(dst, mask, nds, src, merge, vector_len);
1353     } else {
1354       Assembler::evpsllvw(dst, mask, nds, src, merge, vector_len);
1355     }
1356   }
1357   void evpslld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1358     if (!is_varshift) {
1359       Assembler::evpslld(dst, mask, nds, src, merge, vector_len);
1360     } else {
1361       Assembler::evpsllvd(dst, mask, nds, src, merge, vector_len);
1362     }
1363   }
1364   void evpsllq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1365     if (!is_varshift) {
1366       Assembler::evpsllq(dst, mask, nds, src, merge, vector_len);
1367     } else {
1368       Assembler::evpsllvq(dst, mask, nds, src, merge, vector_len);
1369     }
1370   }
1371   void evpsrlw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1372     if (!is_varshift) {
1373       Assembler::evpsrlw(dst, mask, nds, src, merge, vector_len);
1374     } else {
1375       Assembler::evpsrlvw(dst, mask, nds, src, merge, vector_len);
1376     }
1377   }
1378   void evpsrld(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1379     if (!is_varshift) {
1380       Assembler::evpsrld(dst, mask, nds, src, merge, vector_len);
1381     } else {
1382       Assembler::evpsrlvd(dst, mask, nds, src, merge, vector_len);
1383     }
1384   }
1385   void evpsrlq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1386     if (!is_varshift) {
1387       Assembler::evpsrlq(dst, mask, nds, src, merge, vector_len);
1388     } else {
1389       Assembler::evpsrlvq(dst, mask, nds, src, merge, vector_len);
1390     }
1391   }
1392   void evpsraw(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1393     if (!is_varshift) {
1394       Assembler::evpsraw(dst, mask, nds, src, merge, vector_len);
1395     } else {
1396       Assembler::evpsravw(dst, mask, nds, src, merge, vector_len);
1397     }
1398   }
1399   void evpsrad(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1400     if (!is_varshift) {
1401       Assembler::evpsrad(dst, mask, nds, src, merge, vector_len);
1402     } else {
1403       Assembler::evpsravd(dst, mask, nds, src, merge, vector_len);
1404     }
1405   }
1406   void evpsraq(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len, bool is_varshift) {
1407     if (!is_varshift) {
1408       Assembler::evpsraq(dst, mask, nds, src, merge, vector_len);
1409     } else {
1410       Assembler::evpsravq(dst, mask, nds, src, merge, vector_len);
1411     }
1412   }
1413 
1414   void evpmins(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1415   void evpmaxs(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1416   void evpmins(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1417   void evpmaxs(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1418 
1419   void vpsrlw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1420   void vpsrlw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1421 
1422   void vpsllw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
1423   void vpsllw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
1424 
1425   void vptest(XMMRegister dst, XMMRegister src);
1426   void vptest(XMMRegister dst, XMMRegister src, int vector_len) { Assembler::vptest(dst, src, vector_len); }
1427 
1428   void punpcklbw(XMMRegister dst, XMMRegister src);
1429   void punpcklbw(XMMRegister dst, Address src) { Assembler::punpcklbw(dst, src); }
1430 
1431   void pshufd(XMMRegister dst, Address src, int mode);
1432   void pshufd(XMMRegister dst, XMMRegister src, int mode) { Assembler::pshufd(dst, src, mode); }
1433 
1434   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1435   void pshuflw(XMMRegister dst, Address src, int mode) { Assembler::pshuflw(dst, src, mode); }
1436 
1437   void vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vandpd(dst, nds, src, vector_len); }
1438   void vandpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len)     { Assembler::vandpd(dst, nds, src, vector_len); }
1439   void vandpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1440 
1441   void vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vandps(dst, nds, src, vector_len); }
1442   void vandps(XMMRegister dst, XMMRegister nds, Address src, int vector_len)     { Assembler::vandps(dst, nds, src, vector_len); }
1443   void vandps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1444 
1445   void evpord(XMMRegister dst, KRegister mask, XMMRegister nds, AddressLiteral src, bool merge, int vector_len, Register scratch_reg);
1446 
1447   void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivsd(dst, nds, src); }
1448   void vdivsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vdivsd(dst, nds, src); }
1449   void vdivsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1450 
1451   void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivss(dst, nds, src); }
1452   void vdivss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vdivss(dst, nds, src); }
1453   void vdivss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1454 
1455   void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulsd(dst, nds, src); }
1456   void vmulsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vmulsd(dst, nds, src); }
1457   void vmulsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1458 
1459   void vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulss(dst, nds, src); }
1460   void vmulss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vmulss(dst, nds, src); }
1461   void vmulss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1462 
1463   void vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubsd(dst, nds, src); }
1464   void vsubsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vsubsd(dst, nds, src); }
1465   void vsubsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1466 
1467   void vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubss(dst, nds, src); }
1468   void vsubss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vsubss(dst, nds, src); }
1469   void vsubss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1470 
1471   void vnegatess(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1472   void vnegatesd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
1473 
1474   // AVX Vector instructions
1475 
1476   void vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vxorpd(dst, nds, src, vector_len); }
1477   void vxorpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vxorpd(dst, nds, src, vector_len); }
1478   void vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1479 
1480   void vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vxorps(dst, nds, src, vector_len); }
1481   void vxorps(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vxorps(dst, nds, src, vector_len); }
1482   void vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1483 
1484   void vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1485     if (UseAVX > 1 || (vector_len < 1)) // vpxor 256 bit is available only in AVX2
1486       Assembler::vpxor(dst, nds, src, vector_len);
1487     else
1488       Assembler::vxorpd(dst, nds, src, vector_len);
1489   }
1490   void vpxor(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
1491     if (UseAVX > 1 || (vector_len < 1)) // vpxor 256 bit is available only in AVX2
1492       Assembler::vpxor(dst, nds, src, vector_len);
1493     else
1494       Assembler::vxorpd(dst, nds, src, vector_len);
1495   }
1496   void vpxor(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg = rscratch1);
1497 
1498   // Simple version for AVX2 256bit vectors
1499   void vpxor(XMMRegister dst, XMMRegister src) {
1500     assert(UseAVX >= 2, "Should be at least AVX2");
1501     Assembler::vpxor(dst, dst, src, AVX_256bit);
1502   }
1503   void vpxor(XMMRegister dst, Address src) {
1504     assert(UseAVX >= 2, "Should be at least AVX2");
1505     Assembler::vpxor(dst, dst, src, AVX_256bit);
1506   }
1507 
1508   void vpermd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpermd(dst, nds, src, vector_len); }
1509   void vpermd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register scratch_reg);
1510 
1511   void vinserti128(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8) {
1512     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1513       Assembler::vinserti32x4(dst, nds, src, imm8);
1514     } else if (UseAVX > 1) {
1515       // vinserti128 is available only in AVX2
1516       Assembler::vinserti128(dst, nds, src, imm8);
1517     } else {
1518       Assembler::vinsertf128(dst, nds, src, imm8);
1519     }
1520   }
1521 
1522   void vinserti128(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8) {
1523     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1524       Assembler::vinserti32x4(dst, nds, src, imm8);
1525     } else if (UseAVX > 1) {
1526       // vinserti128 is available only in AVX2
1527       Assembler::vinserti128(dst, nds, src, imm8);
1528     } else {
1529       Assembler::vinsertf128(dst, nds, src, imm8);
1530     }
1531   }
1532 
1533   void vextracti128(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1534     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1535       Assembler::vextracti32x4(dst, src, imm8);
1536     } else if (UseAVX > 1) {
1537       // vextracti128 is available only in AVX2
1538       Assembler::vextracti128(dst, src, imm8);
1539     } else {
1540       Assembler::vextractf128(dst, src, imm8);
1541     }
1542   }
1543 
1544   void vextracti128(Address dst, XMMRegister src, uint8_t imm8) {
1545     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1546       Assembler::vextracti32x4(dst, src, imm8);
1547     } else if (UseAVX > 1) {
1548       // vextracti128 is available only in AVX2
1549       Assembler::vextracti128(dst, src, imm8);
1550     } else {
1551       Assembler::vextractf128(dst, src, imm8);
1552     }
1553   }
1554 
1555   // 128bit copy to/from high 128 bits of 256bit (YMM) vector registers
1556   void vinserti128_high(XMMRegister dst, XMMRegister src) {
1557     vinserti128(dst, dst, src, 1);
1558   }
1559   void vinserti128_high(XMMRegister dst, Address src) {
1560     vinserti128(dst, dst, src, 1);
1561   }
1562   void vextracti128_high(XMMRegister dst, XMMRegister src) {
1563     vextracti128(dst, src, 1);
1564   }
1565   void vextracti128_high(Address dst, XMMRegister src) {
1566     vextracti128(dst, src, 1);
1567   }
1568 
1569   void vinsertf128_high(XMMRegister dst, XMMRegister src) {
1570     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1571       Assembler::vinsertf32x4(dst, dst, src, 1);
1572     } else {
1573       Assembler::vinsertf128(dst, dst, src, 1);
1574     }
1575   }
1576 
1577   void vinsertf128_high(XMMRegister dst, Address src) {
1578     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1579       Assembler::vinsertf32x4(dst, dst, src, 1);
1580     } else {
1581       Assembler::vinsertf128(dst, dst, src, 1);
1582     }
1583   }
1584 
1585   void vextractf128_high(XMMRegister dst, XMMRegister src) {
1586     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1587       Assembler::vextractf32x4(dst, src, 1);
1588     } else {
1589       Assembler::vextractf128(dst, src, 1);
1590     }
1591   }
1592 
1593   void vextractf128_high(Address dst, XMMRegister src) {
1594     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1595       Assembler::vextractf32x4(dst, src, 1);
1596     } else {
1597       Assembler::vextractf128(dst, src, 1);
1598     }
1599   }
1600 
1601   // 256bit copy to/from high 256 bits of 512bit (ZMM) vector registers
1602   void vinserti64x4_high(XMMRegister dst, XMMRegister src) {
1603     Assembler::vinserti64x4(dst, dst, src, 1);
1604   }
1605   void vinsertf64x4_high(XMMRegister dst, XMMRegister src) {
1606     Assembler::vinsertf64x4(dst, dst, src, 1);
1607   }
1608   void vextracti64x4_high(XMMRegister dst, XMMRegister src) {
1609     Assembler::vextracti64x4(dst, src, 1);
1610   }
1611   void vextractf64x4_high(XMMRegister dst, XMMRegister src) {
1612     Assembler::vextractf64x4(dst, src, 1);
1613   }
1614   void vextractf64x4_high(Address dst, XMMRegister src) {
1615     Assembler::vextractf64x4(dst, src, 1);
1616   }
1617   void vinsertf64x4_high(XMMRegister dst, Address src) {
1618     Assembler::vinsertf64x4(dst, dst, src, 1);
1619   }
1620 
1621   // 128bit copy to/from low 128 bits of 256bit (YMM) vector registers
1622   void vinserti128_low(XMMRegister dst, XMMRegister src) {
1623     vinserti128(dst, dst, src, 0);
1624   }
1625   void vinserti128_low(XMMRegister dst, Address src) {
1626     vinserti128(dst, dst, src, 0);
1627   }
1628   void vextracti128_low(XMMRegister dst, XMMRegister src) {
1629     vextracti128(dst, src, 0);
1630   }
1631   void vextracti128_low(Address dst, XMMRegister src) {
1632     vextracti128(dst, src, 0);
1633   }
1634 
1635   void vinsertf128_low(XMMRegister dst, XMMRegister src) {
1636     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1637       Assembler::vinsertf32x4(dst, dst, src, 0);
1638     } else {
1639       Assembler::vinsertf128(dst, dst, src, 0);
1640     }
1641   }
1642 
1643   void vinsertf128_low(XMMRegister dst, Address src) {
1644     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1645       Assembler::vinsertf32x4(dst, dst, src, 0);
1646     } else {
1647       Assembler::vinsertf128(dst, dst, src, 0);
1648     }
1649   }
1650 
1651   void vextractf128_low(XMMRegister dst, XMMRegister src) {
1652     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1653       Assembler::vextractf32x4(dst, src, 0);
1654     } else {
1655       Assembler::vextractf128(dst, src, 0);
1656     }
1657   }
1658 
1659   void vextractf128_low(Address dst, XMMRegister src) {
1660     if (UseAVX > 2 && VM_Version::supports_avx512novl()) {
1661       Assembler::vextractf32x4(dst, src, 0);
1662     } else {
1663       Assembler::vextractf128(dst, src, 0);
1664     }
1665   }
1666 
1667   // 256bit copy to/from low 256 bits of 512bit (ZMM) vector registers
1668   void vinserti64x4_low(XMMRegister dst, XMMRegister src) {
1669     Assembler::vinserti64x4(dst, dst, src, 0);
1670   }
1671   void vinsertf64x4_low(XMMRegister dst, XMMRegister src) {
1672     Assembler::vinsertf64x4(dst, dst, src, 0);
1673   }
1674   void vextracti64x4_low(XMMRegister dst, XMMRegister src) {
1675     Assembler::vextracti64x4(dst, src, 0);
1676   }
1677   void vextractf64x4_low(XMMRegister dst, XMMRegister src) {
1678     Assembler::vextractf64x4(dst, src, 0);
1679   }
1680   void vextractf64x4_low(Address dst, XMMRegister src) {
1681     Assembler::vextractf64x4(dst, src, 0);
1682   }
1683   void vinsertf64x4_low(XMMRegister dst, Address src) {
1684     Assembler::vinsertf64x4(dst, dst, src, 0);
1685   }
1686 
1687   // Carry-Less Multiplication Quadword
1688   void vpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1689     // 0x00 - multiply lower 64 bits [0:63]
1690     Assembler::vpclmulqdq(dst, nds, src, 0x00);
1691   }
1692   void vpclmulhdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1693     // 0x11 - multiply upper 64 bits [64:127]
1694     Assembler::vpclmulqdq(dst, nds, src, 0x11);
1695   }
1696   void vpclmullqhqdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1697     // 0x10 - multiply nds[0:63] and src[64:127]
1698     Assembler::vpclmulqdq(dst, nds, src, 0x10);
1699   }
1700   void vpclmulhqlqdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
1701     //0x01 - multiply nds[64:127] and src[0:63]
1702     Assembler::vpclmulqdq(dst, nds, src, 0x01);
1703   }
1704 
1705   void evpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1706     // 0x00 - multiply lower 64 bits [0:63]
1707     Assembler::evpclmulqdq(dst, nds, src, 0x00, vector_len);
1708   }
1709   void evpclmulhdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
1710     // 0x11 - multiply upper 64 bits [64:127]
1711     Assembler::evpclmulqdq(dst, nds, src, 0x11, vector_len);
1712   }
1713 
1714   // AVX-512 mask operations.
1715   void kand(BasicType etype, KRegister dst, KRegister src1, KRegister src2);
1716   void kor(BasicType type, KRegister dst, KRegister src1, KRegister src2);
1717   void knot(uint masklen, KRegister dst, KRegister src, KRegister ktmp = knoreg, Register rtmp = noreg);
1718   void kxor(BasicType type, KRegister dst, KRegister src1, KRegister src2);
1719   void kortest(uint masklen, KRegister src1, KRegister src2);
1720   void ktest(uint masklen, KRegister src1, KRegister src2);
1721 
1722   void evperm(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1723   void evperm(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1724 
1725   void evor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1726   void evor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1727 
1728   void evand(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1729   void evand(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1730 
1731   void evxor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int vector_len);
1732   void evxor(BasicType type, XMMRegister dst, KRegister mask, XMMRegister nds, Address src, bool merge, int vector_len);
1733 
1734   void evrold(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vlen_enc);
1735   void evrold(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src1, XMMRegister src2, bool merge, int vlen_enc);
1736   void evrord(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src, int shift, bool merge, int vlen_enc);
1737   void evrord(BasicType type, XMMRegister dst, KRegister mask, XMMRegister src1, XMMRegister src2, bool merge, int vlen_enc);
1738 
1739   void alltrue(Register dst, uint masklen, KRegister src1, KRegister src2, KRegister kscratch);
1740   void anytrue(Register dst, uint masklen, KRegister src, KRegister kscratch);
1741 
1742   void cmov32( Condition cc, Register dst, Address  src);
1743   void cmov32( Condition cc, Register dst, Register src);
1744 
1745   void cmov(   Condition cc, Register dst, Register src) { cmovptr(cc, dst, src); }
1746 
1747   void cmovptr(Condition cc, Register dst, Address  src) { LP64_ONLY(cmovq(cc, dst, src)) NOT_LP64(cmov32(cc, dst, src)); }
1748   void cmovptr(Condition cc, Register dst, Register src) { LP64_ONLY(cmovq(cc, dst, src)) NOT_LP64(cmov32(cc, dst, src)); }
1749 
1750   void movoop(Register dst, jobject obj);
1751   void movoop(Address dst, jobject obj);
1752 
1753   void mov_metadata(Register dst, Metadata* obj);
1754   void mov_metadata(Address dst, Metadata* obj);
1755 
1756   void movptr(ArrayAddress dst, Register src);
1757   // can this do an lea?
1758   void movptr(Register dst, ArrayAddress src);
1759 
1760   void movptr(Register dst, Address src);
1761 
1762 #ifdef _LP64
1763   void movptr(Register dst, AddressLiteral src, Register scratch=rscratch1);
1764 #else
1765   void movptr(Register dst, AddressLiteral src, Register scratch=noreg); // Scratch reg is ignored in 32-bit
1766 #endif
1767 
1768   void movptr(Register dst, intptr_t src);
1769   void movptr(Register dst, Register src);
1770   void movptr(Address dst, intptr_t src);
1771 
1772   void movptr(Address dst, Register src);
1773 
1774   void movptr(Register dst, RegisterOrConstant src) {
1775     if (src.is_constant()) movptr(dst, src.as_constant());
1776     else                   movptr(dst, src.as_register());
1777   }
1778 
1779 #ifdef _LP64
1780   // Generally the next two are only used for moving NULL
1781   // Although there are situations in initializing the mark word where
1782   // they could be used. They are dangerous.
1783 
1784   // They only exist on LP64 so that int32_t and intptr_t are not the same
1785   // and we have ambiguous declarations.
1786 
1787   void movptr(Address dst, int32_t imm32);
1788   void movptr(Register dst, int32_t imm32);
1789 #endif // _LP64
1790 
1791   // to avoid hiding movl
1792   void mov32(AddressLiteral dst, Register src);
1793   void mov32(Register dst, AddressLiteral src);
1794 
1795   // to avoid hiding movb
1796   void movbyte(ArrayAddress dst, int src);
1797 
1798   // Import other mov() methods from the parent class or else
1799   // they will be hidden by the following overriding declaration.
1800   using Assembler::movdl;
1801   using Assembler::movq;
1802   void movdl(XMMRegister dst, AddressLiteral src);
1803   void movq(XMMRegister dst, AddressLiteral src);
1804 
1805   // Can push value or effective address
1806   void pushptr(AddressLiteral src);
1807 
1808   void pushptr(Address src) { LP64_ONLY(pushq(src)) NOT_LP64(pushl(src)); }
1809   void popptr(Address src) { LP64_ONLY(popq(src)) NOT_LP64(popl(src)); }
1810 
1811   void pushoop(jobject obj);
1812   void pushklass(Metadata* obj);
1813 
1814   // sign extend as need a l to ptr sized element
1815   void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
1816   void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
1817 
1818 
1819  public:
1820   // C2 compiled method's prolog code.
1821   void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b, bool is_stub);
1822 
1823   // clear memory of size 'cnt' qwords, starting at 'base';
1824   // if 'is_large' is set, do not try to produce short loop
1825   void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1826 
1827   // clear memory initialization sequence for constant size;
1828   void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1829 
1830   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1831   void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1832 
1833   // Fill primitive arrays
1834   void generate_fill(BasicType t, bool aligned,
1835                      Register to, Register value, Register count,
1836                      Register rtmp, XMMRegister xtmp);
1837 
1838   void encode_iso_array(Register src, Register dst, Register len,
1839                         XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1840                         XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1841 
1842 #ifdef _LP64
1843   void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1844   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1845                              Register y, Register y_idx, Register z,
1846                              Register carry, Register product,
1847                              Register idx, Register kdx);
1848   void multiply_add_128_x_128(Register x_xstart, Register y, Register z,
1849                               Register yz_idx, Register idx,
1850                               Register carry, Register product, int offset);
1851   void multiply_128_x_128_bmi2_loop(Register y, Register z,
1852                                     Register carry, Register carry2,
1853                                     Register idx, Register jdx,
1854                                     Register yz_idx1, Register yz_idx2,
1855                                     Register tmp, Register tmp3, Register tmp4);
1856   void multiply_128_x_128_loop(Register x_xstart, Register y, Register z,
1857                                Register yz_idx, Register idx, Register jdx,
1858                                Register carry, Register product,
1859                                Register carry2);
1860   void multiply_to_len(Register x, Register xlen, Register y, Register ylen, Register z, Register zlen,
1861                        Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5);
1862   void square_rshift(Register x, Register len, Register z, Register tmp1, Register tmp3,
1863                      Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
1864   void multiply_add_64_bmi2(Register sum, Register op1, Register op2, Register carry,
1865                             Register tmp2);
1866   void multiply_add_64(Register sum, Register op1, Register op2, Register carry,
1867                        Register rdxReg, Register raxReg);
1868   void add_one_64(Register z, Register zlen, Register carry, Register tmp1);
1869   void lshift_by_1(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
1870                        Register tmp3, Register tmp4);
1871   void square_to_len(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
1872                      Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
1873 
1874   void mul_add_128_x_32_loop(Register out, Register in, Register offset, Register len, Register tmp1,
1875                Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
1876                Register raxReg);
1877   void mul_add(Register out, Register in, Register offset, Register len, Register k, Register tmp1,
1878                Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
1879                Register raxReg);
1880   void vectorized_mismatch(Register obja, Register objb, Register length, Register log2_array_indxscale,
1881                            Register result, Register tmp1, Register tmp2,
1882                            XMMRegister vec1, XMMRegister vec2, XMMRegister vec3);
1883 #endif
1884 
1885   // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
1886   void update_byte_crc32(Register crc, Register val, Register table);
1887   void kernel_crc32(Register crc, Register buf, Register len, Register table, Register tmp);
1888 
1889 
1890 #ifdef _LP64
1891   void kernel_crc32_avx512(Register crc, Register buf, Register len, Register table, Register tmp1, Register tmp2);
1892   void kernel_crc32_avx512_256B(Register crc, Register buf, Register len, Register key, Register pos,
1893                                 Register tmp1, Register tmp2, Label& L_barrett, Label& L_16B_reduction_loop,
1894                                 Label& L_get_last_two_xmms, Label& L_128_done, Label& L_cleanup);
1895   void updateBytesAdler32(Register adler32, Register buf, Register length, XMMRegister shuf0, XMMRegister shuf1, ExternalAddress scale);
1896 #endif // _LP64
1897 
1898   // CRC32C code for java.util.zip.CRC32C::updateBytes() intrinsic
1899   // Note on a naming convention:
1900   // Prefix w = register only used on a Westmere+ architecture
1901   // Prefix n = register only used on a Nehalem architecture
1902 #ifdef _LP64
1903   void crc32c_ipl_alg4(Register in_out, uint32_t n,
1904                        Register tmp1, Register tmp2, Register tmp3);
1905 #else
1906   void crc32c_ipl_alg4(Register in_out, uint32_t n,
1907                        Register tmp1, Register tmp2, Register tmp3,
1908                        XMMRegister xtmp1, XMMRegister xtmp2);
1909 #endif
1910   void crc32c_pclmulqdq(XMMRegister w_xtmp1,
1911                         Register in_out,
1912                         uint32_t const_or_pre_comp_const_index, bool is_pclmulqdq_supported,
1913                         XMMRegister w_xtmp2,
1914                         Register tmp1,
1915                         Register n_tmp2, Register n_tmp3);
1916   void crc32c_rec_alt2(uint32_t const_or_pre_comp_const_index_u1, uint32_t const_or_pre_comp_const_index_u2, bool is_pclmulqdq_supported, Register in_out, Register in1, Register in2,
1917                        XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1918                        Register tmp1, Register tmp2,
1919                        Register n_tmp3);
1920   void crc32c_proc_chunk(uint32_t size, uint32_t const_or_pre_comp_const_index_u1, uint32_t const_or_pre_comp_const_index_u2, bool is_pclmulqdq_supported,
1921                          Register in_out1, Register in_out2, Register in_out3,
1922                          Register tmp1, Register tmp2, Register tmp3,
1923                          XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1924                          Register tmp4, Register tmp5,
1925                          Register n_tmp6);
1926   void crc32c_ipl_alg2_alt2(Register in_out, Register in1, Register in2,
1927                             Register tmp1, Register tmp2, Register tmp3,
1928                             Register tmp4, Register tmp5, Register tmp6,
1929                             XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1930                             bool is_pclmulqdq_supported);
1931   // Fold 128-bit data chunk
1932   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1933   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
1934 #ifdef _LP64
1935   // Fold 512-bit data chunk
1936   void fold512bit_crc32_avx512(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, Register pos, int offset);
1937 #endif // _LP64
1938   // Fold 8-bit data
1939   void fold_8bit_crc32(Register crc, Register table, Register tmp);
1940   void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
1941 
1942   // Compress char[] array to byte[].
1943   void char_array_compress(Register src, Register dst, Register len,
1944                            XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1945                            XMMRegister tmp4, Register tmp5, Register result,
1946                            KRegister mask1 = knoreg, KRegister mask2 = knoreg);
1947 
1948   // Inflate byte[] array to char[].
1949   void byte_array_inflate(Register src, Register dst, Register len,
1950                           XMMRegister tmp1, Register tmp2, KRegister mask = knoreg);
1951 
1952   void fill_masked(BasicType bt, Address dst, XMMRegister xmm, KRegister mask,
1953                    Register length, Register temp, int vec_enc);
1954 
1955   void fill64_masked(uint shift, Register dst, int disp,
1956                          XMMRegister xmm, KRegister mask, Register length,
1957                          Register temp, bool use64byteVector = false);
1958 
1959   void fill32_masked(uint shift, Register dst, int disp,
1960                          XMMRegister xmm, KRegister mask, Register length,
1961                          Register temp);
1962 
1963   void fill32(Register dst, int disp, XMMRegister xmm);
1964 
1965   void fill64(Register dst, int dis, XMMRegister xmm, bool use64byteVector = false);
1966 
1967 #ifdef _LP64
1968   void convert_f2i(Register dst, XMMRegister src);
1969   void convert_d2i(Register dst, XMMRegister src);
1970   void convert_f2l(Register dst, XMMRegister src);
1971   void convert_d2l(Register dst, XMMRegister src);
1972 
1973   void cache_wb(Address line);
1974   void cache_wbsync(bool is_pre);
1975 
1976 #if COMPILER2_OR_JVMCI
1977   void arraycopy_avx3_special_cases(XMMRegister xmm, KRegister mask, Register from,
1978                                     Register to, Register count, int shift,
1979                                     Register index, Register temp,
1980                                     bool use64byteVector, Label& L_entry, Label& L_exit);
1981 
1982   void arraycopy_avx3_special_cases_conjoint(XMMRegister xmm, KRegister mask, Register from,
1983                                              Register to, Register start_index, Register end_index,
1984                                              Register count, int shift, Register temp,
1985                                              bool use64byteVector, Label& L_entry, Label& L_exit);
1986 
1987   void copy64_masked_avx(Register dst, Register src, XMMRegister xmm,
1988                          KRegister mask, Register length, Register index,
1989                          Register temp, int shift = Address::times_1, int offset = 0,
1990                          bool use64byteVector = false);
1991 
1992   void copy32_masked_avx(Register dst, Register src, XMMRegister xmm,
1993                          KRegister mask, Register length, Register index,
1994                          Register temp, int shift = Address::times_1, int offset = 0);
1995 
1996   void copy32_avx(Register dst, Register src, Register index, XMMRegister xmm,
1997                   int shift = Address::times_1, int offset = 0);
1998 
1999   void copy64_avx(Register dst, Register src, Register index, XMMRegister xmm,
2000                   bool conjoint, int shift = Address::times_1, int offset = 0,
2001                   bool use64byteVector = false);
2002 
2003   void generate_fill_avx3(BasicType type, Register to, Register value,
2004                           Register count, Register rtmp, XMMRegister xtmp);
2005 
2006 #endif // COMPILER2_OR_JVMCI
2007 
2008 #endif // _LP64
2009 
2010   void vallones(XMMRegister dst, int vector_len);
2011 };
2012 
2013 /**
2014  * class SkipIfEqual:
2015  *
2016  * Instantiating this class will result in assembly code being output that will
2017  * jump around any code emitted between the creation of the instance and it's
2018  * automatic destruction at the end of a scope block, depending on the value of
2019  * the flag passed to the constructor, which will be checked at run-time.
2020  */
2021 class SkipIfEqual {
2022  private:
2023   MacroAssembler* _masm;
2024   Label _label;
2025 
2026  public:
2027    SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
2028    ~SkipIfEqual();
2029 };
2030 
2031 #endif // CPU_X86_MACROASSEMBLER_X86_HPP
--- EOF ---