1 /*
   2  * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "code/debugInfoRec.hpp"
  29 #include "code/icBuffer.hpp"
  30 #include "code/nativeInst.hpp"
  31 #include "code/vtableStubs.hpp"
  32 #include "compiler/oopMap.hpp"
  33 #include "gc/shared/gcLocker.hpp"
  34 #include "gc/shared/barrierSet.hpp"
  35 #include "gc/shared/barrierSetAssembler.hpp"
  36 #include "interpreter/interpreter.hpp"
  37 #include "logging/log.hpp"
  38 #include "memory/resourceArea.hpp"
  39 #include "oops/compiledICHolder.hpp"
  40 #include "oops/klass.inline.hpp"
  41 #include "prims/methodHandles.hpp"
  42 #include "runtime/jniHandles.hpp"
  43 #include "runtime/safepointMechanism.hpp"
  44 #include "runtime/sharedRuntime.hpp"
  45 #include "runtime/signature.hpp"
  46 #include "runtime/stubRoutines.hpp"
  47 #include "runtime/vframeArray.hpp"
  48 #include "runtime/vm_version.hpp"
  49 #include "utilities/align.hpp"
  50 #include "vmreg_x86.inline.hpp"
  51 #ifdef COMPILER1
  52 #include "c1/c1_Runtime1.hpp"
  53 #endif
  54 #ifdef COMPILER2
  55 #include "opto/runtime.hpp"
  56 #endif
  57 
  58 #define __ masm->
  59 
  60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  61 
  62 class RegisterSaver {
  63   // Capture info about frame layout
  64 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  65   enum layout {
  66                 fpu_state_off = 0,
  67                 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
  68                 st0_off, st0H_off,
  69                 st1_off, st1H_off,
  70                 st2_off, st2H_off,
  71                 st3_off, st3H_off,
  72                 st4_off, st4H_off,
  73                 st5_off, st5H_off,
  74                 st6_off, st6H_off,
  75                 st7_off, st7H_off,
  76                 xmm_off,
  77                 DEF_XMM_OFFS(0),
  78                 DEF_XMM_OFFS(1),
  79                 DEF_XMM_OFFS(2),
  80                 DEF_XMM_OFFS(3),
  81                 DEF_XMM_OFFS(4),
  82                 DEF_XMM_OFFS(5),
  83                 DEF_XMM_OFFS(6),
  84                 DEF_XMM_OFFS(7),
  85                 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
  86                 rdi_off,
  87                 rsi_off,
  88                 ignore_off,  // extra copy of rbp,
  89                 rsp_off,
  90                 rbx_off,
  91                 rdx_off,
  92                 rcx_off,
  93                 rax_off,
  94                 // The frame sender code expects that rbp will be in the "natural" place and
  95                 // will override any oopMap setting for it. We must therefore force the layout
  96                 // so that it agrees with the frame sender code.
  97                 rbp_off,
  98                 return_off,      // slot for return address
  99                 reg_save_size };
 100   enum { FPU_regs_live = flags_off - fpu_state_end };
 101 
 102   public:
 103 
 104   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
 105                                      int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
 106   static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
 107 
 108   static int rax_offset() { return rax_off; }
 109   static int rbx_offset() { return rbx_off; }
 110 
 111   // Offsets into the register save area
 112   // Used by deoptimization when it is managing result register
 113   // values on its own
 114 
 115   static int raxOffset(void) { return rax_off; }
 116   static int rdxOffset(void) { return rdx_off; }
 117   static int rbxOffset(void) { return rbx_off; }
 118   static int xmm0Offset(void) { return xmm0_off; }
 119   // This really returns a slot in the fp save area, which one is not important
 120   static int fpResultOffset(void) { return st0_off; }
 121 
 122   // During deoptimization only the result register need to be restored
 123   // all the other values have already been extracted.
 124 
 125   static void restore_result_registers(MacroAssembler* masm);
 126 
 127 };
 128 
 129 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
 130                                            int* total_frame_words, bool verify_fpu, bool save_vectors) {
 131   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 132   int ymm_bytes = num_xmm_regs * 16;
 133   int zmm_bytes = num_xmm_regs * 32;
 134 #ifdef COMPILER2
 135   int opmask_state_bytes = KRegisterImpl::number_of_registers * 8;
 136   if (save_vectors) {
 137     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 138     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 139     // Save upper half of YMM registers
 140     int vect_bytes = ymm_bytes;
 141     if (UseAVX > 2) {
 142       // Save upper half of ZMM registers as well
 143       vect_bytes += zmm_bytes;
 144       additional_frame_words += opmask_state_bytes / wordSize;
 145     }
 146     additional_frame_words += vect_bytes / wordSize;
 147   }
 148 #else
 149   assert(!save_vectors, "vectors are generated only by C2");
 150 #endif
 151   int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
 152   int frame_words = frame_size_in_bytes / wordSize;
 153   *total_frame_words = frame_words;
 154 
 155   assert(FPUStateSizeInWords == 27, "update stack layout");
 156 
 157   // save registers, fpu state, and flags
 158   // We assume caller has already has return address slot on the stack
 159   // We push epb twice in this sequence because we want the real rbp,
 160   // to be under the return like a normal enter and we want to use pusha
 161   // We push by hand instead of using push.
 162   __ enter();
 163   __ pusha();
 164   __ pushf();
 165   __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
 166   __ push_FPU_state();          // Save FPU state & init
 167 
 168   if (verify_fpu) {
 169     // Some stubs may have non standard FPU control word settings so
 170     // only check and reset the value when it required to be the
 171     // standard value.  The safepoint blob in particular can be used
 172     // in methods which are using the 24 bit control word for
 173     // optimized float math.
 174 
 175 #ifdef ASSERT
 176     // Make sure the control word has the expected value
 177     Label ok;
 178     __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
 179     __ jccb(Assembler::equal, ok);
 180     __ stop("corrupted control word detected");
 181     __ bind(ok);
 182 #endif
 183 
 184     // Reset the control word to guard against exceptions being unmasked
 185     // since fstp_d can cause FPU stack underflow exceptions.  Write it
 186     // into the on stack copy and then reload that to make sure that the
 187     // current and future values are correct.
 188     __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
 189   }
 190 
 191   __ frstor(Address(rsp, 0));
 192   if (!verify_fpu) {
 193     // Set the control word so that exceptions are masked for the
 194     // following code.
 195     __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
 196   }
 197 
 198   int off = st0_off;
 199   int delta = st1_off - off;
 200 
 201   // Save the FPU registers in de-opt-able form
 202   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 203     __ fstp_d(Address(rsp, off*wordSize));
 204     off += delta;
 205   }
 206 
 207   off = xmm0_off;
 208   delta = xmm1_off - off;
 209   if(UseSSE == 1) {
 210     // Save the XMM state
 211     for (int n = 0; n < num_xmm_regs; n++) {
 212       __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
 213       off += delta;
 214     }
 215   } else if(UseSSE >= 2) {
 216     // Save whole 128bit (16 bytes) XMM registers
 217     for (int n = 0; n < num_xmm_regs; n++) {
 218       __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
 219       off += delta;
 220     }
 221   }
 222 
 223 #ifdef COMPILER2
 224   if (save_vectors) {
 225     __ subptr(rsp, ymm_bytes);
 226     // Save upper half of YMM registers
 227     for (int n = 0; n < num_xmm_regs; n++) {
 228       __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
 229     }
 230     if (UseAVX > 2) {
 231       __ subptr(rsp, zmm_bytes);
 232       // Save upper half of ZMM registers
 233       for (int n = 0; n < num_xmm_regs; n++) {
 234         __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
 235       }
 236       __ subptr(rsp, opmask_state_bytes);
 237       // Save opmask registers
 238       for (int n = 0; n < KRegisterImpl::number_of_registers; n++) {
 239         __ kmov(Address(rsp, n*8), as_KRegister(n));
 240       }
 241     }
 242   }
 243 #else
 244   assert(!save_vectors, "vectors are generated only by C2");
 245 #endif
 246 
 247   __ vzeroupper();
 248 
 249   // Set an oopmap for the call site.  This oopmap will map all
 250   // oop-registers and debug-info registers as callee-saved.  This
 251   // will allow deoptimization at this safepoint to find all possible
 252   // debug-info recordings, as well as let GC find all oops.
 253 
 254   OopMapSet *oop_maps = new OopMapSet();
 255   OopMap* map =  new OopMap( frame_words, 0 );
 256 
 257 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
 258 #define NEXTREG(x) (x)->as_VMReg()->next()
 259 
 260   map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
 261   map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
 262   map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
 263   map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
 264   // rbp, location is known implicitly, no oopMap
 265   map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
 266   map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
 267 
 268   // %%% This is really a waste but we'll keep things as they were for now for the upper component
 269   off = st0_off;
 270   delta = st1_off - off;
 271   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 272     FloatRegister freg_name = as_FloatRegister(n);
 273     map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
 274     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
 275     off += delta;
 276   }
 277   off = xmm0_off;
 278   delta = xmm1_off - off;
 279   for (int n = 0; n < num_xmm_regs; n++) {
 280     XMMRegister xmm_name = as_XMMRegister(n);
 281     map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
 282     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
 283     off += delta;
 284   }
 285 #undef NEXTREG
 286 #undef STACK_OFFSET
 287 
 288   return map;
 289 }
 290 
 291 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 292   int opmask_state_bytes = 0;
 293   int additional_frame_bytes = 0;
 294   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 295   int ymm_bytes = num_xmm_regs * 16;
 296   int zmm_bytes = num_xmm_regs * 32;
 297   // Recover XMM & FPU state
 298 #ifdef COMPILER2
 299   if (restore_vectors) {
 300     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 301     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 302     // Save upper half of YMM registers
 303     additional_frame_bytes = ymm_bytes;
 304     if (UseAVX > 2) {
 305       // Save upper half of ZMM registers as well
 306       additional_frame_bytes += zmm_bytes;
 307       opmask_state_bytes = KRegisterImpl::number_of_registers * 8;
 308       additional_frame_bytes += opmask_state_bytes;
 309     }
 310   }
 311 #else
 312   assert(!restore_vectors, "vectors are generated only by C2");
 313 #endif
 314 
 315   int off = xmm0_off;
 316   int delta = xmm1_off - off;
 317 
 318   __ vzeroupper();
 319 
 320   if (UseSSE == 1) {
 321     // Restore XMM registers
 322     assert(additional_frame_bytes == 0, "");
 323     for (int n = 0; n < num_xmm_regs; n++) {
 324       __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
 325       off += delta;
 326     }
 327   } else if (UseSSE >= 2) {
 328     // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
 329     // ZMM because the movdqu instruction zeros the upper part of the XMM register.
 330     for (int n = 0; n < num_xmm_regs; n++) {
 331       __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
 332       off += delta;
 333     }
 334   }
 335 
 336   if (restore_vectors) {
 337     off = additional_frame_bytes - ymm_bytes;
 338     // Restore upper half of YMM registers.
 339     for (int n = 0; n < num_xmm_regs; n++) {
 340       __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
 341     }
 342     if (UseAVX > 2) {
 343       // Restore upper half of ZMM registers.
 344       off = opmask_state_bytes;
 345       for (int n = 0; n < num_xmm_regs; n++) {
 346         __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
 347       }
 348       for (int n = 0; n < KRegisterImpl::number_of_registers; n++) {
 349         __ kmov(as_KRegister(n), Address(rsp, n*8));
 350       }
 351     }
 352     __ addptr(rsp, additional_frame_bytes);
 353   }
 354 
 355   __ pop_FPU_state();
 356   __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
 357 
 358   __ popf();
 359   __ popa();
 360   // Get the rbp, described implicitly by the frame sender code (no oopMap)
 361   __ pop(rbp);
 362 }
 363 
 364 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 365 
 366   // Just restore result register. Only used by deoptimization. By
 367   // now any callee save register that needs to be restore to a c2
 368   // caller of the deoptee has been extracted into the vframeArray
 369   // and will be stuffed into the c2i adapter we create for later
 370   // restoration so only result registers need to be restored here.
 371   //
 372 
 373   __ frstor(Address(rsp, 0));      // Restore fpu state
 374 
 375   // Recover XMM & FPU state
 376   if( UseSSE == 1 ) {
 377     __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
 378   } else if( UseSSE >= 2 ) {
 379     __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
 380   }
 381   __ movptr(rax, Address(rsp, rax_off*wordSize));
 382   __ movptr(rdx, Address(rsp, rdx_off*wordSize));
 383   // Pop all of the register save are off the stack except the return address
 384   __ addptr(rsp, return_off * wordSize);
 385 }
 386 
 387 // Is vector's size (in bytes) bigger than a size saved by default?
 388 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
 389 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
 390 bool SharedRuntime::is_wide_vector(int size) {
 391   return size > 16;
 392 }
 393 
 394 // The java_calling_convention describes stack locations as ideal slots on
 395 // a frame with no abi restrictions. Since we must observe abi restrictions
 396 // (like the placement of the register window) the slots must be biased by
 397 // the following value.
 398 static int reg2offset_in(VMReg r) {
 399   // Account for saved rbp, and return address
 400   // This should really be in_preserve_stack_slots
 401   return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
 402 }
 403 
 404 static int reg2offset_out(VMReg r) {
 405   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 406 }
 407 
 408 // ---------------------------------------------------------------------------
 409 // Read the array of BasicTypes from a signature, and compute where the
 410 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 411 // quantities.  Values less than SharedInfo::stack0 are registers, those above
 412 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 413 // as framesizes are fixed.
 414 // VMRegImpl::stack0 refers to the first slot 0(sp).
 415 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 416 // up to RegisterImpl::number_of_registers) are the 32-bit
 417 // integer registers.
 418 
 419 // Pass first two oop/int args in registers ECX and EDX.
 420 // Pass first two float/double args in registers XMM0 and XMM1.
 421 // Doubles have precedence, so if you pass a mix of floats and doubles
 422 // the doubles will grab the registers before the floats will.
 423 
 424 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 425 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 426 // units regardless of build. Of course for i486 there is no 64 bit build
 427 
 428 
 429 // ---------------------------------------------------------------------------
 430 // The compiled Java calling convention.
 431 // Pass first two oop/int args in registers ECX and EDX.
 432 // Pass first two float/double args in registers XMM0 and XMM1.
 433 // Doubles have precedence, so if you pass a mix of floats and doubles
 434 // the doubles will grab the registers before the floats will.
 435 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 436                                            VMRegPair *regs,
 437                                            int total_args_passed) {
 438   uint    stack = 0;          // Starting stack position for args on stack
 439 
 440 
 441   // Pass first two oop/int args in registers ECX and EDX.
 442   uint reg_arg0 = 9999;
 443   uint reg_arg1 = 9999;
 444 
 445   // Pass first two float/double args in registers XMM0 and XMM1.
 446   // Doubles have precedence, so if you pass a mix of floats and doubles
 447   // the doubles will grab the registers before the floats will.
 448   // CNC - TURNED OFF FOR non-SSE.
 449   //       On Intel we have to round all doubles (and most floats) at
 450   //       call sites by storing to the stack in any case.
 451   // UseSSE=0 ==> Don't Use ==> 9999+0
 452   // UseSSE=1 ==> Floats only ==> 9999+1
 453   // UseSSE>=2 ==> Floats or doubles ==> 9999+2
 454   enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
 455   uint fargs = (UseSSE>=2) ? 2 : UseSSE;
 456   uint freg_arg0 = 9999+fargs;
 457   uint freg_arg1 = 9999+fargs;
 458 
 459   // Pass doubles & longs aligned on the stack.  First count stack slots for doubles
 460   int i;
 461   for( i = 0; i < total_args_passed; i++) {
 462     if( sig_bt[i] == T_DOUBLE ) {
 463       // first 2 doubles go in registers
 464       if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
 465       else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
 466       else // Else double is passed low on the stack to be aligned.
 467         stack += 2;
 468     } else if( sig_bt[i] == T_LONG ) {
 469       stack += 2;
 470     }
 471   }
 472   int dstack = 0;             // Separate counter for placing doubles
 473 
 474   // Now pick where all else goes.
 475   for( i = 0; i < total_args_passed; i++) {
 476     // From the type and the argument number (count) compute the location
 477     switch( sig_bt[i] ) {
 478     case T_SHORT:
 479     case T_CHAR:
 480     case T_BYTE:
 481     case T_BOOLEAN:
 482     case T_INT:
 483     case T_ARRAY:
 484     case T_OBJECT:
 485     case T_ADDRESS:
 486       if( reg_arg0 == 9999 )  {
 487         reg_arg0 = i;
 488         regs[i].set1(rcx->as_VMReg());
 489       } else if( reg_arg1 == 9999 )  {
 490         reg_arg1 = i;
 491         regs[i].set1(rdx->as_VMReg());
 492       } else {
 493         regs[i].set1(VMRegImpl::stack2reg(stack++));
 494       }
 495       break;
 496     case T_FLOAT:
 497       if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
 498         freg_arg0 = i;
 499         regs[i].set1(xmm0->as_VMReg());
 500       } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
 501         freg_arg1 = i;
 502         regs[i].set1(xmm1->as_VMReg());
 503       } else {
 504         regs[i].set1(VMRegImpl::stack2reg(stack++));
 505       }
 506       break;
 507     case T_LONG:
 508       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
 509       regs[i].set2(VMRegImpl::stack2reg(dstack));
 510       dstack += 2;
 511       break;
 512     case T_DOUBLE:
 513       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
 514       if( freg_arg0 == (uint)i ) {
 515         regs[i].set2(xmm0->as_VMReg());
 516       } else if( freg_arg1 == (uint)i ) {
 517         regs[i].set2(xmm1->as_VMReg());
 518       } else {
 519         regs[i].set2(VMRegImpl::stack2reg(dstack));
 520         dstack += 2;
 521       }
 522       break;
 523     case T_VOID: regs[i].set_bad(); break;
 524       break;
 525     default:
 526       ShouldNotReachHere();
 527       break;
 528     }
 529   }
 530 
 531   // return value can be odd number of VMRegImpl stack slots make multiple of 2
 532   return align_up(stack, 2);
 533 }
 534 
 535 // Patch the callers callsite with entry to compiled code if it exists.
 536 static void patch_callers_callsite(MacroAssembler *masm) {
 537   Label L;
 538   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 539   __ jcc(Assembler::equal, L);
 540   // Schedule the branch target address early.
 541   // Call into the VM to patch the caller, then jump to compiled callee
 542   // rax, isn't live so capture return address while we easily can
 543   __ movptr(rax, Address(rsp, 0));
 544   __ pusha();
 545   __ pushf();
 546 
 547   if (UseSSE == 1) {
 548     __ subptr(rsp, 2*wordSize);
 549     __ movflt(Address(rsp, 0), xmm0);
 550     __ movflt(Address(rsp, wordSize), xmm1);
 551   }
 552   if (UseSSE >= 2) {
 553     __ subptr(rsp, 4*wordSize);
 554     __ movdbl(Address(rsp, 0), xmm0);
 555     __ movdbl(Address(rsp, 2*wordSize), xmm1);
 556   }
 557 #ifdef COMPILER2
 558   // C2 may leave the stack dirty if not in SSE2+ mode
 559   if (UseSSE >= 2) {
 560     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 561   } else {
 562     __ empty_FPU_stack();
 563   }
 564 #endif /* COMPILER2 */
 565 
 566   // VM needs caller's callsite
 567   __ push(rax);
 568   // VM needs target method
 569   __ push(rbx);
 570   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 571   __ addptr(rsp, 2*wordSize);
 572 
 573   if (UseSSE == 1) {
 574     __ movflt(xmm0, Address(rsp, 0));
 575     __ movflt(xmm1, Address(rsp, wordSize));
 576     __ addptr(rsp, 2*wordSize);
 577   }
 578   if (UseSSE >= 2) {
 579     __ movdbl(xmm0, Address(rsp, 0));
 580     __ movdbl(xmm1, Address(rsp, 2*wordSize));
 581     __ addptr(rsp, 4*wordSize);
 582   }
 583 
 584   __ popf();
 585   __ popa();
 586   __ bind(L);
 587 }
 588 
 589 
 590 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
 591   int next_off = st_off - Interpreter::stackElementSize;
 592   __ movdbl(Address(rsp, next_off), r);
 593 }
 594 
 595 static void gen_c2i_adapter(MacroAssembler *masm,
 596                             int total_args_passed,
 597                             int comp_args_on_stack,
 598                             const BasicType *sig_bt,
 599                             const VMRegPair *regs,
 600                             Label& skip_fixup) {
 601   // Before we get into the guts of the C2I adapter, see if we should be here
 602   // at all.  We've come from compiled code and are attempting to jump to the
 603   // interpreter, which means the caller made a static call to get here
 604   // (vcalls always get a compiled target if there is one).  Check for a
 605   // compiled target.  If there is one, we need to patch the caller's call.
 606   patch_callers_callsite(masm);
 607 
 608   __ bind(skip_fixup);
 609 
 610 #ifdef COMPILER2
 611   // C2 may leave the stack dirty if not in SSE2+ mode
 612   if (UseSSE >= 2) {
 613     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 614   } else {
 615     __ empty_FPU_stack();
 616   }
 617 #endif /* COMPILER2 */
 618 
 619   // Since all args are passed on the stack, total_args_passed * interpreter_
 620   // stack_element_size  is the
 621   // space we need.
 622   int extraspace = total_args_passed * Interpreter::stackElementSize;
 623 
 624   // Get return address
 625   __ pop(rax);
 626 
 627   // set senderSP value
 628   __ movptr(rsi, rsp);
 629 
 630   __ subptr(rsp, extraspace);
 631 
 632   // Now write the args into the outgoing interpreter space
 633   for (int i = 0; i < total_args_passed; i++) {
 634     if (sig_bt[i] == T_VOID) {
 635       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 636       continue;
 637     }
 638 
 639     // st_off points to lowest address on stack.
 640     int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
 641     int next_off = st_off - Interpreter::stackElementSize;
 642 
 643     // Say 4 args:
 644     // i   st_off
 645     // 0   12 T_LONG
 646     // 1    8 T_VOID
 647     // 2    4 T_OBJECT
 648     // 3    0 T_BOOL
 649     VMReg r_1 = regs[i].first();
 650     VMReg r_2 = regs[i].second();
 651     if (!r_1->is_valid()) {
 652       assert(!r_2->is_valid(), "");
 653       continue;
 654     }
 655 
 656     if (r_1->is_stack()) {
 657       // memory to memory use fpu stack top
 658       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 659 
 660       if (!r_2->is_valid()) {
 661         __ movl(rdi, Address(rsp, ld_off));
 662         __ movptr(Address(rsp, st_off), rdi);
 663       } else {
 664 
 665         // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
 666         // st_off == MSW, st_off-wordSize == LSW
 667 
 668         __ movptr(rdi, Address(rsp, ld_off));
 669         __ movptr(Address(rsp, next_off), rdi);
 670 #ifndef _LP64
 671         __ movptr(rdi, Address(rsp, ld_off + wordSize));
 672         __ movptr(Address(rsp, st_off), rdi);
 673 #else
 674 #ifdef ASSERT
 675         // Overwrite the unused slot with known junk
 676         __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 677         __ movptr(Address(rsp, st_off), rax);
 678 #endif /* ASSERT */
 679 #endif // _LP64
 680       }
 681     } else if (r_1->is_Register()) {
 682       Register r = r_1->as_Register();
 683       if (!r_2->is_valid()) {
 684         __ movl(Address(rsp, st_off), r);
 685       } else {
 686         // long/double in gpr
 687         NOT_LP64(ShouldNotReachHere());
 688         // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 689         // T_DOUBLE and T_LONG use two slots in the interpreter
 690         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 691           // long/double in gpr
 692 #ifdef ASSERT
 693           // Overwrite the unused slot with known junk
 694           LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
 695           __ movptr(Address(rsp, st_off), rax);
 696 #endif /* ASSERT */
 697           __ movptr(Address(rsp, next_off), r);
 698         } else {
 699           __ movptr(Address(rsp, st_off), r);
 700         }
 701       }
 702     } else {
 703       assert(r_1->is_XMMRegister(), "");
 704       if (!r_2->is_valid()) {
 705         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 706       } else {
 707         assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
 708         move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
 709       }
 710     }
 711   }
 712 
 713   // Schedule the branch target address early.
 714   __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
 715   // And repush original return address
 716   __ push(rax);
 717   __ jmp(rcx);
 718 }
 719 
 720 
 721 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
 722   int next_val_off = ld_off - Interpreter::stackElementSize;
 723   __ movdbl(r, Address(saved_sp, next_val_off));
 724 }
 725 
 726 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
 727                         address code_start, address code_end,
 728                         Label& L_ok) {
 729   Label L_fail;
 730   __ lea(temp_reg, ExternalAddress(code_start));
 731   __ cmpptr(pc_reg, temp_reg);
 732   __ jcc(Assembler::belowEqual, L_fail);
 733   __ lea(temp_reg, ExternalAddress(code_end));
 734   __ cmpptr(pc_reg, temp_reg);
 735   __ jcc(Assembler::below, L_ok);
 736   __ bind(L_fail);
 737 }
 738 
 739 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 740                                     int total_args_passed,
 741                                     int comp_args_on_stack,
 742                                     const BasicType *sig_bt,
 743                                     const VMRegPair *regs) {
 744   // Note: rsi contains the senderSP on entry. We must preserve it since
 745   // we may do a i2c -> c2i transition if we lose a race where compiled
 746   // code goes non-entrant while we get args ready.
 747 
 748   // Adapters can be frameless because they do not require the caller
 749   // to perform additional cleanup work, such as correcting the stack pointer.
 750   // An i2c adapter is frameless because the *caller* frame, which is interpreted,
 751   // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
 752   // even if a callee has modified the stack pointer.
 753   // A c2i adapter is frameless because the *callee* frame, which is interpreted,
 754   // routinely repairs its caller's stack pointer (from sender_sp, which is set
 755   // up via the senderSP register).
 756   // In other words, if *either* the caller or callee is interpreted, we can
 757   // get the stack pointer repaired after a call.
 758   // This is why c2i and i2c adapters cannot be indefinitely composed.
 759   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 760   // both caller and callee would be compiled methods, and neither would
 761   // clean up the stack pointer changes performed by the two adapters.
 762   // If this happens, control eventually transfers back to the compiled
 763   // caller, but with an uncorrected stack, causing delayed havoc.
 764 
 765   // Pick up the return address
 766   __ movptr(rax, Address(rsp, 0));
 767 
 768   if (VerifyAdapterCalls &&
 769       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 770     // So, let's test for cascading c2i/i2c adapters right now.
 771     //  assert(Interpreter::contains($return_addr) ||
 772     //         StubRoutines::contains($return_addr),
 773     //         "i2c adapter must return to an interpreter frame");
 774     __ block_comment("verify_i2c { ");
 775     Label L_ok;
 776     if (Interpreter::code() != NULL)
 777       range_check(masm, rax, rdi,
 778                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 779                   L_ok);
 780     if (StubRoutines::code1() != NULL)
 781       range_check(masm, rax, rdi,
 782                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 783                   L_ok);
 784     if (StubRoutines::code2() != NULL)
 785       range_check(masm, rax, rdi,
 786                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 787                   L_ok);
 788     const char* msg = "i2c adapter must return to an interpreter frame";
 789     __ block_comment(msg);
 790     __ stop(msg);
 791     __ bind(L_ok);
 792     __ block_comment("} verify_i2ce ");
 793   }
 794 
 795   // Must preserve original SP for loading incoming arguments because
 796   // we need to align the outgoing SP for compiled code.
 797   __ movptr(rdi, rsp);
 798 
 799   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 800   // in registers, we will occasionally have no stack args.
 801   int comp_words_on_stack = 0;
 802   if (comp_args_on_stack) {
 803     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 804     // registers are below.  By subtracting stack0, we either get a negative
 805     // number (all values in registers) or the maximum stack slot accessed.
 806     // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
 807     // Convert 4-byte stack slots to words.
 808     comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
 809     // Round up to miminum stack alignment, in wordSize
 810     comp_words_on_stack = align_up(comp_words_on_stack, 2);
 811     __ subptr(rsp, comp_words_on_stack * wordSize);
 812   }
 813 
 814   // Align the outgoing SP
 815   __ andptr(rsp, -(StackAlignmentInBytes));
 816 
 817   // push the return address on the stack (note that pushing, rather
 818   // than storing it, yields the correct frame alignment for the callee)
 819   __ push(rax);
 820 
 821   // Put saved SP in another register
 822   const Register saved_sp = rax;
 823   __ movptr(saved_sp, rdi);
 824 
 825 
 826   // Will jump to the compiled code just as if compiled code was doing it.
 827   // Pre-load the register-jump target early, to schedule it better.
 828   __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
 829 
 830   // Now generate the shuffle code.  Pick up all register args and move the
 831   // rest through the floating point stack top.
 832   for (int i = 0; i < total_args_passed; i++) {
 833     if (sig_bt[i] == T_VOID) {
 834       // Longs and doubles are passed in native word order, but misaligned
 835       // in the 32-bit build.
 836       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 837       continue;
 838     }
 839 
 840     // Pick up 0, 1 or 2 words from SP+offset.
 841 
 842     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 843             "scrambled load targets?");
 844     // Load in argument order going down.
 845     int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
 846     // Point to interpreter value (vs. tag)
 847     int next_off = ld_off - Interpreter::stackElementSize;
 848     //
 849     //
 850     //
 851     VMReg r_1 = regs[i].first();
 852     VMReg r_2 = regs[i].second();
 853     if (!r_1->is_valid()) {
 854       assert(!r_2->is_valid(), "");
 855       continue;
 856     }
 857     if (r_1->is_stack()) {
 858       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 859       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 860 
 861       // We can use rsi as a temp here because compiled code doesn't need rsi as an input
 862       // and if we end up going thru a c2i because of a miss a reasonable value of rsi
 863       // we be generated.
 864       if (!r_2->is_valid()) {
 865         // __ fld_s(Address(saved_sp, ld_off));
 866         // __ fstp_s(Address(rsp, st_off));
 867         __ movl(rsi, Address(saved_sp, ld_off));
 868         __ movptr(Address(rsp, st_off), rsi);
 869       } else {
 870         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 871         // are accessed as negative so LSW is at LOW address
 872 
 873         // ld_off is MSW so get LSW
 874         // st_off is LSW (i.e. reg.first())
 875         // __ fld_d(Address(saved_sp, next_off));
 876         // __ fstp_d(Address(rsp, st_off));
 877         //
 878         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 879         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 880         // So we must adjust where to pick up the data to match the interpreter.
 881         //
 882         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 883         // are accessed as negative so LSW is at LOW address
 884 
 885         // ld_off is MSW so get LSW
 886         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 887                            next_off : ld_off;
 888         __ movptr(rsi, Address(saved_sp, offset));
 889         __ movptr(Address(rsp, st_off), rsi);
 890 #ifndef _LP64
 891         __ movptr(rsi, Address(saved_sp, ld_off));
 892         __ movptr(Address(rsp, st_off + wordSize), rsi);
 893 #endif // _LP64
 894       }
 895     } else if (r_1->is_Register()) {  // Register argument
 896       Register r = r_1->as_Register();
 897       assert(r != rax, "must be different");
 898       if (r_2->is_valid()) {
 899         //
 900         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 901         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 902         // So we must adjust where to pick up the data to match the interpreter.
 903 
 904         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 905                            next_off : ld_off;
 906 
 907         // this can be a misaligned move
 908         __ movptr(r, Address(saved_sp, offset));
 909 #ifndef _LP64
 910         assert(r_2->as_Register() != rax, "need another temporary register");
 911         // Remember r_1 is low address (and LSB on x86)
 912         // So r_2 gets loaded from high address regardless of the platform
 913         __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
 914 #endif // _LP64
 915       } else {
 916         __ movl(r, Address(saved_sp, ld_off));
 917       }
 918     } else {
 919       assert(r_1->is_XMMRegister(), "");
 920       if (!r_2->is_valid()) {
 921         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 922       } else {
 923         move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
 924       }
 925     }
 926   }
 927 
 928   // 6243940 We might end up in handle_wrong_method if
 929   // the callee is deoptimized as we race thru here. If that
 930   // happens we don't want to take a safepoint because the
 931   // caller frame will look interpreted and arguments are now
 932   // "compiled" so it is much better to make this transition
 933   // invisible to the stack walking code. Unfortunately if
 934   // we try and find the callee by normal means a safepoint
 935   // is possible. So we stash the desired callee in the thread
 936   // and the vm will find there should this case occur.
 937 
 938   __ get_thread(rax);
 939   __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
 940 
 941   // move Method* to rax, in case we end up in an c2i adapter.
 942   // the c2i adapters expect Method* in rax, (c2) because c2's
 943   // resolve stubs return the result (the method) in rax,.
 944   // I'd love to fix this.
 945   __ mov(rax, rbx);
 946 
 947   __ jmp(rdi);
 948 }
 949 
 950 // ---------------------------------------------------------------
 951 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 952                                                             int total_args_passed,
 953                                                             int comp_args_on_stack,
 954                                                             const BasicType *sig_bt,
 955                                                             const VMRegPair *regs,
 956                                                             AdapterFingerPrint* fingerprint) {
 957   address i2c_entry = __ pc();
 958 
 959   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 960 
 961   // -------------------------------------------------------------------------
 962   // Generate a C2I adapter.  On entry we know rbx, holds the Method* during calls
 963   // to the interpreter.  The args start out packed in the compiled layout.  They
 964   // need to be unpacked into the interpreter layout.  This will almost always
 965   // require some stack space.  We grow the current (compiled) stack, then repack
 966   // the args.  We  finally end in a jump to the generic interpreter entry point.
 967   // On exit from the interpreter, the interpreter will restore our SP (lest the
 968   // compiled code, which relys solely on SP and not EBP, get sick).
 969 
 970   address c2i_unverified_entry = __ pc();
 971   Label skip_fixup;
 972 
 973   Register holder = rax;
 974   Register receiver = rcx;
 975   Register temp = rbx;
 976 
 977   {
 978 
 979     Label missed;
 980     __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
 981     __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
 982     __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
 983     __ jcc(Assembler::notEqual, missed);
 984     // Method might have been compiled since the call site was patched to
 985     // interpreted if that is the case treat it as a miss so we can get
 986     // the call site corrected.
 987     __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 988     __ jcc(Assembler::equal, skip_fixup);
 989 
 990     __ bind(missed);
 991     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 992   }
 993 
 994   address c2i_entry = __ pc();
 995 
 996   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 997   bs->c2i_entry_barrier(masm);
 998 
 999   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
1000 
1001   __ flush();
1002   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1003 }
1004 
1005 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1006                                          VMRegPair *regs,
1007                                          VMRegPair *regs2,
1008                                          int total_args_passed) {
1009   assert(regs2 == NULL, "not needed on x86");
1010 // We return the amount of VMRegImpl stack slots we need to reserve for all
1011 // the arguments NOT counting out_preserve_stack_slots.
1012 
1013   uint    stack = 0;        // All arguments on stack
1014 
1015   for( int i = 0; i < total_args_passed; i++) {
1016     // From the type and the argument number (count) compute the location
1017     switch( sig_bt[i] ) {
1018     case T_BOOLEAN:
1019     case T_CHAR:
1020     case T_FLOAT:
1021     case T_BYTE:
1022     case T_SHORT:
1023     case T_INT:
1024     case T_OBJECT:
1025     case T_ARRAY:
1026     case T_ADDRESS:
1027     case T_METADATA:
1028       regs[i].set1(VMRegImpl::stack2reg(stack++));
1029       break;
1030     case T_LONG:
1031     case T_DOUBLE: // The stack numbering is reversed from Java
1032       // Since C arguments do not get reversed, the ordering for
1033       // doubles on the stack must be opposite the Java convention
1034       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1035       regs[i].set2(VMRegImpl::stack2reg(stack));
1036       stack += 2;
1037       break;
1038     case T_VOID: regs[i].set_bad(); break;
1039     default:
1040       ShouldNotReachHere();
1041       break;
1042     }
1043   }
1044   return stack;
1045 }
1046 
1047 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1048                                              uint num_bits,
1049                                              uint total_args_passed) {
1050   Unimplemented();
1051   return 0;
1052 }
1053 
1054 // A simple move of integer like type
1055 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1056   if (src.first()->is_stack()) {
1057     if (dst.first()->is_stack()) {
1058       // stack to stack
1059       // __ ld(FP, reg2offset(src.first()), L5);
1060       // __ st(L5, SP, reg2offset(dst.first()));
1061       __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1062       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1063     } else {
1064       // stack to reg
1065       __ movl2ptr(dst.first()->as_Register(),  Address(rbp, reg2offset_in(src.first())));
1066     }
1067   } else if (dst.first()->is_stack()) {
1068     // reg to stack
1069     // no need to sign extend on 64bit
1070     __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1071   } else {
1072     if (dst.first() != src.first()) {
1073       __ mov(dst.first()->as_Register(), src.first()->as_Register());
1074     }
1075   }
1076 }
1077 
1078 // An oop arg. Must pass a handle not the oop itself
1079 static void object_move(MacroAssembler* masm,
1080                         OopMap* map,
1081                         int oop_handle_offset,
1082                         int framesize_in_slots,
1083                         VMRegPair src,
1084                         VMRegPair dst,
1085                         bool is_receiver,
1086                         int* receiver_offset) {
1087 
1088   // Because of the calling conventions we know that src can be a
1089   // register or a stack location. dst can only be a stack location.
1090 
1091   assert(dst.first()->is_stack(), "must be stack");
1092   // must pass a handle. First figure out the location we use as a handle
1093 
1094   if (src.first()->is_stack()) {
1095     // Oop is already on the stack as an argument
1096     Register rHandle = rax;
1097     Label nil;
1098     __ xorptr(rHandle, rHandle);
1099     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1100     __ jcc(Assembler::equal, nil);
1101     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1102     __ bind(nil);
1103     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1104 
1105     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1106     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1107     if (is_receiver) {
1108       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1109     }
1110   } else {
1111     // Oop is in an a register we must store it to the space we reserve
1112     // on the stack for oop_handles
1113     const Register rOop = src.first()->as_Register();
1114     const Register rHandle = rax;
1115     int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1116     int offset = oop_slot*VMRegImpl::stack_slot_size;
1117     Label skip;
1118     __ movptr(Address(rsp, offset), rOop);
1119     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1120     __ xorptr(rHandle, rHandle);
1121     __ cmpptr(rOop, (int32_t)NULL_WORD);
1122     __ jcc(Assembler::equal, skip);
1123     __ lea(rHandle, Address(rsp, offset));
1124     __ bind(skip);
1125     // Store the handle parameter
1126     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1127     if (is_receiver) {
1128       *receiver_offset = offset;
1129     }
1130   }
1131 }
1132 
1133 // A float arg may have to do float reg int reg conversion
1134 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1135   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1136 
1137   // Because of the calling convention we know that src is either a stack location
1138   // or an xmm register. dst can only be a stack location.
1139 
1140   assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1141 
1142   if (src.first()->is_stack()) {
1143     __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1144     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1145   } else {
1146     // reg to stack
1147     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1148   }
1149 }
1150 
1151 // A long move
1152 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1153 
1154   // The only legal possibility for a long_move VMRegPair is:
1155   // 1: two stack slots (possibly unaligned)
1156   // as neither the java  or C calling convention will use registers
1157   // for longs.
1158 
1159   if (src.first()->is_stack() && dst.first()->is_stack()) {
1160     assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1161     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1162     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1163     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1164     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1165   } else {
1166     ShouldNotReachHere();
1167   }
1168 }
1169 
1170 // A double move
1171 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1172 
1173   // The only legal possibilities for a double_move VMRegPair are:
1174   // The painful thing here is that like long_move a VMRegPair might be
1175 
1176   // Because of the calling convention we know that src is either
1177   //   1: a single physical register (xmm registers only)
1178   //   2: two stack slots (possibly unaligned)
1179   // dst can only be a pair of stack slots.
1180 
1181   assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1182 
1183   if (src.first()->is_stack()) {
1184     // source is all stack
1185     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1186     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1187     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1188     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1189   } else {
1190     // reg to stack
1191     // No worries about stack alignment
1192     __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1193   }
1194 }
1195 
1196 
1197 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1198   // We always ignore the frame_slots arg and just use the space just below frame pointer
1199   // which by this time is free to use
1200   switch (ret_type) {
1201   case T_FLOAT:
1202     __ fstp_s(Address(rbp, -wordSize));
1203     break;
1204   case T_DOUBLE:
1205     __ fstp_d(Address(rbp, -2*wordSize));
1206     break;
1207   case T_VOID:  break;
1208   case T_LONG:
1209     __ movptr(Address(rbp, -wordSize), rax);
1210     NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1211     break;
1212   default: {
1213     __ movptr(Address(rbp, -wordSize), rax);
1214     }
1215   }
1216 }
1217 
1218 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1219   // We always ignore the frame_slots arg and just use the space just below frame pointer
1220   // which by this time is free to use
1221   switch (ret_type) {
1222   case T_FLOAT:
1223     __ fld_s(Address(rbp, -wordSize));
1224     break;
1225   case T_DOUBLE:
1226     __ fld_d(Address(rbp, -2*wordSize));
1227     break;
1228   case T_LONG:
1229     __ movptr(rax, Address(rbp, -wordSize));
1230     NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1231     break;
1232   case T_VOID:  break;
1233   default: {
1234     __ movptr(rax, Address(rbp, -wordSize));
1235     }
1236   }
1237 }
1238 
1239 static void verify_oop_args(MacroAssembler* masm,
1240                             const methodHandle& method,
1241                             const BasicType* sig_bt,
1242                             const VMRegPair* regs) {
1243   Register temp_reg = rbx;  // not part of any compiled calling seq
1244   if (VerifyOops) {
1245     for (int i = 0; i < method->size_of_parameters(); i++) {
1246       if (is_reference_type(sig_bt[i])) {
1247         VMReg r = regs[i].first();
1248         assert(r->is_valid(), "bad oop arg");
1249         if (r->is_stack()) {
1250           __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1251           __ verify_oop(temp_reg);
1252         } else {
1253           __ verify_oop(r->as_Register());
1254         }
1255       }
1256     }
1257   }
1258 }
1259 
1260 static void gen_special_dispatch(MacroAssembler* masm,
1261                                  const methodHandle& method,
1262                                  const BasicType* sig_bt,
1263                                  const VMRegPair* regs) {
1264   verify_oop_args(masm, method, sig_bt, regs);
1265   vmIntrinsics::ID iid = method->intrinsic_id();
1266 
1267   // Now write the args into the outgoing interpreter space
1268   bool     has_receiver   = false;
1269   Register receiver_reg   = noreg;
1270   int      member_arg_pos = -1;
1271   Register member_reg     = noreg;
1272   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1273   if (ref_kind != 0) {
1274     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1275     member_reg = rbx;  // known to be free at this point
1276     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1277   } else if (iid == vmIntrinsics::_invokeBasic) {
1278     has_receiver = true;
1279   } else {
1280     fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1281   }
1282 
1283   if (member_reg != noreg) {
1284     // Load the member_arg into register, if necessary.
1285     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1286     VMReg r = regs[member_arg_pos].first();
1287     if (r->is_stack()) {
1288       __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1289     } else {
1290       // no data motion is needed
1291       member_reg = r->as_Register();
1292     }
1293   }
1294 
1295   if (has_receiver) {
1296     // Make sure the receiver is loaded into a register.
1297     assert(method->size_of_parameters() > 0, "oob");
1298     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1299     VMReg r = regs[0].first();
1300     assert(r->is_valid(), "bad receiver arg");
1301     if (r->is_stack()) {
1302       // Porting note:  This assumes that compiled calling conventions always
1303       // pass the receiver oop in a register.  If this is not true on some
1304       // platform, pick a temp and load the receiver from stack.
1305       fatal("receiver always in a register");
1306       receiver_reg = rcx;  // known to be free at this point
1307       __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1308     } else {
1309       // no data motion is needed
1310       receiver_reg = r->as_Register();
1311     }
1312   }
1313 
1314   // Figure out which address we are really jumping to:
1315   MethodHandles::generate_method_handle_dispatch(masm, iid,
1316                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1317 }
1318 
1319 // ---------------------------------------------------------------------------
1320 // Generate a native wrapper for a given method.  The method takes arguments
1321 // in the Java compiled code convention, marshals them to the native
1322 // convention (handlizes oops, etc), transitions to native, makes the call,
1323 // returns to java state (possibly blocking), unhandlizes any result and
1324 // returns.
1325 //
1326 // Critical native functions are a shorthand for the use of
1327 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1328 // functions.  The wrapper is expected to unpack the arguments before
1329 // passing them to the callee. Critical native functions leave the state _in_Java,
1330 // since they cannot stop for GC.
1331 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1332 // block and the check for pending exceptions it's impossible for them
1333 // to be thrown.
1334 //
1335 //
1336 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1337                                                 const methodHandle& method,
1338                                                 int compile_id,
1339                                                 BasicType* in_sig_bt,
1340                                                 VMRegPair* in_regs,
1341                                                 BasicType ret_type) {
1342   if (method->is_method_handle_intrinsic()) {
1343     vmIntrinsics::ID iid = method->intrinsic_id();
1344     intptr_t start = (intptr_t)__ pc();
1345     int vep_offset = ((intptr_t)__ pc()) - start;
1346     gen_special_dispatch(masm,
1347                          method,
1348                          in_sig_bt,
1349                          in_regs);
1350     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1351     __ flush();
1352     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1353     return nmethod::new_native_nmethod(method,
1354                                        compile_id,
1355                                        masm->code(),
1356                                        vep_offset,
1357                                        frame_complete,
1358                                        stack_slots / VMRegImpl::slots_per_word,
1359                                        in_ByteSize(-1),
1360                                        in_ByteSize(-1),
1361                                        (OopMapSet*)NULL);
1362   }
1363   address native_func = method->native_function();
1364   assert(native_func != NULL, "must have function");
1365 
1366   // An OopMap for lock (and class if static)
1367   OopMapSet *oop_maps = new OopMapSet();
1368 
1369   // We have received a description of where all the java arg are located
1370   // on entry to the wrapper. We need to convert these args to where
1371   // the jni function will expect them. To figure out where they go
1372   // we convert the java signature to a C signature by inserting
1373   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1374 
1375   const int total_in_args = method->size_of_parameters();
1376   int  total_c_args       = total_in_args + (method->is_static() ? 2 : 1);
1377 
1378   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1379   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1380   BasicType* in_elem_bt = NULL;
1381 
1382   int argc = 0;
1383   out_sig_bt[argc++] = T_ADDRESS;
1384   if (method->is_static()) {
1385     out_sig_bt[argc++] = T_OBJECT;
1386   }
1387 
1388   for (int i = 0; i < total_in_args ; i++ ) {
1389     out_sig_bt[argc++] = in_sig_bt[i];
1390   }
1391 
1392   // Now figure out where the args must be stored and how much stack space
1393   // they require.
1394   int out_arg_slots;
1395   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1396 
1397   // Compute framesize for the wrapper.  We need to handlize all oops in
1398   // registers a max of 2 on x86.
1399 
1400   // Calculate the total number of stack slots we will need.
1401 
1402   // First count the abi requirement plus all of the outgoing args
1403   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1404 
1405   // Now the space for the inbound oop handle area
1406   int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1407 
1408   int oop_handle_offset = stack_slots;
1409   stack_slots += total_save_slots;
1410 
1411   // Now any space we need for handlizing a klass if static method
1412 
1413   int klass_slot_offset = 0;
1414   int klass_offset = -1;
1415   int lock_slot_offset = 0;
1416   bool is_static = false;
1417 
1418   if (method->is_static()) {
1419     klass_slot_offset = stack_slots;
1420     stack_slots += VMRegImpl::slots_per_word;
1421     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1422     is_static = true;
1423   }
1424 
1425   // Plus a lock if needed
1426 
1427   if (method->is_synchronized()) {
1428     lock_slot_offset = stack_slots;
1429     stack_slots += VMRegImpl::slots_per_word;
1430   }
1431 
1432   // Now a place (+2) to save return values or temp during shuffling
1433   // + 2 for return address (which we own) and saved rbp,
1434   stack_slots += 4;
1435 
1436   // Ok The space we have allocated will look like:
1437   //
1438   //
1439   // FP-> |                     |
1440   //      |---------------------|
1441   //      | 2 slots for moves   |
1442   //      |---------------------|
1443   //      | lock box (if sync)  |
1444   //      |---------------------| <- lock_slot_offset  (-lock_slot_rbp_offset)
1445   //      | klass (if static)   |
1446   //      |---------------------| <- klass_slot_offset
1447   //      | oopHandle area      |
1448   //      |---------------------| <- oop_handle_offset (a max of 2 registers)
1449   //      | outbound memory     |
1450   //      | based arguments     |
1451   //      |                     |
1452   //      |---------------------|
1453   //      |                     |
1454   // SP-> | out_preserved_slots |
1455   //
1456   //
1457   // ****************************************************************************
1458   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1459   // arguments off of the stack after the jni call. Before the call we can use
1460   // instructions that are SP relative. After the jni call we switch to FP
1461   // relative instructions instead of re-adjusting the stack on windows.
1462   // ****************************************************************************
1463 
1464 
1465   // Now compute actual number of stack words we need rounding to make
1466   // stack properly aligned.
1467   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1468 
1469   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1470 
1471   intptr_t start = (intptr_t)__ pc();
1472 
1473   // First thing make an ic check to see if we should even be here
1474 
1475   // We are free to use all registers as temps without saving them and
1476   // restoring them except rbp. rbp is the only callee save register
1477   // as far as the interpreter and the compiler(s) are concerned.
1478 
1479 
1480   const Register ic_reg = rax;
1481   const Register receiver = rcx;
1482   Label hit;
1483   Label exception_pending;
1484 
1485   __ verify_oop(receiver);
1486   __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1487   __ jcc(Assembler::equal, hit);
1488 
1489   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1490 
1491   // verified entry must be aligned for code patching.
1492   // and the first 5 bytes must be in the same cache line
1493   // if we align at 8 then we will be sure 5 bytes are in the same line
1494   __ align(8);
1495 
1496   __ bind(hit);
1497 
1498   int vep_offset = ((intptr_t)__ pc()) - start;
1499 
1500 #ifdef COMPILER1
1501   // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1502   if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1503     inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1504    }
1505 #endif // COMPILER1
1506 
1507   // The instruction at the verified entry point must be 5 bytes or longer
1508   // because it can be patched on the fly by make_non_entrant. The stack bang
1509   // instruction fits that requirement.
1510 
1511   // Generate stack overflow check
1512   __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1513 
1514   // Generate a new frame for the wrapper.
1515   __ enter();
1516   // -2 because return address is already present and so is saved rbp
1517   __ subptr(rsp, stack_size - 2*wordSize);
1518 
1519 
1520   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1521   bs->nmethod_entry_barrier(masm);
1522 
1523   // Frame is now completed as far as size and linkage.
1524   int frame_complete = ((intptr_t)__ pc()) - start;
1525 
1526   if (UseRTMLocking) {
1527     // Abort RTM transaction before calling JNI
1528     // because critical section will be large and will be
1529     // aborted anyway. Also nmethod could be deoptimized.
1530     __ xabort(0);
1531   }
1532 
1533   // Calculate the difference between rsp and rbp,. We need to know it
1534   // after the native call because on windows Java Natives will pop
1535   // the arguments and it is painful to do rsp relative addressing
1536   // in a platform independent way. So after the call we switch to
1537   // rbp, relative addressing.
1538 
1539   int fp_adjustment = stack_size - 2*wordSize;
1540 
1541 #ifdef COMPILER2
1542   // C2 may leave the stack dirty if not in SSE2+ mode
1543   if (UseSSE >= 2) {
1544     __ verify_FPU(0, "c2i transition should have clean FPU stack");
1545   } else {
1546     __ empty_FPU_stack();
1547   }
1548 #endif /* COMPILER2 */
1549 
1550   // Compute the rbp, offset for any slots used after the jni call
1551 
1552   int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1553 
1554   // We use rdi as a thread pointer because it is callee save and
1555   // if we load it once it is usable thru the entire wrapper
1556   const Register thread = rdi;
1557 
1558    // We use rsi as the oop handle for the receiver/klass
1559    // It is callee save so it survives the call to native
1560 
1561    const Register oop_handle_reg = rsi;
1562 
1563    __ get_thread(thread);
1564 
1565   //
1566   // We immediately shuffle the arguments so that any vm call we have to
1567   // make from here on out (sync slow path, jvmti, etc.) we will have
1568   // captured the oops from our caller and have a valid oopMap for
1569   // them.
1570 
1571   // -----------------
1572   // The Grand Shuffle
1573   //
1574   // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1575   // and, if static, the class mirror instead of a receiver.  This pretty much
1576   // guarantees that register layout will not match (and x86 doesn't use reg
1577   // parms though amd does).  Since the native abi doesn't use register args
1578   // and the java conventions does we don't have to worry about collisions.
1579   // All of our moved are reg->stack or stack->stack.
1580   // We ignore the extra arguments during the shuffle and handle them at the
1581   // last moment. The shuffle is described by the two calling convention
1582   // vectors we have in our possession. We simply walk the java vector to
1583   // get the source locations and the c vector to get the destinations.
1584 
1585   int c_arg = method->is_static() ? 2 : 1;
1586 
1587   // Record rsp-based slot for receiver on stack for non-static methods
1588   int receiver_offset = -1;
1589 
1590   // This is a trick. We double the stack slots so we can claim
1591   // the oops in the caller's frame. Since we are sure to have
1592   // more args than the caller doubling is enough to make
1593   // sure we can capture all the incoming oop args from the
1594   // caller.
1595   //
1596   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1597 
1598   // Mark location of rbp,
1599   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1600 
1601   // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1602   // Are free to temporaries if we have to do  stack to steck moves.
1603   // All inbound args are referenced based on rbp, and all outbound args via rsp.
1604 
1605   for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1606     switch (in_sig_bt[i]) {
1607       case T_ARRAY:
1608       case T_OBJECT:
1609         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1610                     ((i == 0) && (!is_static)),
1611                     &receiver_offset);
1612         break;
1613       case T_VOID:
1614         break;
1615 
1616       case T_FLOAT:
1617         float_move(masm, in_regs[i], out_regs[c_arg]);
1618           break;
1619 
1620       case T_DOUBLE:
1621         assert( i + 1 < total_in_args &&
1622                 in_sig_bt[i + 1] == T_VOID &&
1623                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1624         double_move(masm, in_regs[i], out_regs[c_arg]);
1625         break;
1626 
1627       case T_LONG :
1628         long_move(masm, in_regs[i], out_regs[c_arg]);
1629         break;
1630 
1631       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1632 
1633       default:
1634         simple_move32(masm, in_regs[i], out_regs[c_arg]);
1635     }
1636   }
1637 
1638   // Pre-load a static method's oop into rsi.  Used both by locking code and
1639   // the normal JNI call code.
1640   if (method->is_static()) {
1641 
1642     //  load opp into a register
1643     __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1644 
1645     // Now handlize the static class mirror it's known not-null.
1646     __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1647     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1648 
1649     // Now get the handle
1650     __ lea(oop_handle_reg, Address(rsp, klass_offset));
1651     // store the klass handle as second argument
1652     __ movptr(Address(rsp, wordSize), oop_handle_reg);
1653   }
1654 
1655   // Change state to native (we save the return address in the thread, since it might not
1656   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1657   // points into the right code segment. It does not have to be the correct return pc.
1658   // We use the same pc/oopMap repeatedly when we call out
1659 
1660   intptr_t the_pc = (intptr_t) __ pc();
1661   oop_maps->add_gc_map(the_pc - start, map);
1662 
1663   __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1664 
1665 
1666   // We have all of the arguments setup at this point. We must not touch any register
1667   // argument registers at this point (what if we save/restore them there are no oop?
1668 
1669   {
1670     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1671     __ mov_metadata(rax, method());
1672     __ call_VM_leaf(
1673          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1674          thread, rax);
1675   }
1676 
1677   // RedefineClasses() tracing support for obsolete method entry
1678   if (log_is_enabled(Trace, redefine, class, obsolete)) {
1679     __ mov_metadata(rax, method());
1680     __ call_VM_leaf(
1681          CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1682          thread, rax);
1683   }
1684 
1685   // These are register definitions we need for locking/unlocking
1686   const Register swap_reg = rax;  // Must use rax, for cmpxchg instruction
1687   const Register obj_reg  = rcx;  // Will contain the oop
1688   const Register lock_reg = rdx;  // Address of compiler lock object (BasicLock)
1689 
1690   Label slow_path_lock;
1691   Label lock_done;
1692 
1693   // Lock a synchronized method
1694   if (method->is_synchronized()) {
1695 
1696     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1697 
1698     // Get the handle (the 2nd argument)
1699     __ movptr(oop_handle_reg, Address(rsp, wordSize));
1700 
1701     // Get address of the box
1702 
1703     __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1704 
1705     // Load the oop from the handle
1706     __ movptr(obj_reg, Address(oop_handle_reg, 0));
1707 
1708     // Load immediate 1 into swap_reg %rax,
1709     __ movptr(swap_reg, 1);
1710 
1711     // Load (object->mark() | 1) into swap_reg %rax,
1712     __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1713 
1714     // Save (object->mark() | 1) into BasicLock's displaced header
1715     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1716 
1717     // src -> dest iff dest == rax, else rax, <- dest
1718     // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1719     __ lock();
1720     __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1721     __ jcc(Assembler::equal, lock_done);
1722 
1723     // Test if the oopMark is an obvious stack pointer, i.e.,
1724     //  1) (mark & 3) == 0, and
1725     //  2) rsp <= mark < mark + os::pagesize()
1726     // These 3 tests can be done by evaluating the following
1727     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1728     // assuming both stack pointer and pagesize have their
1729     // least significant 2 bits clear.
1730     // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1731 
1732     __ subptr(swap_reg, rsp);
1733     __ andptr(swap_reg, 3 - os::vm_page_size());
1734 
1735     // Save the test result, for recursive case, the result is zero
1736     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1737     __ jcc(Assembler::notEqual, slow_path_lock);
1738     // Slow path will re-enter here
1739     __ bind(lock_done);
1740   }
1741 
1742 
1743   // Finally just about ready to make the JNI call
1744 
1745   // get JNIEnv* which is first argument to native
1746   __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1747   __ movptr(Address(rsp, 0), rdx);
1748 
1749   // Now set thread in native
1750   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1751 
1752   __ call(RuntimeAddress(native_func));
1753 
1754   // Verify or restore cpu control state after JNI call
1755   __ restore_cpu_control_state_after_jni();
1756 
1757   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1758   // arguments off of the stack. We could just re-adjust the stack pointer here
1759   // and continue to do SP relative addressing but we instead switch to FP
1760   // relative addressing.
1761 
1762   // Unpack native results.
1763   switch (ret_type) {
1764   case T_BOOLEAN: __ c2bool(rax);            break;
1765   case T_CHAR   : __ andptr(rax, 0xFFFF);    break;
1766   case T_BYTE   : __ sign_extend_byte (rax); break;
1767   case T_SHORT  : __ sign_extend_short(rax); break;
1768   case T_INT    : /* nothing to do */        break;
1769   case T_DOUBLE :
1770   case T_FLOAT  :
1771     // Result is in st0 we'll save as needed
1772     break;
1773   case T_ARRAY:                 // Really a handle
1774   case T_OBJECT:                // Really a handle
1775       break; // can't de-handlize until after safepoint check
1776   case T_VOID: break;
1777   case T_LONG: break;
1778   default       : ShouldNotReachHere();
1779   }
1780 
1781   Label after_transition;
1782 
1783   // Switch thread to "native transition" state before reading the synchronization state.
1784   // This additional state is necessary because reading and testing the synchronization
1785   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1786   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1787   //     VM thread changes sync state to synchronizing and suspends threads for GC.
1788   //     Thread A is resumed to finish this native method, but doesn't block here since it
1789   //     didn't see any synchronization is progress, and escapes.
1790   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1791 
1792   // Force this write out before the read below
1793   __ membar(Assembler::Membar_mask_bits(
1794             Assembler::LoadLoad | Assembler::LoadStore |
1795             Assembler::StoreLoad | Assembler::StoreStore));
1796 
1797   if (AlwaysRestoreFPU) {
1798     // Make sure the control word is correct.
1799     __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1800   }
1801 
1802   // check for safepoint operation in progress and/or pending suspend requests
1803   { Label Continue, slow_path;
1804 
1805     __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1806 
1807     __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1808     __ jcc(Assembler::equal, Continue);
1809     __ bind(slow_path);
1810 
1811     // Don't use call_VM as it will see a possible pending exception and forward it
1812     // and never return here preventing us from clearing _last_native_pc down below.
1813     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1814     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1815     // by hand.
1816     //
1817     __ vzeroupper();
1818 
1819     save_native_result(masm, ret_type, stack_slots);
1820     __ push(thread);
1821     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1822                                               JavaThread::check_special_condition_for_native_trans)));
1823     __ increment(rsp, wordSize);
1824     // Restore any method result value
1825     restore_native_result(masm, ret_type, stack_slots);
1826     __ bind(Continue);
1827   }
1828 
1829   // change thread state
1830   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1831   __ bind(after_transition);
1832 
1833   Label reguard;
1834   Label reguard_done;
1835   __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1836   __ jcc(Assembler::equal, reguard);
1837 
1838   // slow path reguard  re-enters here
1839   __ bind(reguard_done);
1840 
1841   // Handle possible exception (will unlock if necessary)
1842 
1843   // native result if any is live
1844 
1845   // Unlock
1846   Label slow_path_unlock;
1847   Label unlock_done;
1848   if (method->is_synchronized()) {
1849 
1850     Label done;
1851 
1852     // Get locked oop from the handle we passed to jni
1853     __ movptr(obj_reg, Address(oop_handle_reg, 0));
1854 
1855     // Simple recursive lock?
1856 
1857     __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
1858     __ jcc(Assembler::equal, done);
1859 
1860     // Must save rax, if if it is live now because cmpxchg must use it
1861     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1862       save_native_result(masm, ret_type, stack_slots);
1863     }
1864 
1865     //  get old displaced header
1866     __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1867 
1868     // get address of the stack lock
1869     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1870 
1871     // Atomic swap old header if oop still contains the stack lock
1872     // src -> dest iff dest == rax, else rax, <- dest
1873     // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1874     __ lock();
1875     __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1876     __ jcc(Assembler::notEqual, slow_path_unlock);
1877 
1878     // slow path re-enters here
1879     __ bind(unlock_done);
1880     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1881       restore_native_result(masm, ret_type, stack_slots);
1882     }
1883 
1884     __ bind(done);
1885 
1886   }
1887 
1888   {
1889     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1890     // Tell dtrace about this method exit
1891     save_native_result(masm, ret_type, stack_slots);
1892     __ mov_metadata(rax, method());
1893     __ call_VM_leaf(
1894          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1895          thread, rax);
1896     restore_native_result(masm, ret_type, stack_slots);
1897   }
1898 
1899   // We can finally stop using that last_Java_frame we setup ages ago
1900 
1901   __ reset_last_Java_frame(thread, false);
1902 
1903   // Unbox oop result, e.g. JNIHandles::resolve value.
1904   if (is_reference_type(ret_type)) {
1905     __ resolve_jobject(rax /* value */,
1906                        thread /* thread */,
1907                        rcx /* tmp */);
1908   }
1909 
1910   if (CheckJNICalls) {
1911     // clear_pending_jni_exception_check
1912     __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
1913   }
1914 
1915   // reset handle block
1916   __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1917   __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
1918 
1919   // Any exception pending?
1920   __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1921   __ jcc(Assembler::notEqual, exception_pending);
1922 
1923   // no exception, we're almost done
1924 
1925   // check that only result value is on FPU stack
1926   __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1927 
1928   // Fixup floating pointer results so that result looks like a return from a compiled method
1929   if (ret_type == T_FLOAT) {
1930     if (UseSSE >= 1) {
1931       // Pop st0 and store as float and reload into xmm register
1932       __ fstp_s(Address(rbp, -4));
1933       __ movflt(xmm0, Address(rbp, -4));
1934     }
1935   } else if (ret_type == T_DOUBLE) {
1936     if (UseSSE >= 2) {
1937       // Pop st0 and store as double and reload into xmm register
1938       __ fstp_d(Address(rbp, -8));
1939       __ movdbl(xmm0, Address(rbp, -8));
1940     }
1941   }
1942 
1943   // Return
1944 
1945   __ leave();
1946   __ ret(0);
1947 
1948   // Unexpected paths are out of line and go here
1949 
1950   // Slow path locking & unlocking
1951   if (method->is_synchronized()) {
1952 
1953     // BEGIN Slow path lock
1954 
1955     __ bind(slow_path_lock);
1956 
1957     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1958     // args are (oop obj, BasicLock* lock, JavaThread* thread)
1959     __ push(thread);
1960     __ push(lock_reg);
1961     __ push(obj_reg);
1962     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1963     __ addptr(rsp, 3*wordSize);
1964 
1965 #ifdef ASSERT
1966     { Label L;
1967     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1968     __ jcc(Assembler::equal, L);
1969     __ stop("no pending exception allowed on exit from monitorenter");
1970     __ bind(L);
1971     }
1972 #endif
1973     __ jmp(lock_done);
1974 
1975     // END Slow path lock
1976 
1977     // BEGIN Slow path unlock
1978     __ bind(slow_path_unlock);
1979     __ vzeroupper();
1980     // Slow path unlock
1981 
1982     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1983       save_native_result(masm, ret_type, stack_slots);
1984     }
1985     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1986 
1987     __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1988     __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1989 
1990 
1991     // should be a peal
1992     // +wordSize because of the push above
1993     // args are (oop obj, BasicLock* lock, JavaThread* thread)
1994     __ push(thread);
1995     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1996     __ push(rax);
1997 
1998     __ push(obj_reg);
1999     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2000     __ addptr(rsp, 3*wordSize);
2001 #ifdef ASSERT
2002     {
2003       Label L;
2004       __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2005       __ jcc(Assembler::equal, L);
2006       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2007       __ bind(L);
2008     }
2009 #endif /* ASSERT */
2010 
2011     __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2012 
2013     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2014       restore_native_result(masm, ret_type, stack_slots);
2015     }
2016     __ jmp(unlock_done);
2017     // END Slow path unlock
2018 
2019   }
2020 
2021   // SLOW PATH Reguard the stack if needed
2022 
2023   __ bind(reguard);
2024   __ vzeroupper();
2025   save_native_result(masm, ret_type, stack_slots);
2026   {
2027     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2028   }
2029   restore_native_result(masm, ret_type, stack_slots);
2030   __ jmp(reguard_done);
2031 
2032 
2033   // BEGIN EXCEPTION PROCESSING
2034 
2035   // Forward  the exception
2036   __ bind(exception_pending);
2037 
2038   // remove possible return value from FPU register stack
2039   __ empty_FPU_stack();
2040 
2041   // pop our frame
2042   __ leave();
2043   // and forward the exception
2044   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2045 
2046   __ flush();
2047 
2048   nmethod *nm = nmethod::new_native_nmethod(method,
2049                                             compile_id,
2050                                             masm->code(),
2051                                             vep_offset,
2052                                             frame_complete,
2053                                             stack_slots / VMRegImpl::slots_per_word,
2054                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2055                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2056                                             oop_maps);
2057 
2058   return nm;
2059 
2060 }
2061 
2062 // this function returns the adjust size (in number of words) to a c2i adapter
2063 // activation for use during deoptimization
2064 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2065   return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2066 }
2067 
2068 
2069 // Number of stack slots between incoming argument block and the start of
2070 // a new frame.  The PROLOG must add this many slots to the stack.  The
2071 // EPILOG must remove this many slots.  Intel needs one slot for
2072 // return address and one for rbp, (must save rbp)
2073 uint SharedRuntime::in_preserve_stack_slots() {
2074   return 2+VerifyStackAtCalls;
2075 }
2076 
2077 uint SharedRuntime::out_preserve_stack_slots() {
2078   return 0;
2079 }
2080 
2081 //------------------------------generate_deopt_blob----------------------------
2082 void SharedRuntime::generate_deopt_blob() {
2083   // allocate space for the code
2084   ResourceMark rm;
2085   // setup code generation tools
2086   // note: the buffer code size must account for StackShadowPages=50
2087   CodeBuffer   buffer("deopt_blob", 1536, 1024);
2088   MacroAssembler* masm = new MacroAssembler(&buffer);
2089   int frame_size_in_words;
2090   OopMap* map = NULL;
2091   // Account for the extra args we place on the stack
2092   // by the time we call fetch_unroll_info
2093   const int additional_words = 2; // deopt kind, thread
2094 
2095   OopMapSet *oop_maps = new OopMapSet();
2096 
2097   // -------------
2098   // This code enters when returning to a de-optimized nmethod.  A return
2099   // address has been pushed on the the stack, and return values are in
2100   // registers.
2101   // If we are doing a normal deopt then we were called from the patched
2102   // nmethod from the point we returned to the nmethod. So the return
2103   // address on the stack is wrong by NativeCall::instruction_size
2104   // We will adjust the value to it looks like we have the original return
2105   // address on the stack (like when we eagerly deoptimized).
2106   // In the case of an exception pending with deoptimized then we enter
2107   // with a return address on the stack that points after the call we patched
2108   // into the exception handler. We have the following register state:
2109   //    rax,: exception
2110   //    rbx,: exception handler
2111   //    rdx: throwing pc
2112   // So in this case we simply jam rdx into the useless return address and
2113   // the stack looks just like we want.
2114   //
2115   // At this point we need to de-opt.  We save the argument return
2116   // registers.  We call the first C routine, fetch_unroll_info().  This
2117   // routine captures the return values and returns a structure which
2118   // describes the current frame size and the sizes of all replacement frames.
2119   // The current frame is compiled code and may contain many inlined
2120   // functions, each with their own JVM state.  We pop the current frame, then
2121   // push all the new frames.  Then we call the C routine unpack_frames() to
2122   // populate these frames.  Finally unpack_frames() returns us the new target
2123   // address.  Notice that callee-save registers are BLOWN here; they have
2124   // already been captured in the vframeArray at the time the return PC was
2125   // patched.
2126   address start = __ pc();
2127   Label cont;
2128 
2129   // Prolog for non exception case!
2130 
2131   // Save everything in sight.
2132 
2133   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2134   // Normal deoptimization
2135   __ push(Deoptimization::Unpack_deopt);
2136   __ jmp(cont);
2137 
2138   int reexecute_offset = __ pc() - start;
2139 
2140   // Reexecute case
2141   // return address is the pc describes what bci to do re-execute at
2142 
2143   // No need to update map as each call to save_live_registers will produce identical oopmap
2144   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2145 
2146   __ push(Deoptimization::Unpack_reexecute);
2147   __ jmp(cont);
2148 
2149   int exception_offset = __ pc() - start;
2150 
2151   // Prolog for exception case
2152 
2153   // all registers are dead at this entry point, except for rax, and
2154   // rdx which contain the exception oop and exception pc
2155   // respectively.  Set them in TLS and fall thru to the
2156   // unpack_with_exception_in_tls entry point.
2157 
2158   __ get_thread(rdi);
2159   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2160   __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2161 
2162   int exception_in_tls_offset = __ pc() - start;
2163 
2164   // new implementation because exception oop is now passed in JavaThread
2165 
2166   // Prolog for exception case
2167   // All registers must be preserved because they might be used by LinearScan
2168   // Exceptiop oop and throwing PC are passed in JavaThread
2169   // tos: stack at point of call to method that threw the exception (i.e. only
2170   // args are on the stack, no return address)
2171 
2172   // make room on stack for the return address
2173   // It will be patched later with the throwing pc. The correct value is not
2174   // available now because loading it from memory would destroy registers.
2175   __ push(0);
2176 
2177   // Save everything in sight.
2178 
2179   // No need to update map as each call to save_live_registers will produce identical oopmap
2180   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2181 
2182   // Now it is safe to overwrite any register
2183 
2184   // store the correct deoptimization type
2185   __ push(Deoptimization::Unpack_exception);
2186 
2187   // load throwing pc from JavaThread and patch it as the return address
2188   // of the current frame. Then clear the field in JavaThread
2189   __ get_thread(rdi);
2190   __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2191   __ movptr(Address(rbp, wordSize), rdx);
2192   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2193 
2194 #ifdef ASSERT
2195   // verify that there is really an exception oop in JavaThread
2196   __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2197   __ verify_oop(rax);
2198 
2199   // verify that there is no pending exception
2200   Label no_pending_exception;
2201   __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2202   __ testptr(rax, rax);
2203   __ jcc(Assembler::zero, no_pending_exception);
2204   __ stop("must not have pending exception here");
2205   __ bind(no_pending_exception);
2206 #endif
2207 
2208   __ bind(cont);
2209 
2210   // Compiled code leaves the floating point stack dirty, empty it.
2211   __ empty_FPU_stack();
2212 
2213 
2214   // Call C code.  Need thread and this frame, but NOT official VM entry
2215   // crud.  We cannot block on this call, no GC can happen.
2216   __ get_thread(rcx);
2217   __ push(rcx);
2218   // fetch_unroll_info needs to call last_java_frame()
2219   __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2220 
2221   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2222 
2223   // Need to have an oopmap that tells fetch_unroll_info where to
2224   // find any register it might need.
2225 
2226   oop_maps->add_gc_map( __ pc()-start, map);
2227 
2228   // Discard args to fetch_unroll_info
2229   __ pop(rcx);
2230   __ pop(rcx);
2231 
2232   __ get_thread(rcx);
2233   __ reset_last_Java_frame(rcx, false);
2234 
2235   // Load UnrollBlock into EDI
2236   __ mov(rdi, rax);
2237 
2238   // Move the unpack kind to a safe place in the UnrollBlock because
2239   // we are very short of registers
2240 
2241   Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2242   // retrieve the deopt kind from the UnrollBlock.
2243   __ movl(rax, unpack_kind);
2244 
2245    Label noException;
2246   __ cmpl(rax, Deoptimization::Unpack_exception);   // Was exception pending?
2247   __ jcc(Assembler::notEqual, noException);
2248   __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2249   __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2250   __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2251   __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2252 
2253   __ verify_oop(rax);
2254 
2255   // Overwrite the result registers with the exception results.
2256   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2257   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2258 
2259   __ bind(noException);
2260 
2261   // Stack is back to only having register save data on the stack.
2262   // Now restore the result registers. Everything else is either dead or captured
2263   // in the vframeArray.
2264 
2265   RegisterSaver::restore_result_registers(masm);
2266 
2267   // Non standard control word may be leaked out through a safepoint blob, and we can
2268   // deopt at a poll point with the non standard control word. However, we should make
2269   // sure the control word is correct after restore_result_registers.
2270   __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2271 
2272   // All of the register save area has been popped of the stack. Only the
2273   // return address remains.
2274 
2275   // Pop all the frames we must move/replace.
2276   //
2277   // Frame picture (youngest to oldest)
2278   // 1: self-frame (no frame link)
2279   // 2: deopting frame  (no frame link)
2280   // 3: caller of deopting frame (could be compiled/interpreted).
2281   //
2282   // Note: by leaving the return address of self-frame on the stack
2283   // and using the size of frame 2 to adjust the stack
2284   // when we are done the return to frame 3 will still be on the stack.
2285 
2286   // Pop deoptimized frame
2287   __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2288 
2289   // sp should be pointing at the return address to the caller (3)
2290 
2291   // Pick up the initial fp we should save
2292   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2293   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2294 
2295 #ifdef ASSERT
2296   // Compilers generate code that bang the stack by as much as the
2297   // interpreter would need. So this stack banging should never
2298   // trigger a fault. Verify that it does not on non product builds.
2299   __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2300   __ bang_stack_size(rbx, rcx);
2301 #endif
2302 
2303   // Load array of frame pcs into ECX
2304   __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2305 
2306   __ pop(rsi); // trash the old pc
2307 
2308   // Load array of frame sizes into ESI
2309   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2310 
2311   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2312 
2313   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2314   __ movl(counter, rbx);
2315 
2316   // Now adjust the caller's stack to make up for the extra locals
2317   // but record the original sp so that we can save it in the skeletal interpreter
2318   // frame and the stack walking of interpreter_sender will get the unextended sp
2319   // value and not the "real" sp value.
2320 
2321   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2322   __ movptr(sp_temp, rsp);
2323   __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2324   __ subptr(rsp, rbx);
2325 
2326   // Push interpreter frames in a loop
2327   Label loop;
2328   __ bind(loop);
2329   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2330   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2331   __ pushptr(Address(rcx, 0));          // save return address
2332   __ enter();                           // save old & set new rbp,
2333   __ subptr(rsp, rbx);                  // Prolog!
2334   __ movptr(rbx, sp_temp);              // sender's sp
2335   // This value is corrected by layout_activation_impl
2336   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2337   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2338   __ movptr(sp_temp, rsp);              // pass to next frame
2339   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2340   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2341   __ decrementl(counter);             // decrement counter
2342   __ jcc(Assembler::notZero, loop);
2343   __ pushptr(Address(rcx, 0));          // save final return address
2344 
2345   // Re-push self-frame
2346   __ enter();                           // save old & set new rbp,
2347 
2348   //  Return address and rbp, are in place
2349   // We'll push additional args later. Just allocate a full sized
2350   // register save area
2351   __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2352 
2353   // Restore frame locals after moving the frame
2354   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2355   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2356   __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize));   // Pop float stack and store in local
2357   if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2358   if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2359 
2360   // Set up the args to unpack_frame
2361 
2362   __ pushl(unpack_kind);                     // get the unpack_kind value
2363   __ get_thread(rcx);
2364   __ push(rcx);
2365 
2366   // set last_Java_sp, last_Java_fp
2367   __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2368 
2369   // Call C code.  Need thread but NOT official VM entry
2370   // crud.  We cannot block on this call, no GC can happen.  Call should
2371   // restore return values to their stack-slots with the new SP.
2372   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2373   // Set an oopmap for the call site
2374   oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2375 
2376   // rax, contains the return result type
2377   __ push(rax);
2378 
2379   __ get_thread(rcx);
2380   __ reset_last_Java_frame(rcx, false);
2381 
2382   // Collect return values
2383   __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2384   __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2385 
2386   // Clear floating point stack before returning to interpreter
2387   __ empty_FPU_stack();
2388 
2389   // Check if we should push the float or double return value.
2390   Label results_done, yes_double_value;
2391   __ cmpl(Address(rsp, 0), T_DOUBLE);
2392   __ jcc (Assembler::zero, yes_double_value);
2393   __ cmpl(Address(rsp, 0), T_FLOAT);
2394   __ jcc (Assembler::notZero, results_done);
2395 
2396   // return float value as expected by interpreter
2397   if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2398   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2399   __ jmp(results_done);
2400 
2401   // return double value as expected by interpreter
2402   __ bind(yes_double_value);
2403   if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2404   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2405 
2406   __ bind(results_done);
2407 
2408   // Pop self-frame.
2409   __ leave();                              // Epilog!
2410 
2411   // Jump to interpreter
2412   __ ret(0);
2413 
2414   // -------------
2415   // make sure all code is generated
2416   masm->flush();
2417 
2418   _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2419   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2420 }
2421 
2422 
2423 #ifdef COMPILER2
2424 //------------------------------generate_uncommon_trap_blob--------------------
2425 void SharedRuntime::generate_uncommon_trap_blob() {
2426   // allocate space for the code
2427   ResourceMark rm;
2428   // setup code generation tools
2429   CodeBuffer   buffer("uncommon_trap_blob", 512, 512);
2430   MacroAssembler* masm = new MacroAssembler(&buffer);
2431 
2432   enum frame_layout {
2433     arg0_off,      // thread                     sp + 0 // Arg location for
2434     arg1_off,      // unloaded_class_index       sp + 1 // calling C
2435     arg2_off,      // exec_mode                  sp + 2
2436     // The frame sender code expects that rbp will be in the "natural" place and
2437     // will override any oopMap setting for it. We must therefore force the layout
2438     // so that it agrees with the frame sender code.
2439     rbp_off,       // callee saved register      sp + 3
2440     return_off,    // slot for return address    sp + 4
2441     framesize
2442   };
2443 
2444   address start = __ pc();
2445 
2446   if (UseRTMLocking) {
2447     // Abort RTM transaction before possible nmethod deoptimization.
2448     __ xabort(0);
2449   }
2450 
2451   // Push self-frame.
2452   __ subptr(rsp, return_off*wordSize);     // Epilog!
2453 
2454   // rbp, is an implicitly saved callee saved register (i.e. the calling
2455   // convention will save restore it in prolog/epilog) Other than that
2456   // there are no callee save registers no that adapter frames are gone.
2457   __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2458 
2459   // Clear the floating point exception stack
2460   __ empty_FPU_stack();
2461 
2462   // set last_Java_sp
2463   __ get_thread(rdx);
2464   __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2465 
2466   // Call C code.  Need thread but NOT official VM entry
2467   // crud.  We cannot block on this call, no GC can happen.  Call should
2468   // capture callee-saved registers as well as return values.
2469   __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2470   // argument already in ECX
2471   __ movl(Address(rsp, arg1_off*wordSize),rcx);
2472   __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2473   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2474 
2475   // Set an oopmap for the call site
2476   OopMapSet *oop_maps = new OopMapSet();
2477   OopMap* map =  new OopMap( framesize, 0 );
2478   // No oopMap for rbp, it is known implicitly
2479 
2480   oop_maps->add_gc_map( __ pc()-start, map);
2481 
2482   __ get_thread(rcx);
2483 
2484   __ reset_last_Java_frame(rcx, false);
2485 
2486   // Load UnrollBlock into EDI
2487   __ movptr(rdi, rax);
2488 
2489 #ifdef ASSERT
2490   { Label L;
2491     __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2492             (int32_t)Deoptimization::Unpack_uncommon_trap);
2493     __ jcc(Assembler::equal, L);
2494     __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2495     __ bind(L);
2496   }
2497 #endif
2498 
2499   // Pop all the frames we must move/replace.
2500   //
2501   // Frame picture (youngest to oldest)
2502   // 1: self-frame (no frame link)
2503   // 2: deopting frame  (no frame link)
2504   // 3: caller of deopting frame (could be compiled/interpreted).
2505 
2506   // Pop self-frame.  We have no frame, and must rely only on EAX and ESP.
2507   __ addptr(rsp,(framesize-1)*wordSize);     // Epilog!
2508 
2509   // Pop deoptimized frame
2510   __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2511   __ addptr(rsp, rcx);
2512 
2513   // sp should be pointing at the return address to the caller (3)
2514 
2515   // Pick up the initial fp we should save
2516   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2517   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2518 
2519 #ifdef ASSERT
2520   // Compilers generate code that bang the stack by as much as the
2521   // interpreter would need. So this stack banging should never
2522   // trigger a fault. Verify that it does not on non product builds.
2523   __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2524   __ bang_stack_size(rbx, rcx);
2525 #endif
2526 
2527   // Load array of frame pcs into ECX
2528   __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2529 
2530   __ pop(rsi); // trash the pc
2531 
2532   // Load array of frame sizes into ESI
2533   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2534 
2535   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2536 
2537   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2538   __ movl(counter, rbx);
2539 
2540   // Now adjust the caller's stack to make up for the extra locals
2541   // but record the original sp so that we can save it in the skeletal interpreter
2542   // frame and the stack walking of interpreter_sender will get the unextended sp
2543   // value and not the "real" sp value.
2544 
2545   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2546   __ movptr(sp_temp, rsp);
2547   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2548   __ subptr(rsp, rbx);
2549 
2550   // Push interpreter frames in a loop
2551   Label loop;
2552   __ bind(loop);
2553   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2554   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2555   __ pushptr(Address(rcx, 0));          // save return address
2556   __ enter();                           // save old & set new rbp,
2557   __ subptr(rsp, rbx);                  // Prolog!
2558   __ movptr(rbx, sp_temp);              // sender's sp
2559   // This value is corrected by layout_activation_impl
2560   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2561   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2562   __ movptr(sp_temp, rsp);              // pass to next frame
2563   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2564   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2565   __ decrementl(counter);             // decrement counter
2566   __ jcc(Assembler::notZero, loop);
2567   __ pushptr(Address(rcx, 0));            // save final return address
2568 
2569   // Re-push self-frame
2570   __ enter();                           // save old & set new rbp,
2571   __ subptr(rsp, (framesize-2) * wordSize);   // Prolog!
2572 
2573 
2574   // set last_Java_sp, last_Java_fp
2575   __ get_thread(rdi);
2576   __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2577 
2578   // Call C code.  Need thread but NOT official VM entry
2579   // crud.  We cannot block on this call, no GC can happen.  Call should
2580   // restore return values to their stack-slots with the new SP.
2581   __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2582   __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2583   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2584   // Set an oopmap for the call site
2585   oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2586 
2587   __ get_thread(rdi);
2588   __ reset_last_Java_frame(rdi, true);
2589 
2590   // Pop self-frame.
2591   __ leave();     // Epilog!
2592 
2593   // Jump to interpreter
2594   __ ret(0);
2595 
2596   // -------------
2597   // make sure all code is generated
2598   masm->flush();
2599 
2600    _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2601 }
2602 #endif // COMPILER2
2603 
2604 //------------------------------generate_handler_blob------
2605 //
2606 // Generate a special Compile2Runtime blob that saves all registers,
2607 // setup oopmap, and calls safepoint code to stop the compiled code for
2608 // a safepoint.
2609 //
2610 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2611 
2612   // Account for thread arg in our frame
2613   const int additional_words = 1;
2614   int frame_size_in_words;
2615 
2616   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2617 
2618   ResourceMark rm;
2619   OopMapSet *oop_maps = new OopMapSet();
2620   OopMap* map;
2621 
2622   // allocate space for the code
2623   // setup code generation tools
2624   CodeBuffer   buffer("handler_blob", 1024, 512);
2625   MacroAssembler* masm = new MacroAssembler(&buffer);
2626 
2627   const Register java_thread = rdi; // callee-saved for VC++
2628   address start   = __ pc();
2629   address call_pc = NULL;
2630   bool cause_return = (poll_type == POLL_AT_RETURN);
2631   bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2632 
2633   if (UseRTMLocking) {
2634     // Abort RTM transaction before calling runtime
2635     // because critical section will be large and will be
2636     // aborted anyway. Also nmethod could be deoptimized.
2637     __ xabort(0);
2638   }
2639 
2640   // If cause_return is true we are at a poll_return and there is
2641   // the return address on the stack to the caller on the nmethod
2642   // that is safepoint. We can leave this return on the stack and
2643   // effectively complete the return and safepoint in the caller.
2644   // Otherwise we push space for a return address that the safepoint
2645   // handler will install later to make the stack walking sensible.
2646   if (!cause_return)
2647     __ push(rbx);  // Make room for return address (or push it again)
2648 
2649   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2650 
2651   // The following is basically a call_VM. However, we need the precise
2652   // address of the call in order to generate an oopmap. Hence, we do all the
2653   // work ourselves.
2654 
2655   // Push thread argument and setup last_Java_sp
2656   __ get_thread(java_thread);
2657   __ push(java_thread);
2658   __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2659 
2660   // if this was not a poll_return then we need to correct the return address now.
2661   if (!cause_return) {
2662     // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2663     // Additionally, rbx is a callee saved register and we can look at it later to determine
2664     // if someone changed the return address for us!
2665     __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2666     __ movptr(Address(rbp, wordSize), rbx);
2667   }
2668 
2669   // do the call
2670   __ call(RuntimeAddress(call_ptr));
2671 
2672   // Set an oopmap for the call site.  This oopmap will map all
2673   // oop-registers and debug-info registers as callee-saved.  This
2674   // will allow deoptimization at this safepoint to find all possible
2675   // debug-info recordings, as well as let GC find all oops.
2676 
2677   oop_maps->add_gc_map( __ pc() - start, map);
2678 
2679   // Discard arg
2680   __ pop(rcx);
2681 
2682   Label noException;
2683 
2684   // Clear last_Java_sp again
2685   __ get_thread(java_thread);
2686   __ reset_last_Java_frame(java_thread, false);
2687 
2688   __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2689   __ jcc(Assembler::equal, noException);
2690 
2691   // Exception pending
2692   RegisterSaver::restore_live_registers(masm, save_vectors);
2693 
2694   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2695 
2696   __ bind(noException);
2697 
2698   Label no_adjust, bail, not_special;
2699   if (!cause_return) {
2700     // If our stashed return pc was modified by the runtime we avoid touching it
2701     __ cmpptr(rbx, Address(rbp, wordSize));
2702     __ jccb(Assembler::notEqual, no_adjust);
2703 
2704     // Skip over the poll instruction.
2705     // See NativeInstruction::is_safepoint_poll()
2706     // Possible encodings:
2707     //      85 00       test   %eax,(%rax)
2708     //      85 01       test   %eax,(%rcx)
2709     //      85 02       test   %eax,(%rdx)
2710     //      85 03       test   %eax,(%rbx)
2711     //      85 06       test   %eax,(%rsi)
2712     //      85 07       test   %eax,(%rdi)
2713     //
2714     //      85 04 24    test   %eax,(%rsp)
2715     //      85 45 00    test   %eax,0x0(%rbp)
2716 
2717 #ifdef ASSERT
2718     __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2719 #endif
2720     // rsp/rbp base encoding takes 3 bytes with the following register values:
2721     // rsp 0x04
2722     // rbp 0x05
2723     __ movzbl(rcx, Address(rbx, 1));
2724     __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2725     __ subptr(rcx, 4);    // looking for 0x00 .. 0x01
2726     __ cmpptr(rcx, 1);
2727     __ jcc(Assembler::above, not_special);
2728     __ addptr(rbx, 1);
2729     __ bind(not_special);
2730 #ifdef ASSERT
2731     // Verify the correct encoding of the poll we're about to skip.
2732     __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2733     __ jcc(Assembler::notEqual, bail);
2734     // Mask out the modrm bits
2735     __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2736     // rax encodes to 0, so if the bits are nonzero it's incorrect
2737     __ jcc(Assembler::notZero, bail);
2738 #endif
2739     // Adjust return pc forward to step over the safepoint poll instruction
2740     __ addptr(rbx, 2);
2741     __ movptr(Address(rbp, wordSize), rbx);
2742   }
2743 
2744   __ bind(no_adjust);
2745   // Normal exit, register restoring and exit
2746   RegisterSaver::restore_live_registers(masm, save_vectors);
2747 
2748   __ ret(0);
2749 
2750 #ifdef ASSERT
2751   __ bind(bail);
2752   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2753 #endif
2754 
2755   // make sure all code is generated
2756   masm->flush();
2757 
2758   // Fill-out other meta info
2759   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2760 }
2761 
2762 //
2763 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2764 //
2765 // Generate a stub that calls into vm to find out the proper destination
2766 // of a java call. All the argument registers are live at this point
2767 // but since this is generic code we don't know what they are and the caller
2768 // must do any gc of the args.
2769 //
2770 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2771   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2772 
2773   // allocate space for the code
2774   ResourceMark rm;
2775 
2776   CodeBuffer buffer(name, 1000, 512);
2777   MacroAssembler* masm                = new MacroAssembler(&buffer);
2778 
2779   int frame_size_words;
2780   enum frame_layout {
2781                 thread_off,
2782                 extra_words };
2783 
2784   OopMapSet *oop_maps = new OopMapSet();
2785   OopMap* map = NULL;
2786 
2787   int start = __ offset();
2788 
2789   map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2790 
2791   int frame_complete = __ offset();
2792 
2793   const Register thread = rdi;
2794   __ get_thread(rdi);
2795 
2796   __ push(thread);
2797   __ set_last_Java_frame(thread, noreg, rbp, NULL);
2798 
2799   __ call(RuntimeAddress(destination));
2800 
2801 
2802   // Set an oopmap for the call site.
2803   // We need this not only for callee-saved registers, but also for volatile
2804   // registers that the compiler might be keeping live across a safepoint.
2805 
2806   oop_maps->add_gc_map( __ offset() - start, map);
2807 
2808   // rax, contains the address we are going to jump to assuming no exception got installed
2809 
2810   __ addptr(rsp, wordSize);
2811 
2812   // clear last_Java_sp
2813   __ reset_last_Java_frame(thread, true);
2814   // check for pending exceptions
2815   Label pending;
2816   __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2817   __ jcc(Assembler::notEqual, pending);
2818 
2819   // get the returned Method*
2820   __ get_vm_result_2(rbx, thread);
2821   __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2822 
2823   __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2824 
2825   RegisterSaver::restore_live_registers(masm);
2826 
2827   // We are back the the original state on entry and ready to go.
2828 
2829   __ jmp(rax);
2830 
2831   // Pending exception after the safepoint
2832 
2833   __ bind(pending);
2834 
2835   RegisterSaver::restore_live_registers(masm);
2836 
2837   // exception pending => remove activation and forward to exception handler
2838 
2839   __ get_thread(thread);
2840   __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2841   __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2842   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2843 
2844   // -------------
2845   // make sure all code is generated
2846   masm->flush();
2847 
2848   // return the  blob
2849   // frame_size_words or bytes??
2850   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2851 }