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src/hotspot/cpu/aarch64/aarch64.ad

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*** 2432,10 ***
--- 2432,18 ---
      case Op_XorVMask:
        if (UseSVE == 0) {
          ret_value = false;
        }
        break;
+     case Op_PopCountI:
+     case Op_PopCountL:
+     case Op_PopCountVI:
+     case Op_PopCountVL:
+       if (!UsePopCountInstruction) {
+         ret_value = false;
+       }
+       break;
    }
  
    return ret_value; // Per default match rules are supported.
  }
  

*** 2472,10 ***
--- 2480,13 ---
          return false;
        }
        break;
      case Op_LoadVectorGather:
      case Op_StoreVectorScatter:
+     case Op_CompressV:
+     case Op_CompressM:
+     case Op_ExpandV:
        return false;
      default:
        break;
      }
    }

*** 8639,21 ***
  
  //---------- Population Count Instructions -------------------------------------
  //
  
  instruct popCountI(iRegINoSp dst, iRegIorL2I src, vRegF tmp) %{
-   predicate(UsePopCountInstruction);
    match(Set dst (PopCountI src));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "movw   $src, $src\n\t"
              "mov    $tmp, $src\t# vector (1D)\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
      __ movw($src$$Register, $src$$Register); // ensure top 32 bits 0
      __ mov($tmp$$FloatRegister, __ D, 0, $src$$Register);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ mov($dst$$Register, $tmp$$FloatRegister, __ D, 0);
--- 8650,21 ---
  
  //---------- Population Count Instructions -------------------------------------
  //
  
  instruct popCountI(iRegINoSp dst, iRegIorL2I src, vRegF tmp) %{
    match(Set dst (PopCountI src));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "movw   $src, $src\n\t"
              "mov    $tmp, $src\t# vector (1D)\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
+     assert(UsePopCountInstruction, "unsupported");
      __ movw($src$$Register, $src$$Register); // ensure top 32 bits 0
      __ mov($tmp$$FloatRegister, __ D, 0, $src$$Register);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ mov($dst$$Register, $tmp$$FloatRegister, __ D, 0);

*** 8661,20 ***
  
    ins_pipe(pipe_class_default);
  %}
  
  instruct popCountI_mem(iRegINoSp dst, memory4 mem, vRegF tmp) %{
-   predicate(UsePopCountInstruction);
    match(Set dst (PopCountI (LoadI mem)));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "ldrs   $tmp, $mem\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
      FloatRegister tmp_reg = as_FloatRegister($tmp$$reg);
      loadStore(C2_MacroAssembler(&cbuf), &MacroAssembler::ldrs, tmp_reg, $mem->opcode(),
                as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 4);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
--- 8672,20 ---
  
    ins_pipe(pipe_class_default);
  %}
  
  instruct popCountI_mem(iRegINoSp dst, memory4 mem, vRegF tmp) %{
    match(Set dst (PopCountI (LoadI mem)));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "ldrs   $tmp, $mem\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
+     assert(UsePopCountInstruction, "unsupported");
      FloatRegister tmp_reg = as_FloatRegister($tmp$$reg);
      loadStore(C2_MacroAssembler(&cbuf), &MacroAssembler::ldrs, tmp_reg, $mem->opcode(),
                as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 4);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);

*** 8684,40 ***
    ins_pipe(pipe_class_default);
  %}
  
  // Note: Long.bitCount(long) returns an int.
  instruct popCountL(iRegINoSp dst, iRegL src, vRegD tmp) %{
-   predicate(UsePopCountInstruction);
    match(Set dst (PopCountL src));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "mov    $tmp, $src\t# vector (1D)\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
      __ mov($tmp$$FloatRegister, __ D, 0, $src$$Register);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ mov($dst$$Register, $tmp$$FloatRegister, __ D, 0);
    %}
  
    ins_pipe(pipe_class_default);
  %}
  
  instruct popCountL_mem(iRegINoSp dst, memory8 mem, vRegD tmp) %{
-   predicate(UsePopCountInstruction);
    match(Set dst (PopCountL (LoadL mem)));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "ldrd   $tmp, $mem\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
      FloatRegister tmp_reg = as_FloatRegister($tmp$$reg);
      loadStore(C2_MacroAssembler(&cbuf), &MacroAssembler::ldrd, tmp_reg, $mem->opcode(),
                as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 8);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
--- 8695,40 ---
    ins_pipe(pipe_class_default);
  %}
  
  // Note: Long.bitCount(long) returns an int.
  instruct popCountL(iRegINoSp dst, iRegL src, vRegD tmp) %{
    match(Set dst (PopCountL src));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "mov    $tmp, $src\t# vector (1D)\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
+     assert(UsePopCountInstruction, "unsupported");
      __ mov($tmp$$FloatRegister, __ D, 0, $src$$Register);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ mov($dst$$Register, $tmp$$FloatRegister, __ D, 0);
    %}
  
    ins_pipe(pipe_class_default);
  %}
  
  instruct popCountL_mem(iRegINoSp dst, memory8 mem, vRegD tmp) %{
    match(Set dst (PopCountL (LoadL mem)));
    effect(TEMP tmp);
    ins_cost(INSN_COST * 13);
  
    format %{ "ldrd   $tmp, $mem\n\t"
              "cnt    $tmp, $tmp\t# vector (8B)\n\t"
              "addv   $tmp, $tmp\t# vector (8B)\n\t"
              "mov    $dst, $tmp\t# vector (1D)" %}
    ins_encode %{
+     assert(UsePopCountInstruction, "unsupported");
      FloatRegister tmp_reg = as_FloatRegister($tmp$$reg);
      loadStore(C2_MacroAssembler(&cbuf), &MacroAssembler::ldrd, tmp_reg, $mem->opcode(),
                as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp, 8);
      __ cnt($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
      __ addv($tmp$$FloatRegister, __ T8B, $tmp$$FloatRegister);
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