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 25 
 26 #ifndef CPU_AARCH64_REGISTER_AARCH64_HPP
 27 #define CPU_AARCH64_REGISTER_AARCH64_HPP
 28 
 29 #include "asm/register.hpp"
 30 #include "utilities/powerOfTwo.hpp"
 31 
 32 class VMRegImpl;
 33 typedef VMRegImpl* VMReg;
 34 
 35 // Use Register as shortcut
 36 class RegisterImpl;
 37 typedef RegisterImpl* Register;
 38 
 39 inline const Register as_Register(int encoding) {
 40   return (Register)(intptr_t) encoding;
 41 }
 42 
 43 class RegisterImpl: public AbstractRegisterImpl {
 44  public:
 45   enum {
 46     number_of_registers         =   32,
 47     number_of_byte_registers      = 32,
 48     number_of_registers_for_jvmci = 34,  // Including SP and ZR.
 49     max_slots_per_register = 2
 50   };
 51 
 52   // derived registers, offsets, and addresses
 53   Register successor() const                          { return as_Register(encoding() + 1); }
 54 
 55   // construction
 56   inline friend const Register as_Register(int encoding);
 57 
 58   VMReg as_VMReg();
 59 
 60   // accessors
 61   int   encoding() const                         { assert(is_valid(), "invalid register"); return (intptr_t)this; }
 62   bool  is_valid() const                         { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
 63   bool  has_byte_register() const                { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; }
 64   const char* name() const;
 65   int   encoding_nocheck() const                 { return (intptr_t)this; }
 66 };
 67 
 68 // The integer registers of the aarch64 architecture
 69 
 70 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1));
 71 
 72 
 73 CONSTANT_REGISTER_DECLARATION(Register, r0,    (0));
 74 CONSTANT_REGISTER_DECLARATION(Register, r1,    (1));
 75 CONSTANT_REGISTER_DECLARATION(Register, r2,    (2));
 76 CONSTANT_REGISTER_DECLARATION(Register, r3,    (3));
 77 CONSTANT_REGISTER_DECLARATION(Register, r4,    (4));
 78 CONSTANT_REGISTER_DECLARATION(Register, r5,    (5));
 79 CONSTANT_REGISTER_DECLARATION(Register, r6,    (6));
 80 CONSTANT_REGISTER_DECLARATION(Register, r7,    (7));
 81 CONSTANT_REGISTER_DECLARATION(Register, r8,    (8));
 82 CONSTANT_REGISTER_DECLARATION(Register, r9,    (9));
 83 CONSTANT_REGISTER_DECLARATION(Register, r10,  (10));
 84 CONSTANT_REGISTER_DECLARATION(Register, r11,  (11));
 85 CONSTANT_REGISTER_DECLARATION(Register, r12,  (12));
 86 CONSTANT_REGISTER_DECLARATION(Register, r13,  (13));
 87 CONSTANT_REGISTER_DECLARATION(Register, r14,  (14));
 88 CONSTANT_REGISTER_DECLARATION(Register, r15,  (15));
 89 CONSTANT_REGISTER_DECLARATION(Register, r16,  (16));
 90 CONSTANT_REGISTER_DECLARATION(Register, r17,  (17));
 91 
 92 // In the ABI for Windows+AArch64 the register r18 is used to store the pointer
 93 // to the current thread's TEB (where TLS variables are stored). We could
 94 // carefully save and restore r18 at key places, however Win32 Structured
 95 // Exception Handling (SEH) is using TLS to unwind the stack. If r18 is used
 96 // for any other purpose at the time of an exception happening, SEH would not
 97 // be able to unwind the stack properly and most likely crash.
 98 //
 99 // It's easier to avoid allocating r18 altogether.
100 //
101 // See https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019#integer-registers
102 CONSTANT_REGISTER_DECLARATION(Register, r18_tls,  (18));
103 CONSTANT_REGISTER_DECLARATION(Register, r19,  (19));
104 CONSTANT_REGISTER_DECLARATION(Register, r20,  (20));
105 CONSTANT_REGISTER_DECLARATION(Register, r21,  (21));
106 CONSTANT_REGISTER_DECLARATION(Register, r22,  (22));
107 CONSTANT_REGISTER_DECLARATION(Register, r23,  (23));
108 CONSTANT_REGISTER_DECLARATION(Register, r24,  (24));
109 CONSTANT_REGISTER_DECLARATION(Register, r25,  (25));
110 CONSTANT_REGISTER_DECLARATION(Register, r26,  (26));
111 CONSTANT_REGISTER_DECLARATION(Register, r27,  (27));
112 CONSTANT_REGISTER_DECLARATION(Register, r28,  (28));
113 CONSTANT_REGISTER_DECLARATION(Register, r29,  (29));
114 CONSTANT_REGISTER_DECLARATION(Register, r30,  (30));
115 
116 
117 // r31 is not a general purpose register, but represents either the
118 // stack pointer or the zero/discard register depending on the
119 // instruction.
120 CONSTANT_REGISTER_DECLARATION(Register, r31_sp, (31));
121 CONSTANT_REGISTER_DECLARATION(Register, zr,  (32));
122 CONSTANT_REGISTER_DECLARATION(Register, sp,  (33));
123 
124 // Used as a filler in instructions where a register field is unused.
125 const Register dummy_reg = r31_sp;
126 
127 // Use FloatRegister as shortcut
128 class FloatRegisterImpl;
129 typedef FloatRegisterImpl* FloatRegister;
130 
131 inline FloatRegister as_FloatRegister(int encoding) {
132   return (FloatRegister)(intptr_t) encoding;
133 }
134 
135 // The implementation of floating point registers for the architecture
136 class FloatRegisterImpl: public AbstractRegisterImpl {
137  public:
138   enum {
139     number_of_registers = 32,
140     max_slots_per_register = 8,
141     save_slots_per_register = 2,
142     slots_per_neon_register = 4,
143     extra_save_slots_per_neon_register = slots_per_neon_register - save_slots_per_register
144   };
145 
146   // construction
147   inline friend FloatRegister as_FloatRegister(int encoding);
148 
149   VMReg as_VMReg();
150 
151   // derived registers, offsets, and addresses
152   FloatRegister successor() const                          { return as_FloatRegister((encoding() + 1) % 32); }
153 
154   // accessors
155   int   encoding() const                          { assert(is_valid(), "invalid register"); return (intptr_t)this; }
156   int   encoding_nocheck() const                         { return (intptr_t)this; }
157   bool  is_valid() const                          { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
158   const char* name() const;
159 
160 };
161 
162 // The float registers of the AARCH64 architecture
163 
164 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg , (-1));
165 
166 CONSTANT_REGISTER_DECLARATION(FloatRegister, v0     , ( 0));
167 CONSTANT_REGISTER_DECLARATION(FloatRegister, v1     , ( 1));
168 CONSTANT_REGISTER_DECLARATION(FloatRegister, v2     , ( 2));
169 CONSTANT_REGISTER_DECLARATION(FloatRegister, v3     , ( 3));
170 CONSTANT_REGISTER_DECLARATION(FloatRegister, v4     , ( 4));
171 CONSTANT_REGISTER_DECLARATION(FloatRegister, v5     , ( 5));
172 CONSTANT_REGISTER_DECLARATION(FloatRegister, v6     , ( 6));
173 CONSTANT_REGISTER_DECLARATION(FloatRegister, v7     , ( 7));
174 CONSTANT_REGISTER_DECLARATION(FloatRegister, v8     , ( 8));
175 CONSTANT_REGISTER_DECLARATION(FloatRegister, v9     , ( 9));
176 CONSTANT_REGISTER_DECLARATION(FloatRegister, v10    , (10));
177 CONSTANT_REGISTER_DECLARATION(FloatRegister, v11    , (11));
178 CONSTANT_REGISTER_DECLARATION(FloatRegister, v12    , (12));
179 CONSTANT_REGISTER_DECLARATION(FloatRegister, v13    , (13));
180 CONSTANT_REGISTER_DECLARATION(FloatRegister, v14    , (14));
181 CONSTANT_REGISTER_DECLARATION(FloatRegister, v15    , (15));
182 CONSTANT_REGISTER_DECLARATION(FloatRegister, v16    , (16));
183 CONSTANT_REGISTER_DECLARATION(FloatRegister, v17    , (17));
184 CONSTANT_REGISTER_DECLARATION(FloatRegister, v18    , (18));
185 CONSTANT_REGISTER_DECLARATION(FloatRegister, v19    , (19));
186 CONSTANT_REGISTER_DECLARATION(FloatRegister, v20    , (20));
187 CONSTANT_REGISTER_DECLARATION(FloatRegister, v21    , (21));
188 CONSTANT_REGISTER_DECLARATION(FloatRegister, v22    , (22));
189 CONSTANT_REGISTER_DECLARATION(FloatRegister, v23    , (23));
190 CONSTANT_REGISTER_DECLARATION(FloatRegister, v24    , (24));
191 CONSTANT_REGISTER_DECLARATION(FloatRegister, v25    , (25));
192 CONSTANT_REGISTER_DECLARATION(FloatRegister, v26    , (26));
193 CONSTANT_REGISTER_DECLARATION(FloatRegister, v27    , (27));
194 CONSTANT_REGISTER_DECLARATION(FloatRegister, v28    , (28));
195 CONSTANT_REGISTER_DECLARATION(FloatRegister, v29    , (29));
196 CONSTANT_REGISTER_DECLARATION(FloatRegister, v30    , (30));
197 CONSTANT_REGISTER_DECLARATION(FloatRegister, v31    , (31));
198 
199 // SVE vector registers, shared with the SIMD&FP v0-v31. Vn maps to Zn[127:0].
200 CONSTANT_REGISTER_DECLARATION(FloatRegister, z0     , ( 0));
201 CONSTANT_REGISTER_DECLARATION(FloatRegister, z1     , ( 1));
202 CONSTANT_REGISTER_DECLARATION(FloatRegister, z2     , ( 2));
203 CONSTANT_REGISTER_DECLARATION(FloatRegister, z3     , ( 3));
204 CONSTANT_REGISTER_DECLARATION(FloatRegister, z4     , ( 4));
205 CONSTANT_REGISTER_DECLARATION(FloatRegister, z5     , ( 5));
206 CONSTANT_REGISTER_DECLARATION(FloatRegister, z6     , ( 6));
207 CONSTANT_REGISTER_DECLARATION(FloatRegister, z7     , ( 7));
208 CONSTANT_REGISTER_DECLARATION(FloatRegister, z8     , ( 8));
209 CONSTANT_REGISTER_DECLARATION(FloatRegister, z9     , ( 9));
210 CONSTANT_REGISTER_DECLARATION(FloatRegister, z10    , (10));
211 CONSTANT_REGISTER_DECLARATION(FloatRegister, z11    , (11));
212 CONSTANT_REGISTER_DECLARATION(FloatRegister, z12    , (12));
213 CONSTANT_REGISTER_DECLARATION(FloatRegister, z13    , (13));
214 CONSTANT_REGISTER_DECLARATION(FloatRegister, z14    , (14));
215 CONSTANT_REGISTER_DECLARATION(FloatRegister, z15    , (15));
216 CONSTANT_REGISTER_DECLARATION(FloatRegister, z16    , (16));
217 CONSTANT_REGISTER_DECLARATION(FloatRegister, z17    , (17));
218 CONSTANT_REGISTER_DECLARATION(FloatRegister, z18    , (18));
219 CONSTANT_REGISTER_DECLARATION(FloatRegister, z19    , (19));
220 CONSTANT_REGISTER_DECLARATION(FloatRegister, z20    , (20));
221 CONSTANT_REGISTER_DECLARATION(FloatRegister, z21    , (21));
222 CONSTANT_REGISTER_DECLARATION(FloatRegister, z22    , (22));
223 CONSTANT_REGISTER_DECLARATION(FloatRegister, z23    , (23));
224 CONSTANT_REGISTER_DECLARATION(FloatRegister, z24    , (24));
225 CONSTANT_REGISTER_DECLARATION(FloatRegister, z25    , (25));
226 CONSTANT_REGISTER_DECLARATION(FloatRegister, z26    , (26));
227 CONSTANT_REGISTER_DECLARATION(FloatRegister, z27    , (27));
228 CONSTANT_REGISTER_DECLARATION(FloatRegister, z28    , (28));
229 CONSTANT_REGISTER_DECLARATION(FloatRegister, z29    , (29));
230 CONSTANT_REGISTER_DECLARATION(FloatRegister, z30    , (30));
231 CONSTANT_REGISTER_DECLARATION(FloatRegister, z31    , (31));
232 
233 
234 class PRegisterImpl;
235 typedef PRegisterImpl* PRegister;
236 inline PRegister as_PRegister(int encoding) {
237   return (PRegister)(intptr_t)encoding;
238 }
239 
240 // The implementation of predicate registers for the architecture
241 class PRegisterImpl: public AbstractRegisterImpl {
242  public:
243   enum {
244     number_of_registers = 16,
245     number_of_governing_registers = 8,
246     // AArch64 has 8 governing predicate registers, but p7 is used as an
247     // all-1s register so the predicates to save are from p0 to p6 if we
248     // don't have non-governing predicate registers support.
249     number_of_saved_registers = number_of_governing_registers - 1,
250     max_slots_per_register = 1
251   };
252 
253   // construction
254   inline friend PRegister as_PRegister(int encoding);
255 
256   VMReg as_VMReg();
257 
258   // derived registers, offsets, and addresses
259   PRegister successor() const     { return as_PRegister(encoding() + 1); }
260 
261   // accessors
262   int   encoding() const          { assert(is_valid(), "invalid register"); return (intptr_t)this; }
263   int   encoding_nocheck() const  { return (intptr_t)this; }
264   bool  is_valid() const          { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
265   bool  is_governing() const      { return 0 <= (intptr_t)this && (intptr_t)this < number_of_governing_registers; }
266   const char* name() const;
267 };
268 
269 // The predicate registers of SVE.
270 CONSTANT_REGISTER_DECLARATION(PRegister, p0,  ( 0));
271 CONSTANT_REGISTER_DECLARATION(PRegister, p1,  ( 1));
272 CONSTANT_REGISTER_DECLARATION(PRegister, p2,  ( 2));
273 CONSTANT_REGISTER_DECLARATION(PRegister, p3,  ( 3));
274 CONSTANT_REGISTER_DECLARATION(PRegister, p4,  ( 4));
275 CONSTANT_REGISTER_DECLARATION(PRegister, p5,  ( 5));
276 CONSTANT_REGISTER_DECLARATION(PRegister, p6,  ( 6));
277 CONSTANT_REGISTER_DECLARATION(PRegister, p7,  ( 7));
278 CONSTANT_REGISTER_DECLARATION(PRegister, p8,  ( 8));
279 CONSTANT_REGISTER_DECLARATION(PRegister, p9,  ( 9));
280 CONSTANT_REGISTER_DECLARATION(PRegister, p10, (10));
281 CONSTANT_REGISTER_DECLARATION(PRegister, p11, (11));
282 CONSTANT_REGISTER_DECLARATION(PRegister, p12, (12));
283 CONSTANT_REGISTER_DECLARATION(PRegister, p13, (13));
284 CONSTANT_REGISTER_DECLARATION(PRegister, p14, (14));
285 CONSTANT_REGISTER_DECLARATION(PRegister, p15, (15));
286 
287 // Need to know the total number of registers of all sorts for SharedInfo.
288 // Define a class that exports it.
289 class ConcreteRegisterImpl : public AbstractRegisterImpl {
290  public:
291   enum {
292   // A big enough number for C2: all the registers plus flags
293   // This number must be large enough to cover REG_COUNT (defined by c2) registers.
294   // There is no requirement that any ordering here matches any ordering c2 gives
295   // it's optoregs.
296 
297     number_of_registers = (RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers +
298                            FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers +
299                            PRegisterImpl::max_slots_per_register * PRegisterImpl::number_of_registers +
300                            1) // flags
301   };
302 
303   // added to make it compile
304   static const int max_gpr;
305   static const int max_fpr;
306   static const int max_pr;
307 };
308 
309 template <class RegImpl = Register> class RegSetIterator;
310 
311 // A set of registers
312 template <class RegImpl>
313 class AbstractRegSet {
314   uint32_t _bitset;
315 
316   AbstractRegSet(uint32_t bitset) : _bitset(bitset) { }
317 
318 public:
319 
320   AbstractRegSet() : _bitset(0) { }
321 
322   AbstractRegSet(RegImpl r1) : _bitset(1 << r1->encoding()) { }
323 
324   AbstractRegSet operator+(const AbstractRegSet aSet) const {
325     AbstractRegSet result(_bitset | aSet._bitset);
326     return result;
327   }
328 
329   AbstractRegSet operator-(const AbstractRegSet aSet) const {
330     AbstractRegSet result(_bitset & ~aSet._bitset);
331     return result;
332   }
333 
334   AbstractRegSet &operator+=(const AbstractRegSet aSet) {
335     *this = *this + aSet;
336     return *this;
337   }
338 
339   AbstractRegSet &operator-=(const AbstractRegSet aSet) {
340     *this = *this - aSet;
341     return *this;
342   }
343 
344   static AbstractRegSet of(RegImpl r1) {
345     return AbstractRegSet(r1);
346   }
347 
348   static AbstractRegSet of(RegImpl r1, RegImpl r2) {
349     return of(r1) + r2;
350   }
351 
352   static AbstractRegSet of(RegImpl r1, RegImpl r2, RegImpl r3) {
353     return of(r1, r2) + r3;
354   }
355 
356   static AbstractRegSet of(RegImpl r1, RegImpl r2, RegImpl r3, RegImpl r4) {
357     return of(r1, r2, r3) + r4;
358   }
359 
360   static AbstractRegSet range(RegImpl start, RegImpl end) {
361     uint32_t bits = ~0;
362     bits <<= start->encoding();
363     bits <<= 31 - end->encoding();
364     bits >>= 31 - end->encoding();
365 
366     return AbstractRegSet(bits);
367   }
368 
369   uint32_t bits() const { return _bitset; }
370 
371 private:
372 
373   RegImpl first();
374 
375 public:
376 
377   friend class RegSetIterator<RegImpl>;
378 
379   RegSetIterator<RegImpl> begin();
380 };
381 
382 typedef AbstractRegSet<Register> RegSet;
383 typedef AbstractRegSet<FloatRegister> FloatRegSet;
384 typedef AbstractRegSet<PRegister> PRegSet;
385 
386 template <class RegImpl>
387 class RegSetIterator {
388   AbstractRegSet<RegImpl> _regs;
389 
390 public:
391   RegSetIterator(AbstractRegSet<RegImpl> x): _regs(x) {}
392   RegSetIterator(const RegSetIterator& mit) : _regs(mit._regs) {}
393 
394   RegSetIterator& operator++() {
395     RegImpl r = _regs.first();
396     if (r->is_valid())
397       _regs -= r;
398     return *this;
399   }
400 
401   bool operator==(const RegSetIterator& rhs) const {
402     return _regs.bits() == rhs._regs.bits();
403   }
404   bool operator!=(const RegSetIterator& rhs) const {
405     return ! (rhs == *this);
406   }
407 
408   RegImpl operator*() {
409     return _regs.first();
410   }
411 };
412 
413 template <class RegImpl>
414 inline RegSetIterator<RegImpl> AbstractRegSet<RegImpl>::begin() {
415   return RegSetIterator<RegImpl>(*this);
416 }
417 
418 template <>
419 inline Register AbstractRegSet<Register>::first() {
420   uint32_t first = _bitset & -_bitset;
421   return first ? as_Register(exact_log2(first)) : noreg;
422 }
423 
424 template <>
425 inline FloatRegister AbstractRegSet<FloatRegister>::first() {
426   uint32_t first = _bitset & -_bitset;
427   return first ? as_FloatRegister(exact_log2(first)) : fnoreg;
428 }
429 
430 inline Register as_Register(FloatRegister reg) {
431   return as_Register(reg->encoding());
432 }
433 
434 #endif // CPU_AARCH64_REGISTER_AARCH64_HPP