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src/hotspot/cpu/aarch64/vmreg_aarch64.hpp

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22  * questions.
23  *
24  */
25 
26 #ifndef CPU_AARCH64_VMREG_AARCH64_HPP
27 #define CPU_AARCH64_VMREG_AARCH64_HPP
28 
29 inline bool is_Register() {
30   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
31 }
32 
33 inline bool is_FloatRegister() {
34   return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
35 }
36 
37 inline bool is_PRegister() {
38   return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_pr;
39 }
40 
41 inline Register as_Register() {
42   assert( is_Register(), "must be");
43   // Yuk
44   return ::as_Register(value() / RegisterImpl::max_slots_per_register);
45 }
46 
47 inline FloatRegister as_FloatRegister() {
48   assert( is_FloatRegister() && is_even(value()), "must be" );
49   // Yuk
50   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) /
51                             FloatRegisterImpl::max_slots_per_register);
52 }
53 
54 inline PRegister as_PRegister() {
55   assert( is_PRegister(), "must be" );
56   return ::as_PRegister((value() - ConcreteRegisterImpl::max_fpr) /
57                         PRegisterImpl::max_slots_per_register);
58 }
59 
60 inline bool is_concrete() {
61   assert(is_reg(), "must be");
62   if (is_FloatRegister()) {
63     int base = value() - ConcreteRegisterImpl::max_gpr;
64     return base % FloatRegisterImpl::max_slots_per_register == 0;
65   } else if (is_PRegister()) {
66     return true;   // Single slot
67   } else {
68     return is_even(value());
69   }
70 }
71 
72 #endif // CPU_AARCH64_VMREG_AARCH64_HPP

22  * questions.
23  *
24  */
25 
26 #ifndef CPU_AARCH64_VMREG_AARCH64_HPP
27 #define CPU_AARCH64_VMREG_AARCH64_HPP
28 
29 inline bool is_Register() {
30   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
31 }
32 
33 inline bool is_FloatRegister() {
34   return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
35 }
36 
37 inline bool is_PRegister() {
38   return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_pr;
39 }
40 
41 inline Register as_Register() {
42   assert(is_Register(), "must be");

43   return ::as_Register(value() / RegisterImpl::max_slots_per_register);
44 }
45 
46 inline FloatRegister as_FloatRegister() {
47   assert(is_FloatRegister() && is_even(value()), "must be");

48   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) /
49                             FloatRegisterImpl::max_slots_per_register);
50 }
51 
52 inline PRegister as_PRegister() {
53   assert(is_PRegister(), "must be");
54   return ::as_PRegister((value() - ConcreteRegisterImpl::max_fpr) /
55                         PRegisterImpl::max_slots_per_register);
56 }
57 
58 inline bool is_concrete() {
59   assert(is_reg(), "must be");
60   if (is_FloatRegister()) {
61     int base = value() - ConcreteRegisterImpl::max_gpr;
62     return base % FloatRegisterImpl::max_slots_per_register == 0;
63   } else if (is_PRegister()) {
64     return true;   // Single slot
65   } else {
66     return is_even(value());
67   }
68 }
69 
70 #endif // CPU_AARCH64_VMREG_AARCH64_HPP
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