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src/hotspot/share/opto/chaitin.hpp

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  1 /*
  2  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *

146 
147   // For scalable register, num_regs may not be the actual physical register size.
148   // We need to get the actual physical length of scalable register when scalable
149   // register is spilled. The size of one slot is 32-bit.
150   uint _scalable_reg_slots;     // Actual scalable register length of slots.
151                                 // Meaningful only when _is_scalable is true.
152 public:
153   int num_regs() const { return _num_regs; }
154   void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
155 
156   uint scalable_reg_slots() { return _scalable_reg_slots; }
157   void set_scalable_reg_slots(uint slots) {
158     assert(_is_scalable, "scalable register");
159     assert(slots > 0, "slots of scalable register is not valid");
160     _scalable_reg_slots = slots;
161   }
162 
163   bool is_scalable() {
164 #ifdef ASSERT
165     if (_is_scalable) {
166       // Should only be a vector for now, but it could also be a RegVectMask in future.
167       assert(_is_vector && (_num_regs == RegMask::SlotsPerVecA), "unexpected scalable reg");
168     }
169 #endif
170     return Matcher::implements_scalable_vector && _is_scalable;
171   }
172 
173 private:
174   // Number of physical registers this live range uses when it colors
175   // Architecture and register-set dependent
176   uint16_t _reg_pressure;
177 public:
178   void set_reg_pressure(int i)  { _reg_pressure = i; }
179   int      reg_pressure() const { return _reg_pressure; }
180 
181   // How much 'wiggle room' does this live range have?
182   // How many color choices can it make (scaled by _num_regs)?
183   int degrees_of_freedom() const { return mask_size() - _num_regs; }
184   // Bound LRGs have ZERO degrees of freedom.  We also count
185   // must_spill as bound.
186   bool is_bound  () const { return _is_bound; }
187   // Negative degrees-of-freedom; even with no neighbors this
188   // live range must spill.
189   bool not_free() const { return degrees_of_freedom() <  0; }
190   // Is this live range of "low-degree"?  Trivially colorable?
191   bool lo_degree () const { return degree() <= degrees_of_freedom(); }
192   // Is this live range just barely "low-degree"?  Trivially colorable?
193   bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
194 
195   uint   _is_oop:1,             // Live-range holds an oop
196          _is_float:1,           // True if in float registers
197          _is_vector:1,          // True if in vector registers

198          _is_scalable:1,        // True if register size is scalable
199                                 //      e.g. Arm SVE vector/predicate registers.
200          _was_spilled1:1,       // True if prior spilling on def
201          _was_spilled2:1,       // True if twice prior spilling on def
202          _is_bound:1,           // live range starts life with no
203                                 // degrees of freedom.
204          _direct_conflict:1,    // True if def and use registers in conflict
205          _must_spill:1,         // live range has lost all degrees of freedom
206     // If _fat_proj is set, live range does NOT require aligned, adjacent
207     // registers and has NO interferences.
208     // If _fat_proj is clear, live range requires num_regs() to be a power of
209     // 2, and it requires registers to form an aligned, adjacent set.
210          _fat_proj:1,           //
211          _was_lo:1,             // Was lo-degree prior to coalesce
212          _msize_valid:1,        // _mask_size cache valid
213          _degree_valid:1,       // _degree cache valid
214          _has_copy:1,           // Adjacent to some copy instruction
215          _at_risk:1;            // Simplify says this guy is at risk to spill
216 
217 

  1 /*
  2  * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *

146 
147   // For scalable register, num_regs may not be the actual physical register size.
148   // We need to get the actual physical length of scalable register when scalable
149   // register is spilled. The size of one slot is 32-bit.
150   uint _scalable_reg_slots;     // Actual scalable register length of slots.
151                                 // Meaningful only when _is_scalable is true.
152 public:
153   int num_regs() const { return _num_regs; }
154   void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
155 
156   uint scalable_reg_slots() { return _scalable_reg_slots; }
157   void set_scalable_reg_slots(uint slots) {
158     assert(_is_scalable, "scalable register");
159     assert(slots > 0, "slots of scalable register is not valid");
160     _scalable_reg_slots = slots;
161   }
162 
163   bool is_scalable() {
164 #ifdef ASSERT
165     if (_is_scalable) {
166       assert(_is_vector && (_num_regs == RegMask::SlotsPerVecA) ||
167              _is_predicate && (_num_regs == RegMask::SlotsPerRegVectMask), "unexpected scalable reg");
168     }
169 #endif
170     return Matcher::implements_scalable_vector && _is_scalable;
171   }
172 
173 private:
174   // Number of physical registers this live range uses when it colors
175   // Architecture and register-set dependent
176   uint16_t _reg_pressure;
177 public:
178   void set_reg_pressure(int i)  { _reg_pressure = i; }
179   int      reg_pressure() const { return _reg_pressure; }
180 
181   // How much 'wiggle room' does this live range have?
182   // How many color choices can it make (scaled by _num_regs)?
183   int degrees_of_freedom() const { return mask_size() - _num_regs; }
184   // Bound LRGs have ZERO degrees of freedom.  We also count
185   // must_spill as bound.
186   bool is_bound  () const { return _is_bound; }
187   // Negative degrees-of-freedom; even with no neighbors this
188   // live range must spill.
189   bool not_free() const { return degrees_of_freedom() <  0; }
190   // Is this live range of "low-degree"?  Trivially colorable?
191   bool lo_degree () const { return degree() <= degrees_of_freedom(); }
192   // Is this live range just barely "low-degree"?  Trivially colorable?
193   bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
194 
195   uint   _is_oop:1,             // Live-range holds an oop
196          _is_float:1,           // True if in float registers
197          _is_vector:1,          // True if in vector registers
198          _is_predicate:1,       // True if in mask/predicate registers
199          _is_scalable:1,        // True if register size is scalable
200                                 //      e.g. Arm SVE vector/predicate registers.
201          _was_spilled1:1,       // True if prior spilling on def
202          _was_spilled2:1,       // True if twice prior spilling on def
203          _is_bound:1,           // live range starts life with no
204                                 // degrees of freedom.
205          _direct_conflict:1,    // True if def and use registers in conflict
206          _must_spill:1,         // live range has lost all degrees of freedom
207     // If _fat_proj is set, live range does NOT require aligned, adjacent
208     // registers and has NO interferences.
209     // If _fat_proj is clear, live range requires num_regs() to be a power of
210     // 2, and it requires registers to form an aligned, adjacent set.
211          _fat_proj:1,           //
212          _was_lo:1,             // Was lo-degree prior to coalesce
213          _msize_valid:1,        // _mask_size cache valid
214          _degree_valid:1,       // _degree cache valid
215          _has_copy:1,           // Adjacent to some copy instruction
216          _at_risk:1;            // Simplify says this guy is at risk to spill
217 
218 
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