1 /*
   2  * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.inline.hpp"
  27 #include "gc/shared/gc_globals.hpp"
  28 #include "memory/allocation.inline.hpp"
  29 #include "oops/compressedOops.hpp"
  30 #include "opto/ad.hpp"
  31 #include "opto/block.hpp"
  32 #include "opto/c2compiler.hpp"
  33 #include "opto/callnode.hpp"
  34 #include "opto/cfgnode.hpp"
  35 #include "opto/machnode.hpp"
  36 #include "opto/runtime.hpp"
  37 #include "opto/chaitin.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 
  40 // Optimization - Graph Style
  41 
  42 // Check whether val is not-null-decoded compressed oop,
  43 // i.e. will grab into the base of the heap if it represents NULL.
  44 static bool accesses_heap_base_zone(Node *val) {
  45   if (CompressedOops::base() != NULL) { // Implies UseCompressedOops.
  46     if (val && val->is_Mach()) {
  47       if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
  48         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  49         // decode NULL to point to the heap base (Decode_NN).
  50         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  51           return true;
  52         }
  53       }
  54       // Must recognize load operation with Decode matched in memory operand.
  55       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  56       // returns true everywhere else. On PPC, no such memory operands
  57       // exist, therefore we did not yet implement a check for such operands.
  58       NOT_AIX(Unimplemented());
  59     }
  60   }
  61   return false;
  62 }
  63 
  64 static bool needs_explicit_null_check_for_read(Node *val) {
  65   // On some OSes (AIX) the page at address 0 is only write protected.
  66   // If so, only Store operations will trap.
  67   if (os::zero_page_read_protected()) {
  68     return false;  // Implicit null check will work.
  69   }
  70   // Also a read accessing the base of a heap-based compressed heap will trap.
  71   if (accesses_heap_base_zone(val) &&         // Hits the base zone page.
  72       CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
  73     return false;
  74   }
  75 
  76   return true;
  77 }
  78 
  79 //------------------------------implicit_null_check----------------------------
  80 // Detect implicit-null-check opportunities.  Basically, find NULL checks
  81 // with suitable memory ops nearby.  Use the memory op to do the NULL check.
  82 // I can generate a memory op if there is not one nearby.
  83 // The proj is the control projection for the not-null case.
  84 // The val is the pointer being checked for nullness or
  85 // decodeHeapOop_not_null node if it did not fold into address.
  86 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
  87   // Assume if null check need for 0 offset then always needed
  88   // Intel solaris doesn't support any null checks yet and no
  89   // mechanism exists (yet) to set the switches at an os_cpu level
  90   if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
  91 
  92   // Make sure the ptr-is-null path appears to be uncommon!
  93   float f = block->end()->as_MachIf()->_prob;
  94   if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
  95   if( f > PROB_UNLIKELY_MAG(4) ) return;
  96 
  97   uint bidx = 0;                // Capture index of value into memop
  98   bool was_store;               // Memory op is a store op
  99 
 100   // Get the successor block for if the test ptr is non-null
 101   Block* not_null_block;  // this one goes with the proj
 102   Block* null_block;
 103   if (block->get_node(block->number_of_nodes()-1) == proj) {
 104     null_block     = block->_succs[0];
 105     not_null_block = block->_succs[1];
 106   } else {
 107     assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
 108     not_null_block = block->_succs[0];
 109     null_block     = block->_succs[1];
 110   }
 111   while (null_block->is_Empty() == Block::empty_with_goto) {
 112     null_block     = null_block->_succs[0];
 113   }
 114 
 115   // Search the exception block for an uncommon trap.
 116   // (See Parse::do_if and Parse::do_ifnull for the reason
 117   // we need an uncommon trap.  Briefly, we need a way to
 118   // detect failure of this optimization, as in 6366351.)
 119   {
 120     bool found_trap = false;
 121     for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
 122       Node* nn = null_block->get_node(i1);
 123       if (nn->is_MachCall() &&
 124           nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
 125         const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
 126         if (trtype->isa_int() && trtype->is_int()->is_con()) {
 127           jint tr_con = trtype->is_int()->get_con();
 128           Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
 129           Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
 130           assert((int)reason < (int)BitsPerInt, "recode bit map");
 131           if (is_set_nth_bit(allowed_reasons, (int) reason)
 132               && action != Deoptimization::Action_none) {
 133             // This uncommon trap is sure to recompile, eventually.
 134             // When that happens, C->too_many_traps will prevent
 135             // this transformation from happening again.
 136             found_trap = true;
 137           }
 138         }
 139         break;
 140       }
 141     }
 142     if (!found_trap) {
 143       // We did not find an uncommon trap.
 144       return;
 145     }
 146   }
 147 
 148   // Check for decodeHeapOop_not_null node which did not fold into address
 149   bool is_decoden = ((intptr_t)val) & 1;
 150   val = (Node*)(((intptr_t)val) & ~1);
 151 
 152   assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
 153          (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
 154 
 155   // Search the successor block for a load or store who's base value is also
 156   // the tested value.  There may be several.
 157   MachNode *best = NULL;        // Best found so far
 158   for (DUIterator i = val->outs(); val->has_out(i); i++) {
 159     Node *m = val->out(i);
 160     if( !m->is_Mach() ) continue;
 161     MachNode *mach = m->as_Mach();
 162     was_store = false;
 163     int iop = mach->ideal_Opcode();
 164     switch( iop ) {
 165     case Op_LoadB:
 166     case Op_LoadUB:
 167     case Op_LoadUS:
 168     case Op_LoadD:
 169     case Op_LoadF:
 170     case Op_LoadI:
 171     case Op_LoadL:
 172     case Op_LoadP:
 173     case Op_LoadN:
 174     case Op_LoadS:
 175     case Op_LoadKlass:
 176     case Op_LoadNKlass:
 177     case Op_LoadRange:
 178     case Op_LoadD_unaligned:
 179     case Op_LoadL_unaligned:
 180       assert(mach->in(2) == val, "should be address");
 181       break;
 182     case Op_StoreB:
 183     case Op_StoreC:
 184     case Op_StoreCM:
 185     case Op_StoreD:
 186     case Op_StoreF:
 187     case Op_StoreI:
 188     case Op_StoreL:
 189     case Op_StoreP:
 190     case Op_StoreN:
 191     case Op_StoreNKlass:
 192       was_store = true;         // Memory op is a store op
 193       // Stores will have their address in slot 2 (memory in slot 1).
 194       // If the value being nul-checked is in another slot, it means we
 195       // are storing the checked value, which does NOT check the value!
 196       if( mach->in(2) != val ) continue;
 197       break;                    // Found a memory op?
 198     case Op_StrComp:
 199     case Op_StrEquals:
 200     case Op_StrIndexOf:
 201     case Op_StrIndexOfChar:
 202     case Op_AryEq:
 203     case Op_StrInflatedCopy:
 204     case Op_StrCompressedCopy:
 205     case Op_EncodeISOArray:
 206     case Op_HasNegatives:
 207       // Not a legit memory op for implicit null check regardless of
 208       // embedded loads
 209       continue;
 210     default:                    // Also check for embedded loads
 211       if( !mach->needs_anti_dependence_check() )
 212         continue;               // Not an memory op; skip it
 213       if( must_clone[iop] ) {
 214         // Do not move nodes which produce flags because
 215         // RA will try to clone it to place near branch and
 216         // it will cause recompilation, see clone_node().
 217         continue;
 218       }
 219       {
 220         // Check that value is used in memory address in
 221         // instructions with embedded load (CmpP val1,(val2+off)).
 222         Node* base;
 223         Node* index;
 224         const MachOper* oper = mach->memory_inputs(base, index);
 225         if (oper == NULL || oper == (MachOper*)-1) {
 226           continue;             // Not an memory op; skip it
 227         }
 228         if (val == base ||
 229             (val == index && val->bottom_type()->isa_narrowoop())) {
 230           break;                // Found it
 231         } else {
 232           continue;             // Skip it
 233         }
 234       }
 235       break;
 236     }
 237 
 238     // On some OSes (AIX) the page at address 0 is only write protected.
 239     // If so, only Store operations will trap.
 240     // But a read accessing the base of a heap-based compressed heap will trap.
 241     if (!was_store && needs_explicit_null_check_for_read(val)) {
 242       continue;
 243     }
 244 
 245     // Check that node's control edge is not-null block's head or dominates it,
 246     // otherwise we can't hoist it because there are other control dependencies.
 247     Node* ctrl = mach->in(0);
 248     if (ctrl != NULL && !(ctrl == not_null_block->head() ||
 249         get_block_for_node(ctrl)->dominates(not_null_block))) {
 250       continue;
 251     }
 252 
 253     // check if the offset is not too high for implicit exception
 254     {
 255       intptr_t offset = 0;
 256       const TypePtr *adr_type = NULL;  // Do not need this return value here
 257       const Node* base = mach->get_base_and_disp(offset, adr_type);
 258       if (base == NULL || base == NodeSentinel) {
 259         // Narrow oop address doesn't have base, only index.
 260         // Give up if offset is beyond page size or if heap base is not protected.
 261         if (val->bottom_type()->isa_narrowoop() &&
 262             (MacroAssembler::needs_explicit_null_check(offset) ||
 263              !CompressedOops::use_implicit_null_checks()))
 264           continue;
 265         // cannot reason about it; is probably not implicit null exception
 266       } else {
 267         const TypePtr* tptr;
 268         if ((UseCompressedOops || UseCompressedClassPointers) &&
 269             (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
 270           // 32-bits narrow oop can be the base of address expressions
 271           tptr = base->get_ptr_type();
 272         } else {
 273           // only regular oops are expected here
 274           tptr = base->bottom_type()->is_ptr();
 275         }
 276         // Give up if offset is not a compile-time constant.
 277         if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
 278           continue;
 279         offset += tptr->_offset; // correct if base is offseted
 280         // Give up if reference is beyond page size.
 281         if (MacroAssembler::needs_explicit_null_check(offset))
 282           continue;
 283         // Give up if base is a decode node and the heap base is not protected.
 284         if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
 285             !CompressedOops::use_implicit_null_checks())
 286           continue;
 287       }
 288     }
 289 
 290     // Check ctrl input to see if the null-check dominates the memory op
 291     Block *cb = get_block_for_node(mach);
 292     cb = cb->_idom;             // Always hoist at least 1 block
 293     if( !was_store ) {          // Stores can be hoisted only one block
 294       while( cb->_dom_depth > (block->_dom_depth + 1))
 295         cb = cb->_idom;         // Hoist loads as far as we want
 296       // The non-null-block should dominate the memory op, too. Live
 297       // range spilling will insert a spill in the non-null-block if it is
 298       // needs to spill the memory op for an implicit null check.
 299       if (cb->_dom_depth == (block->_dom_depth + 1)) {
 300         if (cb != not_null_block) continue;
 301         cb = cb->_idom;
 302       }
 303     }
 304     if( cb != block ) continue;
 305 
 306     // Found a memory user; see if it can be hoisted to check-block
 307     uint vidx = 0;              // Capture index of value into memop
 308     uint j;
 309     for( j = mach->req()-1; j > 0; j-- ) {
 310       if( mach->in(j) == val ) {
 311         vidx = j;
 312         // Ignore DecodeN val which could be hoisted to where needed.
 313         if( is_decoden ) continue;
 314       }
 315       // Block of memory-op input
 316       Block *inb = get_block_for_node(mach->in(j));
 317       Block *b = block;          // Start from nul check
 318       while( b != inb && b->_dom_depth > inb->_dom_depth )
 319         b = b->_idom;           // search upwards for input
 320       // See if input dominates null check
 321       if( b != inb )
 322         break;
 323     }
 324     if( j > 0 )
 325       continue;
 326     Block *mb = get_block_for_node(mach);
 327     // Hoisting stores requires more checks for the anti-dependence case.
 328     // Give up hoisting if we have to move the store past any load.
 329     if( was_store ) {
 330       Block *b = mb;            // Start searching here for a local load
 331       // mach use (faulting) trying to hoist
 332       // n might be blocker to hoisting
 333       while( b != block ) {
 334         uint k;
 335         for( k = 1; k < b->number_of_nodes(); k++ ) {
 336           Node *n = b->get_node(k);
 337           if( n->needs_anti_dependence_check() &&
 338               n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
 339             break;              // Found anti-dependent load
 340         }
 341         if( k < b->number_of_nodes() )
 342           break;                // Found anti-dependent load
 343         // Make sure control does not do a merge (would have to check allpaths)
 344         if( b->num_preds() != 2 ) break;
 345         b = get_block_for_node(b->pred(1)); // Move up to predecessor block
 346       }
 347       if( b != block ) continue;
 348     }
 349 
 350     // Make sure this memory op is not already being used for a NullCheck
 351     Node *e = mb->end();
 352     if( e->is_MachNullCheck() && e->in(1) == mach )
 353       continue;                 // Already being used as a NULL check
 354 
 355     // Found a candidate!  Pick one with least dom depth - the highest
 356     // in the dom tree should be closest to the null check.
 357     if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
 358       best = mach;
 359       bidx = vidx;
 360     }
 361   }
 362   // No candidate!
 363   if (best == NULL) {
 364     return;
 365   }
 366 
 367   // ---- Found an implicit null check
 368 #ifndef PRODUCT
 369   extern int implicit_null_checks;
 370   implicit_null_checks++;
 371 #endif
 372 
 373   if( is_decoden ) {
 374     // Check if we need to hoist decodeHeapOop_not_null first.
 375     Block *valb = get_block_for_node(val);
 376     if( block != valb && block->_dom_depth < valb->_dom_depth ) {
 377       // Hoist it up to the end of the test block together with its inputs if they exist.
 378       for (uint i = 2; i < val->req(); i++) {
 379         // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
 380         Node *temp = val->in(i);
 381         Block *tempb = get_block_for_node(temp);
 382         if (!tempb->dominates(block)) {
 383           assert(block->dominates(tempb), "sanity check: temp node placement");
 384           // We only expect nodes without further inputs, like MachTemp or load Base.
 385           assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
 386                  "need for recursive hoisting not expected");
 387           tempb->find_remove(temp);
 388           block->add_inst(temp);
 389           map_node_to_block(temp, block);
 390         }
 391       }
 392       valb->find_remove(val);
 393       block->add_inst(val);
 394       map_node_to_block(val, block);
 395       // DecodeN on x86 may kill flags. Check for flag-killing projections
 396       // that also need to be hoisted.
 397       for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
 398         Node* n = val->fast_out(j);
 399         if( n->is_MachProj() ) {
 400           get_block_for_node(n)->find_remove(n);
 401           block->add_inst(n);
 402           map_node_to_block(n, block);
 403         }
 404       }
 405     }
 406   }
 407   // Hoist the memory candidate up to the end of the test block.
 408   Block *old_block = get_block_for_node(best);
 409   old_block->find_remove(best);
 410   block->add_inst(best);
 411   map_node_to_block(best, block);
 412 
 413   // Move the control dependence if it is pinned to not-null block.
 414   // Don't change it in other cases: NULL or dominating control.
 415   Node* ctrl = best->in(0);
 416   if (ctrl != NULL && get_block_for_node(ctrl) == not_null_block) {
 417     // Set it to control edge of null check.
 418     best->set_req(0, proj->in(0)->in(0));
 419   }
 420 
 421   // Check for flag-killing projections that also need to be hoisted
 422   // Should be DU safe because no edge updates.
 423   for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
 424     Node* n = best->fast_out(j);
 425     if( n->is_MachProj() ) {
 426       get_block_for_node(n)->find_remove(n);
 427       block->add_inst(n);
 428       map_node_to_block(n, block);
 429     }
 430   }
 431 
 432   // proj==Op_True --> ne test; proj==Op_False --> eq test.
 433   // One of two graph shapes got matched:
 434   //   (IfTrue  (If (Bool NE (CmpP ptr NULL))))
 435   //   (IfFalse (If (Bool EQ (CmpP ptr NULL))))
 436   // NULL checks are always branch-if-eq.  If we see a IfTrue projection
 437   // then we are replacing a 'ne' test with a 'eq' NULL check test.
 438   // We need to flip the projections to keep the same semantics.
 439   if( proj->Opcode() == Op_IfTrue ) {
 440     // Swap order of projections in basic block to swap branch targets
 441     Node *tmp1 = block->get_node(block->end_idx()+1);
 442     Node *tmp2 = block->get_node(block->end_idx()+2);
 443     block->map_node(tmp2, block->end_idx()+1);
 444     block->map_node(tmp1, block->end_idx()+2);
 445     Node *tmp = new Node(C->top()); // Use not NULL input
 446     tmp1->replace_by(tmp);
 447     tmp2->replace_by(tmp1);
 448     tmp->replace_by(tmp2);
 449     tmp->destruct(NULL);
 450   }
 451 
 452   // Remove the existing null check; use a new implicit null check instead.
 453   // Since schedule-local needs precise def-use info, we need to correct
 454   // it as well.
 455   Node *old_tst = proj->in(0);
 456   MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
 457   block->map_node(nul_chk, block->end_idx());
 458   map_node_to_block(nul_chk, block);
 459   // Redirect users of old_test to nul_chk
 460   for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
 461     old_tst->last_out(i2)->set_req(0, nul_chk);
 462   // Clean-up any dead code
 463   for (uint i3 = 0; i3 < old_tst->req(); i3++) {
 464     Node* in = old_tst->in(i3);
 465     old_tst->set_req(i3, NULL);
 466     if (in->outcnt() == 0) {
 467       // Remove dead input node
 468       in->disconnect_inputs(C);
 469       block->find_remove(in);
 470     }
 471   }
 472 
 473   latency_from_uses(nul_chk);
 474   latency_from_uses(best);
 475 
 476   // insert anti-dependences to defs in this block
 477   if (! best->needs_anti_dependence_check()) {
 478     for (uint k = 1; k < block->number_of_nodes(); k++) {
 479       Node *n = block->get_node(k);
 480       if (n->needs_anti_dependence_check() &&
 481           n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
 482         // Found anti-dependent load
 483         insert_anti_dependences(block, n);
 484       }
 485     }
 486   }
 487 }
 488 
 489 
 490 //------------------------------select-----------------------------------------
 491 // Select a nice fellow from the worklist to schedule next. If there is only
 492 // one choice, then use it. Projections take top priority for correctness
 493 // reasons - if I see a projection, then it is next.  There are a number of
 494 // other special cases, for instructions that consume condition codes, et al.
 495 // These are chosen immediately. Some instructions are required to immediately
 496 // precede the last instruction in the block, and these are taken last. Of the
 497 // remaining cases (most), choose the instruction with the greatest latency
 498 // (that is, the most number of pseudo-cycles required to the end of the
 499 // routine). If there is a tie, choose the instruction with the most inputs.
 500 Node* PhaseCFG::select(
 501   Block* block,
 502   Node_List &worklist,
 503   GrowableArray<int> &ready_cnt,
 504   VectorSet &next_call,
 505   uint sched_slot,
 506   intptr_t* recalc_pressure_nodes) {
 507 
 508   // If only a single entry on the stack, use it
 509   uint cnt = worklist.size();
 510   if (cnt == 1) {
 511     Node *n = worklist[0];
 512     worklist.map(0,worklist.pop());
 513     return n;
 514   }
 515 
 516   uint choice  = 0; // Bigger is most important
 517   uint latency = 0; // Bigger is scheduled first
 518   uint score   = 0; // Bigger is better
 519   int idx = -1;     // Index in worklist
 520   int cand_cnt = 0; // Candidate count
 521   bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10);
 522 
 523   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 524     // Order in worklist is used to break ties.
 525     // See caller for how this is used to delay scheduling
 526     // of induction variable increments to after the other
 527     // uses of the phi are scheduled.
 528     Node *n = worklist[i];      // Get Node on worklist
 529 
 530     int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
 531     if( n->is_Proj() ||         // Projections always win
 532         n->Opcode()== Op_Con || // So does constant 'Top'
 533         iop == Op_CreateEx ||   // Create-exception must start block
 534         iop == Op_CheckCastPP
 535         ) {
 536       worklist.map(i,worklist.pop());
 537       return n;
 538     }
 539 
 540     // Final call in a block must be adjacent to 'catch'
 541     Node *e = block->end();
 542     if( e->is_Catch() && e->in(0)->in(0) == n )
 543       continue;
 544 
 545     // Memory op for an implicit null check has to be at the end of the block
 546     if( e->is_MachNullCheck() && e->in(1) == n )
 547       continue;
 548 
 549     // Schedule IV increment last.
 550     if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
 551       // Cmp might be matched into CountedLoopEnd node.
 552       Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
 553       if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
 554         continue;
 555       }
 556     }
 557 
 558     uint n_choice  = 2;
 559 
 560     // See if this instruction is consumed by a branch. If so, then (as the
 561     // branch is the last instruction in the basic block) force it to the
 562     // end of the basic block
 563     if ( must_clone[iop] ) {
 564       // See if any use is a branch
 565       bool found_machif = false;
 566 
 567       for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 568         Node* use = n->fast_out(j);
 569 
 570         // The use is a conditional branch, make them adjacent
 571         if (use->is_MachIf() && get_block_for_node(use) == block) {
 572           found_machif = true;
 573           break;
 574         }
 575 
 576         // More than this instruction pending for successor to be ready,
 577         // don't choose this if other opportunities are ready
 578         if (ready_cnt.at(use->_idx) > 1)
 579           n_choice = 1;
 580       }
 581 
 582       // loop terminated, prefer not to use this instruction
 583       if (found_machif)
 584         continue;
 585     }
 586 
 587     // See if this has a predecessor that is "must_clone", i.e. sets the
 588     // condition code. If so, choose this first
 589     for (uint j = 0; j < n->req() ; j++) {
 590       Node *inn = n->in(j);
 591       if (inn) {
 592         if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
 593           n_choice = 3;
 594           break;
 595         }
 596       }
 597     }
 598 
 599     // MachTemps should be scheduled last so they are near their uses
 600     if (n->is_MachTemp()) {
 601       n_choice = 1;
 602     }
 603 
 604     uint n_latency = get_latency_for_node(n);
 605     uint n_score = n->req();   // Many inputs get high score to break ties
 606 
 607     if (OptoRegScheduling && block_size_threshold_ok) {
 608       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 609         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 610         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 611         // simulate the notion that we just picked this node to schedule
 612         n->add_flag(Node::Flag_is_scheduled);
 613         // now caculate its effect upon the graph if we did
 614         adjust_register_pressure(n, block, recalc_pressure_nodes, false);
 615         // return its state for finalize in case somebody else wins
 616         n->remove_flag(Node::Flag_is_scheduled);
 617         // now save the two final pressure components of register pressure, limiting pressure calcs to short size
 618         short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
 619         short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
 620         recalc_pressure_nodes[n->_idx] = int_pressure;
 621         recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
 622       }
 623 
 624       if (_scheduling_for_pressure) {
 625         latency = n_latency;
 626         if (n_choice != 3) {
 627           // Now evaluate each register pressure component based on threshold in the score.
 628           // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
 629           // on a single instruction, but we might see it shrink on both banks.
 630           // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
 631           // live ranges that terminate on this instruction.
 632           if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 633             short int_pressure = (short)recalc_pressure_nodes[n->_idx];
 634             n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
 635           }
 636           if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 637             short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
 638             n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
 639           }
 640         } else {
 641           // make sure we choose these candidates
 642           score = 0;
 643         }
 644       }
 645     }
 646 
 647     // Keep best latency found
 648     cand_cnt++;
 649     if (choice < n_choice ||
 650         (choice == n_choice &&
 651          ((StressLCM && C->randomized_select(cand_cnt)) ||
 652           (!StressLCM &&
 653            (latency < n_latency ||
 654             (latency == n_latency &&
 655              (score < n_score))))))) {
 656       choice  = n_choice;
 657       latency = n_latency;
 658       score   = n_score;
 659       idx     = i;               // Also keep index in worklist
 660     }
 661   } // End of for all ready nodes in worklist
 662 
 663   guarantee(idx >= 0, "index should be set");
 664   Node *n = worklist[(uint)idx];      // Get the winner
 665 
 666   worklist.map((uint)idx, worklist.pop());     // Compress worklist
 667   return n;
 668 }
 669 
 670 //-------------------------adjust_register_pressure----------------------------
 671 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
 672   PhaseLive* liveinfo = _regalloc->get_live();
 673   IndexSet* liveout = liveinfo->live(block);
 674   // first adjust the register pressure for the sources
 675   for (uint i = 1; i < n->req(); i++) {
 676     bool lrg_ends = false;
 677     Node *src_n = n->in(i);
 678     if (src_n == NULL) continue;
 679     if (!src_n->is_Mach()) continue;
 680     uint src = _regalloc->_lrg_map.find(src_n);
 681     if (src == 0) continue;
 682     LRG& lrg_src = _regalloc->lrgs(src);
 683     // detect if the live range ends or not
 684     if (liveout->member(src) == false) {
 685       lrg_ends = true;
 686       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 687         Node* m = src_n->fast_out(j); // Get user
 688         if (m == n) continue;
 689         if (!m->is_Mach()) continue;
 690         MachNode *mach = m->as_Mach();
 691         bool src_matches = false;
 692         int iop = mach->ideal_Opcode();
 693 
 694         switch (iop) {
 695         case Op_StoreB:
 696         case Op_StoreC:
 697         case Op_StoreCM:
 698         case Op_StoreD:
 699         case Op_StoreF:
 700         case Op_StoreI:
 701         case Op_StoreL:
 702         case Op_StoreP:
 703         case Op_StoreN:
 704         case Op_StoreVector:
 705         case Op_StoreVectorMasked:
 706         case Op_StoreVectorScatter:
 707         case Op_StoreVectorScatterMasked:
 708         case Op_StoreNKlass:
 709           for (uint k = 1; k < m->req(); k++) {
 710             Node *in = m->in(k);
 711             if (in == src_n) {
 712               src_matches = true;
 713               break;
 714             }
 715           }
 716           break;
 717 
 718         default:
 719           src_matches = true;
 720           break;
 721         }
 722 
 723         // If we have a store as our use, ignore the non source operands
 724         if (src_matches == false) continue;
 725 
 726         // Mark every unscheduled use which is not n with a recalculation
 727         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 728           if (finalize_mode && !m->is_Phi()) {
 729             recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
 730           }
 731           lrg_ends = false;
 732         }
 733       }
 734     }
 735     // if none, this live range ends and we can adjust register pressure
 736     if (lrg_ends) {
 737       if (finalize_mode) {
 738         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 739       } else {
 740         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 741       }
 742     }
 743   }
 744 
 745   // now add the register pressure from the dest and evaluate which heuristic we should use:
 746   // 1.) The default, latency scheduling
 747   // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
 748   uint dst = _regalloc->_lrg_map.find(n);
 749   if (dst != 0) {
 750     LRG& lrg_dst = _regalloc->lrgs(dst);
 751     if (finalize_mode) {
 752       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 753       // check to see if we fall over the register pressure cliff here
 754       if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 755         _scheduling_for_pressure = true;
 756       } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 757         _scheduling_for_pressure = true;
 758       } else {
 759         // restore latency scheduling mode
 760         _scheduling_for_pressure = false;
 761       }
 762     } else {
 763       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 764     }
 765   }
 766 }
 767 
 768 //------------------------------set_next_call----------------------------------
 769 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
 770   if( next_call.test_set(n->_idx) ) return;
 771   for( uint i=0; i<n->len(); i++ ) {
 772     Node *m = n->in(i);
 773     if( !m ) continue;  // must see all nodes in block that precede call
 774     if (get_block_for_node(m) == block) {
 775       set_next_call(block, m, next_call);
 776     }
 777   }
 778 }
 779 
 780 //------------------------------needed_for_next_call---------------------------
 781 // Set the flag 'next_call' for each Node that is needed for the next call to
 782 // be scheduled.  This flag lets me bias scheduling so Nodes needed for the
 783 // next subroutine call get priority - basically it moves things NOT needed
 784 // for the next call till after the call.  This prevents me from trying to
 785 // carry lots of stuff live across a call.
 786 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
 787   // Find the next control-defining Node in this block
 788   Node* call = NULL;
 789   for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
 790     Node* m = this_call->fast_out(i);
 791     if (get_block_for_node(m) == block && // Local-block user
 792         m != this_call &&       // Not self-start node
 793         m->is_MachCall()) {
 794       call = m;
 795       break;
 796     }
 797   }
 798   if (call == NULL)  return;    // No next call (e.g., block end is near)
 799   // Set next-call for all inputs to this call
 800   set_next_call(block, call, next_call);
 801 }
 802 
 803 //------------------------------add_call_kills-------------------------------------
 804 // helper function that adds caller save registers to MachProjNode
 805 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
 806   // Fill in the kill mask for the call
 807   for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
 808     if( !regs.Member(r) ) {     // Not already defined by the call
 809       // Save-on-call register?
 810       if ((save_policy[r] == 'C') ||
 811           (save_policy[r] == 'A') ||
 812           ((save_policy[r] == 'E') && exclude_soe)) {
 813         proj->_rout.Insert(r);
 814       }
 815     }
 816   }
 817 }
 818 
 819 
 820 //------------------------------sched_call-------------------------------------
 821 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
 822   RegMask regs;
 823 
 824   // Schedule all the users of the call right now.  All the users are
 825   // projection Nodes, so they must be scheduled next to the call.
 826   // Collect all the defined registers.
 827   for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
 828     Node* n = mcall->fast_out(i);
 829     assert( n->is_MachProj(), "" );
 830     int n_cnt = ready_cnt.at(n->_idx)-1;
 831     ready_cnt.at_put(n->_idx, n_cnt);
 832     assert( n_cnt == 0, "" );
 833     // Schedule next to call
 834     block->map_node(n, node_cnt++);
 835     // Collect defined registers
 836     regs.OR(n->out_RegMask());
 837     // Check for scheduling the next control-definer
 838     if( n->bottom_type() == Type::CONTROL )
 839       // Warm up next pile of heuristic bits
 840       needed_for_next_call(block, n, next_call);
 841 
 842     // Children of projections are now all ready
 843     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 844       Node* m = n->fast_out(j); // Get user
 845       if(get_block_for_node(m) != block) {
 846         continue;
 847       }
 848       if( m->is_Phi() ) continue;
 849       int m_cnt = ready_cnt.at(m->_idx) - 1;
 850       ready_cnt.at_put(m->_idx, m_cnt);
 851       if( m_cnt == 0 )
 852         worklist.push(m);
 853     }
 854 
 855   }
 856 
 857   // Act as if the call defines the Frame Pointer.
 858   // Certainly the FP is alive and well after the call.
 859   regs.Insert(_matcher.c_frame_pointer());
 860 
 861   // Set all registers killed and not already defined by the call.
 862   uint r_cnt = mcall->tf()->range()->cnt();
 863   int op = mcall->ideal_Opcode();
 864   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
 865   map_node_to_block(proj, block);
 866   block->insert_node(proj, node_cnt++);
 867 
 868   // Select the right register save policy.
 869   const char *save_policy = NULL;
 870   switch (op) {
 871     case Op_CallRuntime:
 872     case Op_CallLeaf:
 873     case Op_CallLeafNoFP:
 874     case Op_CallLeafVector:
 875       // Calling C code so use C calling convention
 876       save_policy = _matcher._c_reg_save_policy;
 877       break;
 878 
 879     case Op_CallStaticJava:
 880     case Op_CallDynamicJava:
 881       // Calling Java code so use Java calling convention
 882       save_policy = _matcher._register_save_policy;
 883       break;
 884     case Op_CallNative:
 885       // We use the c reg save policy here since Foreign Linker
 886       // only supports the C ABI currently.
 887       // TODO compute actual save policy based on nep->abi
 888       save_policy = _matcher._c_reg_save_policy;
 889       break;
 890 
 891     default:
 892       ShouldNotReachHere();
 893   }
 894 
 895   // When using CallRuntime mark SOE registers as killed by the call
 896   // so values that could show up in the RegisterMap aren't live in a
 897   // callee saved register since the register wouldn't know where to
 898   // find them.  CallLeaf and CallLeafNoFP are ok because they can't
 899   // have debug info on them.  Strictly speaking this only needs to be
 900   // done for oops since idealreg2debugmask takes care of debug info
 901   // references but there no way to handle oops differently than other
 902   // pointers as far as the kill mask goes.
 903   //
 904   // Also, native callees can not save oops, so we kill the SOE registers
 905   // here in case a native call has a safepoint. This doesn't work for
 906   // RBP though, which seems to be special-cased elsewhere to always be
 907   // treated as alive, so we instead manually save the location of RBP
 908   // before doing the native call (see NativeInvokerGenerator::generate).
 909   bool exclude_soe = op == Op_CallRuntime
 910     || (op == Op_CallNative && mcall->guaranteed_safepoint());
 911 
 912   // If the call is a MethodHandle invoke, we need to exclude the
 913   // register which is used to save the SP value over MH invokes from
 914   // the mask.  Otherwise this register could be used for
 915   // deoptimization information.
 916   if (op == Op_CallStaticJava) {
 917     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 918     if (mcallstaticjava->_method_handle_invoke)
 919       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 920   }
 921 
 922   add_call_kills(proj, regs, save_policy, exclude_soe);
 923 
 924   return node_cnt;
 925 }
 926 
 927 
 928 //------------------------------schedule_local---------------------------------
 929 // Topological sort within a block.  Someday become a real scheduler.
 930 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 931   // Already "sorted" are the block start Node (as the first entry), and
 932   // the block-ending Node and any trailing control projections.  We leave
 933   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 934   // Node.  Everything else gets topo-sorted.
 935 
 936 #ifndef PRODUCT
 937     if (trace_opto_pipelining()) {
 938       tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
 939       for (uint i = 0;i < block->number_of_nodes(); i++) {
 940         tty->print("# ");
 941         block->get_node(i)->fast_dump();
 942       }
 943       tty->print_cr("#");
 944     }
 945 #endif
 946 
 947   // RootNode is already sorted
 948   if (block->number_of_nodes() == 1) {
 949     return true;
 950   }
 951 
 952   bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10);
 953 
 954   // We track the uses of local definitions as input dependences so that
 955   // we know when a given instruction is avialable to be scheduled.
 956   uint i;
 957   if (OptoRegScheduling && block_size_threshold_ok) {
 958     for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
 959       Node *n = block->get_node(i);
 960       n->remove_flag(Node::Flag_is_scheduled);
 961       if (!n->is_Phi()) {
 962         recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
 963       }
 964     }
 965   }
 966 
 967   // Move PhiNodes and ParmNodes from 1 to cnt up to the start
 968   uint node_cnt = block->end_idx();
 969   uint phi_cnt = 1;
 970   for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
 971     Node *n = block->get_node(i);
 972     if( n->is_Phi() ||          // Found a PhiNode or ParmNode
 973         (n->is_Proj()  && n->in(0) == block->head()) ) {
 974       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 975       block->map_node(block->get_node(phi_cnt), i);
 976       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 977       if (OptoRegScheduling && block_size_threshold_ok) {
 978         // mark n as scheduled
 979         n->add_flag(Node::Flag_is_scheduled);
 980       }
 981     } else {                    // All others
 982       // Count block-local inputs to 'n'
 983       uint cnt = n->len();      // Input count
 984       uint local = 0;
 985       for( uint j=0; j<cnt; j++ ) {
 986         Node *m = n->in(j);
 987         if( m && get_block_for_node(m) == block && !m->is_top() )
 988           local++;              // One more block-local input
 989       }
 990       ready_cnt.at_put(n->_idx, local); // Count em up
 991 
 992 #ifdef ASSERT
 993       if (UseG1GC) {
 994         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
 995           // Check the precedence edges
 996           for (uint prec = n->req(); prec < n->len(); prec++) {
 997             Node* oop_store = n->in(prec);
 998             if (oop_store != NULL) {
 999               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1000             }
1001           }
1002         }
1003       }
1004 #endif
1005 
1006       // A few node types require changing a required edge to a precedence edge
1007       // before allocation.
1008       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1009           (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1010            n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1011         // MemBarAcquire could be created without Precedent edge.
1012         // del_req() replaces the specified edge with the last input edge
1013         // and then removes the last edge. If the specified edge > number of
1014         // edges the last edge will be moved outside of the input edges array
1015         // and the edge will be lost. This is why this code should be
1016         // executed only when Precedent (== TypeFunc::Parms) edge is present.
1017         Node *x = n->in(TypeFunc::Parms);
1018         if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1019           // Old edge to node within same block will get removed, but no precedence
1020           // edge will get added because it already exists. Update ready count.
1021           int cnt = ready_cnt.at(n->_idx);
1022           assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1023           ready_cnt.at_put(n->_idx, cnt-1);
1024         }
1025         n->del_req(TypeFunc::Parms);
1026         n->add_prec(x);
1027       }
1028     }
1029   }
1030   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1031     ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1032 
1033   // All the prescheduled guys do not hold back internal nodes
1034   uint i3;
1035   for (i3 = 0; i3 < phi_cnt; i3++) {  // For all pre-scheduled
1036     Node *n = block->get_node(i3);       // Get pre-scheduled
1037     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1038       Node* m = n->fast_out(j);
1039       if (get_block_for_node(m) == block) { // Local-block user
1040         int m_cnt = ready_cnt.at(m->_idx)-1;
1041         if (OptoRegScheduling && block_size_threshold_ok) {
1042           // mark m as scheduled
1043           if (m_cnt < 0) {
1044             m->add_flag(Node::Flag_is_scheduled);
1045           }
1046         }
1047         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
1048       }
1049     }
1050   }
1051 
1052   Node_List delay;
1053   // Make a worklist
1054   Node_List worklist;
1055   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
1056     Node *m = block->get_node(i4);
1057     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
1058       if (m->is_iteratively_computed()) {
1059         // Push induction variable increments last to allow other uses
1060         // of the phi to be scheduled first. The select() method breaks
1061         // ties in scheduling by worklist order.
1062         delay.push(m);
1063       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1064         // Force the CreateEx to the top of the list so it's processed
1065         // first and ends up at the start of the block.
1066         worklist.insert(0, m);
1067       } else {
1068         worklist.push(m);         // Then on to worklist!
1069       }
1070     }
1071   }
1072   while (delay.size()) {
1073     Node* d = delay.pop();
1074     worklist.push(d);
1075   }
1076 
1077   if (OptoRegScheduling && block_size_threshold_ok) {
1078     // To stage register pressure calculations we need to examine the live set variables
1079     // breaking them up by register class to compartmentalize the calculations.
1080     _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1081     _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1082     _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1083     _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1084 
1085     _regalloc->compute_entry_block_pressure(block);
1086   }
1087 
1088   // Warm up the 'next_call' heuristic bits
1089   needed_for_next_call(block, block->head(), next_call);
1090 
1091 #ifndef PRODUCT
1092     if (trace_opto_pipelining()) {
1093       for (uint j=0; j< block->number_of_nodes(); j++) {
1094         Node     *n = block->get_node(j);
1095         int     idx = n->_idx;
1096         tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
1097         tty->print("latency:%3d  ", get_latency_for_node(n));
1098         tty->print("%4d: %s\n", idx, n->Name());
1099       }
1100     }
1101 #endif
1102 
1103   uint max_idx = (uint)ready_cnt.length();
1104   // Pull from worklist and schedule
1105   while( worklist.size() ) {    // Worklist is not ready
1106 
1107 #ifndef PRODUCT
1108     if (trace_opto_pipelining()) {
1109       tty->print("#   ready list:");
1110       for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1111         Node *n = worklist[i];      // Get Node on worklist
1112         tty->print(" %d", n->_idx);
1113       }
1114       tty->cr();
1115     }
1116 #endif
1117 
1118     // Select and pop a ready guy from worklist
1119     Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1120     block->map_node(n, phi_cnt++);    // Schedule him next
1121 
1122     if (OptoRegScheduling && block_size_threshold_ok) {
1123       n->add_flag(Node::Flag_is_scheduled);
1124 
1125       // Now adjust the resister pressure with the node we selected
1126       if (!n->is_Phi()) {
1127         adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1128       }
1129     }
1130 
1131 #ifndef PRODUCT
1132     if (trace_opto_pipelining()) {
1133       tty->print("#    select %d: %s", n->_idx, n->Name());
1134       tty->print(", latency:%d", get_latency_for_node(n));
1135       n->dump();
1136       if (Verbose) {
1137         tty->print("#   ready list:");
1138         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1139           Node *n = worklist[i];      // Get Node on worklist
1140           tty->print(" %d", n->_idx);
1141         }
1142         tty->cr();
1143       }
1144     }
1145 
1146 #endif
1147     if( n->is_MachCall() ) {
1148       MachCallNode *mcall = n->as_MachCall();
1149       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1150       continue;
1151     }
1152 
1153     if (n->is_Mach() && n->as_Mach()->has_call()) {
1154       RegMask regs;
1155       regs.Insert(_matcher.c_frame_pointer());
1156       regs.OR(n->out_RegMask());
1157 
1158       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1159       map_node_to_block(proj, block);
1160       block->insert_node(proj, phi_cnt++);
1161 
1162       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1163     }
1164 
1165     // Children are now all ready
1166     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1167       Node* m = n->fast_out(i5); // Get user
1168       if (get_block_for_node(m) != block) {
1169         continue;
1170       }
1171       if( m->is_Phi() ) continue;
1172       if (m->_idx >= max_idx) { // new node, skip it
1173         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1174         continue;
1175       }
1176       int m_cnt = ready_cnt.at(m->_idx) - 1;
1177       ready_cnt.at_put(m->_idx, m_cnt);
1178       if( m_cnt == 0 )
1179         worklist.push(m);
1180     }
1181   }
1182 
1183   if( phi_cnt != block->end_idx() ) {
1184     // did not schedule all.  Retry, Bailout, or Die
1185     if (C->subsume_loads() == true && !C->failing()) {
1186       // Retry with subsume_loads == false
1187       // If this is the first failure, the sentinel string will "stick"
1188       // to the Compile object, and the C2Compiler will see it and retry.
1189       C->record_failure(C2Compiler::retry_no_subsuming_loads());
1190     } else {
1191       assert(false, "graph should be schedulable");
1192     }
1193     // assert( phi_cnt == end_idx(), "did not schedule all" );
1194     return false;
1195   }
1196 
1197   if (OptoRegScheduling && block_size_threshold_ok) {
1198     _regalloc->compute_exit_block_pressure(block);
1199     block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1200     block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1201   }
1202 
1203 #ifndef PRODUCT
1204   if (trace_opto_pipelining()) {
1205     tty->print_cr("#");
1206     tty->print_cr("# after schedule_local");
1207     for (uint i = 0;i < block->number_of_nodes();i++) {
1208       tty->print("# ");
1209       block->get_node(i)->fast_dump();
1210     }
1211     tty->print_cr("# ");
1212 
1213     if (OptoRegScheduling && block_size_threshold_ok) {
1214       tty->print_cr("# pressure info : %d", block->_pre_order);
1215       _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1216       _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1217     }
1218     tty->cr();
1219   }
1220 #endif
1221 
1222   return true;
1223 }
1224 
1225 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1226 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1227   for (uint l = 0; l < use->len(); l++) {
1228     if (use->in(l) == old_def) {
1229       if (l < use->req()) {
1230         use->set_req(l, new_def);
1231       } else {
1232         use->rm_prec(l);
1233         use->add_prec(new_def);
1234         l--;
1235       }
1236     }
1237   }
1238 }
1239 
1240 //------------------------------catch_cleanup_find_cloned_def------------------
1241 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1242   assert( use_blk != def_blk, "Inter-block cleanup only");
1243 
1244   // The use is some block below the Catch.  Find and return the clone of the def
1245   // that dominates the use. If there is no clone in a dominating block, then
1246   // create a phi for the def in a dominating block.
1247 
1248   // Find which successor block dominates this use.  The successor
1249   // blocks must all be single-entry (from the Catch only; I will have
1250   // split blocks to make this so), hence they all dominate.
1251   while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1252     use_blk = use_blk->_idom;
1253 
1254   // Find the successor
1255   Node *fixup = NULL;
1256 
1257   uint j;
1258   for( j = 0; j < def_blk->_num_succs; j++ )
1259     if( use_blk == def_blk->_succs[j] )
1260       break;
1261 
1262   if( j == def_blk->_num_succs ) {
1263     // Block at same level in dom-tree is not a successor.  It needs a
1264     // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1265     Node_Array inputs = new Node_List();
1266     for(uint k = 1; k < use_blk->num_preds(); k++) {
1267       Block* block = get_block_for_node(use_blk->pred(k));
1268       inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1269     }
1270 
1271     // Check to see if the use_blk already has an identical phi inserted.
1272     // If it exists, it will be at the first position since all uses of a
1273     // def are processed together.
1274     Node *phi = use_blk->get_node(1);
1275     if( phi->is_Phi() ) {
1276       fixup = phi;
1277       for (uint k = 1; k < use_blk->num_preds(); k++) {
1278         if (phi->in(k) != inputs[k]) {
1279           // Not a match
1280           fixup = NULL;
1281           break;
1282         }
1283       }
1284     }
1285 
1286     // If an existing PhiNode was not found, make a new one.
1287     if (fixup == NULL) {
1288       Node *new_phi = PhiNode::make(use_blk->head(), def);
1289       use_blk->insert_node(new_phi, 1);
1290       map_node_to_block(new_phi, use_blk);
1291       for (uint k = 1; k < use_blk->num_preds(); k++) {
1292         new_phi->set_req(k, inputs[k]);
1293       }
1294       fixup = new_phi;
1295     }
1296 
1297   } else {
1298     // Found the use just below the Catch.  Make it use the clone.
1299     fixup = use_blk->get_node(n_clone_idx);
1300   }
1301 
1302   return fixup;
1303 }
1304 
1305 //--------------------------catch_cleanup_intra_block--------------------------
1306 // Fix all input edges in use that reference "def".  The use is in the same
1307 // block as the def and both have been cloned in each successor block.
1308 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1309 
1310   // Both the use and def have been cloned. For each successor block,
1311   // get the clone of the use, and make its input the clone of the def
1312   // found in that block.
1313 
1314   uint use_idx = blk->find_node(use);
1315   uint offset_idx = use_idx - beg;
1316   for( uint k = 0; k < blk->_num_succs; k++ ) {
1317     // Get clone in each successor block
1318     Block *sb = blk->_succs[k];
1319     Node *clone = sb->get_node(offset_idx+1);
1320     assert( clone->Opcode() == use->Opcode(), "" );
1321 
1322     // Make use-clone reference the def-clone
1323     catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1324   }
1325 }
1326 
1327 //------------------------------catch_cleanup_inter_block---------------------
1328 // Fix all input edges in use that reference "def".  The use is in a different
1329 // block than the def.
1330 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1331   if( !use_blk ) return;        // Can happen if the use is a precedence edge
1332 
1333   Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1334   catch_cleanup_fix_all_inputs(use, def, new_def);
1335 }
1336 
1337 //------------------------------call_catch_cleanup-----------------------------
1338 // If we inserted any instructions between a Call and his CatchNode,
1339 // clone the instructions on all paths below the Catch.
1340 void PhaseCFG::call_catch_cleanup(Block* block) {
1341 
1342   // End of region to clone
1343   uint end = block->end_idx();
1344   if( !block->get_node(end)->is_Catch() ) return;
1345   // Start of region to clone
1346   uint beg = end;
1347   while(!block->get_node(beg-1)->is_MachProj() ||
1348         !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1349     beg--;
1350     assert(beg > 0,"Catch cleanup walking beyond block boundary");
1351   }
1352   // Range of inserted instructions is [beg, end)
1353   if( beg == end ) return;
1354 
1355   // Clone along all Catch output paths.  Clone area between the 'beg' and
1356   // 'end' indices.
1357   for( uint i = 0; i < block->_num_succs; i++ ) {
1358     Block *sb = block->_succs[i];
1359     // Clone the entire area; ignoring the edge fixup for now.
1360     for( uint j = end; j > beg; j-- ) {
1361       Node *clone = block->get_node(j-1)->clone();
1362       sb->insert_node(clone, 1);
1363       map_node_to_block(clone, sb);
1364       if (clone->needs_anti_dependence_check()) {
1365         insert_anti_dependences(sb, clone);
1366       }
1367     }
1368   }
1369 
1370 
1371   // Fixup edges.  Check the def-use info per cloned Node
1372   for(uint i2 = beg; i2 < end; i2++ ) {
1373     uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1374     Node *n = block->get_node(i2);        // Node that got cloned
1375     // Need DU safe iterator because of edge manipulation in calls.
1376     Unique_Node_List* out = new Unique_Node_List();
1377     for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1378       out->push(n->fast_out(j1));
1379     }
1380     uint max = out->size();
1381     for (uint j = 0; j < max; j++) {// For all users
1382       Node *use = out->pop();
1383       Block *buse = get_block_for_node(use);
1384       if( use->is_Phi() ) {
1385         for( uint k = 1; k < use->req(); k++ )
1386           if( use->in(k) == n ) {
1387             Block* b = get_block_for_node(buse->pred(k));
1388             Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1389             use->set_req(k, fixup);
1390           }
1391       } else {
1392         if (block == buse) {
1393           catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1394         } else {
1395           catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1396         }
1397       }
1398     } // End for all users
1399 
1400   } // End of for all Nodes in cloned area
1401 
1402   // Remove the now-dead cloned ops
1403   for(uint i3 = beg; i3 < end; i3++ ) {
1404     block->get_node(beg)->disconnect_inputs(C);
1405     block->remove_node(beg);
1406   }
1407 
1408   // If the successor blocks have a CreateEx node, move it back to the top
1409   for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1410     Block *sb = block->_succs[i4];
1411     uint new_cnt = end - beg;
1412     // Remove any newly created, but dead, nodes by traversing their schedule
1413     // backwards. Here, a dead node is a node whose only outputs (if any) are
1414     // unused projections.
1415     for (uint j = new_cnt; j > 0; j--) {
1416       Node *n = sb->get_node(j);
1417       // Individual projections are examined together with all siblings when
1418       // their parent is visited.
1419       if (n->is_Proj()) {
1420         continue;
1421       }
1422       bool dead = true;
1423       for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1424         Node* out = n->fast_out(i);
1425         // n is live if it has a non-projection output or a used projection.
1426         if (!out->is_Proj() || out->outcnt() > 0) {
1427           dead = false;
1428           break;
1429         }
1430       }
1431       if (dead) {
1432         // n's only outputs (if any) are unused projections scheduled next to n
1433         // (see PhaseCFG::select()). Remove these projections backwards.
1434         for (uint k = j + n->outcnt(); k > j; k--) {
1435           Node* proj = sb->get_node(k);
1436           assert(proj->is_Proj() && proj->in(0) == n,
1437                  "projection should correspond to dead node");
1438           proj->disconnect_inputs(C);
1439           sb->remove_node(k);
1440           new_cnt--;
1441         }
1442         // Now remove the node itself.
1443         n->disconnect_inputs(C);
1444         sb->remove_node(j);
1445         new_cnt--;
1446       }
1447     }
1448     // If any newly created nodes remain, move the CreateEx node to the top
1449     if (new_cnt > 0) {
1450       Node *cex = sb->get_node(1+new_cnt);
1451       if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1452         sb->remove_node(1+new_cnt);
1453         sb->insert_node(cex, 1);
1454       }
1455     }
1456   }
1457 }