1 /*
  2  * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "opto/ad.hpp"
 27 #include "opto/chaitin.hpp"
 28 #include "opto/compile.hpp"
 29 #include "opto/matcher.hpp"
 30 #include "opto/node.hpp"
 31 #include "opto/regmask.hpp"
 32 #include "utilities/population_count.hpp"
 33 #include "utilities/powerOfTwo.hpp"
 34 
 35 //------------------------------dump-------------------------------------------
 36 
 37 #ifndef PRODUCT
 38 void OptoReg::dump(int r, outputStream *st) {
 39   switch (r) {
 40   case Special: st->print("r---"); break;
 41   case Bad:     st->print("rBAD"); break;
 42   default:
 43     if (r < _last_Mach_Reg) st->print("%s", Matcher::regName[r]);
 44     else st->print("rS%d",r);
 45     break;
 46   }
 47 }
 48 #endif
 49 
 50 
 51 //=============================================================================
 52 const RegMask RegMask::Empty;
 53 
 54 const RegMask RegMask::All(
 55 # define BODY(I) -1,
 56   FORALL_BODY
 57 # undef BODY
 58   0
 59 );
 60 
 61 //=============================================================================
 62 bool RegMask::is_vector(uint ireg) {
 63   return (ireg == Op_VecA || ireg == Op_VecS || ireg == Op_VecD ||
 64           ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ );
 65 }
 66 
 67 int RegMask::num_registers(uint ireg) {
 68   switch(ireg) {
 69     case Op_VecZ:
 70       return SlotsPerVecZ;
 71     case Op_VecY:
 72       return SlotsPerVecY;
 73     case Op_VecX:
 74       return SlotsPerVecX;
 75     case Op_VecD:
 76       return SlotsPerVecD;
 77     case Op_RegVectMask:
 78       return SlotsPerRegVectMask;
 79     case Op_RegD:
 80     case Op_RegL:
 81 #ifdef _LP64
 82     case Op_RegP:
 83 #endif
 84       return 2;
 85     case Op_VecA:
 86       assert(Matcher::supports_scalable_vector(), "does not support scalable vector");
 87       return SlotsPerVecA;
 88     default:
 89       // Op_VecS and the rest ideal registers.
 90       assert(ireg == Op_VecS || !is_vector(ireg), "unexpected, possibly multi-slot register");
 91       return 1;
 92   }
 93 }
 94 
 95 int RegMask::num_registers(uint ireg, LRG &lrg) {
 96   int n_regs = num_registers(ireg);
 97 
 98   // assigned is OptoReg which is selected by register allocator
 99   OptoReg::Name assigned = lrg.reg();
100   assert(OptoReg::is_valid(assigned), "should be valid opto register");
101 
102   if (lrg.is_scalable() && OptoReg::is_stack(assigned)) {
103     n_regs = lrg.scalable_reg_slots();
104   }
105   return n_regs;
106 }
107 
108 static const uintptr_t zero  = uintptr_t(0);  // 0x00..00
109 static const uintptr_t all   = ~uintptr_t(0);  // 0xFF..FF
110 static const uintptr_t fives = all/3;        // 0x5555..55
111 
112 // only indices of power 2 are accessed, so index 3 is only filled in for storage.
113 static const uintptr_t low_bits[5] = { fives, // 0x5555..55
114                                        all/0xF,        // 0x1111..11,
115                                        all/0xFF,       // 0x0101..01,
116                                        zero,           // 0x0000..00
117                                        all/0xFFFF };   // 0x0001..01
118 
119 // Clear out partial bits; leave only bit pairs
120 void RegMask::clear_to_pairs() {
121   assert(valid_watermarks(), "sanity");
122   for (unsigned i = _lwm; i <= _hwm; i++) {
123     uintptr_t bits = _RM_UP[i];
124     bits &= ((bits & fives) << 1U); // 1 hi-bit set for each pair
125     bits |= (bits >> 1U);          // Smear 1 hi-bit into a pair
126     _RM_UP[i] = bits;
127   }
128   assert(is_aligned_pairs(), "mask is not aligned, adjacent pairs");
129 }
130 
131 bool RegMask::is_misaligned_pair() const {
132   return Size() == 2 && !is_aligned_pairs();
133 }
134 
135 bool RegMask::is_aligned_pairs() const {
136   // Assert that the register mask contains only bit pairs.
137   assert(valid_watermarks(), "sanity");
138   for (unsigned i = _lwm; i <= _hwm; i++) {
139     uintptr_t bits = _RM_UP[i];
140     while (bits) {              // Check bits for pairing
141       uintptr_t bit = uintptr_t(1) << find_lowest_bit(bits); // Extract low bit
142       // Low bit is not odd means its mis-aligned.
143       if ((bit & fives) == 0) return false;
144       bits -= bit;              // Remove bit from mask
145       // Check for aligned adjacent bit
146       if ((bits & (bit << 1U)) == 0) return false;
147       bits -= (bit << 1U); // Remove other halve of pair
148     }
149   }
150   return true;
151 }
152 
153 // Return TRUE if the mask contains a single bit
154 bool RegMask::is_bound1() const {
155   if (is_AllStack()) return false;
156 
157   for (unsigned i = _lwm; i <= _hwm; i++) {
158     uintptr_t v = _RM_UP[i];
159     if (v != 0) {
160       // Only one bit allowed -> v must be a power of two
161       if (!is_power_of_2(v)) {
162         return false;
163       }
164 
165       // A single bit was found - check there are no bits in the rest of the mask
166       for (i++; i <= _hwm; i++) {
167         if (_RM_UP[i] != 0) {
168           return false;
169         }
170       }
171       // Done; found a single bit
172       return true;
173     }
174   }
175   // No bit found
176   return false;
177 }
178 
179 // Return TRUE if the mask contains an adjacent pair of bits and no other bits.
180 bool RegMask::is_bound_pair() const {
181   if (is_AllStack()) return false;
182 
183   assert(valid_watermarks(), "sanity");
184   for (unsigned i = _lwm; i <= _hwm; i++) {
185     if (_RM_UP[i] != 0) {               // Found some bits
186       unsigned int bit_index = find_lowest_bit(_RM_UP[i]);
187       if (bit_index != _WordBitMask) {   // Bit pair stays in same word?
188         uintptr_t bit = uintptr_t(1) << bit_index; // Extract lowest bit from mask
189         if ((bit | (bit << 1U)) != _RM_UP[i]) {
190           return false;            // Require adjacent bit pair and no more bits
191         }
192       } else {                     // Else its a split-pair case
193         assert(is_power_of_2(_RM_UP[i]), "invariant");
194         i++;                       // Skip iteration forward
195         if (i > _hwm || _RM_UP[i] != 1) {
196           return false; // Require 1 lo bit in next word
197         }
198       }
199 
200       // A matching pair was found - check there are no bits in the rest of the mask
201       for (i++; i <= _hwm; i++) {
202         if (_RM_UP[i] != 0) {
203           return false;
204         }
205       }
206       // Found a bit pair
207       return true;
208     }
209   }
210   // True for the empty mask, too
211   return true;
212 }
213 
214 // Test for a single adjacent set of ideal register's size.
215 bool RegMask::is_bound(uint ireg) const {
216   if (is_vector(ireg)) {
217     if (is_bound_set(num_registers(ireg)))
218       return true;
219   } else if (is_bound1() || is_bound_pair()) {
220     return true;
221   }
222   return false;
223 }
224 
225 // Check that whether given reg number with size is valid
226 // for current regmask, where reg is the highest number.
227 bool RegMask::is_valid_reg(OptoReg::Name reg, const int size) const {
228   for (int i = 0; i < size; i++) {
229     if (!Member(reg - i)) {
230       return false;
231     }
232   }
233   return true;
234 }
235 
236 // Find the lowest-numbered register set in the mask.  Return the
237 // HIGHEST register number in the set, or BAD if no sets.
238 // Works also for size 1.
239 OptoReg::Name RegMask::find_first_set(LRG &lrg, const int size) const {
240   if (lrg.is_scalable()) {
241     // For scalable vector register, regmask is SlotsPerVecA bits aligned.
242     assert(is_aligned_sets(SlotsPerVecA), "mask is not aligned, adjacent sets");
243   } else {
244     assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
245   }
246   assert(valid_watermarks(), "sanity");
247   for (unsigned i = _lwm; i <= _hwm; i++) {
248     if (_RM_UP[i]) {                // Found some bits
249       // Convert to bit number, return hi bit in pair
250       return OptoReg::Name((i<<_LogWordBits) + find_lowest_bit(_RM_UP[i]) + (size - 1));
251     }
252   }
253   return OptoReg::Bad;
254 }
255 
256 // Clear out partial bits; leave only aligned adjacent bit pairs
257 void RegMask::clear_to_sets(const unsigned int size) {
258   if (size == 1) return;
259   assert(2 <= size && size <= 16, "update low bits table");
260   assert(is_power_of_2(size), "sanity");
261   assert(valid_watermarks(), "sanity");
262   uintptr_t low_bits_mask = low_bits[size >> 2U];
263   for (unsigned i = _lwm; i <= _hwm; i++) {
264     uintptr_t bits = _RM_UP[i];
265     uintptr_t sets = (bits & low_bits_mask);
266     for (unsigned j = 1U; j < size; j++) {
267       sets = (bits & (sets << 1U)); // filter bits which produce whole sets
268     }
269     sets |= (sets >> 1U);           // Smear 1 hi-bit into a set
270     if (size > 2) {
271       sets |= (sets >> 2U);         // Smear 2 hi-bits into a set
272       if (size > 4) {
273         sets |= (sets >> 4U);       // Smear 4 hi-bits into a set
274         if (size > 8) {
275           sets |= (sets >> 8U);     // Smear 8 hi-bits into a set
276         }
277       }
278     }
279     _RM_UP[i] = sets;
280   }
281   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
282 }
283 
284 // Smear out partial bits to aligned adjacent bit sets
285 void RegMask::smear_to_sets(const unsigned int size) {
286   if (size == 1) return;
287   assert(2 <= size && size <= 16, "update low bits table");
288   assert(is_power_of_2(size), "sanity");
289   assert(valid_watermarks(), "sanity");
290   uintptr_t low_bits_mask = low_bits[size >> 2U];
291   for (unsigned i = _lwm; i <= _hwm; i++) {
292     uintptr_t bits = _RM_UP[i];
293     uintptr_t sets = 0;
294     for (unsigned j = 0; j < size; j++) {
295       sets |= (bits & low_bits_mask);  // collect partial bits
296       bits  = bits >> 1U;
297     }
298     sets |= (sets << 1U);           // Smear 1 lo-bit  into a set
299     if (size > 2) {
300       sets |= (sets << 2U);         // Smear 2 lo-bits into a set
301       if (size > 4) {
302         sets |= (sets << 4U);       // Smear 4 lo-bits into a set
303         if (size > 8) {
304           sets |= (sets << 8U);     // Smear 8 lo-bits into a set
305         }
306       }
307     }
308     _RM_UP[i] = sets;
309   }
310   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
311 }
312 
313 // Assert that the register mask contains only bit sets.
314 bool RegMask::is_aligned_sets(const unsigned int size) const {
315   if (size == 1) return true;
316   assert(2 <= size && size <= 16, "update low bits table");
317   assert(is_power_of_2(size), "sanity");
318   uintptr_t low_bits_mask = low_bits[size >> 2U];
319   assert(valid_watermarks(), "sanity");
320   for (unsigned i = _lwm; i <= _hwm; i++) {
321     uintptr_t bits = _RM_UP[i];
322     while (bits) {              // Check bits for pairing
323       uintptr_t bit = uintptr_t(1) << find_lowest_bit(bits);
324       // Low bit is not odd means its mis-aligned.
325       if ((bit & low_bits_mask) == 0) {
326         return false;
327       }
328       // Do extra work since (bit << size) may overflow.
329       uintptr_t hi_bit = bit << (size-1); // high bit
330       uintptr_t set = hi_bit + ((hi_bit-1) & ~(bit-1));
331       // Check for aligned adjacent bits in this set
332       if ((bits & set) != set) {
333         return false;
334       }
335       bits -= set;  // Remove this set
336     }
337   }
338   return true;
339 }
340 
341 // Return TRUE if the mask contains one adjacent set of bits and no other bits.
342 // Works also for size 1.
343 bool RegMask::is_bound_set(const unsigned int size) const {
344   if (is_AllStack()) return false;
345   assert(1 <= size && size <= 16, "update low bits table");
346   assert(valid_watermarks(), "sanity");
347   for (unsigned i = _lwm; i <= _hwm; i++) {
348     if (_RM_UP[i] != 0) {       // Found some bits
349       unsigned bit_index = find_lowest_bit(_RM_UP[i]);
350       uintptr_t bit = uintptr_t(1) << bit_index;
351       if (bit_index + size <= BitsPerWord) { // Bit set stays in same word?
352         uintptr_t hi_bit = bit << (size - 1);
353         uintptr_t set = hi_bit + ((hi_bit-1) & ~(bit-1));
354         if (set != _RM_UP[i]) {
355           return false;         // Require adjacent bit set and no more bits
356         }
357       } else {                  // Else its a split-set case
358         // All bits from bit to highest bit in the word must be set
359         if ((all & ~(bit-1)) != _RM_UP[i]) {
360           return false;
361         }
362         i++;                    // Skip iteration forward and check high part
363         // The lower bits should be 1 since it is split case.
364         uintptr_t set = (bit >> (BitsPerWord - size)) - 1;
365         if (i > _hwm || _RM_UP[i] != set) {
366           return false; // Require expected low bits in next word
367         }
368       }
369 
370       // A matching set found - check there are no bits in the rest of the mask
371       for (i++; i <= _hwm; i++) {
372         if (_RM_UP[i] != 0) {
373           return false;
374         }
375       }
376       // Done - found a bit set
377       return true;
378     }
379   }
380   // True for the empty mask, too
381   return true;
382 }
383 
384 // UP means register only, Register plus stack, or stack only is DOWN
385 bool RegMask::is_UP() const {
386   // Quick common case check for DOWN (any stack slot is legal)
387   if (is_AllStack())
388     return false;
389   // Slower check for any stack bits set (also DOWN)
390   if (overlap(Matcher::STACK_ONLY_mask))
391     return false;
392   // Not DOWN, so must be UP
393   return true;
394 }
395 
396 // Compute size of register mask in bits
397 uint RegMask::Size() const {
398   uint sum = 0;
399   assert(valid_watermarks(), "sanity");
400   for (unsigned i = _lwm; i <= _hwm; i++) {
401     sum += population_count(_RM_UP[i]);
402   }
403   return sum;
404 }
405 
406 #ifndef PRODUCT
407 void RegMask::dump(outputStream *st) const {
408   st->print("[");
409 
410   RegMaskIterator rmi(*this);
411   if (rmi.has_next()) {
412     OptoReg::Name start = rmi.next();
413 
414     OptoReg::dump(start, st);   // Print register
415     OptoReg::Name last = start;
416 
417     // Now I have printed an initial register.
418     // Print adjacent registers as "rX-rZ" instead of "rX,rY,rZ".
419     // Begin looping over the remaining registers.
420     while (rmi.has_next()) {
421       OptoReg::Name reg = rmi.next(); // Get a register
422 
423       if (last + 1 == reg) {      // See if they are adjacent
424         // Adjacent registers just collect into long runs, no printing.
425         last = reg;
426       } else {                  // Ending some kind of run
427         if (start == last) {    // 1-register run; no special printing
428         } else if (start+1 == last) {
429           st->print(",");       // 2-register run; print as "rX,rY"
430           OptoReg::dump(last, st);
431         } else {                // Multi-register run; print as "rX-rZ"
432           st->print("-");
433           OptoReg::dump(last, st);
434         }
435         st->print(",");         // Seperate start of new run
436         start = last = reg;     // Start a new register run
437         OptoReg::dump(start, st); // Print register
438       } // End of if ending a register run or not
439     } // End of while regmask not empty
440 
441     if (start == last) {        // 1-register run; no special printing
442     } else if (start+1 == last) {
443       st->print(",");           // 2-register run; print as "rX,rY"
444       OptoReg::dump(last, st);
445     } else {                    // Multi-register run; print as "rX-rZ"
446       st->print("-");
447       OptoReg::dump(last, st);
448     }
449     if (is_AllStack()) st->print("...");
450   }
451   st->print("]");
452 }
453 #endif