1 /*
   2  * Copyright (c) 2007, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  */
  23 
  24 #include "precompiled.hpp"
  25 #include "memory/allocation.inline.hpp"
  26 #include "opto/connode.hpp"
  27 #include "opto/mulnode.hpp"
  28 #include "opto/subnode.hpp"
  29 #include "opto/vectornode.hpp"
  30 #include "opto/convertnode.hpp"
  31 #include "utilities/powerOfTwo.hpp"
  32 #include "utilities/globalDefinitions.hpp"
  33 
  34 //------------------------------VectorNode--------------------------------------
  35 
  36 // Return the vector operator for the specified scalar operation
  37 // and vector length.
  38 int VectorNode::opcode(int sopc, BasicType bt) {
  39   switch (sopc) {
  40   case Op_AddI:
  41     switch (bt) {
  42     case T_BOOLEAN:
  43     case T_BYTE:      return Op_AddVB;
  44     case T_CHAR:
  45     case T_SHORT:     return Op_AddVS;
  46     case T_INT:       return Op_AddVI;
  47     default:          return 0;
  48     }
  49   case Op_AddL: return (bt == T_LONG   ? Op_AddVL : 0);
  50   case Op_AddF: return (bt == T_FLOAT  ? Op_AddVF : 0);
  51   case Op_AddD: return (bt == T_DOUBLE ? Op_AddVD : 0);
  52 
  53   case Op_SubI:
  54     switch (bt) {
  55     case T_BOOLEAN:
  56     case T_BYTE:   return Op_SubVB;
  57     case T_CHAR:
  58     case T_SHORT:  return Op_SubVS;
  59     case T_INT:    return Op_SubVI;
  60     default:       return 0;
  61     }
  62   case Op_SubL: return (bt == T_LONG   ? Op_SubVL : 0);
  63   case Op_SubF: return (bt == T_FLOAT  ? Op_SubVF : 0);
  64   case Op_SubD: return (bt == T_DOUBLE ? Op_SubVD : 0);
  65 
  66   case Op_MulI:
  67     switch (bt) {
  68     case T_BOOLEAN:return 0;
  69     case T_BYTE:   return Op_MulVB;
  70     case T_CHAR:
  71     case T_SHORT:  return Op_MulVS;
  72     case T_INT:    return Op_MulVI;
  73     default:       return 0;
  74     }
  75   case Op_MulL: return (bt == T_LONG ? Op_MulVL : 0);
  76   case Op_MulF:
  77     return (bt == T_FLOAT ? Op_MulVF : 0);
  78   case Op_MulD:
  79     return (bt == T_DOUBLE ? Op_MulVD : 0);
  80   case Op_FmaD:
  81     return (bt == T_DOUBLE ? Op_FmaVD : 0);
  82   case Op_FmaF:
  83     return (bt == T_FLOAT ? Op_FmaVF : 0);
  84   case Op_CMoveF:
  85     return (bt == T_FLOAT ? Op_CMoveVF : 0);
  86   case Op_CMoveD:
  87     return (bt == T_DOUBLE ? Op_CMoveVD : 0);
  88   case Op_DivF:
  89     return (bt == T_FLOAT ? Op_DivVF : 0);
  90   case Op_DivD:
  91     return (bt == T_DOUBLE ? Op_DivVD : 0);
  92   case Op_AbsI:
  93     switch (bt) {
  94     case T_BOOLEAN:
  95     case T_CHAR:  return 0; // abs does not make sense for unsigned
  96     case T_BYTE:  return Op_AbsVB;
  97     case T_SHORT: return Op_AbsVS;
  98     case T_INT:   return Op_AbsVI;
  99     default:      return 0;
 100     }
 101   case Op_AbsL:
 102     return (bt == T_LONG ? Op_AbsVL : 0);
 103   case Op_MinI:
 104     switch (bt) {
 105     case T_BOOLEAN:
 106     case T_CHAR:   return 0;
 107     case T_BYTE:
 108     case T_SHORT:
 109     case T_INT:    return Op_MinV;
 110     default:       return 0;
 111     }
 112   case Op_MinL:
 113     return (bt == T_LONG ? Op_MinV : 0);
 114   case Op_MinF:
 115     return (bt == T_FLOAT ? Op_MinV : 0);
 116   case Op_MinD:
 117     return (bt == T_DOUBLE ? Op_MinV : 0);
 118   case Op_MaxI:
 119     switch (bt) {
 120     case T_BOOLEAN:
 121     case T_CHAR:   return 0;
 122     case T_BYTE:
 123     case T_SHORT:
 124     case T_INT:    return Op_MaxV;
 125     default:       return 0;
 126     }
 127   case Op_MaxL:
 128     return (bt == T_LONG ? Op_MaxV : 0);
 129   case Op_MaxF:
 130     return (bt == T_FLOAT ? Op_MaxV : 0);
 131   case Op_MaxD:
 132     return (bt == T_DOUBLE ? Op_MaxV : 0);
 133   case Op_AbsF:
 134     return (bt == T_FLOAT ? Op_AbsVF : 0);
 135   case Op_AbsD:
 136     return (bt == T_DOUBLE ? Op_AbsVD : 0);
 137   case Op_NegI:
 138     switch (bt) {
 139       case T_BYTE:
 140       case T_SHORT:
 141       case T_INT: return Op_NegVI;
 142       default: return 0;
 143     }
 144   case Op_NegL:
 145     return (bt == T_LONG ? Op_NegVL : 0);
 146   case Op_NegF:
 147     return (bt == T_FLOAT ? Op_NegVF : 0);
 148   case Op_NegD:
 149     return (bt == T_DOUBLE ? Op_NegVD : 0);
 150   case Op_RoundDoubleMode:
 151     return (bt == T_DOUBLE ? Op_RoundDoubleModeV : 0);
 152   case Op_RotateLeft:
 153     return (is_integral_type(bt) ? Op_RotateLeftV : 0);
 154   case Op_RotateRight:
 155     return (is_integral_type(bt) ? Op_RotateRightV : 0);
 156   case Op_SqrtF:
 157     return (bt == T_FLOAT ? Op_SqrtVF : 0);
 158   case Op_SqrtD:
 159     return (bt == T_DOUBLE ? Op_SqrtVD : 0);
 160   case Op_RoundF:
 161     return (bt == T_INT ? Op_RoundVF : 0);
 162   case Op_RoundD:
 163     return (bt == T_LONG ? Op_RoundVD : 0);
 164   case Op_PopCountI:
 165     // Unimplemented for subword types since bit count changes
 166     // depending on size of lane (and sign bit).
 167     return (bt == T_INT ? Op_PopCountVI : 0);
 168   case Op_PopCountL:
 169     return Op_PopCountVL;
 170   case Op_LShiftI:
 171     switch (bt) {
 172     case T_BOOLEAN:
 173     case T_BYTE:   return Op_LShiftVB;
 174     case T_CHAR:
 175     case T_SHORT:  return Op_LShiftVS;
 176     case T_INT:    return Op_LShiftVI;
 177     default:       return 0;
 178     }
 179   case Op_LShiftL:
 180     return (bt == T_LONG ? Op_LShiftVL : 0);
 181   case Op_RShiftI:
 182     switch (bt) {
 183     case T_BOOLEAN:return Op_URShiftVB; // boolean is unsigned value
 184     case T_CHAR:   return Op_URShiftVS; // char is unsigned value
 185     case T_BYTE:   return Op_RShiftVB;
 186     case T_SHORT:  return Op_RShiftVS;
 187     case T_INT:    return Op_RShiftVI;
 188     default:       return 0;
 189     }
 190   case Op_RShiftL:
 191     return (bt == T_LONG ? Op_RShiftVL : 0);
 192   case Op_URShiftB:
 193     return (bt == T_BYTE ? Op_URShiftVB : 0);
 194   case Op_URShiftS:
 195     return (bt == T_SHORT ? Op_URShiftVS : 0);
 196   case Op_URShiftI:
 197     switch (bt) {
 198     case T_BOOLEAN:return Op_URShiftVB;
 199     case T_CHAR:   return Op_URShiftVS;
 200     case T_BYTE:
 201     case T_SHORT:  return 0; // Vector logical right shift for signed short
 202                              // values produces incorrect Java result for
 203                              // negative data because java code should convert
 204                              // a short value into int value with sign
 205                              // extension before a shift.
 206     case T_INT:    return Op_URShiftVI;
 207     default:       return 0;
 208     }
 209   case Op_URShiftL:
 210     return (bt == T_LONG ? Op_URShiftVL : 0);
 211   case Op_AndI:
 212   case Op_AndL:
 213     return Op_AndV;
 214   case Op_OrI:
 215   case Op_OrL:
 216     return Op_OrV;
 217   case Op_XorI:
 218   case Op_XorL:
 219     return Op_XorV;
 220 
 221   case Op_LoadB:
 222   case Op_LoadUB:
 223   case Op_LoadUS:
 224   case Op_LoadS:
 225   case Op_LoadI:
 226   case Op_LoadL:
 227   case Op_LoadF:
 228   case Op_LoadD:
 229     return Op_LoadVector;
 230 
 231   case Op_StoreB:
 232   case Op_StoreC:
 233   case Op_StoreI:
 234   case Op_StoreL:
 235   case Op_StoreF:
 236   case Op_StoreD:
 237     return Op_StoreVector;
 238   case Op_MulAddS2I:
 239     return Op_MulAddVS2VI;
 240   case Op_ConvI2F:
 241     return Op_VectorCastI2X;
 242   case Op_ConvL2D:
 243     return Op_VectorCastL2X;
 244   case Op_ConvF2I:
 245     return Op_VectorCastF2X;
 246   case Op_ConvD2L:
 247     return Op_VectorCastD2X;
 248 
 249   default:
 250     return 0; // Unimplemented
 251   }
 252 }
 253 
 254 int VectorNode::replicate_opcode(BasicType bt) {
 255   switch(bt) {
 256     case T_BOOLEAN:
 257     case T_BYTE:
 258       return Op_ReplicateB;
 259     case T_SHORT:
 260     case T_CHAR:
 261       return Op_ReplicateS;
 262     case T_INT:
 263       return Op_ReplicateI;
 264     case T_LONG:
 265       return Op_ReplicateL;
 266     case T_FLOAT:
 267       return Op_ReplicateF;
 268     case T_DOUBLE:
 269       return Op_ReplicateD;
 270     default:
 271       assert(false, "wrong type: %s", type2name(bt));
 272       return 0;
 273   }
 274 }
 275 
 276 // Also used to check if the code generator
 277 // supports the vector operation.
 278 bool VectorNode::implemented(int opc, uint vlen, BasicType bt) {
 279   if (is_java_primitive(bt) &&
 280       (vlen > 1) && is_power_of_2(vlen) &&
 281       Matcher::vector_size_supported(bt, vlen)) {
 282     int vopc = VectorNode::opcode(opc, bt);
 283     // For rotate operation we will do a lazy de-generation into
 284     // OrV/LShiftV/URShiftV pattern if the target does not support
 285     // vector rotation instruction.
 286     if (VectorNode::is_vector_rotate(vopc)) {
 287       return is_vector_rotate_supported(vopc, vlen, bt);
 288     }
 289     if (VectorNode::is_vector_integral_negate(vopc)) {
 290       return is_vector_integral_negate_supported(vopc, vlen, bt, false);
 291     }
 292     return vopc > 0 && Matcher::match_rule_supported_vector(vopc, vlen, bt);
 293   }
 294   return false;
 295 }
 296 
 297 bool VectorNode::is_type_transition_short_to_int(Node* n) {
 298   switch (n->Opcode()) {
 299   case Op_MulAddS2I:
 300     return true;
 301   }
 302   return false;
 303 }
 304 
 305 bool VectorNode::is_type_transition_to_int(Node* n) {
 306   return is_type_transition_short_to_int(n);
 307 }
 308 
 309 bool VectorNode::is_muladds2i(Node* n) {
 310   if (n->Opcode() == Op_MulAddS2I) {
 311     return true;
 312   }
 313   return false;
 314 }
 315 
 316 bool VectorNode::is_vpopcnt_long(Node* n) {
 317   if (n->Opcode() == Op_PopCountL) {
 318     return true;
 319   }
 320   return false;
 321 }
 322 
 323 
 324 
 325 
 326 bool VectorNode::is_roundopD(Node* n) {
 327   if (n->Opcode() == Op_RoundDoubleMode) {
 328     return true;
 329   }
 330   return false;
 331 }
 332 
 333 bool VectorNode::is_vector_rotate_supported(int vopc, uint vlen, BasicType bt) {
 334   assert(VectorNode::is_vector_rotate(vopc), "wrong opcode");
 335 
 336   // If target defines vector rotation patterns then no
 337   // need for degeneration.
 338   if (Matcher::match_rule_supported_vector(vopc, vlen, bt)) {
 339     return true;
 340   }
 341 
 342   // If target does not support variable shift operations then no point
 343   // in creating a rotate vector node since it will not be disintegratable.
 344   // Adding a pessimistic check to avoid complex pattern matching which
 345   // may not be full proof.
 346   if (!Matcher::supports_vector_variable_shifts()) {
 347      return false;
 348   }
 349 
 350   // Validate existence of nodes created in case of rotate degeneration.
 351   switch (bt) {
 352     case T_INT:
 353       return Matcher::match_rule_supported_vector(Op_OrV,       vlen, bt) &&
 354              Matcher::match_rule_supported_vector(Op_LShiftVI,  vlen, bt) &&
 355              Matcher::match_rule_supported_vector(Op_URShiftVI, vlen, bt);
 356     case T_LONG:
 357       return Matcher::match_rule_supported_vector(Op_OrV,       vlen, bt) &&
 358              Matcher::match_rule_supported_vector(Op_LShiftVL,  vlen, bt) &&
 359              Matcher::match_rule_supported_vector(Op_URShiftVL, vlen, bt);
 360     default:
 361       assert(false, "not supported: %s", type2name(bt));
 362       return false;
 363   }
 364 }
 365 
 366 // Check whether the architecture supports the vector negate instructions. If not, then check
 367 // whether the alternative vector nodes used to implement vector negation are supported.
 368 // Return false if neither of them is supported.
 369 bool VectorNode::is_vector_integral_negate_supported(int opc, uint vlen, BasicType bt, bool use_predicate) {
 370   if (!use_predicate) {
 371     // Check whether the NegVI/L is supported by the architecture.
 372     if (Matcher::match_rule_supported_vector(opc, vlen, bt)) {
 373       return true;
 374     }
 375     // Negate is implemented with "(SubVI/L (ReplicateI/L 0) src)", if NegVI/L is not supported.
 376     int sub_opc = (bt == T_LONG) ? Op_SubL : Op_SubI;
 377     if (Matcher::match_rule_supported_vector(VectorNode::opcode(sub_opc, bt), vlen, bt) &&
 378         Matcher::match_rule_supported_vector(VectorNode::replicate_opcode(bt), vlen, bt)) {
 379       return true;
 380     }
 381   } else {
 382     // Check whether the predicated NegVI/L is supported by the architecture.
 383     if (Matcher::match_rule_supported_vector_masked(opc, vlen, bt)) {
 384       return true;
 385     }
 386     // Predicated negate is implemented with "(AddVI/L (XorV src (ReplicateI/L -1)) (ReplicateI/L 1))",
 387     // if predicated NegVI/L is not supported.
 388     int add_opc = (bt == T_LONG) ? Op_AddL : Op_AddI;
 389     if (Matcher::match_rule_supported_vector_masked(Op_XorV, vlen, bt) &&
 390         Matcher::match_rule_supported_vector_masked(VectorNode::opcode(add_opc, bt), vlen, bt) &&
 391         Matcher::match_rule_supported_vector(VectorNode::replicate_opcode(bt), vlen, bt)) {
 392       return true;
 393     }
 394   }
 395   return false;
 396 }
 397 
 398 bool VectorNode::is_shift_opcode(int opc) {
 399   switch (opc) {
 400   case Op_LShiftI:
 401   case Op_LShiftL:
 402   case Op_RShiftI:
 403   case Op_RShiftL:
 404   case Op_URShiftB:
 405   case Op_URShiftS:
 406   case Op_URShiftI:
 407   case Op_URShiftL:
 408     return true;
 409   default:
 410     return false;
 411   }
 412 }
 413 
 414 bool VectorNode::is_shift(Node* n) {
 415   return is_shift_opcode(n->Opcode());
 416 }
 417 
 418 bool VectorNode::is_rotate_opcode(int opc) {
 419   switch (opc) {
 420   case Op_RotateRight:
 421   case Op_RotateLeft:
 422     return true;
 423   default:
 424     return false;
 425   }
 426 }
 427 
 428 bool VectorNode::is_scalar_rotate(Node* n) {
 429   if (is_rotate_opcode(n->Opcode())) {
 430     return true;
 431   }
 432   return false;
 433 }
 434 
 435 bool VectorNode::is_vshift_cnt_opcode(int opc) {
 436   switch (opc) {
 437   case Op_LShiftCntV:
 438   case Op_RShiftCntV:
 439     return true;
 440   default:
 441     return false;
 442   }
 443 }
 444 
 445 bool VectorNode::is_vshift_cnt(Node* n) {
 446   return is_vshift_cnt_opcode(n->Opcode());
 447 }
 448 
 449 // Check if input is loop invariant vector.
 450 bool VectorNode::is_invariant_vector(Node* n) {
 451   // Only Replicate vector nodes are loop invariant for now.
 452   switch (n->Opcode()) {
 453   case Op_ReplicateB:
 454   case Op_ReplicateS:
 455   case Op_ReplicateI:
 456   case Op_ReplicateL:
 457   case Op_ReplicateF:
 458   case Op_ReplicateD:
 459     return true;
 460   default:
 461     return false;
 462   }
 463 }
 464 
 465 // [Start, end) half-open range defining which operands are vectors
 466 void VectorNode::vector_operands(Node* n, uint* start, uint* end) {
 467   switch (n->Opcode()) {
 468   case Op_LoadB:   case Op_LoadUB:
 469   case Op_LoadS:   case Op_LoadUS:
 470   case Op_LoadI:   case Op_LoadL:
 471   case Op_LoadF:   case Op_LoadD:
 472   case Op_LoadP:   case Op_LoadN:
 473     *start = 0;
 474     *end   = 0; // no vector operands
 475     break;
 476   case Op_StoreB:  case Op_StoreC:
 477   case Op_StoreI:  case Op_StoreL:
 478   case Op_StoreF:  case Op_StoreD:
 479   case Op_StoreP:  case Op_StoreN:
 480     *start = MemNode::ValueIn;
 481     *end   = MemNode::ValueIn + 1; // 1 vector operand
 482     break;
 483   case Op_LShiftI:  case Op_LShiftL:
 484   case Op_RShiftI:  case Op_RShiftL:
 485   case Op_URShiftI: case Op_URShiftL:
 486     *start = 1;
 487     *end   = 2; // 1 vector operand
 488     break;
 489   case Op_AddI: case Op_AddL: case Op_AddF: case Op_AddD:
 490   case Op_SubI: case Op_SubL: case Op_SubF: case Op_SubD:
 491   case Op_MulI: case Op_MulL: case Op_MulF: case Op_MulD:
 492   case Op_DivF: case Op_DivD:
 493   case Op_AndI: case Op_AndL:
 494   case Op_OrI:  case Op_OrL:
 495   case Op_XorI: case Op_XorL:
 496   case Op_MulAddS2I:
 497     *start = 1;
 498     *end   = 3; // 2 vector operands
 499     break;
 500   case Op_CMoveI:  case Op_CMoveL:  case Op_CMoveF:  case Op_CMoveD:
 501     *start = 2;
 502     *end   = n->req();
 503     break;
 504   case Op_FmaD:
 505   case Op_FmaF:
 506     *start = 1;
 507     *end   = 4; // 3 vector operands
 508     break;
 509   default:
 510     *start = 1;
 511     *end   = n->req(); // default is all operands
 512   }
 513 }
 514 
 515 VectorNode* VectorNode::make_mask_node(int vopc, Node* n1, Node* n2, uint vlen, BasicType bt) {
 516   guarantee(vopc > 0, "vopc must be > 0");
 517   const TypeVect* vmask_type = TypeVect::makemask(bt, vlen);
 518   switch (vopc) {
 519     case Op_AndV:
 520       if (Matcher::match_rule_supported_vector_masked(Op_AndVMask, vlen, bt)) {
 521         return new AndVMaskNode(n1, n2, vmask_type);
 522       }
 523       return new AndVNode(n1, n2, vmask_type);
 524     case Op_OrV:
 525       if (Matcher::match_rule_supported_vector_masked(Op_OrVMask, vlen, bt)) {
 526         return new OrVMaskNode(n1, n2, vmask_type);
 527       }
 528       return new OrVNode(n1, n2, vmask_type);
 529     case Op_XorV:
 530       if (Matcher::match_rule_supported_vector_masked(Op_XorVMask, vlen, bt)) {
 531         return new XorVMaskNode(n1, n2, vmask_type);
 532       }
 533       return new XorVNode(n1, n2, vmask_type);
 534     default:
 535       fatal("Unsupported mask vector creation for '%s'", NodeClassNames[vopc]);
 536       return NULL;
 537   }
 538 }
 539 
 540 // Make a vector node for binary operation
 541 VectorNode* VectorNode::make(int vopc, Node* n1, Node* n2, const TypeVect* vt, bool is_mask, bool is_var_shift) {
 542   // This method should not be called for unimplemented vectors.
 543   guarantee(vopc > 0, "vopc must be > 0");
 544 
 545   if (is_mask) {
 546     return make_mask_node(vopc, n1, n2, vt->length(), vt->element_basic_type());
 547   }
 548 
 549   switch (vopc) {
 550   case Op_AddVB: return new AddVBNode(n1, n2, vt);
 551   case Op_AddVS: return new AddVSNode(n1, n2, vt);
 552   case Op_AddVI: return new AddVINode(n1, n2, vt);
 553   case Op_AddVL: return new AddVLNode(n1, n2, vt);
 554   case Op_AddVF: return new AddVFNode(n1, n2, vt);
 555   case Op_AddVD: return new AddVDNode(n1, n2, vt);
 556 
 557   case Op_SubVB: return new SubVBNode(n1, n2, vt);
 558   case Op_SubVS: return new SubVSNode(n1, n2, vt);
 559   case Op_SubVI: return new SubVINode(n1, n2, vt);
 560   case Op_SubVL: return new SubVLNode(n1, n2, vt);
 561   case Op_SubVF: return new SubVFNode(n1, n2, vt);
 562   case Op_SubVD: return new SubVDNode(n1, n2, vt);
 563 
 564   case Op_MulVB: return new MulVBNode(n1, n2, vt);
 565   case Op_MulVS: return new MulVSNode(n1, n2, vt);
 566   case Op_MulVI: return new MulVINode(n1, n2, vt);
 567   case Op_MulVL: return new MulVLNode(n1, n2, vt);
 568   case Op_MulVF: return new MulVFNode(n1, n2, vt);
 569   case Op_MulVD: return new MulVDNode(n1, n2, vt);
 570 
 571   case Op_DivVF: return new DivVFNode(n1, n2, vt);
 572   case Op_DivVD: return new DivVDNode(n1, n2, vt);
 573 
 574   case Op_MinV: return new MinVNode(n1, n2, vt);
 575   case Op_MaxV: return new MaxVNode(n1, n2, vt);
 576 
 577   case Op_AbsVF: return new AbsVFNode(n1, vt);
 578   case Op_AbsVD: return new AbsVDNode(n1, vt);
 579   case Op_AbsVB: return new AbsVBNode(n1, vt);
 580   case Op_AbsVS: return new AbsVSNode(n1, vt);
 581   case Op_AbsVI: return new AbsVINode(n1, vt);
 582   case Op_AbsVL: return new AbsVLNode(n1, vt);
 583 
 584   case Op_NegVI: return new NegVINode(n1, vt);
 585   case Op_NegVL: return new NegVLNode(n1, vt);
 586   case Op_NegVF: return new NegVFNode(n1, vt);
 587   case Op_NegVD: return new NegVDNode(n1, vt);
 588 
 589   case Op_SqrtVF: return new SqrtVFNode(n1, vt);
 590   case Op_SqrtVD: return new SqrtVDNode(n1, vt);
 591 
 592   case Op_RoundVF: return new RoundVFNode(n1, vt);
 593   case Op_RoundVD: return new RoundVDNode(n1, vt);
 594 
 595   case Op_PopCountVI: return new PopCountVINode(n1, vt);
 596   case Op_PopCountVL: return new PopCountVLNode(n1, vt);
 597   case Op_RotateLeftV: return new RotateLeftVNode(n1, n2, vt);
 598   case Op_RotateRightV: return new RotateRightVNode(n1, n2, vt);
 599 
 600   case Op_LShiftVB: return new LShiftVBNode(n1, n2, vt, is_var_shift);
 601   case Op_LShiftVS: return new LShiftVSNode(n1, n2, vt, is_var_shift);
 602   case Op_LShiftVI: return new LShiftVINode(n1, n2, vt, is_var_shift);
 603   case Op_LShiftVL: return new LShiftVLNode(n1, n2, vt, is_var_shift);
 604 
 605   case Op_RShiftVB: return new RShiftVBNode(n1, n2, vt, is_var_shift);
 606   case Op_RShiftVS: return new RShiftVSNode(n1, n2, vt, is_var_shift);
 607   case Op_RShiftVI: return new RShiftVINode(n1, n2, vt, is_var_shift);
 608   case Op_RShiftVL: return new RShiftVLNode(n1, n2, vt, is_var_shift);
 609 
 610   case Op_URShiftVB: return new URShiftVBNode(n1, n2, vt, is_var_shift);
 611   case Op_URShiftVS: return new URShiftVSNode(n1, n2, vt, is_var_shift);
 612   case Op_URShiftVI: return new URShiftVINode(n1, n2, vt, is_var_shift);
 613   case Op_URShiftVL: return new URShiftVLNode(n1, n2, vt, is_var_shift);
 614 
 615   case Op_AndV: return new AndVNode(n1, n2, vt);
 616   case Op_OrV:  return new OrVNode (n1, n2, vt);
 617   case Op_XorV: return new XorVNode(n1, n2, vt);
 618 
 619   case Op_RoundDoubleModeV: return new RoundDoubleModeVNode(n1, n2, vt);
 620 
 621   case Op_MulAddVS2VI: return new MulAddVS2VINode(n1, n2, vt);
 622   default:
 623     fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
 624     return NULL;
 625   }
 626 }
 627 
 628 // Return the vector version of a scalar binary operation node.
 629 VectorNode* VectorNode::make(int opc, Node* n1, Node* n2, uint vlen, BasicType bt, bool is_var_shift) {
 630   const TypeVect* vt = TypeVect::make(bt, vlen);
 631   int vopc = VectorNode::opcode(opc, bt);
 632   // This method should not be called for unimplemented vectors.
 633   guarantee(vopc > 0, "Vector for '%s' is not implemented", NodeClassNames[opc]);
 634   return make(vopc, n1, n2, vt, false, is_var_shift);
 635 }
 636 
 637 // Make a vector node for ternary operation
 638 VectorNode* VectorNode::make(int vopc, Node* n1, Node* n2, Node* n3, const TypeVect* vt) {
 639   // This method should not be called for unimplemented vectors.
 640   guarantee(vopc > 0, "vopc must be > 0");
 641   switch (vopc) {
 642   case Op_FmaVD: return new FmaVDNode(n1, n2, n3, vt);
 643   case Op_FmaVF: return new FmaVFNode(n1, n2, n3, vt);
 644   default:
 645     fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
 646     return NULL;
 647   }
 648 }
 649 
 650 // Return the vector version of a scalar ternary operation node.
 651 VectorNode* VectorNode::make(int opc, Node* n1, Node* n2, Node* n3, uint vlen, BasicType bt) {
 652   const TypeVect* vt = TypeVect::make(bt, vlen);
 653   int vopc = VectorNode::opcode(opc, bt);
 654   // This method should not be called for unimplemented vectors.
 655   guarantee(vopc > 0, "Vector for '%s' is not implemented", NodeClassNames[opc]);
 656   return make(vopc, n1, n2, n3, vt);
 657 }
 658 
 659 // Scalar promotion
 660 VectorNode* VectorNode::scalar2vector(Node* s, uint vlen, const Type* opd_t, bool is_mask) {
 661   BasicType bt = opd_t->array_element_basic_type();
 662   if (is_mask && Matcher::match_rule_supported_vector(Op_MaskAll, vlen, bt)) {
 663     const TypeVect* vt = TypeVect::make(opd_t, vlen, true);
 664     return new MaskAllNode(s, vt);
 665   }
 666 
 667   const TypeVect* vt = opd_t->singleton() ? TypeVect::make(opd_t, vlen)
 668                                           : TypeVect::make(bt, vlen);
 669   switch (bt) {
 670   case T_BOOLEAN:
 671   case T_BYTE:
 672     return new ReplicateBNode(s, vt);
 673   case T_CHAR:
 674   case T_SHORT:
 675     return new ReplicateSNode(s, vt);
 676   case T_INT:
 677     return new ReplicateINode(s, vt);
 678   case T_LONG:
 679     return new ReplicateLNode(s, vt);
 680   case T_FLOAT:
 681     return new ReplicateFNode(s, vt);
 682   case T_DOUBLE:
 683     return new ReplicateDNode(s, vt);
 684   default:
 685     fatal("Type '%s' is not supported for vectors", type2name(bt));
 686     return NULL;
 687   }
 688 }
 689 
 690 VectorNode* VectorNode::shift_count(int opc, Node* cnt, uint vlen, BasicType bt) {
 691   // Match shift count type with shift vector type.
 692   const TypeVect* vt = TypeVect::make(bt, vlen);
 693   switch (opc) {
 694   case Op_LShiftI:
 695   case Op_LShiftL:
 696     return new LShiftCntVNode(cnt, vt);
 697   case Op_RShiftI:
 698   case Op_RShiftL:
 699   case Op_URShiftB:
 700   case Op_URShiftS:
 701   case Op_URShiftI:
 702   case Op_URShiftL:
 703     return new RShiftCntVNode(cnt, vt);
 704   default:
 705     fatal("Missed vector creation for '%s'", NodeClassNames[opc]);
 706     return NULL;
 707   }
 708 }
 709 
 710 bool VectorNode::is_vector_rotate(int opc) {
 711   switch (opc) {
 712   case Op_RotateLeftV:
 713   case Op_RotateRightV:
 714     return true;
 715   default:
 716     return false;
 717   }
 718 }
 719 
 720 bool VectorNode::is_vector_integral_negate(int opc) {
 721   return opc == Op_NegVI || opc == Op_NegVL;
 722 }
 723 
 724 bool VectorNode::is_vector_shift(int opc) {
 725   assert(opc > _last_machine_leaf && opc < _last_opcode, "invalid opcode");
 726   switch (opc) {
 727   case Op_LShiftVB:
 728   case Op_LShiftVS:
 729   case Op_LShiftVI:
 730   case Op_LShiftVL:
 731   case Op_RShiftVB:
 732   case Op_RShiftVS:
 733   case Op_RShiftVI:
 734   case Op_RShiftVL:
 735   case Op_URShiftVB:
 736   case Op_URShiftVS:
 737   case Op_URShiftVI:
 738   case Op_URShiftVL:
 739     return true;
 740   default:
 741     return false;
 742   }
 743 }
 744 
 745 bool VectorNode::is_vector_shift_count(int opc) {
 746   assert(opc > _last_machine_leaf && opc < _last_opcode, "invalid opcode");
 747   switch (opc) {
 748   case Op_RShiftCntV:
 749   case Op_LShiftCntV:
 750     return true;
 751   default:
 752     return false;
 753   }
 754 }
 755 
 756 static bool is_con_M1(Node* n) {
 757   if (n->is_Con()) {
 758     const Type* t = n->bottom_type();
 759     if (t->isa_int() && t->is_int()->get_con() == -1) {
 760       return true;
 761     }
 762     if (t->isa_long() && t->is_long()->get_con() == -1) {
 763       return true;
 764     }
 765   }
 766   return false;
 767 }
 768 
 769 bool VectorNode::is_all_ones_vector(Node* n) {
 770   switch (n->Opcode()) {
 771   case Op_ReplicateB:
 772   case Op_ReplicateS:
 773   case Op_ReplicateI:
 774   case Op_ReplicateL:
 775     return is_con_M1(n->in(1));
 776   default:
 777     return false;
 778   }
 779 }
 780 
 781 bool VectorNode::is_vector_bitwise_not_pattern(Node* n) {
 782   if (n->Opcode() == Op_XorV) {
 783     return is_all_ones_vector(n->in(1)) ||
 784            is_all_ones_vector(n->in(2));
 785   }
 786   return false;
 787 }
 788 
 789 // Return initial Pack node. Additional operands added with add_opd() calls.
 790 PackNode* PackNode::make(Node* s, uint vlen, BasicType bt) {
 791   const TypeVect* vt = TypeVect::make(bt, vlen);
 792   switch (bt) {
 793   case T_BOOLEAN:
 794   case T_BYTE:
 795     return new PackBNode(s, vt);
 796   case T_CHAR:
 797   case T_SHORT:
 798     return new PackSNode(s, vt);
 799   case T_INT:
 800     return new PackINode(s, vt);
 801   case T_LONG:
 802     return new PackLNode(s, vt);
 803   case T_FLOAT:
 804     return new PackFNode(s, vt);
 805   case T_DOUBLE:
 806     return new PackDNode(s, vt);
 807   default:
 808     fatal("Type '%s' is not supported for vectors", type2name(bt));
 809     return NULL;
 810   }
 811 }
 812 
 813 // Create a binary tree form for Packs. [lo, hi) (half-open) range
 814 PackNode* PackNode::binary_tree_pack(int lo, int hi) {
 815   int ct = hi - lo;
 816   assert(is_power_of_2(ct), "power of 2");
 817   if (ct == 2) {
 818     PackNode* pk = PackNode::make(in(lo), 2, vect_type()->element_basic_type());
 819     pk->add_opd(in(lo+1));
 820     return pk;
 821   } else {
 822     int mid = lo + ct/2;
 823     PackNode* n1 = binary_tree_pack(lo,  mid);
 824     PackNode* n2 = binary_tree_pack(mid, hi );
 825 
 826     BasicType bt = n1->vect_type()->element_basic_type();
 827     assert(bt == n2->vect_type()->element_basic_type(), "should be the same");
 828     switch (bt) {
 829     case T_BOOLEAN:
 830     case T_BYTE:
 831       return new PackSNode(n1, n2, TypeVect::make(T_SHORT, 2));
 832     case T_CHAR:
 833     case T_SHORT:
 834       return new PackINode(n1, n2, TypeVect::make(T_INT, 2));
 835     case T_INT:
 836       return new PackLNode(n1, n2, TypeVect::make(T_LONG, 2));
 837     case T_LONG:
 838       return new Pack2LNode(n1, n2, TypeVect::make(T_LONG, 2));
 839     case T_FLOAT:
 840       return new PackDNode(n1, n2, TypeVect::make(T_DOUBLE, 2));
 841     case T_DOUBLE:
 842       return new Pack2DNode(n1, n2, TypeVect::make(T_DOUBLE, 2));
 843     default:
 844       fatal("Type '%s' is not supported for vectors", type2name(bt));
 845       return NULL;
 846     }
 847   }
 848 }
 849 
 850 // Return the vector version of a scalar load node.
 851 LoadVectorNode* LoadVectorNode::make(int opc, Node* ctl, Node* mem,
 852                                      Node* adr, const TypePtr* atyp,
 853                                      uint vlen, BasicType bt,
 854                                      ControlDependency control_dependency) {
 855   const TypeVect* vt = TypeVect::make(bt, vlen);
 856   return new LoadVectorNode(ctl, mem, adr, atyp, vt, control_dependency);
 857 }
 858 
 859 // Return the vector version of a scalar store node.
 860 StoreVectorNode* StoreVectorNode::make(int opc, Node* ctl, Node* mem,
 861                                        Node* adr, const TypePtr* atyp, Node* val,
 862                                        uint vlen) {
 863   return new StoreVectorNode(ctl, mem, adr, atyp, val);
 864 }
 865 
 866 Node* LoadVectorMaskedNode::Ideal(PhaseGVN* phase, bool can_reshape) {
 867   if (!in(3)->is_top() && in(3)->Opcode() == Op_VectorMaskGen) {
 868     Node* mask_len = in(3)->in(1);
 869     const TypeLong* ty = phase->type(mask_len)->isa_long();
 870     if (ty && ty->is_con()) {
 871       BasicType mask_bt = Matcher::vector_element_basic_type(in(3));
 872       int load_sz = type2aelembytes(mask_bt) * ty->get_con();
 873       assert(load_sz <= MaxVectorSize, "Unexpected load size");
 874       if (load_sz == MaxVectorSize) {
 875         Node* ctr = in(MemNode::Control);
 876         Node* mem = in(MemNode::Memory);
 877         Node* adr = in(MemNode::Address);
 878         return phase->transform(new LoadVectorNode(ctr, mem, adr, adr_type(), vect_type()));
 879       }
 880     }
 881   }
 882   return NULL;
 883 }
 884 
 885 Node* StoreVectorMaskedNode::Ideal(PhaseGVN* phase, bool can_reshape) {
 886   if (!in(4)->is_top() && in(4)->Opcode() == Op_VectorMaskGen) {
 887     Node* mask_len = in(4)->in(1);
 888     const TypeLong* ty = phase->type(mask_len)->isa_long();
 889     if (ty && ty->is_con()) {
 890       BasicType mask_bt = Matcher::vector_element_basic_type(in(4));
 891       int load_sz = type2aelembytes(mask_bt) * ty->get_con();
 892       assert(load_sz <= MaxVectorSize, "Unexpected store size");
 893       if (load_sz == MaxVectorSize) {
 894         Node* ctr = in(MemNode::Control);
 895         Node* mem = in(MemNode::Memory);
 896         Node* adr = in(MemNode::Address);
 897         Node* val = in(MemNode::ValueIn);
 898         return phase->transform(new StoreVectorNode(ctr, mem, adr, adr_type(), val));
 899       }
 900     }
 901   }
 902   return NULL;
 903 }
 904 
 905 int ExtractNode::opcode(BasicType bt) {
 906   switch (bt) {
 907     case T_BOOLEAN: return Op_ExtractUB;
 908     case T_BYTE:    return Op_ExtractB;
 909     case T_CHAR:    return Op_ExtractC;
 910     case T_SHORT:   return Op_ExtractS;
 911     case T_INT:     return Op_ExtractI;
 912     case T_LONG:    return Op_ExtractL;
 913     case T_FLOAT:   return Op_ExtractF;
 914     case T_DOUBLE:  return Op_ExtractD;
 915     default:
 916       assert(false, "wrong type: %s", type2name(bt));
 917       return 0;
 918   }
 919 }
 920 
 921 // Extract a scalar element of vector.
 922 Node* ExtractNode::make(Node* v, uint position, BasicType bt) {
 923   assert((int)position < Matcher::max_vector_size(bt), "pos in range");
 924   ConINode* pos = ConINode::make((int)position);
 925   switch (bt) {
 926   case T_BOOLEAN: return new ExtractUBNode(v, pos);
 927   case T_BYTE:    return new ExtractBNode(v, pos);
 928   case T_CHAR:    return new ExtractCNode(v, pos);
 929   case T_SHORT:   return new ExtractSNode(v, pos);
 930   case T_INT:     return new ExtractINode(v, pos);
 931   case T_LONG:    return new ExtractLNode(v, pos);
 932   case T_FLOAT:   return new ExtractFNode(v, pos);
 933   case T_DOUBLE:  return new ExtractDNode(v, pos);
 934   default:
 935     assert(false, "wrong type: %s", type2name(bt));
 936     return NULL;
 937   }
 938 }
 939 
 940 int ReductionNode::opcode(int opc, BasicType bt) {
 941   int vopc = opc;
 942   switch (opc) {
 943     case Op_AddI:
 944       switch (bt) {
 945         case T_BOOLEAN:
 946         case T_CHAR: return 0;
 947         case T_BYTE:
 948         case T_SHORT:
 949         case T_INT:
 950           vopc = Op_AddReductionVI;
 951           break;
 952         default: ShouldNotReachHere(); return 0;
 953       }
 954       break;
 955     case Op_AddL:
 956       assert(bt == T_LONG, "must be");
 957       vopc = Op_AddReductionVL;
 958       break;
 959     case Op_AddF:
 960       assert(bt == T_FLOAT, "must be");
 961       vopc = Op_AddReductionVF;
 962       break;
 963     case Op_AddD:
 964       assert(bt == T_DOUBLE, "must be");
 965       vopc = Op_AddReductionVD;
 966       break;
 967     case Op_MulI:
 968       switch (bt) {
 969         case T_BOOLEAN:
 970         case T_CHAR: return 0;
 971         case T_BYTE:
 972         case T_SHORT:
 973         case T_INT:
 974           vopc = Op_MulReductionVI;
 975           break;
 976         default: ShouldNotReachHere(); return 0;
 977       }
 978       break;
 979     case Op_MulL:
 980       assert(bt == T_LONG, "must be");
 981       vopc = Op_MulReductionVL;
 982       break;
 983     case Op_MulF:
 984       assert(bt == T_FLOAT, "must be");
 985       vopc = Op_MulReductionVF;
 986       break;
 987     case Op_MulD:
 988       assert(bt == T_DOUBLE, "must be");
 989       vopc = Op_MulReductionVD;
 990       break;
 991     case Op_MinI:
 992       switch (bt) {
 993         case T_BOOLEAN:
 994         case T_CHAR: return 0;
 995         case T_BYTE:
 996         case T_SHORT:
 997         case T_INT:
 998           vopc = Op_MinReductionV;
 999           break;
1000         default: ShouldNotReachHere(); return 0;
1001       }
1002       break;
1003     case Op_MinL:
1004       assert(bt == T_LONG, "must be");
1005       vopc = Op_MinReductionV;
1006       break;
1007     case Op_MinF:
1008       assert(bt == T_FLOAT, "must be");
1009       vopc = Op_MinReductionV;
1010       break;
1011     case Op_MinD:
1012       assert(bt == T_DOUBLE, "must be");
1013       vopc = Op_MinReductionV;
1014       break;
1015     case Op_MaxI:
1016       switch (bt) {
1017         case T_BOOLEAN:
1018         case T_CHAR: return 0;
1019         case T_BYTE:
1020         case T_SHORT:
1021         case T_INT:
1022           vopc = Op_MaxReductionV;
1023           break;
1024         default: ShouldNotReachHere(); return 0;
1025       }
1026       break;
1027     case Op_MaxL:
1028       assert(bt == T_LONG, "must be");
1029       vopc = Op_MaxReductionV;
1030       break;
1031     case Op_MaxF:
1032       assert(bt == T_FLOAT, "must be");
1033       vopc = Op_MaxReductionV;
1034       break;
1035     case Op_MaxD:
1036       assert(bt == T_DOUBLE, "must be");
1037       vopc = Op_MaxReductionV;
1038       break;
1039     case Op_AndI:
1040       switch (bt) {
1041       case T_BOOLEAN:
1042       case T_CHAR: return 0;
1043       case T_BYTE:
1044       case T_SHORT:
1045       case T_INT:
1046         vopc = Op_AndReductionV;
1047         break;
1048       default: ShouldNotReachHere(); return 0;
1049       }
1050       break;
1051     case Op_AndL:
1052       assert(bt == T_LONG, "must be");
1053       vopc = Op_AndReductionV;
1054       break;
1055     case Op_OrI:
1056       switch(bt) {
1057       case T_BOOLEAN:
1058       case T_CHAR: return 0;
1059       case T_BYTE:
1060       case T_SHORT:
1061       case T_INT:
1062         vopc = Op_OrReductionV;
1063         break;
1064       default: ShouldNotReachHere(); return 0;
1065       }
1066       break;
1067     case Op_OrL:
1068       assert(bt == T_LONG, "must be");
1069       vopc = Op_OrReductionV;
1070       break;
1071     case Op_XorI:
1072       switch(bt) {
1073       case T_BOOLEAN:
1074       case T_CHAR: return 0;
1075       case T_BYTE:
1076       case T_SHORT:
1077       case T_INT:
1078         vopc = Op_XorReductionV;
1079         break;
1080       default: ShouldNotReachHere(); return 0;
1081       }
1082       break;
1083     case Op_XorL:
1084       assert(bt == T_LONG, "must be");
1085       vopc = Op_XorReductionV;
1086       break;
1087     default:
1088       break;
1089   }
1090   return vopc;
1091 }
1092 
1093 // Return the appropriate reduction node.
1094 ReductionNode* ReductionNode::make(int opc, Node *ctrl, Node* n1, Node* n2, BasicType bt) {
1095 
1096   int vopc = opcode(opc, bt);
1097 
1098   // This method should not be called for unimplemented vectors.
1099   guarantee(vopc != opc, "Vector for '%s' is not implemented", NodeClassNames[opc]);
1100 
1101   switch (vopc) {
1102   case Op_AddReductionVI: return new AddReductionVINode(ctrl, n1, n2);
1103   case Op_AddReductionVL: return new AddReductionVLNode(ctrl, n1, n2);
1104   case Op_AddReductionVF: return new AddReductionVFNode(ctrl, n1, n2);
1105   case Op_AddReductionVD: return new AddReductionVDNode(ctrl, n1, n2);
1106   case Op_MulReductionVI: return new MulReductionVINode(ctrl, n1, n2);
1107   case Op_MulReductionVL: return new MulReductionVLNode(ctrl, n1, n2);
1108   case Op_MulReductionVF: return new MulReductionVFNode(ctrl, n1, n2);
1109   case Op_MulReductionVD: return new MulReductionVDNode(ctrl, n1, n2);
1110   case Op_MinReductionV:  return new MinReductionVNode(ctrl, n1, n2);
1111   case Op_MaxReductionV:  return new MaxReductionVNode(ctrl, n1, n2);
1112   case Op_AndReductionV:  return new AndReductionVNode(ctrl, n1, n2);
1113   case Op_OrReductionV:   return new OrReductionVNode(ctrl, n1, n2);
1114   case Op_XorReductionV:  return new XorReductionVNode(ctrl, n1, n2);
1115   default:
1116     assert(false, "unknown node: %s", NodeClassNames[vopc]);
1117     return NULL;
1118   }
1119 }
1120 
1121 Node* VectorLoadMaskNode::Identity(PhaseGVN* phase) {
1122   BasicType out_bt = type()->is_vect()->element_basic_type();
1123   if (!Matcher::has_predicated_vectors() && out_bt == T_BOOLEAN) {
1124     return in(1); // redundant conversion
1125   }
1126 
1127   return this;
1128 }
1129 
1130 Node* VectorStoreMaskNode::Identity(PhaseGVN* phase) {
1131   // Identity transformation on boolean vectors.
1132   //   VectorStoreMask (VectorLoadMask bv) elem_size ==> bv
1133   //   vector[n]{bool} => vector[n]{t} => vector[n]{bool}
1134   if (in(1)->Opcode() == Op_VectorLoadMask) {
1135     return in(1)->in(1);
1136   }
1137   return this;
1138 }
1139 
1140 VectorStoreMaskNode* VectorStoreMaskNode::make(PhaseGVN& gvn, Node* in, BasicType in_type, uint num_elem) {
1141   assert(in->bottom_type()->isa_vect(), "sanity");
1142   const TypeVect* vt = TypeVect::make(T_BOOLEAN, num_elem);
1143   int elem_size = type2aelembytes(in_type);
1144   return new VectorStoreMaskNode(in, gvn.intcon(elem_size), vt);
1145 }
1146 
1147 VectorCastNode* VectorCastNode::make(int vopc, Node* n1, BasicType bt, uint vlen) {
1148   const TypeVect* vt = TypeVect::make(bt, vlen);
1149   switch (vopc) {
1150     case Op_VectorCastB2X:  return new VectorCastB2XNode(n1, vt);
1151     case Op_VectorCastS2X:  return new VectorCastS2XNode(n1, vt);
1152     case Op_VectorCastI2X:  return new VectorCastI2XNode(n1, vt);
1153     case Op_VectorCastL2X:  return new VectorCastL2XNode(n1, vt);
1154     case Op_VectorCastF2X:  return new VectorCastF2XNode(n1, vt);
1155     case Op_VectorCastD2X:  return new VectorCastD2XNode(n1, vt);
1156     case Op_VectorUCastB2X: return new VectorUCastB2XNode(n1, vt);
1157     case Op_VectorUCastS2X: return new VectorUCastS2XNode(n1, vt);
1158     case Op_VectorUCastI2X: return new VectorUCastI2XNode(n1, vt);
1159     default:
1160       assert(false, "unknown node: %s", NodeClassNames[vopc]);
1161       return NULL;
1162   }
1163 }
1164 
1165 int VectorCastNode::opcode(BasicType bt, bool is_signed) {
1166   assert((is_integral_type(bt) && bt != T_LONG) || is_signed, "");
1167   switch (bt) {
1168     case T_BYTE:   return is_signed ? Op_VectorCastB2X : Op_VectorUCastB2X;
1169     case T_SHORT:  return is_signed ? Op_VectorCastS2X : Op_VectorUCastS2X;
1170     case T_INT:    return is_signed ? Op_VectorCastI2X : Op_VectorUCastI2X;
1171     case T_LONG:   return Op_VectorCastL2X;
1172     case T_FLOAT:  return Op_VectorCastF2X;
1173     case T_DOUBLE: return Op_VectorCastD2X;
1174     default:
1175       assert(false, "unknown type: %s", type2name(bt));
1176       return 0;
1177   }
1178 }
1179 
1180 Node* VectorCastNode::Identity(PhaseGVN* phase) {
1181   if (!in(1)->is_top()) {
1182     BasicType  in_bt = in(1)->bottom_type()->is_vect()->element_basic_type();
1183     BasicType out_bt = vect_type()->element_basic_type();
1184     if (in_bt == out_bt) {
1185       return in(1); // redundant cast
1186     }
1187   }
1188   return this;
1189 }
1190 
1191 Node* ReductionNode::make_reduction_input(PhaseGVN& gvn, int opc, BasicType bt) {
1192   int vopc = opcode(opc, bt);
1193   guarantee(vopc != opc, "Vector reduction for '%s' is not implemented", NodeClassNames[opc]);
1194 
1195   switch (vopc) {
1196     case Op_AndReductionV:
1197       switch (bt) {
1198         case T_BYTE:
1199         case T_SHORT:
1200         case T_INT:
1201           return gvn.makecon(TypeInt::MINUS_1);
1202         case T_LONG:
1203           return gvn.makecon(TypeLong::MINUS_1);
1204         default:
1205           fatal("Missed vector creation for '%s' as the basic type is not correct.", NodeClassNames[vopc]);
1206           return NULL;
1207       }
1208       break;
1209     case Op_AddReductionVI: // fallthrough
1210     case Op_AddReductionVL: // fallthrough
1211     case Op_AddReductionVF: // fallthrough
1212     case Op_AddReductionVD:
1213     case Op_OrReductionV:
1214     case Op_XorReductionV:
1215       return gvn.zerocon(bt);
1216     case Op_MulReductionVI:
1217       return gvn.makecon(TypeInt::ONE);
1218     case Op_MulReductionVL:
1219       return gvn.makecon(TypeLong::ONE);
1220     case Op_MulReductionVF:
1221       return gvn.makecon(TypeF::ONE);
1222     case Op_MulReductionVD:
1223       return gvn.makecon(TypeD::ONE);
1224     case Op_MinReductionV:
1225       switch (bt) {
1226         case T_BYTE:
1227           return gvn.makecon(TypeInt::make(max_jbyte));
1228         case T_SHORT:
1229           return gvn.makecon(TypeInt::make(max_jshort));
1230         case T_INT:
1231           return gvn.makecon(TypeInt::MAX);
1232         case T_LONG:
1233           return gvn.makecon(TypeLong::MAX);
1234         case T_FLOAT:
1235           return gvn.makecon(TypeF::POS_INF);
1236         case T_DOUBLE:
1237           return gvn.makecon(TypeD::POS_INF);
1238           default: Unimplemented(); return NULL;
1239       }
1240       break;
1241     case Op_MaxReductionV:
1242       switch (bt) {
1243         case T_BYTE:
1244           return gvn.makecon(TypeInt::make(min_jbyte));
1245         case T_SHORT:
1246           return gvn.makecon(TypeInt::make(min_jshort));
1247         case T_INT:
1248           return gvn.makecon(TypeInt::MIN);
1249         case T_LONG:
1250           return gvn.makecon(TypeLong::MIN);
1251         case T_FLOAT:
1252           return gvn.makecon(TypeF::NEG_INF);
1253         case T_DOUBLE:
1254           return gvn.makecon(TypeD::NEG_INF);
1255           default: Unimplemented(); return NULL;
1256       }
1257       break;
1258     default:
1259       fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
1260       return NULL;
1261   }
1262 }
1263 
1264 bool ReductionNode::implemented(int opc, uint vlen, BasicType bt) {
1265   if (is_java_primitive(bt) &&
1266       (vlen > 1) && is_power_of_2(vlen) &&
1267       Matcher::vector_size_supported(bt, vlen)) {
1268     int vopc = ReductionNode::opcode(opc, bt);
1269     return vopc != opc && Matcher::match_rule_supported_vector(vopc, vlen, bt);
1270   }
1271   return false;
1272 }
1273 
1274 MacroLogicVNode* MacroLogicVNode::make(PhaseGVN& gvn, Node* in1, Node* in2, Node* in3,
1275                                        Node* mask, uint truth_table, const TypeVect* vt) {
1276   assert(truth_table <= 0xFF, "invalid");
1277   assert(in1->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
1278   assert(in2->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
1279   assert(in3->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
1280   assert(!mask || mask->bottom_type()->isa_vectmask(), "predicated register type expected");
1281   Node* fn = gvn.intcon(truth_table);
1282   return new MacroLogicVNode(in1, in2, in3, fn, mask, vt);
1283 }
1284 
1285 Node* VectorNode::degenerate_vector_rotate(Node* src, Node* cnt, bool is_rotate_left,
1286                                            int vlen, BasicType bt, PhaseGVN* phase) {
1287   assert(is_integral_type(bt), "sanity");
1288   const TypeVect* vt = TypeVect::make(bt, vlen);
1289 
1290   int shift_mask = (type2aelembytes(bt) * 8) - 1;
1291   int shiftLOpc = (bt == T_LONG) ? Op_LShiftL : Op_LShiftI;
1292   auto urshiftopc = [=]() {
1293     switch(bt) {
1294       case T_INT: return Op_URShiftI;
1295       case T_LONG: return Op_URShiftL;
1296       case T_BYTE: return Op_URShiftB;
1297       case T_SHORT: return Op_URShiftS;
1298       default: return (Opcodes)0;
1299     }
1300   };
1301   int shiftROpc = urshiftopc();
1302 
1303   // Compute shift values for right rotation and
1304   // later swap them in case of left rotation.
1305   Node* shiftRCnt = NULL;
1306   Node* shiftLCnt = NULL;
1307   const TypeInt* cnt_type = cnt->bottom_type()->isa_int();
1308   bool is_binary_vector_op = false;
1309   if (cnt_type && cnt_type->is_con()) {
1310     // Constant shift.
1311     int shift = cnt_type->get_con() & shift_mask;
1312     shiftRCnt = phase->intcon(shift);
1313     shiftLCnt = phase->intcon(shift_mask + 1 - shift);
1314   } else if (VectorNode::is_invariant_vector(cnt)) {
1315     // Scalar variable shift, handle replicates generated by auto vectorizer.
1316     cnt = cnt->in(1);
1317     if (bt == T_LONG) {
1318       // Shift count vector for Rotate vector has long elements too.
1319       if (cnt->Opcode() == Op_ConvI2L) {
1320          cnt = cnt->in(1);
1321       } else {
1322          assert(cnt->bottom_type()->isa_long() &&
1323                 cnt->bottom_type()->is_long()->is_con(), "Long constant expected");
1324          cnt = phase->transform(new ConvL2INode(cnt));
1325       }
1326     }
1327     shiftRCnt = phase->transform(new AndINode(cnt, phase->intcon(shift_mask)));
1328     shiftLCnt = phase->transform(new SubINode(phase->intcon(shift_mask + 1), shiftRCnt));
1329   } else {
1330     // Variable vector rotate count.
1331     assert(Matcher::supports_vector_variable_shifts(), "");
1332 
1333     int subVopc = 0;
1334     int addVopc = 0;
1335     Node* shift_mask_node = NULL;
1336     Node* const_one_node = NULL;
1337 
1338     assert(cnt->bottom_type()->isa_vect(), "Unexpected shift");
1339     const Type* elem_ty = Type::get_const_basic_type(bt);
1340 
1341     if (bt == T_LONG) {
1342       shift_mask_node = phase->longcon(shift_mask);
1343       const_one_node = phase->longcon(1L);
1344       subVopc = VectorNode::opcode(Op_SubL, bt);
1345       addVopc = VectorNode::opcode(Op_AddL, bt);
1346     } else {
1347       shift_mask_node = phase->intcon(shift_mask);
1348       const_one_node = phase->intcon(1);
1349       subVopc = VectorNode::opcode(Op_SubI, bt);
1350       addVopc = VectorNode::opcode(Op_AddI, bt);
1351     }
1352     Node* vector_mask = phase->transform(VectorNode::scalar2vector(shift_mask_node, vlen, elem_ty));
1353     Node* vector_one = phase->transform(VectorNode::scalar2vector(const_one_node, vlen, elem_ty));
1354 
1355     shiftRCnt = cnt;
1356     shiftRCnt = phase->transform(VectorNode::make(Op_AndV, shiftRCnt, vector_mask, vt));
1357     vector_mask = phase->transform(VectorNode::make(addVopc, vector_one, vector_mask, vt));
1358     shiftLCnt = phase->transform(VectorNode::make(subVopc, vector_mask, shiftRCnt, vt));
1359     is_binary_vector_op = true;
1360   }
1361 
1362   // Swap the computed left and right shift counts.
1363   if (is_rotate_left) {
1364     swap(shiftRCnt,shiftLCnt);
1365   }
1366 
1367   if (!is_binary_vector_op) {
1368     shiftLCnt = phase->transform(new LShiftCntVNode(shiftLCnt, vt));
1369     shiftRCnt = phase->transform(new RShiftCntVNode(shiftRCnt, vt));
1370   }
1371 
1372   return new OrVNode(phase->transform(VectorNode::make(shiftLOpc, src, shiftLCnt, vlen, bt, is_binary_vector_op)),
1373                      phase->transform(VectorNode::make(shiftROpc, src, shiftRCnt, vlen, bt, is_binary_vector_op)),
1374                      vt);
1375 }
1376 
1377 Node* RotateLeftVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1378   int vlen = length();
1379   BasicType bt = vect_type()->element_basic_type();
1380   if ((!in(2)->is_Con() && !Matcher::supports_vector_variable_rotates()) ||
1381        !Matcher::match_rule_supported_vector(Op_RotateLeftV, vlen, bt)) {
1382     return VectorNode::degenerate_vector_rotate(in(1), in(2), true, vlen, bt, phase);
1383   }
1384   return NULL;
1385 }
1386 
1387 Node* RotateRightVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1388   int vlen = length();
1389   BasicType bt = vect_type()->element_basic_type();
1390   if ((!in(2)->is_Con() && !Matcher::supports_vector_variable_rotates()) ||
1391        !Matcher::match_rule_supported_vector(Op_RotateRightV, vlen, bt)) {
1392     return VectorNode::degenerate_vector_rotate(in(1), in(2), false, vlen, bt, phase);
1393   }
1394   return NULL;
1395 }
1396 
1397 #ifndef PRODUCT
1398 void VectorMaskCmpNode::dump_spec(outputStream *st) const {
1399   st->print(" %d #", _predicate); _type->dump_on(st);
1400 }
1401 #endif // PRODUCT
1402 
1403 Node* VectorReinterpretNode::Identity(PhaseGVN *phase) {
1404   Node* n = in(1);
1405   if (n->Opcode() == Op_VectorReinterpret) {
1406     // "VectorReinterpret (VectorReinterpret node) ==> node" if:
1407     //   1) Types of 'node' and 'this' are identical
1408     //   2) Truncations are not introduced by the first VectorReinterpret
1409     if (Type::cmp(bottom_type(), n->in(1)->bottom_type()) == 0 &&
1410         length_in_bytes() <= n->bottom_type()->is_vect()->length_in_bytes()) {
1411       return n->in(1);
1412     }
1413   }
1414   return this;
1415 }
1416 
1417 Node* VectorInsertNode::make(Node* vec, Node* new_val, int position) {
1418   assert(position < (int)vec->bottom_type()->is_vect()->length(), "pos in range");
1419   ConINode* pos = ConINode::make(position);
1420   return new VectorInsertNode(vec, new_val, pos, vec->bottom_type()->is_vect());
1421 }
1422 
1423 Node* VectorUnboxNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1424   Node* n = obj()->uncast();
1425   if (EnableVectorReboxing && n->Opcode() == Op_VectorBox) {
1426     if (Type::cmp(bottom_type(), n->in(VectorBoxNode::Value)->bottom_type()) == 0) {
1427       // Handled by VectorUnboxNode::Identity()
1428     } else {
1429       VectorBoxNode* vbox = static_cast<VectorBoxNode*>(n);
1430       ciKlass* vbox_klass = vbox->box_type()->klass();
1431       const TypeVect* in_vt = vbox->vec_type();
1432       const TypeVect* out_vt = type()->is_vect();
1433 
1434       if (in_vt->length() == out_vt->length()) {
1435         Node* value = vbox->in(VectorBoxNode::Value);
1436 
1437         bool is_vector_mask    = vbox_klass->is_subclass_of(ciEnv::current()->vector_VectorMask_klass());
1438         bool is_vector_shuffle = vbox_klass->is_subclass_of(ciEnv::current()->vector_VectorShuffle_klass());
1439         if (is_vector_mask) {
1440           const TypeVect* vmask_type = TypeVect::makemask(out_vt->element_basic_type(), out_vt->length());
1441           if (in_vt->length_in_bytes() == out_vt->length_in_bytes() &&
1442               Matcher::match_rule_supported_vector(Op_VectorMaskCast, out_vt->length(), out_vt->element_basic_type())) {
1443             // Apply "VectorUnbox (VectorBox vmask) ==> VectorMaskCast (vmask)"
1444             // directly. This could avoid the transformation ordering issue from
1445             // "VectorStoreMask (VectorLoadMask vmask) => vmask".
1446             return new VectorMaskCastNode(value, vmask_type);
1447           }
1448           // VectorUnbox (VectorBox vmask) ==> VectorLoadMask (VectorStoreMask vmask)
1449           value = phase->transform(VectorStoreMaskNode::make(*phase, value, in_vt->element_basic_type(), in_vt->length()));
1450           return new VectorLoadMaskNode(value, vmask_type);
1451         } else if (is_vector_shuffle) {
1452           if (!is_shuffle_to_vector()) {
1453             // VectorUnbox (VectorBox vshuffle) ==> VectorLoadShuffle vshuffle
1454             return new VectorLoadShuffleNode(value, out_vt);
1455           }
1456         } else {
1457           // Vector type mismatch is only supported for masks and shuffles, but sometimes it happens in pathological cases.
1458         }
1459       } else {
1460         // Vector length mismatch.
1461         // Sometimes happen in pathological cases (e.g., when unboxing happens in effectively dead code).
1462       }
1463     }
1464   }
1465   return NULL;
1466 }
1467 
1468 Node* VectorUnboxNode::Identity(PhaseGVN* phase) {
1469   Node* n = obj()->uncast();
1470   if (EnableVectorReboxing && n->Opcode() == Op_VectorBox) {
1471     if (Type::cmp(bottom_type(), n->in(VectorBoxNode::Value)->bottom_type()) == 0) {
1472       return n->in(VectorBoxNode::Value); // VectorUnbox (VectorBox v) ==> v
1473     } else {
1474       // Handled by VectorUnboxNode::Ideal().
1475     }
1476   }
1477   return this;
1478 }
1479 
1480 const TypeFunc* VectorBoxNode::vec_box_type(const TypeInstPtr* box_type) {
1481   const Type** fields = TypeTuple::fields(0);
1482   const TypeTuple *domain = TypeTuple::make(TypeFunc::Parms, fields);
1483 
1484   fields = TypeTuple::fields(1);
1485   fields[TypeFunc::Parms+0] = box_type;
1486   const TypeTuple *range = TypeTuple::make(TypeFunc::Parms+1, fields);
1487 
1488   return TypeFunc::make(domain, range);
1489 }
1490 
1491 Node* ShiftVNode::Identity(PhaseGVN* phase) {
1492   Node* in2 = in(2);
1493   // Shift by ZERO does nothing
1494   if (is_vshift_cnt(in2) && phase->find_int_type(in2->in(1)) == TypeInt::ZERO) {
1495     return in(1);
1496   }
1497   return this;
1498 }
1499 
1500 Node* VectorMaskGenNode::make(Node* length, BasicType mask_bt) {
1501   int max_vector = Matcher::max_vector_size(mask_bt);
1502   const TypeVectMask* t_vmask = TypeVectMask::make(mask_bt, max_vector);
1503   return new VectorMaskGenNode(length, t_vmask);
1504 }
1505 
1506 Node* VectorMaskOpNode::make(Node* mask, const Type* ty, int mopc) {
1507   switch(mopc) {
1508     case Op_VectorMaskTrueCount:
1509       return new VectorMaskTrueCountNode(mask, ty);
1510     case Op_VectorMaskLastTrue:
1511       return new VectorMaskLastTrueNode(mask, ty);
1512     case Op_VectorMaskFirstTrue:
1513       return new VectorMaskFirstTrueNode(mask, ty);
1514     case Op_VectorMaskToLong:
1515       return new VectorMaskToLongNode(mask, ty);
1516     default:
1517       assert(false, "Unhandled operation");
1518   }
1519   return NULL;
1520 }
1521 
1522 Node* VectorMaskToLongNode::Identity(PhaseGVN* phase) {
1523   if (in(1)->Opcode() == Op_VectorLongToMask) {
1524     return in(1)->in(1);
1525   }
1526   return this;
1527 }
1528 
1529 
1530 Node* VectorMaskCastNode::makeCastNode(PhaseGVN* phase, Node* src, const TypeVect* dst_type) {
1531   const TypeVect* src_type = src->bottom_type()->is_vect();
1532   assert(src_type->length() == dst_type->length(), "");
1533 
1534   int num_elem = src_type->length();
1535   BasicType elem_bt_from = src_type->element_basic_type();
1536   BasicType elem_bt_to = dst_type->element_basic_type();
1537 
1538   if (dst_type->isa_vectmask() == NULL && src_type->isa_vectmask() == NULL &&
1539       type2aelembytes(elem_bt_from) != type2aelembytes(elem_bt_to)) {
1540 
1541     Node* op = src;
1542     BasicType new_elem_bt_from = elem_bt_from;
1543     BasicType new_elem_bt_to = elem_bt_to;
1544     if (is_floating_point_type(elem_bt_from)) {
1545       new_elem_bt_from =  elem_bt_from == T_FLOAT ? T_INT : T_LONG;
1546     }
1547     if (is_floating_point_type(elem_bt_to)) {
1548       new_elem_bt_to = elem_bt_to == T_FLOAT ? T_INT : T_LONG;
1549     }
1550 
1551     // Special handling for casting operation involving floating point types.
1552     // Case A) F -> X :=  F -> VectorMaskCast (F->I/L [NOP]) -> VectorCast[I/L]2X
1553     // Case B) X -> F :=  X -> VectorCastX2[I/L] -> VectorMaskCast ([I/L]->F [NOP])
1554     // Case C) F -> F :=  VectorMaskCast (F->I/L [NOP]) -> VectorCast[I/L]2[L/I] -> VectotMaskCast (L/I->F [NOP])
1555 
1556     if (new_elem_bt_from != elem_bt_from) {
1557       const TypeVect* new_src_type = TypeVect::makemask(new_elem_bt_from, num_elem);
1558       op = phase->transform(new VectorMaskCastNode(op, new_src_type));
1559     }
1560 
1561     op = phase->transform(VectorCastNode::make(VectorCastNode::opcode(new_elem_bt_from), op, new_elem_bt_to, num_elem));
1562 
1563     if (new_elem_bt_to != elem_bt_to) {
1564       op = phase->transform(new VectorMaskCastNode(op, dst_type));
1565     }
1566     return op;
1567   } else {
1568     return new VectorMaskCastNode(src, dst_type);
1569   }
1570 }
1571 
1572 Node* VectorLongToMaskNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1573   const TypeVect* dst_type = bottom_type()->is_vect();
1574   if (in(1)->Opcode() == Op_AndL &&
1575       in(1)->in(1)->Opcode() == Op_VectorMaskToLong &&
1576       in(1)->in(2)->bottom_type()->isa_long() &&
1577       in(1)->in(2)->bottom_type()->is_long()->is_con() &&
1578       in(1)->in(2)->bottom_type()->is_long()->get_con() == ((1L << dst_type->length()) - 1)) {
1579       // Different src/dst mask length represents a re-interpretation operation,
1580       // we can however generate a mask casting operation if length matches.
1581      Node* src = in(1)->in(1)->in(1);
1582      if (dst_type->isa_vectmask() == NULL) {
1583        if (src->Opcode() != Op_VectorStoreMask) {
1584          return NULL;
1585        }
1586        src = src->in(1);
1587      }
1588      const TypeVect* src_type = src->bottom_type()->is_vect();
1589      if (src_type->length() == dst_type->length() &&
1590          ((src_type->isa_vectmask() == NULL && dst_type->isa_vectmask() == NULL) ||
1591           (src_type->isa_vectmask() && dst_type->isa_vectmask()))) {
1592        return VectorMaskCastNode::makeCastNode(phase, src, dst_type);
1593      }
1594   }
1595   return NULL;
1596 }
1597 
1598 // Generate other vector nodes to implement the masked/non-masked vector negation.
1599 Node* NegVNode::degenerate_integral_negate(PhaseGVN* phase, bool is_predicated) {
1600   const TypeVect* vt = vect_type();
1601   BasicType bt = vt->element_basic_type();
1602   uint vlen = length();
1603 
1604   // Transformation for predicated NegVI/L
1605   if (is_predicated) {
1606       // (NegVI/L src m) ==> (AddVI/L (XorV src (ReplicateI/L -1) m) (ReplicateI/L 1) m)
1607       Node* const_minus_one = NULL;
1608       Node* const_one = NULL;
1609       int add_opc;
1610       if (bt == T_LONG) {
1611         const_minus_one = phase->longcon(-1L);
1612         const_one = phase->longcon(1L);
1613         add_opc = Op_AddL;
1614       } else {
1615         const_minus_one = phase->intcon(-1);
1616         const_one = phase->intcon(1);
1617         add_opc = Op_AddI;
1618       }
1619       const_minus_one = phase->transform(VectorNode::scalar2vector(const_minus_one, vlen, Type::get_const_basic_type(bt)));
1620       Node* xorv = VectorNode::make(Op_XorV, in(1), const_minus_one, vt);
1621       xorv->add_req(in(2));
1622       xorv->add_flag(Node::Flag_is_predicated_vector);
1623       phase->transform(xorv);
1624       const_one = phase->transform(VectorNode::scalar2vector(const_one, vlen, Type::get_const_basic_type(bt)));
1625       Node* addv = VectorNode::make(VectorNode::opcode(add_opc, bt), xorv, const_one, vt);
1626       addv->add_req(in(2));
1627       addv->add_flag(Node::Flag_is_predicated_vector);
1628       return addv;
1629   }
1630 
1631   // NegVI/L ==> (SubVI/L (ReplicateI/L 0) src)
1632   Node* const_zero = NULL;
1633   int sub_opc;
1634   if (bt == T_LONG) {
1635     const_zero = phase->longcon(0L);
1636     sub_opc = Op_SubL;
1637   } else {
1638     const_zero = phase->intcon(0);
1639     sub_opc = Op_SubI;
1640   }
1641   const_zero = phase->transform(VectorNode::scalar2vector(const_zero, vlen, Type::get_const_basic_type(bt)));
1642   return VectorNode::make(VectorNode::opcode(sub_opc, bt), const_zero, in(1), vt);
1643 }
1644 
1645 Node* NegVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1646   BasicType bt = vect_type()->element_basic_type();
1647   uint vlen = length();
1648   int opc = Opcode();
1649   if (is_vector_integral_negate(opc)) {
1650     if (is_predicated_vector()) {
1651       if (!Matcher::match_rule_supported_vector_masked(opc, vlen, bt)) {
1652         return degenerate_integral_negate(phase, true);
1653       }
1654     } else if (!Matcher::match_rule_supported_vector(opc, vlen, bt)) {
1655       return degenerate_integral_negate(phase, false);
1656     }
1657   }
1658   return NULL;
1659 }
1660 
1661 #ifndef PRODUCT
1662 void VectorBoxAllocateNode::dump_spec(outputStream *st) const {
1663   CallStaticJavaNode::dump_spec(st);
1664 }
1665 
1666 #endif // !PRODUCT