1 // BEGIN  Generated code -- do not edit
   2 // Generated by aarch64-asmtest.py
   3     Label back, forth;
   4     __ bind(back);
   5 
   6 // ArithOp
   7     __ add(r26, r23, r13, Assembler::LSL, 32);         //       add     x26, x23, x13, LSL #32
   8     __ sub(r12, r24, r9, Assembler::LSR, 37);          //       sub     x12, x24, x9, LSR #37
   9     __ adds(r28, r15, r8, Assembler::ASR, 39);         //       adds    x28, x15, x8, ASR #39
  10     __ subs(r7, r28, r30, Assembler::ASR, 57);         //       subs    x7, x28, x30, ASR #57
  11     __ addw(r9, r22, r27, Assembler::ASR, 15);         //       add     w9, w22, w27, ASR #15
  12     __ subw(r3, r13, r17, Assembler::ASR, 30);         //       sub     w3, w13, w17, ASR #30
  13     __ addsw(r14, r26, r8, Assembler::ASR, 17);        //       adds    w14, w26, w8, ASR #17
  14     __ subsw(r0, r22, r12, Assembler::ASR, 21);        //       subs    w0, w22, w12, ASR #21
  15     __ andr(r0, r15, r26, Assembler::LSL, 20);         //       and     x0, x15, x26, LSL #20
  16     __ orr(r26, r5, r17, Assembler::LSL, 61);          //       orr     x26, x5, x17, LSL #61
  17     __ eor(r24, r13, r2, Assembler::LSL, 32);          //       eor     x24, x13, x2, LSL #32
  18     __ ands(r28, r3, r17, Assembler::ASR, 35);         //       ands    x28, x3, x17, ASR #35
  19     __ andw(r25, r16, r29, Assembler::LSR, 18);        //       and     w25, w16, w29, LSR #18
  20     __ orrw(r13, r17, r11, Assembler::LSR, 9);         //       orr     w13, w17, w11, LSR #9
  21     __ eorw(r5, r5, r17, Assembler::LSR, 15);          //       eor     w5, w5, w17, LSR #15
  22     __ andsw(r2, r23, r27, Assembler::ASR, 26);        //       ands    w2, w23, w27, ASR #26
  23     __ bic(r27, r28, r16, Assembler::LSR, 45);         //       bic     x27, x28, x16, LSR #45
  24     __ orn(r8, r25, r26, Assembler::ASR, 37);          //       orn     x8, x25, x26, ASR #37
  25     __ eon(r29, r17, r13, Assembler::LSR, 63);         //       eon     x29, x17, x13, LSR #63
  26     __ bics(r28, r24, r2, Assembler::LSR, 31);         //       bics    x28, x24, x2, LSR #31
  27     __ bicw(r19, r26, r7, Assembler::ASR, 3);          //       bic     w19, w26, w7, ASR #3
  28     __ ornw(r6, r24, r10, Assembler::ASR, 3);          //       orn     w6, w24, w10, ASR #3
  29     __ eonw(r4, r21, r1, Assembler::LSR, 29);          //       eon     w4, w21, w1, LSR #29
  30     __ bicsw(r16, r21, r0, Assembler::LSR, 19);        //       bics    w16, w21, w0, LSR #19
  31 
  32 // AddSubImmOp
  33     __ addw(r17, r12, 379u);                           //       add     w17, w12, #379
  34     __ addsw(r30, r1, 22u);                            //       adds    w30, w1, #22
  35     __ subw(r29, r5, 126u);                            //       sub     w29, w5, #126
  36     __ subsw(r6, r24, 960u);                           //       subs    w6, w24, #960
  37     __ add(r0, r13, 104u);                             //       add     x0, x13, #104
  38     __ adds(r8, r6, 663u);                             //       adds    x8, x6, #663
  39     __ sub(r10, r5, 516u);                             //       sub     x10, x5, #516
  40     __ subs(r1, r3, 1012u);                            //       subs    x1, x3, #1012
  41 
  42 // LogicalImmOp
  43     __ andw(r6, r11, 4294049777ull);                   //       and     w6, w11, #0xfff1fff1
  44     __ orrw(r28, r5, 4294966791ull);                   //       orr     w28, w5, #0xfffffe07
  45     __ eorw(r1, r20, 134217216ull);                    //       eor     w1, w20, #0x7fffe00
  46     __ andsw(r7, r17, 1048576ull);                     //       ands    w7, w17, #0x100000
  47     __ andr(r14, r12, 9223372036854775808ull);         //       and     x14, x12, #0x8000000000000000
  48     __ orr(r9, r11, 562675075514368ull);               //       orr     x9, x11, #0x1ffc000000000
  49     __ eor(r17, r0, 18014398509481728ull);             //       eor     x17, x0, #0x3fffffffffff00
  50     __ ands(r1, r8, 18446744073705357315ull);          //       ands    x1, x8, #0xffffffffffc00003
  51 
  52 // AbsOp
  53     __ b(__ pc());                                     //       b       .
  54     __ b(back);                                        //       b       back
  55     __ b(forth);                                       //       b       forth
  56     __ bl(__ pc());                                    //       bl      .
  57     __ bl(back);                                       //       bl      back
  58     __ bl(forth);                                      //       bl      forth
  59 
  60 // RegAndAbsOp
  61     __ cbzw(r10, __ pc());                             //       cbz     w10, .
  62     __ cbzw(r10, back);                                //       cbz     w10, back
  63     __ cbzw(r10, forth);                               //       cbz     w10, forth
  64     __ cbnzw(r8, __ pc());                             //       cbnz    w8, .
  65     __ cbnzw(r8, back);                                //       cbnz    w8, back
  66     __ cbnzw(r8, forth);                               //       cbnz    w8, forth
  67     __ cbz(r11, __ pc());                              //       cbz     x11, .
  68     __ cbz(r11, back);                                 //       cbz     x11, back
  69     __ cbz(r11, forth);                                //       cbz     x11, forth
  70     __ cbnz(r29, __ pc());                             //       cbnz    x29, .
  71     __ cbnz(r29, back);                                //       cbnz    x29, back
  72     __ cbnz(r29, forth);                               //       cbnz    x29, forth
  73     __ adr(r19, __ pc());                              //       adr     x19, .
  74     __ adr(r19, back);                                 //       adr     x19, back
  75     __ adr(r19, forth);                                //       adr     x19, forth
  76     __ _adrp(r19, __ pc());                            //       adrp    x19, .
  77 
  78 // RegImmAbsOp
  79     __ tbz(r22, 6, __ pc());                           //       tbz     x22, #6, .
  80     __ tbz(r22, 6, back);                              //       tbz     x22, #6, back
  81     __ tbz(r22, 6, forth);                             //       tbz     x22, #6, forth
  82     __ tbnz(r12, 11, __ pc());                         //       tbnz    x12, #11, .
  83     __ tbnz(r12, 11, back);                            //       tbnz    x12, #11, back
  84     __ tbnz(r12, 11, forth);                           //       tbnz    x12, #11, forth
  85 
  86 // MoveWideImmOp
  87     __ movnw(r0, 6301, 0);                             //       movn    w0, #6301, lsl 0
  88     __ movzw(r7, 20886, 0);                            //       movz    w7, #20886, lsl 0
  89     __ movkw(r27, 18617, 0);                           //       movk    w27, #18617, lsl 0
  90     __ movn(r12, 22998, 16);                           //       movn    x12, #22998, lsl 16
  91     __ movz(r20, 1532, 16);                            //       movz    x20, #1532, lsl 16
  92     __ movk(r8, 5167, 32);                             //       movk    x8, #5167, lsl 32
  93 
  94 // BitfieldOp
  95     __ sbfm(r15, r17, 24, 28);                         //       sbfm    x15, x17, #24, #28
  96     __ bfmw(r15, r9, 14, 25);                          //       bfm     w15, w9, #14, #25
  97     __ ubfmw(r27, r25, 6, 31);                         //       ubfm    w27, w25, #6, #31
  98     __ sbfm(r19, r2, 23, 31);                          //       sbfm    x19, x2, #23, #31
  99     __ bfm(r12, r21, 10, 6);                           //       bfm     x12, x21, #10, #6
 100     __ ubfm(r22, r0, 26, 16);                          //       ubfm    x22, x0, #26, #16
 101 
 102 // ExtractOp
 103     __ extrw(r3, r3, r20, 27);                         //       extr    w3, w3, w20, #27
 104     __ extr(r8, r30, r3, 54);                          //       extr    x8, x30, x3, #54
 105 
 106 // CondBranchOp
 107     __ br(Assembler::EQ, __ pc());                     //       b.EQ    .
 108     __ br(Assembler::EQ, back);                        //       b.EQ    back
 109     __ br(Assembler::EQ, forth);                       //       b.EQ    forth
 110     __ br(Assembler::NE, __ pc());                     //       b.NE    .
 111     __ br(Assembler::NE, back);                        //       b.NE    back
 112     __ br(Assembler::NE, forth);                       //       b.NE    forth
 113     __ br(Assembler::HS, __ pc());                     //       b.HS    .
 114     __ br(Assembler::HS, back);                        //       b.HS    back
 115     __ br(Assembler::HS, forth);                       //       b.HS    forth
 116     __ br(Assembler::CS, __ pc());                     //       b.CS    .
 117     __ br(Assembler::CS, back);                        //       b.CS    back
 118     __ br(Assembler::CS, forth);                       //       b.CS    forth
 119     __ br(Assembler::LO, __ pc());                     //       b.LO    .
 120     __ br(Assembler::LO, back);                        //       b.LO    back
 121     __ br(Assembler::LO, forth);                       //       b.LO    forth
 122     __ br(Assembler::CC, __ pc());                     //       b.CC    .
 123     __ br(Assembler::CC, back);                        //       b.CC    back
 124     __ br(Assembler::CC, forth);                       //       b.CC    forth
 125     __ br(Assembler::MI, __ pc());                     //       b.MI    .
 126     __ br(Assembler::MI, back);                        //       b.MI    back
 127     __ br(Assembler::MI, forth);                       //       b.MI    forth
 128     __ br(Assembler::PL, __ pc());                     //       b.PL    .
 129     __ br(Assembler::PL, back);                        //       b.PL    back
 130     __ br(Assembler::PL, forth);                       //       b.PL    forth
 131     __ br(Assembler::VS, __ pc());                     //       b.VS    .
 132     __ br(Assembler::VS, back);                        //       b.VS    back
 133     __ br(Assembler::VS, forth);                       //       b.VS    forth
 134     __ br(Assembler::VC, __ pc());                     //       b.VC    .
 135     __ br(Assembler::VC, back);                        //       b.VC    back
 136     __ br(Assembler::VC, forth);                       //       b.VC    forth
 137     __ br(Assembler::HI, __ pc());                     //       b.HI    .
 138     __ br(Assembler::HI, back);                        //       b.HI    back
 139     __ br(Assembler::HI, forth);                       //       b.HI    forth
 140     __ br(Assembler::LS, __ pc());                     //       b.LS    .
 141     __ br(Assembler::LS, back);                        //       b.LS    back
 142     __ br(Assembler::LS, forth);                       //       b.LS    forth
 143     __ br(Assembler::GE, __ pc());                     //       b.GE    .
 144     __ br(Assembler::GE, back);                        //       b.GE    back
 145     __ br(Assembler::GE, forth);                       //       b.GE    forth
 146     __ br(Assembler::LT, __ pc());                     //       b.LT    .
 147     __ br(Assembler::LT, back);                        //       b.LT    back
 148     __ br(Assembler::LT, forth);                       //       b.LT    forth
 149     __ br(Assembler::GT, __ pc());                     //       b.GT    .
 150     __ br(Assembler::GT, back);                        //       b.GT    back
 151     __ br(Assembler::GT, forth);                       //       b.GT    forth
 152     __ br(Assembler::LE, __ pc());                     //       b.LE    .
 153     __ br(Assembler::LE, back);                        //       b.LE    back
 154     __ br(Assembler::LE, forth);                       //       b.LE    forth
 155     __ br(Assembler::AL, __ pc());                     //       b.AL    .
 156     __ br(Assembler::AL, back);                        //       b.AL    back
 157     __ br(Assembler::AL, forth);                       //       b.AL    forth
 158     __ br(Assembler::NV, __ pc());                     //       b.NV    .
 159     __ br(Assembler::NV, back);                        //       b.NV    back
 160     __ br(Assembler::NV, forth);                       //       b.NV    forth
 161 
 162 // ImmOp
 163     __ svc(12999);                                     //       svc     #12999
 164     __ hvc(2665);                                      //       hvc     #2665
 165     __ smc(9002);                                      //       smc     #9002
 166     __ brk(14843);                                     //       brk     #14843
 167     __ hlt(25964);                                     //       hlt     #25964
 168 
 169 // Op
 170     __ nop();                                          //       nop
 171     __ yield();                                        //       yield
 172     __ wfe();                                          //       wfe
 173     __ sev();                                          //       sev
 174     __ sevl();                                         //       sevl
 175     __ autia1716();                                    //       autia1716
 176     __ autiasp();                                      //       autiasp
 177     __ autiaz();                                       //       autiaz
 178     __ autib1716();                                    //       autib1716
 179     __ autibsp();                                      //       autibsp
 180     __ autibz();                                       //       autibz
 181     __ pacia1716();                                    //       pacia1716
 182     __ paciasp();                                      //       paciasp
 183     __ paciaz();                                       //       paciaz
 184     __ pacib1716();                                    //       pacib1716
 185     __ pacibsp();                                      //       pacibsp
 186     __ pacibz();                                       //       pacibz
 187     __ eret();                                         //       eret
 188     __ drps();                                         //       drps
 189     __ isb();                                          //       isb
 190 
 191 // PostfixExceptionOp
 192     __ wfi();                                          //       wfi
 193     __ xpaclri();                                      //       xpaclri
 194 
 195 // SystemOp
 196     __ dsb(Assembler::ST);                             //       dsb     ST
 197     __ dmb(Assembler::OSHST);                          //       dmb     OSHST
 198 
 199 // OneRegOp
 200     __ br(r16);                                        //       br      x16
 201     __ blr(r20);                                       //       blr     x20
 202     __ paciza(r10);                                    //       paciza  x10
 203     __ pacizb(r27);                                    //       pacizb  x27
 204     __ pacdza(r8);                                     //       pacdza  x8
 205     __ pacdzb(r0);                                     //       pacdzb  x0
 206     __ autiza(r1);                                     //       autiza  x1
 207     __ autizb(r21);                                    //       autizb  x21
 208     __ autdza(r17);                                    //       autdza  x17
 209     __ autdzb(r29);                                    //       autdzb  x29
 210     __ xpacd(r29);                                     //       xpacd   x29
 211     __ braaz(r28);                                     //       braaz   x28
 212     __ brabz(r1);                                      //       brabz   x1
 213     __ blraaz(r23);                                    //       blraaz  x23
 214     __ blrabz(r21);                                    //       blrabz  x21
 215 
 216 // PostfixExceptionOneRegOp
 217     __ xpaci(r20);                                     //       xpaci   x20
 218 
 219 // LoadStoreExclusiveOp
 220     __ stxr(r22, r27, r19);                            //       stxr    w22, x27, [x19]
 221     __ stlxr(r11, r16, r6);                            //       stlxr   w11, x16, [x6]
 222     __ ldxr(r17, r0);                                  //       ldxr    x17, [x0]
 223     __ ldaxr(r4, r10);                                 //       ldaxr   x4, [x10]
 224     __ stlr(r24, r22);                                 //       stlr    x24, [x22]
 225     __ ldar(r10, r19);                                 //       ldar    x10, [x19]
 226 
 227 // LoadStoreExclusiveOp
 228     __ stxrw(r1, r5, r30);                             //       stxr    w1, w5, [x30]
 229     __ stlxrw(r8, r12, r17);                           //       stlxr   w8, w12, [x17]
 230     __ ldxrw(r9, r14);                                 //       ldxr    w9, [x14]
 231     __ ldaxrw(r7, r1);                                 //       ldaxr   w7, [x1]
 232     __ stlrw(r5, r16);                                 //       stlr    w5, [x16]
 233     __ ldarw(r2, r12);                                 //       ldar    w2, [x12]
 234 
 235 // LoadStoreExclusiveOp
 236     __ stxrh(r10, r12, r3);                            //       stxrh   w10, w12, [x3]
 237     __ stlxrh(r28, r14, r26);                          //       stlxrh  w28, w14, [x26]
 238     __ ldxrh(r30, r10);                                //       ldxrh   w30, [x10]
 239     __ ldaxrh(r14, r21);                               //       ldaxrh  w14, [x21]
 240     __ stlrh(r13, r9);                                 //       stlrh   w13, [x9]
 241     __ ldarh(r22, r27);                                //       ldarh   w22, [x27]
 242 
 243 // LoadStoreExclusiveOp
 244     __ stxrb(r28, r19, r11);                           //       stxrb   w28, w19, [x11]
 245     __ stlxrb(r30, r19, r2);                           //       stlxrb  w30, w19, [x2]
 246     __ ldxrb(r2, r23);                                 //       ldxrb   w2, [x23]
 247     __ ldaxrb(r1, r0);                                 //       ldaxrb  w1, [x0]
 248     __ stlrb(r12, r16);                                //       stlrb   w12, [x16]
 249     __ ldarb(r13, r15);                                //       ldarb   w13, [x15]
 250 
 251 // LoadStoreExclusiveOp
 252     __ ldxp(r17, r21, r13);                            //       ldxp    x17, x21, [x13]
 253     __ ldaxp(r11, r30, r8);                            //       ldaxp   x11, x30, [x8]
 254     __ stxp(r24, r13, r11, r1);                        //       stxp    w24, x13, x11, [x1]
 255     __ stlxp(r26, r21, r27, r13);                      //       stlxp   w26, x21, x27, [x13]
 256 
 257 // LoadStoreExclusiveOp
 258     __ ldxpw(r20, r3, r12);                            //       ldxp    w20, w3, [x12]
 259     __ ldaxpw(r6, r1, r29);                            //       ldaxp   w6, w1, [x29]
 260     __ stxpw(r6, r4, r11, r16);                        //       stxp    w6, w4, w11, [x16]
 261     __ stlxpw(r4, r30, r12, r21);                      //       stlxp   w4, w30, w12, [x21]
 262 
 263 // base_plus_unscaled_offset
 264 // LoadStoreOp
 265     __ str(r6, Address(r27, 97));                      //       str     x6, [x27, 97]
 266     __ strw(r17, Address(r10, 45));                    //       str     w17, [x10, 45]
 267     __ strb(r26, Address(r22, -29));                   //       strb    w26, [x22, -29]
 268     __ strh(r21, Address(r10, -50));                   //       strh    w21, [x10, -50]
 269     __ ldr(r14, Address(r24, 125));                    //       ldr     x14, [x24, 125]
 270     __ ldrw(r7, Address(r24, -16));                    //       ldr     w7, [x24, -16]
 271     __ ldrb(r8, Address(r2, 13));                      //       ldrb    w8, [x2, 13]
 272     __ ldrh(r30, Address(r25, -61));                   //       ldrh    w30, [x25, -61]
 273     __ ldrsb(r3, Address(r12, -14));                   //       ldrsb   x3, [x12, -14]
 274     __ ldrsh(r10, Address(r17, -28));                  //       ldrsh   x10, [x17, -28]
 275     __ ldrshw(r21, Address(r3, -5));                   //       ldrsh   w21, [x3, -5]
 276     __ ldrsw(r2, Address(r25, 23));                    //       ldrsw   x2, [x25, 23]
 277     __ ldrd(v25, Address(r1, -69));                    //       ldr     d25, [x1, -69]
 278     __ ldrs(v29, Address(r27, 6));                     //       ldr     s29, [x27, 6]
 279     __ strd(v29, Address(r12, 41));                    //       str     d29, [x12, 41]
 280     __ strs(v2, Address(r22, -115));                   //       str     s2, [x22, -115]
 281 
 282 // pre
 283 // LoadStoreOp
 284     __ str(r26, Address(__ pre(r5, 3)));               //       str     x26, [x5, 3]!
 285     __ strw(r20, Address(__ pre(r5, -103)));           //       str     w20, [x5, -103]!
 286     __ strb(r8, Address(__ pre(r12, -25)));            //       strb    w8, [x12, -25]!
 287     __ strh(r20, Address(__ pre(r2, -57)));            //       strh    w20, [x2, -57]!
 288     __ ldr(r14, Address(__ pre(r29, -234)));           //       ldr     x14, [x29, -234]!
 289     __ ldrw(r13, Address(__ pre(r29, 4)));             //       ldr     w13, [x29, 4]!
 290     __ ldrb(r24, Address(__ pre(r19, -9)));            //       ldrb    w24, [x19, -9]!
 291     __ ldrh(r3, Address(__ pre(r27, -19)));            //       ldrh    w3, [x27, -19]!
 292     __ ldrsb(r17, Address(__ pre(r1, -5)));            //       ldrsb   x17, [x1, -5]!
 293     __ ldrsh(r17, Address(__ pre(r19, -13)));          //       ldrsh   x17, [x19, -13]!
 294     __ ldrshw(r21, Address(__ pre(r11, -26)));         //       ldrsh   w21, [x11, -26]!
 295     __ ldrsw(r1, Address(__ pre(r9, -60)));            //       ldrsw   x1, [x9, -60]!
 296     __ ldrd(v26, Address(__ pre(r23, -247)));          //       ldr     d26, [x23, -247]!
 297     __ ldrs(v22, Address(__ pre(r21, -127)));          //       ldr     s22, [x21, -127]!
 298     __ strd(v13, Address(__ pre(r7, -216)));           //       str     d13, [x7, -216]!
 299     __ strs(v12, Address(__ pre(r13, -104)));          //       str     s12, [x13, -104]!
 300 
 301 // post
 302 // LoadStoreOp
 303     __ str(r20, Address(__ post(r5, -237)));           //       str     x20, [x5], -237
 304     __ strw(r29, Address(__ post(r28, -74)));          //       str     w29, [x28], -74
 305     __ strb(r4, Address(__ post(r24, -22)));           //       strb    w4, [x24], -22
 306     __ strh(r13, Address(__ post(r9, -21)));           //       strh    w13, [x9], -21
 307     __ ldr(r26, Address(__ post(r7, -55)));            //       ldr     x26, [x7], -55
 308     __ ldrw(r13, Address(__ post(r3, -115)));          //       ldr     w13, [x3], -115
 309     __ ldrb(r1, Address(__ post(r5, 12)));             //       ldrb    w1, [x5], 12
 310     __ ldrh(r8, Address(__ post(r13, -34)));           //       ldrh    w8, [x13], -34
 311     __ ldrsb(r23, Address(__ post(r20, -27)));         //       ldrsb   x23, [x20], -27
 312     __ ldrsh(r20, Address(__ post(r6, -2)));           //       ldrsh   x20, [x6], -2
 313     __ ldrshw(r9, Address(__ post(r17, -42)));         //       ldrsh   w9, [x17], -42
 314     __ ldrsw(r21, Address(__ post(r6, -30)));          //       ldrsw   x21, [x6], -30
 315     __ ldrd(v16, Address(__ post(r22, -29)));          //       ldr     d16, [x22], -29
 316     __ ldrs(v9, Address(__ post(r11, -3)));            //       ldr     s9, [x11], -3
 317     __ strd(v22, Address(__ post(r26, 60)));           //       str     d22, [x26], 60
 318     __ strs(v16, Address(__ post(r29, -2)));           //       str     s16, [x29], -2
 319 
 320 // base_plus_reg
 321 // LoadStoreOp
 322     __ str(r1, Address(r22, r4, Address::sxtw(0)));    //       str     x1, [x22, w4, sxtw #0]
 323     __ strw(r23, Address(r30, r13, Address::lsl(2)));  //       str     w23, [x30, x13, lsl #2]
 324     __ strb(r12, Address(r11, r12, Address::uxtw(0))); //       strb    w12, [x11, w12, uxtw #0]
 325     __ strh(r25, Address(r12, r0, Address::lsl(1)));   //       strh    w25, [x12, x0, lsl #1]
 326     __ ldr(r17, Address(r7, r0, Address::uxtw(3)));    //       ldr     x17, [x7, w0, uxtw #3]
 327     __ ldrw(r1, Address(r19, r14, Address::uxtw(2)));  //       ldr     w1, [x19, w14, uxtw #2]
 328     __ ldrb(r12, Address(r2, r9, Address::lsl(0)));    //       ldrb    w12, [x2, x9, lsl #0]
 329     __ ldrh(r22, Address(r9, r27, Address::sxtw(0)));  //       ldrh    w22, [x9, w27, sxtw #0]
 330     __ ldrsb(r21, Address(r12, r15, Address::sxtx(0))); //      ldrsb   x21, [x12, x15, sxtx #0]
 331     __ ldrsh(r28, Address(r6, r16, Address::lsl(1)));  //       ldrsh   x28, [x6, x16, lsl #1]
 332     __ ldrshw(r25, Address(r17, r22, Address::sxtw(0))); //     ldrsh   w25, [x17, w22, sxtw #0]
 333     __ ldrsw(r4, Address(r17, r29, Address::sxtx(0))); //       ldrsw   x4, [x17, x29, sxtx #0]
 334     __ ldrd(v5, Address(r1, r3, Address::sxtx(3)));    //       ldr     d5, [x1, x3, sxtx #3]
 335     __ ldrs(v24, Address(r17, r13, Address::uxtw(2))); //       ldr     s24, [x17, w13, uxtw #2]
 336     __ strd(v17, Address(r17, r23, Address::sxtx(3))); //       str     d17, [x17, x23, sxtx #3]
 337     __ strs(v17, Address(r30, r5, Address::sxtw(2)));  //       str     s17, [x30, w5, sxtw #2]
 338 
 339 // base_plus_scaled_offset
 340 // LoadStoreOp
 341     __ str(r29, Address(r11, 14160));                  //       str     x29, [x11, 14160]
 342     __ strw(r28, Address(r21, 7752));                  //       str     w28, [x21, 7752]
 343     __ strb(r28, Address(r2, 1746));                   //       strb    w28, [x2, 1746]
 344     __ strh(r0, Address(r28, 3296));                   //       strh    w0, [x28, 3296]
 345     __ ldr(r25, Address(r7, 15408));                   //       ldr     x25, [x7, 15408]
 346     __ ldrw(r0, Address(r3, 6312));                    //       ldr     w0, [x3, 6312]
 347     __ ldrb(r30, Address(r5, 1992));                   //       ldrb    w30, [x5, 1992]
 348     __ ldrh(r14, Address(r23, 3194));                  //       ldrh    w14, [x23, 3194]
 349     __ ldrsb(r10, Address(r19, 1786));                 //       ldrsb   x10, [x19, 1786]
 350     __ ldrsh(r29, Address(r17, 3482));                 //       ldrsh   x29, [x17, 3482]
 351     __ ldrshw(r25, Address(r30, 3362));                //       ldrsh   w25, [x30, 3362]
 352     __ ldrsw(r17, Address(r2, 7512));                  //       ldrsw   x17, [x2, 7512]
 353     __ ldrd(v15, Address(r16, 15176));                 //       ldr     d15, [x16, 15176]
 354     __ ldrs(v12, Address(r30, 6220));                  //       ldr     s12, [x30, 6220]
 355     __ strd(v1, Address(r1, 15216));                   //       str     d1, [x1, 15216]
 356     __ strs(v5, Address(r11, 7832));                   //       str     s5, [x11, 7832]
 357 
 358 // pcrel
 359 // LoadStoreOp
 360     __ ldr(r17, back);                                 //       ldr     x17, back
 361     __ ldrw(r2, back);                                 //       ldr     w2, back
 362 
 363 // LoadStoreOp
 364     __ prfm(Address(r25, 111));                        //       prfm    PLDL1KEEP, [x25, 111]
 365 
 366 // LoadStoreOp
 367     __ prfm(back);                                     //       prfm    PLDL1KEEP, back
 368 
 369 // LoadStoreOp
 370     __ prfm(Address(r14, r27, Address::uxtw(0)));      //       prfm    PLDL1KEEP, [x14, w27, uxtw #0]
 371 
 372 // LoadStoreOp
 373     __ prfm(Address(r14, 12328));                      //       prfm    PLDL1KEEP, [x14, 12328]
 374 
 375 // AddSubCarryOp
 376     __ adcw(r0, r25, r15);                             //       adc     w0, w25, w15
 377     __ adcsw(r1, r24, r3);                             //       adcs    w1, w24, w3
 378     __ sbcw(r17, r24, r20);                            //       sbc     w17, w24, w20
 379     __ sbcsw(r11, r0, r13);                            //       sbcs    w11, w0, w13
 380     __ adc(r28, r10, r7);                              //       adc     x28, x10, x7
 381     __ adcs(r4, r15, r16);                             //       adcs    x4, x15, x16
 382     __ sbc(r2, r12, r20);                              //       sbc     x2, x12, x20
 383     __ sbcs(r29, r13, r13);                            //       sbcs    x29, x13, x13
 384 
 385 // AddSubExtendedOp
 386     __ addw(r14, r6, r12, ext::uxtx, 3);               //       add     w14, w6, w12, uxtx #3
 387     __ addsw(r17, r25, r30, ext::uxtw, 4);             //       adds    w17, w25, w30, uxtw #4
 388     __ sub(r0, r17, r14, ext::uxtb, 1);                //       sub     x0, x17, x14, uxtb #1
 389     __ subsw(r9, r24, r29, ext::sxtx, 1);              //       subs    w9, w24, w29, sxtx #1
 390     __ add(r1, r22, r0, ext::sxtw, 2);                 //       add     x1, x22, x0, sxtw #2
 391     __ adds(r12, r28, r22, ext::uxth, 3);              //       adds    x12, x28, x22, uxth #3
 392     __ sub(r10, r12, r17, ext::uxtw, 4);               //       sub     x10, x12, x17, uxtw #4
 393     __ subs(r15, r28, r10, ext::sxtw, 3);              //       subs    x15, x28, x10, sxtw #3
 394 
 395 // ConditionalCompareOp
 396     __ ccmnw(r19, r23, 2u, Assembler::LE);             //       ccmn    w19, w23, #2, LE
 397     __ ccmpw(r17, r9, 6u, Assembler::LO);              //       ccmp    w17, w9, #6, LO
 398     __ ccmn(r21, r8, 2u, Assembler::CC);               //       ccmn    x21, x8, #2, CC
 399     __ ccmp(r19, r5, 1u, Assembler::MI);               //       ccmp    x19, x5, #1, MI
 400 
 401 // ConditionalCompareImmedOp
 402     __ ccmnw(r22, 17, 12, Assembler::HI);              //       ccmn    w22, #17, #12, HI
 403     __ ccmpw(r17, 7, 3, Assembler::HS);                //       ccmp    w17, #7, #3, HS
 404     __ ccmn(r16, 28, 5, Assembler::LT);                //       ccmn    x16, #28, #5, LT
 405     __ ccmp(r22, 3, 5, Assembler::LS);                 //       ccmp    x22, #3, #5, LS
 406 
 407 // ConditionalSelectOp
 408     __ cselw(r29, r26, r12, Assembler::LT);            //       csel    w29, w26, w12, LT
 409     __ csincw(r27, r10, r15, Assembler::CC);           //       csinc   w27, w10, w15, CC
 410     __ csinvw(r21, r28, r30, Assembler::LS);           //       csinv   w21, w28, w30, LS
 411     __ csnegw(r9, r27, r30, Assembler::CC);            //       csneg   w9, w27, w30, CC
 412     __ csel(r29, r15, r29, Assembler::LE);             //       csel    x29, x15, x29, LE
 413     __ csinc(r25, r21, r4, Assembler::EQ);             //       csinc   x25, x21, x4, EQ
 414     __ csinv(r17, r21, r29, Assembler::VS);            //       csinv   x17, x21, x29, VS
 415     __ csneg(r21, r20, r6, Assembler::HI);             //       csneg   x21, x20, x6, HI
 416 
 417 // TwoRegOp
 418     __ rbitw(r30, r3);                                 //       rbit    w30, w3
 419     __ rev16w(r21, r19);                               //       rev16   w21, w19
 420     __ revw(r11, r24);                                 //       rev     w11, w24
 421     __ clzw(r0, r27);                                  //       clz     w0, w27
 422     __ clsw(r25, r14);                                 //       cls     w25, w14
 423     __ rbit(r3, r14);                                  //       rbit    x3, x14
 424     __ rev16(r17, r7);                                 //       rev16   x17, x7
 425     __ rev32(r15, r24);                                //       rev32   x15, x24
 426     __ rev(r28, r17);                                  //       rev     x28, x17
 427     __ clz(r25, r2);                                   //       clz     x25, x2
 428     __ cls(r26, r28);                                  //       cls     x26, x28
 429     __ pacia(r5, r25);                                 //       pacia   x5, x25
 430     __ pacib(r26, r27);                                //       pacib   x26, x27
 431     __ pacda(r16, r17);                                //       pacda   x16, x17
 432     __ pacdb(r6, r21);                                 //       pacdb   x6, x21
 433     __ autia(r12, r0);                                 //       autia   x12, x0
 434     __ autib(r4, r12);                                 //       autib   x4, x12
 435     __ autda(r27, r17);                                //       autda   x27, x17
 436     __ autdb(r28, r28);                                //       autdb   x28, x28
 437     __ braa(r2, r17);                                  //       braa    x2, x17
 438     __ brab(r10, r15);                                 //       brab    x10, x15
 439     __ blraa(r14, r14);                                //       blraa   x14, x14
 440     __ blrab(r3, r25);                                 //       blrab   x3, x25
 441 
 442 // ThreeRegOp
 443     __ udivw(r15, r19, r14);                           //       udiv    w15, w19, w14
 444     __ sdivw(r5, r16, r4);                             //       sdiv    w5, w16, w4
 445     __ lslvw(r26, r25, r4);                            //       lslv    w26, w25, w4
 446     __ lsrvw(r2, r2, r12);                             //       lsrv    w2, w2, w12
 447     __ asrvw(r29, r17, r8);                            //       asrv    w29, w17, w8
 448     __ rorvw(r7, r3, r4);                              //       rorv    w7, w3, w4
 449     __ udiv(r25, r4, r26);                             //       udiv    x25, x4, x26
 450     __ sdiv(r25, r4, r17);                             //       sdiv    x25, x4, x17
 451     __ lslv(r0, r26, r17);                             //       lslv    x0, x26, x17
 452     __ lsrv(r23, r15, r21);                            //       lsrv    x23, x15, x21
 453     __ asrv(r28, r17, r27);                            //       asrv    x28, x17, x27
 454     __ rorv(r10, r3, r0);                              //       rorv    x10, x3, x0
 455     __ umulh(r7, r25, r9);                             //       umulh   x7, x25, x9
 456     __ smulh(r6, r15, r29);                            //       smulh   x6, x15, x29
 457 
 458 // FourRegMulOp
 459     __ maddw(r15, r10, r2, r17);                       //       madd    w15, w10, w2, w17
 460     __ msubw(r7, r11, r11, r23);                       //       msub    w7, w11, w11, w23
 461     __ madd(r7, r29, r23, r14);                        //       madd    x7, x29, x23, x14
 462     __ msub(r27, r11, r11, r4);                        //       msub    x27, x11, x11, x4
 463     __ smaddl(r24, r12, r15, r14);                     //       smaddl  x24, w12, w15, x14
 464     __ smsubl(r20, r11, r28, r13);                     //       smsubl  x20, w11, w28, x13
 465     __ umaddl(r11, r12, r23, r30);                     //       umaddl  x11, w12, w23, x30
 466     __ umsubl(r26, r14, r9, r13);                      //       umsubl  x26, w14, w9, x13
 467 
 468 // ThreeRegFloatOp
 469     __ fabds(v10, v7, v5);                             //       fabd    s10, s7, s5
 470     __ fmuls(v29, v15, v3);                            //       fmul    s29, s15, s3
 471     __ fdivs(v11, v12, v15);                           //       fdiv    s11, s12, s15
 472     __ fadds(v30, v30, v17);                           //       fadd    s30, s30, s17
 473     __ fsubs(v19, v20, v15);                           //       fsub    s19, s20, s15
 474     __ fabdd(v15, v9, v21);                            //       fabd    d15, d9, d21
 475     __ fmuld(v2, v9, v27);                             //       fmul    d2, d9, d27
 476     __ fdivd(v7, v29, v30);                            //       fdiv    d7, d29, d30
 477     __ faddd(v17, v1, v2);                             //       fadd    d17, d1, d2
 478     __ fsubd(v6, v10, v3);                             //       fsub    d6, d10, d3
 479 
 480 // FourRegFloatOp
 481     __ fmadds(v24, v11, v7, v1);                       //       fmadd   s24, s11, s7, s1
 482     __ fmsubs(v11, v0, v3, v17);                       //       fmsub   s11, s0, s3, s17
 483     __ fnmadds(v28, v6, v22, v6);                      //       fnmadd  s28, s6, s22, s6
 484     __ fnmadds(v0, v27, v26, v2);                      //       fnmadd  s0, s27, s26, s2
 485     __ fmaddd(v5, v7, v28, v11);                       //       fmadd   d5, d7, d28, d11
 486     __ fmsubd(v25, v13, v11, v23);                     //       fmsub   d25, d13, d11, d23
 487     __ fnmaddd(v19, v8, v17, v21);                     //       fnmadd  d19, d8, d17, d21
 488     __ fnmaddd(v25, v20, v19, v17);                    //       fnmadd  d25, d20, d19, d17
 489 
 490 // TwoRegFloatOp
 491     __ fmovs(v2, v29);                                 //       fmov    s2, s29
 492     __ fabss(v22, v8);                                 //       fabs    s22, s8
 493     __ fnegs(v21, v19);                                //       fneg    s21, s19
 494     __ fsqrts(v20, v11);                               //       fsqrt   s20, s11
 495     __ fcvts(v17, v20);                                //       fcvt    d17, s20
 496     __ fmovd(v6, v15);                                 //       fmov    d6, d15
 497     __ fabsd(v3, v3);                                  //       fabs    d3, d3
 498     __ fnegd(v28, v3);                                 //       fneg    d28, d3
 499     __ fsqrtd(v27, v14);                               //       fsqrt   d27, d14
 500     __ fcvtd(v14, v10);                                //       fcvt    s14, d10
 501 
 502 // FloatConvertOp
 503     __ fcvtzsw(r12, v11);                              //       fcvtzs  w12, s11
 504     __ fcvtzs(r17, v10);                               //       fcvtzs  x17, s10
 505     __ fcvtzdw(r25, v7);                               //       fcvtzs  w25, d7
 506     __ fcvtzd(r7, v14);                                //       fcvtzs  x7, d14
 507     __ scvtfws(v28, r0);                               //       scvtf   s28, w0
 508     __ scvtfs(v22, r0);                                //       scvtf   s22, x0
 509     __ scvtfwd(v12, r23);                              //       scvtf   d12, w23
 510     __ scvtfd(v13, r13);                               //       scvtf   d13, x13
 511     __ fcvtassw(r7, v14);                              //       fcvtas  w7, s14
 512     __ fcvtasd(r7, v8);                                //       fcvtas  x7, d8
 513     __ fcvtmssw(r20, v17);                             //       fcvtms  w20, s17
 514     __ fcvtmsd(r28, v30);                              //       fcvtms  x28, d30
 515     __ fmovs(r16, v2);                                 //       fmov    w16, s2
 516     __ fmovd(r9, v16);                                 //       fmov    x9, d16
 517     __ fmovs(v20, r29);                                //       fmov    s20, w29
 518     __ fmovd(v4, r1);                                  //       fmov    d4, x1
 519 
 520 // TwoRegFloatOp
 521     __ fcmps(v26, v24);                                //       fcmp    s26, s24
 522     __ fcmpd(v23, v14);                                //       fcmp    d23, d14
 523     __ fcmps(v21, 0.0);                                //       fcmp    s21, #0.0
 524     __ fcmpd(v12, 0.0);                                //       fcmp    d12, #0.0
 525 
 526 // LoadStorePairOp
 527     __ stpw(r12, r24, Address(r24, -192));             //       stp     w12, w24, [x24, #-192]
 528     __ ldpw(r22, r5, Address(r16, 128));               //       ldp     w22, w5, [x16, #128]
 529     __ ldpsw(r20, r19, Address(r13, 112));             //       ldpsw   x20, x19, [x13, #112]
 530     __ stp(r17, r6, Address(r13, 96));                 //       stp     x17, x6, [x13, #96]
 531     __ ldp(r5, r1, Address(r17, -160));                //       ldp     x5, x1, [x17, #-160]
 532 
 533 // LoadStorePairOp
 534     __ stpw(r13, r20, Address(__ pre(r22, -208)));     //       stp     w13, w20, [x22, #-208]!
 535     __ ldpw(r30, r27, Address(__ pre(r10, 80)));       //       ldp     w30, w27, [x10, #80]!
 536     __ ldpsw(r13, r20, Address(__ pre(r26, 16)));      //       ldpsw   x13, x20, [x26, #16]!
 537     __ stp(r4, r23, Address(__ pre(r29, -80)));        //       stp     x4, x23, [x29, #-80]!
 538     __ ldp(r22, r0, Address(__ pre(r6, -112)));        //       ldp     x22, x0, [x6, #-112]!
 539 
 540 // LoadStorePairOp
 541     __ stpw(r17, r27, Address(__ post(r5, 80)));       //       stp     w17, w27, [x5], #80
 542     __ ldpw(r14, r11, Address(__ post(r16, -256)));    //       ldp     w14, w11, [x16], #-256
 543     __ ldpsw(r12, r23, Address(__ post(r9, -240)));    //       ldpsw   x12, x23, [x9], #-240
 544     __ stp(r23, r7, Address(__ post(r0, 32)));         //       stp     x23, x7, [x0], #32
 545     __ ldp(r17, r8, Address(__ post(r26, 80)));        //       ldp     x17, x8, [x26], #80
 546 
 547 // LoadStorePairOp
 548     __ stnpw(r11, r15, Address(r10, -176));            //       stnp    w11, w15, [x10, #-176]
 549     __ ldnpw(r19, r16, Address(r4, 64));               //       ldnp    w19, w16, [x4, #64]
 550     __ stnp(r30, r14, Address(r9, -240));              //       stnp    x30, x14, [x9, #-240]
 551     __ ldnp(r29, r23, Address(r20, 32));               //       ldnp    x29, x23, [x20, #32]
 552 
 553 // LdStNEONOp
 554     __ ld1(v5, __ T8B, Address(r27));                  //       ld1     {v5.8B}, [x27]
 555     __ ld1(v10, v11, __ T16B, Address(__ post(r25, 32))); //    ld1     {v10.16B, v11.16B}, [x25], 32
 556     __ ld1(v15, v16, v17, __ T1D, Address(__ post(r30, r19))); //       ld1     {v15.1D, v16.1D, v17.1D}, [x30], x19
 557     __ ld1(v17, v18, v19, v20, __ T8H, Address(__ post(r16, 64))); //   ld1     {v17.8H, v18.8H, v19.8H, v20.8H}, [x16], 64
 558     __ ld1r(v30, __ T8B, Address(r23));                //       ld1r    {v30.8B}, [x23]
 559     __ ld1r(v17, __ T4S, Address(__ post(r8, 4)));     //       ld1r    {v17.4S}, [x8], 4
 560     __ ld1r(v12, __ T1D, Address(__ post(r9, r3)));    //       ld1r    {v12.1D}, [x9], x3
 561     __ ld2(v19, v20, __ T2D, Address(r2));             //       ld2     {v19.2D, v20.2D}, [x2]
 562     __ ld2(v21, v22, __ T4H, Address(__ post(r8, 16))); //      ld2     {v21.4H, v22.4H}, [x8], 16
 563     __ ld2r(v13, v14, __ T16B, Address(r4));           //       ld2r    {v13.16B, v14.16B}, [x4]
 564     __ ld2r(v28, v29, __ T2S, Address(__ post(r3, 8))); //      ld2r    {v28.2S, v29.2S}, [x3], 8
 565     __ ld2r(v29, v30, __ T2D, Address(__ post(r29, r0))); //    ld2r    {v29.2D, v30.2D}, [x29], x0
 566     __ ld3(v7, v8, v9, __ T4S, Address(__ post(r1, r21))); //   ld3     {v7.4S, v8.4S, v9.4S}, [x1], x21
 567     __ ld3(v17, v18, v19, __ T2S, Address(r0));        //       ld3     {v17.2S, v18.2S, v19.2S}, [x0]
 568     __ ld3r(v26, v27, v28, __ T8H, Address(r5));       //       ld3r    {v26.8H, v27.8H, v28.8H}, [x5]
 569     __ ld3r(v25, v26, v27, __ T4S, Address(__ post(r1, 12))); //        ld3r    {v25.4S, v26.4S, v27.4S}, [x1], 12
 570     __ ld3r(v22, v23, v24, __ T1D, Address(__ post(r2, r29))); //       ld3r    {v22.1D, v23.1D, v24.1D}, [x2], x29
 571     __ ld4(v13, v14, v15, v16, __ T8H, Address(__ post(r27, 64))); //   ld4     {v13.8H, v14.8H, v15.8H, v16.8H}, [x27], 64
 572     __ ld4(v29, v30, v31, v0, __ T8B, Address(__ post(r24, r23))); //   ld4     {v29.8B, v30.8B, v31.8B, v0.8B}, [x24], x23
 573     __ ld4r(v13, v14, v15, v16, __ T8B, Address(r15)); //       ld4r    {v13.8B, v14.8B, v15.8B, v16.8B}, [x15]
 574     __ ld4r(v15, v16, v17, v18, __ T4H, Address(__ post(r14, 8))); //   ld4r    {v15.4H, v16.4H, v17.4H, v18.4H}, [x14], 8
 575     __ ld4r(v27, v28, v29, v30, __ T2S, Address(__ post(r20, r23))); // ld4r    {v27.2S, v28.2S, v29.2S, v30.2S}, [x20], x23
 576 
 577 // NEONReduceInstruction
 578     __ addv(v24, __ T8B, v25);                         //       addv    b24, v25.8B
 579     __ addv(v15, __ T16B, v16);                        //       addv    b15, v16.16B
 580     __ addv(v25, __ T4H, v26);                         //       addv    h25, v26.4H
 581     __ addv(v14, __ T8H, v15);                         //       addv    h14, v15.8H
 582     __ addv(v10, __ T4S, v11);                         //       addv    s10, v11.4S
 583     __ smaxv(v13, __ T8B, v14);                        //       smaxv   b13, v14.8B
 584     __ smaxv(v14, __ T16B, v15);                       //       smaxv   b14, v15.16B
 585     __ smaxv(v20, __ T4H, v21);                        //       smaxv   h20, v21.4H
 586     __ smaxv(v1, __ T8H, v2);                          //       smaxv   h1, v2.8H
 587     __ smaxv(v22, __ T4S, v23);                        //       smaxv   s22, v23.4S
 588     __ fmaxv(v30, __ T4S, v31);                        //       fmaxv   s30, v31.4S
 589     __ sminv(v14, __ T8B, v15);                        //       sminv   b14, v15.8B
 590     __ uminv(v2, __ T8B, v3);                          //       uminv   b2, v3.8B
 591     __ sminv(v6, __ T16B, v7);                         //       sminv   b6, v7.16B
 592     __ uminv(v3, __ T16B, v4);                         //       uminv   b3, v4.16B
 593     __ sminv(v7, __ T4H, v8);                          //       sminv   h7, v8.4H
 594     __ uminv(v24, __ T4H, v25);                        //       uminv   h24, v25.4H
 595     __ sminv(v0, __ T8H, v1);                          //       sminv   h0, v1.8H
 596     __ uminv(v27, __ T8H, v28);                        //       uminv   h27, v28.8H
 597     __ sminv(v29, __ T4S, v30);                        //       sminv   s29, v30.4S
 598     __ uminv(v5, __ T4S, v6);                          //       uminv   s5, v6.4S
 599     __ fminv(v5, __ T4S, v6);                          //       fminv   s5, v6.4S
 600     __ fmaxp(v29, v30, __ S);                          //       fmaxp   s29, v30.2S
 601     __ fmaxp(v11, v12, __ D);                          //       fmaxp   d11, v12.2D
 602     __ fminp(v25, v26, __ S);                          //       fminp   s25, v26.2S
 603     __ fminp(v0, v1, __ D);                            //       fminp   d0, v1.2D
 604 
 605 // TwoRegNEONOp
 606     __ absr(v30, __ T8B, v31);                         //       abs     v30.8B, v31.8B
 607     __ absr(v0, __ T16B, v1);                          //       abs     v0.16B, v1.16B
 608     __ absr(v17, __ T4H, v18);                         //       abs     v17.4H, v18.4H
 609     __ absr(v28, __ T8H, v29);                         //       abs     v28.8H, v29.8H
 610     __ absr(v25, __ T2S, v26);                         //       abs     v25.2S, v26.2S
 611     __ absr(v9, __ T4S, v10);                          //       abs     v9.4S, v10.4S
 612     __ absr(v25, __ T2D, v26);                         //       abs     v25.2D, v26.2D
 613     __ fabs(v12, __ T2S, v13);                         //       fabs    v12.2S, v13.2S
 614     __ fabs(v15, __ T4S, v16);                         //       fabs    v15.4S, v16.4S
 615     __ fabs(v11, __ T2D, v12);                         //       fabs    v11.2D, v12.2D
 616     __ fneg(v10, __ T2S, v11);                         //       fneg    v10.2S, v11.2S
 617     __ fneg(v17, __ T4S, v18);                         //       fneg    v17.4S, v18.4S
 618     __ fneg(v24, __ T2D, v25);                         //       fneg    v24.2D, v25.2D
 619     __ fsqrt(v21, __ T2S, v22);                        //       fsqrt   v21.2S, v22.2S
 620     __ fsqrt(v23, __ T4S, v24);                        //       fsqrt   v23.4S, v24.4S
 621     __ fsqrt(v0, __ T2D, v1);                          //       fsqrt   v0.2D, v1.2D
 622     __ notr(v16, __ T8B, v17);                         //       not     v16.8B, v17.8B
 623     __ notr(v10, __ T16B, v11);                        //       not     v10.16B, v11.16B
 624 
 625 // ThreeRegNEONOp
 626     __ andr(v6, __ T8B, v7, v8);                       //       and     v6.8B, v7.8B, v8.8B
 627     __ andr(v28, __ T16B, v29, v30);                   //       and     v28.16B, v29.16B, v30.16B
 628     __ orr(v6, __ T8B, v7, v8);                        //       orr     v6.8B, v7.8B, v8.8B
 629     __ orr(v5, __ T16B, v6, v7);                       //       orr     v5.16B, v6.16B, v7.16B
 630     __ eor(v5, __ T8B, v6, v7);                        //       eor     v5.8B, v6.8B, v7.8B
 631     __ eor(v20, __ T16B, v21, v22);                    //       eor     v20.16B, v21.16B, v22.16B
 632     __ addv(v17, __ T8B, v18, v19);                    //       add     v17.8B, v18.8B, v19.8B
 633     __ addv(v15, __ T16B, v16, v17);                   //       add     v15.16B, v16.16B, v17.16B
 634     __ addv(v17, __ T4H, v18, v19);                    //       add     v17.4H, v18.4H, v19.4H
 635     __ addv(v29, __ T8H, v30, v31);                    //       add     v29.8H, v30.8H, v31.8H
 636     __ addv(v26, __ T2S, v27, v28);                    //       add     v26.2S, v27.2S, v28.2S
 637     __ addv(v28, __ T4S, v29, v30);                    //       add     v28.4S, v29.4S, v30.4S
 638     __ addv(v1, __ T2D, v2, v3);                       //       add     v1.2D, v2.2D, v3.2D
 639     __ fadd(v27, __ T2S, v28, v29);                    //       fadd    v27.2S, v28.2S, v29.2S
 640     __ fadd(v0, __ T4S, v1, v2);                       //       fadd    v0.4S, v1.4S, v2.4S
 641     __ fadd(v20, __ T2D, v21, v22);                    //       fadd    v20.2D, v21.2D, v22.2D
 642     __ subv(v28, __ T8B, v29, v30);                    //       sub     v28.8B, v29.8B, v30.8B
 643     __ subv(v15, __ T16B, v16, v17);                   //       sub     v15.16B, v16.16B, v17.16B
 644     __ subv(v12, __ T4H, v13, v14);                    //       sub     v12.4H, v13.4H, v14.4H
 645     __ subv(v10, __ T8H, v11, v12);                    //       sub     v10.8H, v11.8H, v12.8H
 646     __ subv(v28, __ T2S, v29, v30);                    //       sub     v28.2S, v29.2S, v30.2S
 647     __ subv(v28, __ T4S, v29, v30);                    //       sub     v28.4S, v29.4S, v30.4S
 648     __ subv(v19, __ T2D, v20, v21);                    //       sub     v19.2D, v20.2D, v21.2D
 649     __ fsub(v22, __ T2S, v23, v24);                    //       fsub    v22.2S, v23.2S, v24.2S
 650     __ fsub(v10, __ T4S, v11, v12);                    //       fsub    v10.4S, v11.4S, v12.4S
 651     __ fsub(v4, __ T2D, v5, v6);                       //       fsub    v4.2D, v5.2D, v6.2D
 652     __ mulv(v30, __ T8B, v31, v0);                     //       mul     v30.8B, v31.8B, v0.8B
 653     __ mulv(v20, __ T16B, v21, v22);                   //       mul     v20.16B, v21.16B, v22.16B
 654     __ mulv(v8, __ T4H, v9, v10);                      //       mul     v8.4H, v9.4H, v10.4H
 655     __ mulv(v30, __ T8H, v31, v0);                     //       mul     v30.8H, v31.8H, v0.8H
 656     __ mulv(v17, __ T2S, v18, v19);                    //       mul     v17.2S, v18.2S, v19.2S
 657     __ mulv(v10, __ T4S, v11, v12);                    //       mul     v10.4S, v11.4S, v12.4S
 658     __ fabd(v27, __ T2S, v28, v29);                    //       fabd    v27.2S, v28.2S, v29.2S
 659     __ fabd(v2, __ T4S, v3, v4);                       //       fabd    v2.4S, v3.4S, v4.4S
 660     __ fabd(v24, __ T2D, v25, v26);                    //       fabd    v24.2D, v25.2D, v26.2D
 661     __ fmul(v4, __ T2S, v5, v6);                       //       fmul    v4.2S, v5.2S, v6.2S
 662     __ fmul(v3, __ T4S, v4, v5);                       //       fmul    v3.4S, v4.4S, v5.4S
 663     __ fmul(v8, __ T2D, v9, v10);                      //       fmul    v8.2D, v9.2D, v10.2D
 664     __ mlav(v22, __ T4H, v23, v24);                    //       mla     v22.4H, v23.4H, v24.4H
 665     __ mlav(v17, __ T8H, v18, v19);                    //       mla     v17.8H, v18.8H, v19.8H
 666     __ mlav(v13, __ T2S, v14, v15);                    //       mla     v13.2S, v14.2S, v15.2S
 667     __ mlav(v4, __ T4S, v5, v6);                       //       mla     v4.4S, v5.4S, v6.4S
 668     __ fmla(v28, __ T2S, v29, v30);                    //       fmla    v28.2S, v29.2S, v30.2S
 669     __ fmla(v23, __ T4S, v24, v25);                    //       fmla    v23.4S, v24.4S, v25.4S
 670     __ fmla(v21, __ T2D, v22, v23);                    //       fmla    v21.2D, v22.2D, v23.2D
 671     __ mlsv(v25, __ T4H, v26, v27);                    //       mls     v25.4H, v26.4H, v27.4H
 672     __ mlsv(v24, __ T8H, v25, v26);                    //       mls     v24.8H, v25.8H, v26.8H
 673     __ mlsv(v3, __ T2S, v4, v5);                       //       mls     v3.2S, v4.2S, v5.2S
 674     __ mlsv(v23, __ T4S, v24, v25);                    //       mls     v23.4S, v24.4S, v25.4S
 675     __ fmls(v26, __ T2S, v27, v28);                    //       fmls    v26.2S, v27.2S, v28.2S
 676     __ fmls(v23, __ T4S, v24, v25);                    //       fmls    v23.4S, v24.4S, v25.4S
 677     __ fmls(v14, __ T2D, v15, v16);                    //       fmls    v14.2D, v15.2D, v16.2D
 678     __ fdiv(v21, __ T2S, v22, v23);                    //       fdiv    v21.2S, v22.2S, v23.2S
 679     __ fdiv(v3, __ T4S, v4, v5);                       //       fdiv    v3.4S, v4.4S, v5.4S
 680     __ fdiv(v23, __ T2D, v24, v25);                    //       fdiv    v23.2D, v24.2D, v25.2D
 681     __ maxv(v8, __ T8B, v9, v10);                      //       smax    v8.8B, v9.8B, v10.8B
 682     __ maxv(v24, __ T16B, v25, v26);                   //       smax    v24.16B, v25.16B, v26.16B
 683     __ maxv(v19, __ T4H, v20, v21);                    //       smax    v19.4H, v20.4H, v21.4H
 684     __ maxv(v15, __ T8H, v16, v17);                    //       smax    v15.8H, v16.8H, v17.8H
 685     __ maxv(v16, __ T2S, v17, v18);                    //       smax    v16.2S, v17.2S, v18.2S
 686     __ maxv(v2, __ T4S, v3, v4);                       //       smax    v2.4S, v3.4S, v4.4S
 687     __ smaxp(v1, __ T8B, v2, v3);                      //       smaxp   v1.8B, v2.8B, v3.8B
 688     __ smaxp(v0, __ T16B, v1, v2);                     //       smaxp   v0.16B, v1.16B, v2.16B
 689     __ smaxp(v24, __ T4H, v25, v26);                   //       smaxp   v24.4H, v25.4H, v26.4H
 690     __ smaxp(v4, __ T8H, v5, v6);                      //       smaxp   v4.8H, v5.8H, v6.8H
 691     __ smaxp(v3, __ T2S, v4, v5);                      //       smaxp   v3.2S, v4.2S, v5.2S
 692     __ smaxp(v11, __ T4S, v12, v13);                   //       smaxp   v11.4S, v12.4S, v13.4S
 693     __ fmax(v30, __ T2S, v31, v0);                     //       fmax    v30.2S, v31.2S, v0.2S
 694     __ fmax(v27, __ T4S, v28, v29);                    //       fmax    v27.4S, v28.4S, v29.4S
 695     __ fmax(v9, __ T2D, v10, v11);                     //       fmax    v9.2D, v10.2D, v11.2D
 696     __ minv(v25, __ T8B, v26, v27);                    //       smin    v25.8B, v26.8B, v27.8B
 697     __ minv(v2, __ T16B, v3, v4);                      //       smin    v2.16B, v3.16B, v4.16B
 698     __ minv(v12, __ T4H, v13, v14);                    //       smin    v12.4H, v13.4H, v14.4H
 699     __ minv(v17, __ T8H, v18, v19);                    //       smin    v17.8H, v18.8H, v19.8H
 700     __ minv(v30, __ T2S, v31, v0);                     //       smin    v30.2S, v31.2S, v0.2S
 701     __ minv(v1, __ T4S, v2, v3);                       //       smin    v1.4S, v2.4S, v3.4S
 702     __ sminp(v12, __ T8B, v13, v14);                   //       sminp   v12.8B, v13.8B, v14.8B
 703     __ sminp(v28, __ T16B, v29, v30);                  //       sminp   v28.16B, v29.16B, v30.16B
 704     __ sminp(v0, __ T4H, v1, v2);                      //       sminp   v0.4H, v1.4H, v2.4H
 705     __ sminp(v17, __ T8H, v18, v19);                   //       sminp   v17.8H, v18.8H, v19.8H
 706     __ sminp(v12, __ T2S, v13, v14);                   //       sminp   v12.2S, v13.2S, v14.2S
 707     __ sminp(v17, __ T4S, v18, v19);                   //       sminp   v17.4S, v18.4S, v19.4S
 708     __ fmin(v21, __ T2S, v22, v23);                    //       fmin    v21.2S, v22.2S, v23.2S
 709     __ fmin(v12, __ T4S, v13, v14);                    //       fmin    v12.4S, v13.4S, v14.4S
 710     __ fmin(v27, __ T2D, v28, v29);                    //       fmin    v27.2D, v28.2D, v29.2D
 711     __ cmeq(v29, __ T8B, v30, v31);                    //       cmeq    v29.8B, v30.8B, v31.8B
 712     __ cmeq(v30, __ T16B, v31, v0);                    //       cmeq    v30.16B, v31.16B, v0.16B
 713     __ cmeq(v1, __ T4H, v2, v3);                       //       cmeq    v1.4H, v2.4H, v3.4H
 714     __ cmeq(v25, __ T8H, v26, v27);                    //       cmeq    v25.8H, v26.8H, v27.8H
 715     __ cmeq(v27, __ T2S, v28, v29);                    //       cmeq    v27.2S, v28.2S, v29.2S
 716     __ cmeq(v4, __ T4S, v5, v6);                       //       cmeq    v4.4S, v5.4S, v6.4S
 717     __ cmeq(v29, __ T2D, v30, v31);                    //       cmeq    v29.2D, v30.2D, v31.2D
 718     __ fcmeq(v3, __ T2S, v4, v5);                      //       fcmeq   v3.2S, v4.2S, v5.2S
 719     __ fcmeq(v6, __ T4S, v7, v8);                      //       fcmeq   v6.4S, v7.4S, v8.4S
 720     __ fcmeq(v29, __ T2D, v30, v31);                   //       fcmeq   v29.2D, v30.2D, v31.2D
 721     __ cmgt(v25, __ T8B, v26, v27);                    //       cmgt    v25.8B, v26.8B, v27.8B
 722     __ cmgt(v17, __ T16B, v18, v19);                   //       cmgt    v17.16B, v18.16B, v19.16B
 723     __ cmgt(v8, __ T4H, v9, v10);                      //       cmgt    v8.4H, v9.4H, v10.4H
 724     __ cmgt(v7, __ T8H, v8, v9);                       //       cmgt    v7.8H, v8.8H, v9.8H
 725     __ cmgt(v12, __ T2S, v13, v14);                    //       cmgt    v12.2S, v13.2S, v14.2S
 726     __ cmgt(v0, __ T4S, v1, v2);                       //       cmgt    v0.4S, v1.4S, v2.4S
 727     __ cmgt(v19, __ T2D, v20, v21);                    //       cmgt    v19.2D, v20.2D, v21.2D
 728     __ cmhi(v1, __ T8B, v2, v3);                       //       cmhi    v1.8B, v2.8B, v3.8B
 729     __ cmhi(v23, __ T16B, v24, v25);                   //       cmhi    v23.16B, v24.16B, v25.16B
 730     __ cmhi(v2, __ T4H, v3, v4);                       //       cmhi    v2.4H, v3.4H, v4.4H
 731     __ cmhi(v0, __ T8H, v1, v2);                       //       cmhi    v0.8H, v1.8H, v2.8H
 732     __ cmhi(v8, __ T2S, v9, v10);                      //       cmhi    v8.2S, v9.2S, v10.2S
 733     __ cmhi(v23, __ T4S, v24, v25);                    //       cmhi    v23.4S, v24.4S, v25.4S
 734     __ cmhi(v25, __ T2D, v26, v27);                    //       cmhi    v25.2D, v26.2D, v27.2D
 735     __ cmhs(v15, __ T8B, v16, v17);                    //       cmhs    v15.8B, v16.8B, v17.8B
 736     __ cmhs(v29, __ T16B, v30, v31);                   //       cmhs    v29.16B, v30.16B, v31.16B
 737     __ cmhs(v3, __ T4H, v4, v5);                       //       cmhs    v3.4H, v4.4H, v5.4H
 738     __ cmhs(v10, __ T8H, v11, v12);                    //       cmhs    v10.8H, v11.8H, v12.8H
 739     __ cmhs(v22, __ T2S, v23, v24);                    //       cmhs    v22.2S, v23.2S, v24.2S
 740     __ cmhs(v10, __ T4S, v11, v12);                    //       cmhs    v10.4S, v11.4S, v12.4S
 741     __ cmhs(v4, __ T2D, v5, v6);                       //       cmhs    v4.2D, v5.2D, v6.2D
 742     __ fcmgt(v17, __ T2S, v18, v19);                   //       fcmgt   v17.2S, v18.2S, v19.2S
 743     __ fcmgt(v1, __ T4S, v2, v3);                      //       fcmgt   v1.4S, v2.4S, v3.4S
 744     __ fcmgt(v11, __ T2D, v12, v13);                   //       fcmgt   v11.2D, v12.2D, v13.2D
 745     __ cmge(v7, __ T8B, v8, v9);                       //       cmge    v7.8B, v8.8B, v9.8B
 746     __ cmge(v10, __ T16B, v11, v12);                   //       cmge    v10.16B, v11.16B, v12.16B
 747     __ cmge(v15, __ T4H, v16, v17);                    //       cmge    v15.4H, v16.4H, v17.4H
 748     __ cmge(v16, __ T8H, v17, v18);                    //       cmge    v16.8H, v17.8H, v18.8H
 749     __ cmge(v2, __ T2S, v3, v4);                       //       cmge    v2.2S, v3.2S, v4.2S
 750     __ cmge(v9, __ T4S, v10, v11);                     //       cmge    v9.4S, v10.4S, v11.4S
 751     __ cmge(v11, __ T2D, v12, v13);                    //       cmge    v11.2D, v12.2D, v13.2D
 752     __ fcmge(v12, __ T2S, v13, v14);                   //       fcmge   v12.2S, v13.2S, v14.2S
 753     __ fcmge(v14, __ T4S, v15, v16);                   //       fcmge   v14.4S, v15.4S, v16.4S
 754     __ fcmge(v13, __ T2D, v14, v15);                   //       fcmge   v13.2D, v14.2D, v15.2D
 755 
 756 // SVEComparisonWithZero
 757     __ sve_fcm(Assembler::EQ, p1, __ D, p6, z6, 0.0);  //       fcmeq   p1.d, p6/z, z6.d, #0.0
 758     __ sve_fcm(Assembler::GT, p8, __ S, p1, z4, 0.0);  //       fcmgt   p8.s, p1/z, z4.s, #0.0
 759     __ sve_fcm(Assembler::GE, p6, __ D, p4, z17, 0.0); //       fcmge   p6.d, p4/z, z17.d, #0.0
 760     __ sve_fcm(Assembler::LT, p9, __ D, p5, z10, 0.0); //       fcmlt   p9.d, p5/z, z10.d, #0.0
 761     __ sve_fcm(Assembler::LE, p6, __ D, p7, z25, 0.0); //       fcmle   p6.d, p7/z, z25.d, #0.0
 762     __ sve_fcm(Assembler::NE, p7, __ D, p0, z10, 0.0); //       fcmne   p7.d, p0/z, z10.d, #0.0
 763 
 764 // SpecialCases
 765     __ ccmn(zr, zr, 3u, Assembler::LE);                //       ccmn    xzr, xzr, #3, LE
 766     __ ccmnw(zr, zr, 5u, Assembler::EQ);               //       ccmn    wzr, wzr, #5, EQ
 767     __ ccmp(zr, 1, 4u, Assembler::NE);                 //       ccmp    xzr, 1, #4, NE
 768     __ ccmpw(zr, 2, 2, Assembler::GT);                 //       ccmp    wzr, 2, #2, GT
 769     __ extr(zr, zr, zr, 0);                            //       extr    xzr, xzr, xzr, 0
 770     __ stlxp(r0, zr, zr, sp);                          //       stlxp   w0, xzr, xzr, [sp]
 771     __ stlxpw(r2, zr, zr, r3);                         //       stlxp   w2, wzr, wzr, [x3]
 772     __ stxp(r4, zr, zr, r5);                           //       stxp    w4, xzr, xzr, [x5]
 773     __ stxpw(r6, zr, zr, sp);                          //       stxp    w6, wzr, wzr, [sp]
 774     __ dup(v0, __ T16B, zr);                           //       dup     v0.16b, wzr
 775     __ dup(v0, __ S, v1);                              //       dup     s0, v1.s[0]
 776     __ mov(v1, __ D, 0, zr);                           //       mov     v1.d[0], xzr
 777     __ mov(v1, __ S, 1, zr);                           //       mov     v1.s[1], wzr
 778     __ mov(v1, __ H, 2, zr);                           //       mov     v1.h[2], wzr
 779     __ mov(v1, __ B, 3, zr);                           //       mov     v1.b[3], wzr
 780     __ smov(r0, v1, __ S, 0);                          //       smov    x0, v1.s[0]
 781     __ smov(r0, v1, __ H, 1);                          //       smov    x0, v1.h[1]
 782     __ smov(r0, v1, __ B, 2);                          //       smov    x0, v1.b[2]
 783     __ umov(r0, v1, __ D, 0);                          //       umov    x0, v1.d[0]
 784     __ umov(r0, v1, __ S, 1);                          //       umov    w0, v1.s[1]
 785     __ umov(r0, v1, __ H, 2);                          //       umov    w0, v1.h[2]
 786     __ umov(r0, v1, __ B, 3);                          //       umov    w0, v1.b[3]
 787     __ fmovhid(r0, v1);                                //       fmov    x0, v1.d[1]
 788     __ fmovs(v9, __ T2S, 0.5f);                        //       fmov    v9.2s, 0.5
 789     __ fmovd(v14, __ T2D, 0.5f);                       //       fmov    v14.2d, 0.5
 790     __ ld1(v31, v0, __ T2D, Address(__ post(r1, r0))); //       ld1     {v31.2d, v0.2d}, [x1], x0
 791     __ fcvtzs(v0, __ T2S, v1);                         //       fcvtzs  v0.2s, v1.2s
 792     __ fcvtas(v2, __ T4S, v3);                         //       fcvtas  v2.4s, v3.4s
 793     __ fcvtms(v4, __ T2D, v5);                         //       fcvtms  v4.2d, v5.2d
 794     __ sve_cpy(z0, __ S, p0, v1);                      //       mov     z0.s, p0/m, s1
 795     __ sve_cpy(z0, __ B, p0, 127, true);               //       mov     z0.b, p0/m, 127
 796     __ sve_cpy(z1, __ H, p0, -128, true);              //       mov     z1.h, p0/m, -128
 797     __ sve_cpy(z2, __ S, p0, 32512, true);             //       mov     z2.s, p0/m, 32512
 798     __ sve_cpy(z5, __ D, p0, -32768, false);           //       mov     z5.d, p0/z, -32768
 799     __ sve_cpy(z10, __ B, p0, -1, false);              //       mov     z10.b, p0/z, -1
 800     __ sve_cpy(z11, __ S, p0, -1, false);              //       mov     z11.s, p0/z, -1
 801     __ sve_inc(r0, __ S);                              //       incw    x0
 802     __ sve_dec(r1, __ H);                              //       dech    x1
 803     __ sve_lsl(z0, __ B, z1, 7);                       //       lsl     z0.b, z1.b, #7
 804     __ sve_lsl(z21, __ H, z1, 15);                     //       lsl     z21.h, z1.h, #15
 805     __ sve_lsl(z0, __ S, z1, 31);                      //       lsl     z0.s, z1.s, #31
 806     __ sve_lsl(z0, __ D, z1, 63);                      //       lsl     z0.d, z1.d, #63
 807     __ sve_lsr(z0, __ B, z1, 7);                       //       lsr     z0.b, z1.b, #7
 808     __ sve_asr(z0, __ H, z11, 15);                     //       asr     z0.h, z11.h, #15
 809     __ sve_lsr(z30, __ S, z1, 31);                     //       lsr     z30.s, z1.s, #31
 810     __ sve_asr(z0, __ D, z1, 63);                      //       asr     z0.d, z1.d, #63
 811     __ sve_lsl(z0, __ B, p0, 0);                       //       lsl     z0.b, p0/m, z0.b, #0
 812     __ sve_lsl(z0, __ B, p0, 5);                       //       lsl     z0.b, p0/m, z0.b, #5
 813     __ sve_lsl(z1, __ H, p1, 15);                      //       lsl     z1.h, p1/m, z1.h, #15
 814     __ sve_lsl(z2, __ S, p2, 31);                      //       lsl     z2.s, p2/m, z2.s, #31
 815     __ sve_lsl(z3, __ D, p3, 63);                      //       lsl     z3.d, p3/m, z3.d, #63
 816     __ sve_lsr(z0, __ B, p0, 1);                       //       lsr     z0.b, p0/m, z0.b, #1
 817     __ sve_lsr(z0, __ B, p0, 8);                       //       lsr     z0.b, p0/m, z0.b, #8
 818     __ sve_lsr(z1, __ H, p1, 15);                      //       lsr     z1.h, p1/m, z1.h, #15
 819     __ sve_lsr(z2, __ S, p2, 7);                       //       lsr     z2.s, p2/m, z2.s, #7
 820     __ sve_lsr(z2, __ S, p2, 31);                      //       lsr     z2.s, p2/m, z2.s, #31
 821     __ sve_lsr(z3, __ D, p3, 63);                      //       lsr     z3.d, p3/m, z3.d, #63
 822     __ sve_asr(z0, __ B, p0, 1);                       //       asr     z0.b, p0/m, z0.b, #1
 823     __ sve_asr(z0, __ B, p0, 7);                       //       asr     z0.b, p0/m, z0.b, #7
 824     __ sve_asr(z1, __ H, p1, 5);                       //       asr     z1.h, p1/m, z1.h, #5
 825     __ sve_asr(z1, __ H, p1, 15);                      //       asr     z1.h, p1/m, z1.h, #15
 826     __ sve_asr(z2, __ S, p2, 31);                      //       asr     z2.s, p2/m, z2.s, #31
 827     __ sve_asr(z3, __ D, p3, 63);                      //       asr     z3.d, p3/m, z3.d, #63
 828     __ sve_addvl(sp, r0, 31);                          //       addvl   sp, x0, #31
 829     __ sve_addpl(r1, sp, -32);                         //       addpl   x1, sp, -32
 830     __ sve_cntp(r8, __ B, p0, p1);                     //       cntp    x8, p0, p1.b
 831     __ sve_dup(z0, __ B, 127);                         //       dup     z0.b, 127
 832     __ sve_dup(z1, __ H, -128);                        //       dup     z1.h, -128
 833     __ sve_dup(z2, __ S, 32512);                       //       dup     z2.s, 32512
 834     __ sve_dup(z7, __ D, -32768);                      //       dup     z7.d, -32768
 835     __ sve_dup(z10, __ B, -1);                         //       dup     z10.b, -1
 836     __ sve_dup(z11, __ S, -1);                         //       dup     z11.s, -1
 837     __ sve_ld1b(z0, __ B, p0, Address(sp));            //       ld1b    {z0.b}, p0/z, [sp]
 838     __ sve_ld1b(z0, __ H, p1, Address(sp));            //       ld1b    {z0.h}, p1/z, [sp]
 839     __ sve_ld1b(z0, __ S, p2, Address(sp, r8));        //       ld1b    {z0.s}, p2/z, [sp, x8]
 840     __ sve_ld1b(z0, __ D, p3, Address(sp, 7));         //       ld1b    {z0.d}, p3/z, [sp, #7, MUL VL]
 841     __ sve_ld1h(z10, __ H, p1, Address(sp, -8));       //       ld1h    {z10.h}, p1/z, [sp, #-8, MUL VL]
 842     __ sve_ld1w(z20, __ S, p2, Address(r0, 7));        //       ld1w    {z20.s}, p2/z, [x0, #7, MUL VL]
 843     __ sve_ld1b(z30, __ B, p3, Address(sp, r8));       //       ld1b    {z30.b}, p3/z, [sp, x8]
 844     __ sve_ld1w(z0, __ S, p4, Address(sp, r28));       //       ld1w    {z0.s}, p4/z, [sp, x28, LSL #2]
 845     __ sve_ld1d(z11, __ D, p5, Address(r0, r1));       //       ld1d    {z11.d}, p5/z, [x0, x1, LSL #3]
 846     __ sve_st1b(z22, __ B, p6, Address(sp));           //       st1b    {z22.b}, p6, [sp]
 847     __ sve_st1b(z31, __ B, p7, Address(sp, -8));       //       st1b    {z31.b}, p7, [sp, #-8, MUL VL]
 848     __ sve_st1b(z0, __ H, p1, Address(sp));            //       st1b    {z0.h}, p1, [sp]
 849     __ sve_st1b(z0, __ S, p2, Address(sp, r8));        //       st1b    {z0.s}, p2, [sp, x8]
 850     __ sve_st1b(z0, __ D, p3, Address(sp));            //       st1b    {z0.d}, p3, [sp]
 851     __ sve_st1w(z0, __ S, p1, Address(r0, 7));         //       st1w    {z0.s}, p1, [x0, #7, MUL VL]
 852     __ sve_st1b(z0, __ B, p2, Address(sp, r1));        //       st1b    {z0.b}, p2, [sp, x1]
 853     __ sve_st1h(z0, __ H, p3, Address(sp, r8));        //       st1h    {z0.h}, p3, [sp, x8, LSL #1]
 854     __ sve_st1d(z0, __ D, p4, Address(r0, r17));       //       st1d    {z0.d}, p4, [x0, x17, LSL #3]
 855     __ sve_ldr(z0, Address(sp));                       //       ldr     z0, [sp]
 856     __ sve_ldr(z31, Address(sp, -256));                //       ldr     z31, [sp, #-256, MUL VL]
 857     __ sve_str(z8, Address(r8, 255));                  //       str     z8, [x8, #255, MUL VL]
 858     __ sve_cntb(r9);                                   //       cntb    x9
 859     __ sve_cnth(r10);                                  //       cnth    x10
 860     __ sve_cntw(r11);                                  //       cntw    x11
 861     __ sve_cntd(r12);                                  //       cntd    x12
 862     __ sve_brka(p2, p0, p2, false);                    //       brka    p2.b, p0/z, p2.b
 863     __ sve_brka(p1, p2, p3, true);                     //       brka    p1.b, p2/m, p3.b
 864     __ sve_brkb(p1, p2, p3, false);                    //       brkb    p1.b, p2/z, p3.b
 865     __ sve_brkb(p2, p3, p4, true);                     //       brkb    p2.b, p3/m, p4.b
 866     __ sve_rev(p0, __ B, p1);                          //       rev     p0.b, p1.b
 867     __ sve_rev(p1, __ H, p2);                          //       rev     p1.h, p2.h
 868     __ sve_rev(p2, __ S, p3);                          //       rev     p2.s, p3.s
 869     __ sve_rev(p3, __ D, p4);                          //       rev     p3.d, p4.d
 870     __ sve_incp(r0, __ B, p2);                         //       incp    x0, p2.b
 871     __ sve_whilelt(p0, __ B, r1, r28);                 //       whilelt p0.b, x1, x28
 872     __ sve_whilele(p2, __ H, r11, r8);                 //       whilele p2.h, x11, x8
 873     __ sve_whilelo(p3, __ S, r7, r2);                  //       whilelo p3.s, x7, x2
 874     __ sve_whilels(p4, __ D, r17, r10);                //       whilels p4.d, x17, x10
 875     __ sve_sel(z0, __ B, p0, z1, z2);                  //       sel     z0.b, p0, z1.b, z2.b
 876     __ sve_sel(z4, __ D, p0, z5, z6);                  //       sel     z4.d, p0, z5.d, z6.d
 877     __ sve_cmp(Assembler::EQ, p1, __ B, p0, z0, z1);   //       cmpeq   p1.b, p0/z, z0.b, z1.b
 878     __ sve_cmp(Assembler::NE, p1, __ H, p0, z2, z3);   //       cmpne   p1.h, p0/z, z2.h, z3.h
 879     __ sve_cmp(Assembler::GE, p1, __ S, p2, z4, z5);   //       cmpge   p1.s, p2/z, z4.s, z5.s
 880     __ sve_cmp(Assembler::GT, p1, __ D, p3, z6, z7);   //       cmpgt   p1.d, p3/z, z6.d, z7.d
 881     __ sve_cmp(Assembler::HI, p1, __ S, p2, z4, z5);   //       cmphi   p1.s, p2/z, z4.s, z5.s
 882     __ sve_cmp(Assembler::HS, p1, __ D, p3, z6, z7);   //       cmphs   p1.d, p3/z, z6.d, z7.d
 883     __ sve_cmp(Assembler::EQ, p1, __ B, p4, z0, 15);   //       cmpeq   p1.b, p4/z, z0.b, #15
 884     __ sve_cmp(Assembler::NE, p1, __ H, p0, z2, -16);  //       cmpne   p1.h, p0/z, z2.h, #-16
 885     __ sve_cmp(Assembler::LE, p1, __ S, p1, z4, 0);    //       cmple   p1.s, p1/z, z4.s, #0
 886     __ sve_cmp(Assembler::LT, p1, __ D, p2, z6, -1);   //       cmplt   p1.d, p2/z, z6.d, #-1
 887     __ sve_cmp(Assembler::GE, p1, __ S, p3, z4, 5);    //       cmpge   p1.s, p3/z, z4.s, #5
 888     __ sve_cmp(Assembler::GT, p1, __ B, p4, z6, -2);   //       cmpgt   p1.b, p4/z, z6.b, #-2
 889     __ sve_fcm(Assembler::EQ, p1, __ S, p0, z0, z1);   //       fcmeq   p1.s, p0/z, z0.s, z1.s
 890     __ sve_fcm(Assembler::NE, p1, __ D, p0, z2, z3);   //       fcmne   p1.d, p0/z, z2.d, z3.d
 891     __ sve_fcm(Assembler::GT, p1, __ S, p2, z4, z5);   //       fcmgt   p1.s, p2/z, z4.s, z5.s
 892     __ sve_fcm(Assembler::GE, p1, __ D, p3, z6, z7);   //       fcmge   p1.d, p3/z, z6.d, z7.d
 893     __ sve_uunpkhi(z0, __ H, z1);                      //       uunpkhi z0.h, z1.b
 894     __ sve_uunpklo(z4, __ S, z5);                      //       uunpklo z4.s, z5.h
 895     __ sve_sunpkhi(z6, __ D, z7);                      //       sunpkhi z6.d, z7.s
 896     __ sve_sunpklo(z10, __ H, z11);                    //       sunpklo z10.h, z11.b
 897     __ sve_scvtf(z1, __ D, p0, z0, __ S);              //       scvtf   z1.d, p0/m, z0.s
 898     __ sve_scvtf(z3, __ D, p1, z2, __ D);              //       scvtf   z3.d, p1/m, z2.d
 899     __ sve_scvtf(z6, __ S, p2, z1, __ D);              //       scvtf   z6.s, p2/m, z1.d
 900     __ sve_scvtf(z6, __ S, p3, z1, __ S);              //       scvtf   z6.s, p3/m, z1.s
 901     __ sve_scvtf(z6, __ H, p3, z1, __ S);              //       scvtf   z6.h, p3/m, z1.s
 902     __ sve_scvtf(z6, __ H, p3, z1, __ D);              //       scvtf   z6.h, p3/m, z1.d
 903     __ sve_scvtf(z6, __ H, p3, z1, __ H);              //       scvtf   z6.h, p3/m, z1.h
 904     __ sve_fcvt(z5, __ D, p3, z4, __ S);               //       fcvt    z5.d, p3/m, z4.s
 905     __ sve_fcvt(z1, __ S, p3, z0, __ D);               //       fcvt    z1.s, p3/m, z0.d
 906     __ sve_fcvtzs(z19, __ D, p2, z1, __ D);            //       fcvtzs  z19.d, p2/m, z1.d
 907     __ sve_fcvtzs(z9, __ S, p1, z8, __ S);             //       fcvtzs  z9.s, p1/m, z8.s
 908     __ sve_fcvtzs(z1, __ S, p2, z0, __ D);             //       fcvtzs  z1.s, p2/m, z0.d
 909     __ sve_fcvtzs(z1, __ D, p3, z0, __ S);             //       fcvtzs  z1.d, p3/m, z0.s
 910     __ sve_fcvtzs(z1, __ S, p4, z18, __ H);            //       fcvtzs  z1.s, p4/m, z18.h
 911     __ sve_lasta(r0, __ B, p0, z15);                   //       lasta   w0, p0, z15.b
 912     __ sve_lastb(r1, __ B, p1, z16);                   //       lastb   w1, p1, z16.b
 913     __ sve_lasta(v0, __ B, p0, z15);                   //       lasta   b0, p0, z15.b
 914     __ sve_lastb(v1, __ B, p1, z16);                   //       lastb   b1, p1, z16.b
 915     __ sve_index(z6, __ S, 1, 1);                      //       index   z6.s, #1, #1
 916     __ sve_index(z6, __ B, r5, 2);                     //       index   z6.b, w5, #2
 917     __ sve_index(z6, __ H, r5, 3);                     //       index   z6.h, w5, #3
 918     __ sve_index(z6, __ S, r5, 4);                     //       index   z6.s, w5, #4
 919     __ sve_index(z7, __ D, r5, 5);                     //       index   z7.d, x5, #5
 920     __ sve_cpy(z7, __ H, p3, r5);                      //       cpy     z7.h, p3/m, w5
 921     __ sve_tbl(z16, __ S, z17, z18);                   //       tbl     z16.s, {z17.s}, z18.s
 922     __ sve_ld1w_gather(z15, p0, r5, z16);              //       ld1w    {z15.s}, p0/z, [x5, z16.s, uxtw #2]
 923     __ sve_ld1d_gather(z15, p0, r5, z16);              //       ld1d    {z15.d}, p0/z, [x5, z16.d, uxtw #3]
 924     __ sve_st1w_scatter(z15, p0, r5, z16);             //       st1w    {z15.s}, p0, [x5, z16.s, uxtw #2]
 925     __ sve_st1d_scatter(z15, p0, r5, z16);             //       st1d    {z15.d}, p0, [x5, z16.d, uxtw #3]
 926     __ sve_and(p0, p1, p2, p3);                        //       and     p0.b, p1/z, p2.b, p3.b
 927     __ sve_ands(p4, p5, p6, p0);                       //       ands    p4.b, p5/z, p6.b, p0.b
 928     __ sve_eor(p0, p1, p2, p3);                        //       eor     p0.b, p1/z, p2.b, p3.b
 929     __ sve_eors(p5, p6, p0, p1);                       //       eors    p5.b, p6/z, p0.b, p1.b
 930     __ sve_orr(p0, p1, p2, p3);                        //       orr     p0.b, p1/z, p2.b, p3.b
 931     __ sve_orrs(p9, p1, p4, p5);                       //       orrs    p9.b, p1/z, p4.b, p5.b
 932     __ sve_bic(p10, p7, p9, p11);                      //       bic     p10.b, p7/z, p9.b, p11.b
 933     __ sve_ptest(p7, p1);                              //       ptest   p7, p1.b
 934     __ sve_ptrue(p1, __ B);                            //       ptrue   p1.b
 935     __ sve_ptrue(p1, __ B, 0b00001);                   //       ptrue   p1.b, vl1
 936     __ sve_ptrue(p1, __ B, 0b00101);                   //       ptrue   p1.b, vl5
 937     __ sve_ptrue(p1, __ B, 0b01001);                   //       ptrue   p1.b, vl16
 938     __ sve_ptrue(p1, __ B, 0b01101);                   //       ptrue   p1.b, vl256
 939     __ sve_ptrue(p2, __ H);                            //       ptrue   p2.h
 940     __ sve_ptrue(p2, __ H, 0b00010);                   //       ptrue   p2.h, vl2
 941     __ sve_ptrue(p2, __ H, 0b00110);                   //       ptrue   p2.h, vl6
 942     __ sve_ptrue(p2, __ H, 0b01010);                   //       ptrue   p2.h, vl32
 943     __ sve_ptrue(p3, __ S);                            //       ptrue   p3.s
 944     __ sve_ptrue(p3, __ S, 0b00011);                   //       ptrue   p3.s, vl3
 945     __ sve_ptrue(p3, __ S, 0b00111);                   //       ptrue   p3.s, vl7
 946     __ sve_ptrue(p3, __ S, 0b01011);                   //       ptrue   p3.s, vl64
 947     __ sve_ptrue(p4, __ D);                            //       ptrue   p4.d
 948     __ sve_ptrue(p4, __ D, 0b00100);                   //       ptrue   p4.d, vl4
 949     __ sve_ptrue(p4, __ D, 0b01000);                   //       ptrue   p4.d, vl8
 950     __ sve_ptrue(p4, __ D, 0b01100);                   //       ptrue   p4.d, vl128
 951     __ sve_pfalse(p7);                                 //       pfalse  p7.b
 952     __ sve_uzp1(p0, __ B, p0, p1);                     //       uzp1    p0.b, p0.b, p1.b
 953     __ sve_uzp1(p0, __ H, p0, p1);                     //       uzp1    p0.h, p0.h, p1.h
 954     __ sve_uzp1(p0, __ S, p0, p1);                     //       uzp1    p0.s, p0.s, p1.s
 955     __ sve_uzp1(p0, __ D, p0, p1);                     //       uzp1    p0.d, p0.d, p1.d
 956     __ sve_uzp2(p0, __ B, p0, p1);                     //       uzp2    p0.b, p0.b, p1.b
 957     __ sve_uzp2(p0, __ H, p0, p1);                     //       uzp2    p0.h, p0.h, p1.h
 958     __ sve_uzp2(p0, __ S, p0, p1);                     //       uzp2    p0.s, p0.s, p1.s
 959     __ sve_uzp2(p0, __ D, p0, p1);                     //       uzp2    p0.d, p0.d, p1.d
 960     __ sve_punpklo(p1, p0);                            //       punpklo p1.h, p0.b
 961     __ sve_punpkhi(p1, p0);                            //       punpkhi p1.h, p0.b
 962     __ sve_compact(z16, __ S, z16, p1);                //       compact z16.s, p1, z16.s
 963     __ sve_compact(z16, __ D, z16, p1);                //       compact z16.d, p1, z16.d
 964     __ sve_ext(z17, z16, 63);                          //       ext     z17.b, z17.b, z16.b, #63
 965     __ sve_histcnt(z16, __ S, p0, z16, z16);           //       histcnt z16.s, p0/z, z16.s, z16.s
 966     __ sve_histcnt(z17, __ D, p0, z17, z17);           //       histcnt z17.d, p0/z, z17.d, z17.d
 967 
 968 // FloatImmediateOp
 969     __ fmovd(v0, 2.0);                                 //       fmov d0, #2.0
 970     __ fmovd(v0, 2.125);                               //       fmov d0, #2.125
 971     __ fmovd(v0, 4.0);                                 //       fmov d0, #4.0
 972     __ fmovd(v0, 4.25);                                //       fmov d0, #4.25
 973     __ fmovd(v0, 8.0);                                 //       fmov d0, #8.0
 974     __ fmovd(v0, 8.5);                                 //       fmov d0, #8.5
 975     __ fmovd(v0, 16.0);                                //       fmov d0, #16.0
 976     __ fmovd(v0, 17.0);                                //       fmov d0, #17.0
 977     __ fmovd(v0, 0.125);                               //       fmov d0, #0.125
 978     __ fmovd(v0, 0.1328125);                           //       fmov d0, #0.1328125
 979     __ fmovd(v0, 0.25);                                //       fmov d0, #0.25
 980     __ fmovd(v0, 0.265625);                            //       fmov d0, #0.265625
 981     __ fmovd(v0, 0.5);                                 //       fmov d0, #0.5
 982     __ fmovd(v0, 0.53125);                             //       fmov d0, #0.53125
 983     __ fmovd(v0, 1.0);                                 //       fmov d0, #1.0
 984     __ fmovd(v0, 1.0625);                              //       fmov d0, #1.0625
 985     __ fmovd(v0, -2.0);                                //       fmov d0, #-2.0
 986     __ fmovd(v0, -2.125);                              //       fmov d0, #-2.125
 987     __ fmovd(v0, -4.0);                                //       fmov d0, #-4.0
 988     __ fmovd(v0, -4.25);                               //       fmov d0, #-4.25
 989     __ fmovd(v0, -8.0);                                //       fmov d0, #-8.0
 990     __ fmovd(v0, -8.5);                                //       fmov d0, #-8.5
 991     __ fmovd(v0, -16.0);                               //       fmov d0, #-16.0
 992     __ fmovd(v0, -17.0);                               //       fmov d0, #-17.0
 993     __ fmovd(v0, -0.125);                              //       fmov d0, #-0.125
 994     __ fmovd(v0, -0.1328125);                          //       fmov d0, #-0.1328125
 995     __ fmovd(v0, -0.25);                               //       fmov d0, #-0.25
 996     __ fmovd(v0, -0.265625);                           //       fmov d0, #-0.265625
 997     __ fmovd(v0, -0.5);                                //       fmov d0, #-0.5
 998     __ fmovd(v0, -0.53125);                            //       fmov d0, #-0.53125
 999     __ fmovd(v0, -1.0);                                //       fmov d0, #-1.0
1000     __ fmovd(v0, -1.0625);                             //       fmov d0, #-1.0625
1001 
1002 // LSEOp
1003     __ swp(Assembler::xword, r12, zr, r10);            //       swp     x12, xzr, [x10]
1004     __ ldadd(Assembler::xword, r16, r7, r2);           //       ldadd   x16, x7, [x2]
1005     __ ldbic(Assembler::xword, r3, r13, r19);          //       ldclr   x3, x13, [x19]
1006     __ ldeor(Assembler::xword, r17, r16, r3);          //       ldeor   x17, x16, [x3]
1007     __ ldorr(Assembler::xword, r1, r11, r30);          //       ldset   x1, x11, [x30]
1008     __ ldsmin(Assembler::xword, r5, r8, r15);          //       ldsmin  x5, x8, [x15]
1009     __ ldsmax(Assembler::xword, r29, r30, r0);         //       ldsmax  x29, x30, [x0]
1010     __ ldumin(Assembler::xword, r20, r7, r20);         //       ldumin  x20, x7, [x20]
1011     __ ldumax(Assembler::xword, r23, r28, r21);        //       ldumax  x23, x28, [x21]
1012 
1013 // LSEOp
1014     __ swpa(Assembler::xword, r27, r25, r5);           //       swpa    x27, x25, [x5]
1015     __ ldadda(Assembler::xword, r1, r23, r16);         //       ldadda  x1, x23, [x16]
1016     __ ldbica(Assembler::xword, zr, r5, r12);          //       ldclra  xzr, x5, [x12]
1017     __ ldeora(Assembler::xword, r9, r28, r15);         //       ldeora  x9, x28, [x15]
1018     __ ldorra(Assembler::xword, r29, r22, sp);         //       ldseta  x29, x22, [sp]
1019     __ ldsmina(Assembler::xword, r19, zr, r5);         //       ldsmina x19, xzr, [x5]
1020     __ ldsmaxa(Assembler::xword, r14, r16, sp);        //       ldsmaxa x14, x16, [sp]
1021     __ ldumina(Assembler::xword, r16, r27, r20);       //       ldumina x16, x27, [x20]
1022     __ ldumaxa(Assembler::xword, r16, r12, r11);       //       ldumaxa x16, x12, [x11]
1023 
1024 // LSEOp
1025     __ swpal(Assembler::xword, r9, r6, r30);           //       swpal   x9, x6, [x30]
1026     __ ldaddal(Assembler::xword, r17, r27, r28);       //       ldaddal x17, x27, [x28]
1027     __ ldbical(Assembler::xword, r30, r7, r10);        //       ldclral x30, x7, [x10]
1028     __ ldeoral(Assembler::xword, r20, r10, r4);        //       ldeoral x20, x10, [x4]
1029     __ ldorral(Assembler::xword, r24, r17, r17);       //       ldsetal x24, x17, [x17]
1030     __ ldsminal(Assembler::xword, r22, r3, r29);       //       ldsminal        x22, x3, [x29]
1031     __ ldsmaxal(Assembler::xword, r15, r22, r19);      //       ldsmaxal        x15, x22, [x19]
1032     __ lduminal(Assembler::xword, r19, r22, r2);       //       lduminal        x19, x22, [x2]
1033     __ ldumaxal(Assembler::xword, r15, r6, r12);       //       ldumaxal        x15, x6, [x12]
1034 
1035 // LSEOp
1036     __ swpl(Assembler::xword, r16, r11, r13);          //       swpl    x16, x11, [x13]
1037     __ ldaddl(Assembler::xword, r23, r1, r30);         //       ldaddl  x23, x1, [x30]
1038     __ ldbicl(Assembler::xword, r19, r5, r17);         //       ldclrl  x19, x5, [x17]
1039     __ ldeorl(Assembler::xword, r2, r16, r22);         //       ldeorl  x2, x16, [x22]
1040     __ ldorrl(Assembler::xword, r13, r10, r21);        //       ldsetl  x13, x10, [x21]
1041     __ ldsminl(Assembler::xword, r29, r27, r12);       //       ldsminl x29, x27, [x12]
1042     __ ldsmaxl(Assembler::xword, r27, r3, r1);         //       ldsmaxl x27, x3, [x1]
1043     __ lduminl(Assembler::xword, zr, r24, r19);        //       lduminl xzr, x24, [x19]
1044     __ ldumaxl(Assembler::xword, r17, r9, r28);        //       ldumaxl x17, x9, [x28]
1045 
1046 // LSEOp
1047     __ swp(Assembler::word, r27, r15, r7);             //       swp     w27, w15, [x7]
1048     __ ldadd(Assembler::word, r21, r23, sp);           //       ldadd   w21, w23, [sp]
1049     __ ldbic(Assembler::word, r25, r2, sp);            //       ldclr   w25, w2, [sp]
1050     __ ldeor(Assembler::word, r27, r16, r10);          //       ldeor   w27, w16, [x10]
1051     __ ldorr(Assembler::word, r23, r19, r3);           //       ldset   w23, w19, [x3]
1052     __ ldsmin(Assembler::word, r16, r0, r25);          //       ldsmin  w16, w0, [x25]
1053     __ ldsmax(Assembler::word, r26, r23, r2);          //       ldsmax  w26, w23, [x2]
1054     __ ldumin(Assembler::word, r16, r12, r4);          //       ldumin  w16, w12, [x4]
1055     __ ldumax(Assembler::word, r28, r30, r29);         //       ldumax  w28, w30, [x29]
1056 
1057 // LSEOp
1058     __ swpa(Assembler::word, r16, r27, r6);            //       swpa    w16, w27, [x6]
1059     __ ldadda(Assembler::word, r9, r29, r15);          //       ldadda  w9, w29, [x15]
1060     __ ldbica(Assembler::word, r7, r4, r7);            //       ldclra  w7, w4, [x7]
1061     __ ldeora(Assembler::word, r15, r9, r23);          //       ldeora  w15, w9, [x23]
1062     __ ldorra(Assembler::word, r8, r2, r28);           //       ldseta  w8, w2, [x28]
1063     __ ldsmina(Assembler::word, r21, zr, r5);          //       ldsmina w21, wzr, [x5]
1064     __ ldsmaxa(Assembler::word, r27, r0, r17);         //       ldsmaxa w27, w0, [x17]
1065     __ ldumina(Assembler::word, r15, r4, r26);         //       ldumina w15, w4, [x26]
1066     __ ldumaxa(Assembler::word, r8, r28, r22);         //       ldumaxa w8, w28, [x22]
1067 
1068 // LSEOp
1069     __ swpal(Assembler::word, r27, r27, r25);          //       swpal   w27, w27, [x25]
1070     __ ldaddal(Assembler::word, r23, r0, r4);          //       ldaddal w23, w0, [x4]
1071     __ ldbical(Assembler::word, r6, r16, r0);          //       ldclral w6, w16, [x0]
1072     __ ldeoral(Assembler::word, r4, r15, r1);          //       ldeoral w4, w15, [x1]
1073     __ ldorral(Assembler::word, r10, r7, r5);          //       ldsetal w10, w7, [x5]
1074     __ ldsminal(Assembler::word, r10, r28, r7);        //       ldsminal        w10, w28, [x7]
1075     __ ldsmaxal(Assembler::word, r20, r23, r21);       //       ldsmaxal        w20, w23, [x21]
1076     __ lduminal(Assembler::word, r6, r11, r8);         //       lduminal        w6, w11, [x8]
1077     __ ldumaxal(Assembler::word, r17, zr, r6);         //       ldumaxal        w17, wzr, [x6]
1078 
1079 // LSEOp
1080     __ swpl(Assembler::word, r17, r2, r12);            //       swpl    w17, w2, [x12]
1081     __ ldaddl(Assembler::word, r30, r29, r3);          //       ldaddl  w30, w29, [x3]
1082     __ ldbicl(Assembler::word, r27, r22, r29);         //       ldclrl  w27, w22, [x29]
1083     __ ldeorl(Assembler::word, r14, r13, r28);         //       ldeorl  w14, w13, [x28]
1084     __ ldorrl(Assembler::word, r17, r24, r5);          //       ldsetl  w17, w24, [x5]
1085     __ ldsminl(Assembler::word, r2, r14, r10);         //       ldsminl w2, w14, [x10]
1086     __ ldsmaxl(Assembler::word, r16, r11, r27);        //       ldsmaxl w16, w11, [x27]
1087     __ lduminl(Assembler::word, r23, r12, r4);         //       lduminl w23, w12, [x4]
1088     __ ldumaxl(Assembler::word, r22, r17, r4);         //       ldumaxl w22, w17, [x4]
1089 
1090 // SHA3SIMDOp
1091     __ bcax(v1, __ T16B, v19, v16, v17);               //       bcax            v1.16B, v19.16B, v16.16B, v17.16B
1092     __ eor3(v12, __ T16B, v14, v12, v2);               //       eor3            v12.16B, v14.16B, v12.16B, v2.16B
1093     __ rax1(v16, __ T2D, v3, v20);                     //       rax1            v16.2D, v3.2D, v20.2D
1094     __ xar(v23, __ T2D, v5, v6, 15);                   //       xar             v23.2D, v5.2D, v6.2D, #15
1095 
1096 // SHA512SIMDOp
1097     __ sha512h(v17, __ T2D, v12, v27);                 //       sha512h         q17, q12, v27.2D
1098     __ sha512h2(v16, __ T2D, v16, v6);                 //       sha512h2                q16, q16, v6.2D
1099     __ sha512su0(v2, __ T2D, v28);                     //       sha512su0               v2.2D, v28.2D
1100     __ sha512su1(v3, __ T2D, v4, v6);                  //       sha512su1               v3.2D, v4.2D, v6.2D
1101 
1102 // SVEBinaryImmOp
1103     __ sve_add(z17, __ S, 110u);                       //       add     z17.s, z17.s, #0x6e
1104     __ sve_sub(z12, __ S, 67u);                        //       sub     z12.s, z12.s, #0x43
1105     __ sve_and(z24, __ S, 63u);                        //       and     z24.s, z24.s, #0x3f
1106     __ sve_eor(z10, __ D, 18374686479671656447u);      //       eor     z10.d, z10.d, #0xff00000000007fff
1107     __ sve_orr(z30, __ H, 511u);                       //       orr     z30.h, z30.h, #0x1ff
1108 
1109 // SVEBinaryImmOp
1110     __ sve_add(z0, __ B, 120u);                        //       add     z0.b, z0.b, #0x78
1111     __ sve_sub(z17, __ D, 74u);                        //       sub     z17.d, z17.d, #0x4a
1112     __ sve_and(z10, __ S, 4261413375u);                //       and     z10.s, z10.s, #0xfe0001ff
1113     __ sve_eor(z27, __ B, 128u);                       //       eor     z27.b, z27.b, #0x80
1114     __ sve_orr(z17, __ S, 253952u);                    //       orr     z17.s, z17.s, #0x3e000
1115 
1116 // SVEBinaryImmOp
1117     __ sve_add(z28, __ B, 4u);                         //       add     z28.b, z28.b, #0x4
1118     __ sve_sub(z8, __ S, 162u);                        //       sub     z8.s, z8.s, #0xa2
1119     __ sve_and(z22, __ B, 96u);                        //       and     z22.b, z22.b, #0x60
1120     __ sve_eor(z22, __ H, 511u);                       //       eor     z22.h, z22.h, #0x1ff
1121     __ sve_orr(z30, __ S, 4261413375u);                //       orr     z30.s, z30.s, #0xfe0001ff
1122 
1123 // SVEBinaryImmOp
1124     __ sve_add(z11, __ B, 112u);                       //       add     z11.b, z11.b, #0x70
1125     __ sve_sub(z8, __ S, 134u);                        //       sub     z8.s, z8.s, #0x86
1126     __ sve_and(z25, __ H, 508u);                       //       and     z25.h, z25.h, #0x1fc
1127     __ sve_eor(z17, __ H, 65283u);                     //       eor     z17.h, z17.h, #0xff03
1128     __ sve_orr(z4, __ D, 18446744073172942847u);       //       orr     z4.d, z4.d, #0xffffffffe003ffff
1129 
1130 // SVEBinaryImmOp
1131     __ sve_add(z26, __ H, 120u);                       //       add     z26.h, z26.h, #0x78
1132     __ sve_sub(z2, __ H, 237u);                        //       sub     z2.h, z2.h, #0xed
1133     __ sve_and(z3, __ B, 243u);                        //       and     z3.b, z3.b, #0xf3
1134     __ sve_eor(z21, __ S, 25166208u);                  //       eor     z21.s, z21.s, #0x1800180
1135     __ sve_orr(z17, __ S, 917504u);                    //       orr     z17.s, z17.s, #0xe0000
1136 
1137 // SVEBinaryImmOp
1138     __ sve_add(z19, __ S, 148u);                       //       add     z19.s, z19.s, #0x94
1139     __ sve_sub(z22, __ S, 244u);                       //       sub     z22.s, z22.s, #0xf4
1140     __ sve_and(z20, __ S, 491520u);                    //       and     z20.s, z20.s, #0x78000
1141     __ sve_eor(z17, __ D, 18302628885642084351u);      //       eor     z17.d, z17.d, #0xfe000000007fffff
1142     __ sve_orr(z4, __ D, 18158513714670600195u);       //       orr     z4.d, z4.d, #0xfc000003fc000003
1143 
1144 // SVEVectorOp
1145     __ sve_add(z2, __ H, z8, z8);                      //       add     z2.h, z8.h, z8.h
1146     __ sve_sub(z24, __ S, z17, z30);                   //       sub     z24.s, z17.s, z30.s
1147     __ sve_fadd(z4, __ S, z30, z1);                    //       fadd    z4.s, z30.s, z1.s
1148     __ sve_fmul(z19, __ S, z12, z0);                   //       fmul    z19.s, z12.s, z0.s
1149     __ sve_fsub(z7, __ S, z24, z17);                   //       fsub    z7.s, z24.s, z17.s
1150     __ sve_abs(z27, __ D, p1, z9);                     //       abs     z27.d, p1/m, z9.d
1151     __ sve_add(z23, __ D, p3, z16);                    //       add     z23.d, p3/m, z23.d, z16.d
1152     __ sve_and(z22, __ D, p5, z20);                    //       and     z22.d, p5/m, z22.d, z20.d
1153     __ sve_asr(z28, __ S, p2, z13);                    //       asr     z28.s, p2/m, z28.s, z13.s
1154     __ sve_bic(z7, __ H, p5, z28);                     //       bic     z7.h, p5/m, z7.h, z28.h
1155     __ sve_clz(z11, __ S, p3, z11);                    //       clz     z11.s, p3/m, z11.s
1156     __ sve_cnt(z1, __ S, p6, z8);                      //       cnt     z1.s, p6/m, z8.s
1157     __ sve_eor(z13, __ S, p4, z17);                    //       eor     z13.s, p4/m, z13.s, z17.s
1158     __ sve_lsl(z4, __ H, p0, z3);                      //       lsl     z4.h, p0/m, z4.h, z3.h
1159     __ sve_lsr(z7, __ S, p3, z14);                     //       lsr     z7.s, p3/m, z7.s, z14.s
1160     __ sve_mul(z4, __ B, p3, z29);                     //       mul     z4.b, p3/m, z4.b, z29.b
1161     __ sve_neg(z0, __ D, p2, z21);                     //       neg     z0.d, p2/m, z21.d
1162     __ sve_not(z3, __ S, p0, z9);                      //       not     z3.s, p0/m, z9.s
1163     __ sve_orr(z28, __ B, p2, z24);                    //       orr     z28.b, p2/m, z28.b, z24.b
1164     __ sve_rbit(z19, __ D, p1, z23);                   //       rbit    z19.d, p1/m, z23.d
1165     __ sve_revb(z13, __ D, p5, z10);                   //       revb    z13.d, p5/m, z10.d
1166     __ sve_smax(z12, __ S, p4, z30);                   //       smax    z12.s, p4/m, z12.s, z30.s
1167     __ sve_smin(z14, __ S, p0, z29);                   //       smin    z14.s, p0/m, z14.s, z29.s
1168     __ sve_sub(z21, __ S, p5, z7);                     //       sub     z21.s, p5/m, z21.s, z7.s
1169     __ sve_fabs(z2, __ D, p0, z26);                    //       fabs    z2.d, p0/m, z26.d
1170     __ sve_fadd(z9, __ D, p4, z17);                    //       fadd    z9.d, p4/m, z9.d, z17.d
1171     __ sve_fdiv(z0, __ D, p1, z2);                     //       fdiv    z0.d, p1/m, z0.d, z2.d
1172     __ sve_fmax(z14, __ D, p1, z11);                   //       fmax    z14.d, p1/m, z14.d, z11.d
1173     __ sve_fmin(z14, __ S, p4, z29);                   //       fmin    z14.s, p4/m, z14.s, z29.s
1174     __ sve_fmul(z3, __ S, p0, z22);                    //       fmul    z3.s, p0/m, z3.s, z22.s
1175     __ sve_fneg(z3, __ S, p6, z27);                    //       fneg    z3.s, p6/m, z27.s
1176     __ sve_frintm(z19, __ D, p5, z7);                  //       frintm  z19.d, p5/m, z7.d
1177     __ sve_frintn(z21, __ S, p3, z5);                  //       frintn  z21.s, p3/m, z5.s
1178     __ sve_frintp(z25, __ D, p1, z21);                 //       frintp  z25.d, p1/m, z21.d
1179     __ sve_fsqrt(z17, __ S, p0, z3);                   //       fsqrt   z17.s, p0/m, z3.s
1180     __ sve_fsub(z19, __ S, p3, z7);                    //       fsub    z19.s, p3/m, z19.s, z7.s
1181     __ sve_fmad(z14, __ S, p4, z17, z11);              //       fmad    z14.s, p4/m, z17.s, z11.s
1182     __ sve_fmla(z24, __ S, p4, z30, z17);              //       fmla    z24.s, p4/m, z30.s, z17.s
1183     __ sve_fmls(z15, __ D, p3, z26, z22);              //       fmls    z15.d, p3/m, z26.d, z22.d
1184     __ sve_fmsb(z22, __ D, p2, z8, z5);                //       fmsb    z22.d, p2/m, z8.d, z5.d
1185     __ sve_fnmad(z27, __ D, p2, z0, z14);              //       fnmad   z27.d, p2/m, z0.d, z14.d
1186     __ sve_fnmsb(z21, __ D, p5, z0, z3);               //       fnmsb   z21.d, p5/m, z0.d, z3.d
1187     __ sve_fnmla(z25, __ D, p1, z25, z29);             //       fnmla   z25.d, p1/m, z25.d, z29.d
1188     __ sve_fnmls(z17, __ D, p0, z12, z14);             //       fnmls   z17.d, p0/m, z12.d, z14.d
1189     __ sve_mla(z13, __ D, p0, z17, z2);                //       mla     z13.d, p0/m, z17.d, z2.d
1190     __ sve_mls(z20, __ H, p5, z21, z29);               //       mls     z20.h, p5/m, z21.h, z29.h
1191     __ sve_and(z8, z2, z0);                            //       and     z8.d, z2.d, z0.d
1192     __ sve_eor(z23, z22, z0);                          //       eor     z23.d, z22.d, z0.d
1193     __ sve_orr(z25, z26, z23);                         //       orr     z25.d, z26.d, z23.d
1194     __ sve_bic(z21, z21, z1);                          //       bic     z21.d, z21.d, z1.d
1195     __ sve_uzp1(z10, __ S, z19, z11);                  //       uzp1    z10.s, z19.s, z11.s
1196     __ sve_uzp2(z23, __ D, z23, z8);                   //       uzp2    z23.d, z23.d, z8.d
1197 
1198 // SVEReductionOp
1199     __ sve_andv(v17, __ S, p5, z19);                   //       andv s17, p5, z19.s
1200     __ sve_orv(v4, __ D, p5, z13);                     //       orv d4, p5, z13.d
1201     __ sve_eorv(v22, __ D, p7, z30);                   //       eorv d22, p7, z30.d
1202     __ sve_smaxv(v17, __ H, p4, z14);                  //       smaxv h17, p4, z14.h
1203     __ sve_sminv(v12, __ B, p7, z20);                  //       sminv b12, p7, z20.b
1204     __ sve_fminv(v1, __ S, p3, z13);                   //       fminv s1, p3, z13.s
1205     __ sve_fmaxv(v7, __ D, p2, z11);                   //       fmaxv d7, p2, z11.d
1206     __ sve_fadda(v4, __ S, p6, z15);                   //       fadda s4, p6, s4, z15.s
1207     __ sve_uaddv(v3, __ S, p7, z0);                    //       uaddv d3, p7, z0.s
1208 
1209     __ bind(forth);
1210 
1211 /*
1212 */
1213 
1214   static const unsigned int insns[] =
1215   {
1216     0x8b0d82fa,     0xcb49970c,     0xab889dfc,     0xeb9ee787,
1217     0x0b9b3ec9,     0x4b9179a3,     0x2b88474e,     0x6b8c56c0,
1218     0x8a1a51e0,     0xaa11f4ba,     0xca0281b8,     0xea918c7c,
1219     0x0a5d4a19,     0x2a4b262d,     0x4a513ca5,     0x6a9b6ae2,
1220     0x8a70b79b,     0xaaba9728,     0xca6dfe3d,     0xea627f1c,
1221     0x0aa70f53,     0x2aaa0f06,     0x4a6176a4,     0x6a604eb0,
1222     0x1105ed91,     0x3100583e,     0x5101f8bd,     0x710f0306,
1223     0x9101a1a0,     0xb10a5cc8,     0xd10810aa,     0xf10fd061,
1224     0x120cb166,     0x321764bc,     0x52174681,     0x720c0227,
1225     0x9241018e,     0xb25a2969,     0xd278b411,     0xf26aad01,
1226     0x14000000,     0x17ffffd7,     0x140003ef,     0x94000000,
1227     0x97ffffd4,     0x940003ec,     0x3400000a,     0x34fffa2a,
1228     0x34007d2a,     0x35000008,     0x35fff9c8,     0x35007cc8,
1229     0xb400000b,     0xb4fff96b,     0xb4007c6b,     0xb500001d,
1230     0xb5fff91d,     0xb5007c1d,     0x10000013,     0x10fff8b3,
1231     0x10007bb3,     0x90000013,     0x36300016,     0x3637f836,
1232     0x36307b36,     0x3758000c,     0x375ff7cc,     0x37587acc,
1233     0x128313a0,     0x528a32c7,     0x7289173b,     0x92ab3acc,
1234     0xd2a0bf94,     0xf2c285e8,     0x9358722f,     0x330e652f,
1235     0x53067f3b,     0x93577c53,     0xb34a1aac,     0xd35a4016,
1236     0x13946c63,     0x93c3dbc8,     0x54000000,     0x54fff5a0,
1237     0x540078a0,     0x54000001,     0x54fff541,     0x54007841,
1238     0x54000002,     0x54fff4e2,     0x540077e2,     0x54000002,
1239     0x54fff482,     0x54007782,     0x54000003,     0x54fff423,
1240     0x54007723,     0x54000003,     0x54fff3c3,     0x540076c3,
1241     0x54000004,     0x54fff364,     0x54007664,     0x54000005,
1242     0x54fff305,     0x54007605,     0x54000006,     0x54fff2a6,
1243     0x540075a6,     0x54000007,     0x54fff247,     0x54007547,
1244     0x54000008,     0x54fff1e8,     0x540074e8,     0x54000009,
1245     0x54fff189,     0x54007489,     0x5400000a,     0x54fff12a,
1246     0x5400742a,     0x5400000b,     0x54fff0cb,     0x540073cb,
1247     0x5400000c,     0x54fff06c,     0x5400736c,     0x5400000d,
1248     0x54fff00d,     0x5400730d,     0x5400000e,     0x54ffefae,
1249     0x540072ae,     0x5400000f,     0x54ffef4f,     0x5400724f,
1250     0xd40658e1,     0xd4014d22,     0xd4046543,     0xd4273f60,
1251     0xd44cad80,     0xd503201f,     0xd503203f,     0xd503205f,
1252     0xd503209f,     0xd50320bf,     0xd503219f,     0xd50323bf,
1253     0xd503239f,     0xd50321df,     0xd50323ff,     0xd50323df,
1254     0xd503211f,     0xd503233f,     0xd503231f,     0xd503215f,
1255     0xd503237f,     0xd503235f,     0xd69f03e0,     0xd6bf03e0,
1256     0xd5033fdf,     0xd503207f,     0xd50320ff,     0xd5033e9f,
1257     0xd50332bf,     0xd61f0200,     0xd63f0280,     0xdac123ea,
1258     0xdac127fb,     0xdac12be8,     0xdac12fe0,     0xdac133e1,
1259     0xdac137f5,     0xdac13bf1,     0xdac13ffd,     0xdac147fd,
1260     0xd61f0b9f,     0xd61f0c3f,     0xd63f0aff,     0xd63f0ebf,
1261     0xdac143f4,     0xc8167e7b,     0xc80bfcd0,     0xc85f7c11,
1262     0xc85ffd44,     0xc89ffed8,     0xc8dffe6a,     0x88017fc5,
1263     0x8808fe2c,     0x885f7dc9,     0x885ffc27,     0x889ffe05,
1264     0x88dffd82,     0x480a7c6c,     0x481cff4e,     0x485f7d5e,
1265     0x485ffeae,     0x489ffd2d,     0x48dfff76,     0x081c7d73,
1266     0x081efc53,     0x085f7ee2,     0x085ffc01,     0x089ffe0c,
1267     0x08dffded,     0xc87f55b1,     0xc87ff90b,     0xc8382c2d,
1268     0xc83aedb5,     0x887f0d94,     0x887f87a6,     0x88262e04,
1269     0x8824b2be,     0xf8061366,     0xb802d151,     0x381e32da,
1270     0x781ce155,     0xf847d30e,     0xb85f0307,     0x39403448,
1271     0x785c333e,     0x389f2183,     0x789e422a,     0x78dfb075,
1272     0xb8817322,     0xfc5bb039,     0xbc40637d,     0xfc02919d,
1273     0xbc18d2c2,     0xf8003cba,     0xb8199cb4,     0x381e7d88,
1274     0x781c7c54,     0xf8516fae,     0xb8404fad,     0x385f7e78,
1275     0x785edf63,     0x389fbc31,     0x789f3e71,     0x78de6d75,
1276     0xb89c4d21,     0xfc509efa,     0xbc581eb6,     0xfc128ced,
1277     0xbc198dac,     0xf81134b4,     0xb81b679d,     0x381ea704,
1278     0x781eb52d,     0xf85c94fa,     0xb858d46d,     0x3840c4a1,
1279     0x785de5a8,     0x389e5697,     0x789fe4d4,     0x78dd6629,
1280     0xb89e24d5,     0xfc5e36d0,     0xbc5fd569,     0xfc03c756,
1281     0xbc1fe7b0,     0xf824cac1,     0xb82d7bd7,     0x382c596c,
1282     0x78207999,     0xf86058f1,     0xb86e5a61,     0x3869784c,
1283     0x787bc936,     0x38aff995,     0x78b078dc,     0x78f6ca39,
1284     0xb8bdea24,     0xfc63f825,     0xbc6d5a38,     0xfc37fa31,
1285     0xbc25dbd1,     0xf91ba97d,     0xb91e4abc,     0x391b485c,
1286     0x7919c380,     0xf95e18f9,     0xb958a860,     0x395f20be,
1287     0x7958f6ee,     0x399bea6a,     0x799b363d,     0x79da47d9,
1288     0xb99d5851,     0xfd5da60f,     0xbd584fcc,     0xfd1db821,
1289     0xbd1e9965,     0x58ffdb71,     0x18ffdb42,     0xf886f320,
1290     0xd8ffdb00,     0xf8bb49c0,     0xf99815c0,     0x1a0f0320,
1291     0x3a030301,     0x5a140311,     0x7a0d000b,     0x9a07015c,
1292     0xba1001e4,     0xda140182,     0xfa0d01bd,     0x0b2c6cce,
1293     0x2b3e5331,     0xcb2e0620,     0x6b3de709,     0x8b20cac1,
1294     0xab362f8c,     0xcb31518a,     0xeb2acf8f,     0x3a57d262,
1295     0x7a493226,     0xba4832a2,     0xfa454261,     0x3a518acc,
1296     0x7a472a23,     0xba5cba05,     0xfa439ac5,     0x1a8cb35d,
1297     0x1a8f355b,     0x5a9e9395,     0x5a9e3769,     0x9a9dd1fd,
1298     0x9a8406b9,     0xda9d62b1,     0xda868695,     0x5ac0007e,
1299     0x5ac00675,     0x5ac00b0b,     0x5ac01360,     0x5ac015d9,
1300     0xdac001c3,     0xdac004f1,     0xdac00b0f,     0xdac00e3c,
1301     0xdac01059,     0xdac0179a,     0xdac10325,     0xdac1077a,
1302     0xdac10a30,     0xdac10ea6,     0xdac1100c,     0xdac11584,
1303     0xdac11a3b,     0xdac11f9c,     0xd71f0851,     0xd71f0d4f,
1304     0xd73f09ce,     0xd73f0c79,     0x1ace0a6f,     0x1ac40e05,
1305     0x1ac4233a,     0x1acc2442,     0x1ac82a3d,     0x1ac42c67,
1306     0x9ada0899,     0x9ad10c99,     0x9ad12340,     0x9ad525f7,
1307     0x9adb2a3c,     0x9ac02c6a,     0x9bc97f27,     0x9b5d7de6,
1308     0x1b02454f,     0x1b0bdd67,     0x9b173ba7,     0x9b0b917b,
1309     0x9b2f3998,     0x9b3cb574,     0x9bb7798b,     0x9ba9b5da,
1310     0x7ea5d4ea,     0x1e2309fd,     0x1e2f198b,     0x1e312bde,
1311     0x1e2f3a93,     0x7ef5d52f,     0x1e7b0922,     0x1e7e1ba7,
1312     0x1e622831,     0x1e633946,     0x1f070578,     0x1f03c40b,
1313     0x1f3618dc,     0x1f3a0b60,     0x1f5c2ce5,     0x1f4bddb9,
1314     0x1f715513,     0x1f734699,     0x1e2043a2,     0x1e20c116,
1315     0x1e214275,     0x1e21c174,     0x1e22c291,     0x1e6041e6,
1316     0x1e60c063,     0x1e61407c,     0x1e61c1db,     0x1e62414e,
1317     0x1e38016c,     0x9e380151,     0x1e7800f9,     0x9e7801c7,
1318     0x1e22001c,     0x9e220016,     0x1e6202ec,     0x9e6201ad,
1319     0x1e2401c7,     0x9e640107,     0x1e300234,     0x9e7003dc,
1320     0x1e260050,     0x9e660209,     0x1e2703b4,     0x9e670024,
1321     0x1e382340,     0x1e6e22e0,     0x1e2022a8,     0x1e602188,
1322     0x2928630c,     0x29501616,     0x694e4db4,     0xa90619b1,
1323     0xa9760625,     0x29a652cd,     0x29ca6d5e,     0x69c2534d,
1324     0xa9bb5fa4,     0xa9f900d6,     0x288a6cb1,     0x28e02e0e,
1325     0x68e25d2c,     0xa8821c17,     0xa8c52351,     0x282a3d4b,
1326     0x28484093,     0xa831393e,     0xa8425e9d,     0x0c407365,
1327     0x4cdfa32a,     0x0cd36fcf,     0x4cdf2611,     0x0d40c2fe,
1328     0x4ddfc911,     0x0dc3cd2c,     0x4c408c53,     0x0cdf8515,
1329     0x4d60c08d,     0x0dffc87c,     0x4de0cfbd,     0x4cd54827,
1330     0x0c404811,     0x4d40e4ba,     0x4ddfe839,     0x0dddec56,
1331     0x4cdf076d,     0x0cd7031d,     0x0d60e1ed,     0x0dffe5cf,
1332     0x0df7ea9b,     0x0e31bb38,     0x4e31ba0f,     0x0e71bb59,
1333     0x4e71b9ee,     0x4eb1b96a,     0x0e30a9cd,     0x4e30a9ee,
1334     0x0e70aab4,     0x4e70a841,     0x4eb0aaf6,     0x6e30fbfe,
1335     0x0e31a9ee,     0x2e31a862,     0x4e31a8e6,     0x6e31a883,
1336     0x0e71a907,     0x2e71ab38,     0x4e71a820,     0x6e71ab9b,
1337     0x4eb1abdd,     0x6eb1a8c5,     0x6eb0f8c5,     0x7e30fbdd,
1338     0x7e70f98b,     0x7eb0fb59,     0x7ef0f820,     0x0e20bbfe,
1339     0x4e20b820,     0x0e60ba51,     0x4e60bbbc,     0x0ea0bb59,
1340     0x4ea0b949,     0x4ee0bb59,     0x0ea0f9ac,     0x4ea0fa0f,
1341     0x4ee0f98b,     0x2ea0f96a,     0x6ea0fa51,     0x6ee0fb38,
1342     0x2ea1fad5,     0x6ea1fb17,     0x6ee1f820,     0x2e205a30,
1343     0x6e20596a,     0x0e281ce6,     0x4e3e1fbc,     0x0ea81ce6,
1344     0x4ea71cc5,     0x2e271cc5,     0x6e361eb4,     0x0e338651,
1345     0x4e31860f,     0x0e738651,     0x4e7f87dd,     0x0ebc877a,
1346     0x4ebe87bc,     0x4ee38441,     0x0e3dd79b,     0x4e22d420,
1347     0x4e76d6b4,     0x2e3e87bc,     0x6e31860f,     0x2e6e85ac,
1348     0x6e6c856a,     0x2ebe87bc,     0x6ebe87bc,     0x6ef58693,
1349     0x0eb8d6f6,     0x4eacd56a,     0x4ee6d4a4,     0x0e209ffe,
1350     0x4e369eb4,     0x0e6a9d28,     0x4e609ffe,     0x0eb39e51,
1351     0x4eac9d6a,     0x2ebdd79b,     0x6ea4d462,     0x6efad738,
1352     0x2e26dca4,     0x6e25dc83,     0x6e6add28,     0x0e7896f6,
1353     0x4e739651,     0x0eaf95cd,     0x4ea694a4,     0x0e3ecfbc,
1354     0x4e39cf17,     0x4e77ced5,     0x2e7b9759,     0x6e7a9738,
1355     0x2ea59483,     0x6eb99717,     0x0ebccf7a,     0x4eb9cf17,
1356     0x4ef0cdee,     0x2e37fed5,     0x6e25fc83,     0x6e79ff17,
1357     0x0e2a6528,     0x4e3a6738,     0x0e756693,     0x4e71660f,
1358     0x0eb26630,     0x4ea46462,     0x0e23a441,     0x4e22a420,
1359     0x0e7aa738,     0x4e66a4a4,     0x0ea5a483,     0x4eada58b,
1360     0x0e20f7fe,     0x4e3df79b,     0x4e6bf549,     0x0e3b6f59,
1361     0x4e246c62,     0x0e6e6dac,     0x4e736e51,     0x0ea06ffe,
1362     0x4ea36c41,     0x0e2eadac,     0x4e3eafbc,     0x0e62ac20,
1363     0x4e73ae51,     0x0eaeadac,     0x4eb3ae51,     0x0eb7f6d5,
1364     0x4eaef5ac,     0x4efdf79b,     0x2e3f8fdd,     0x6e208ffe,
1365     0x2e638c41,     0x6e7b8f59,     0x2ebd8f9b,     0x6ea68ca4,
1366     0x6eff8fdd,     0x0e25e483,     0x4e28e4e6,     0x4e7fe7dd,
1367     0x0e3b3759,     0x4e333651,     0x0e6a3528,     0x4e693507,
1368     0x0eae35ac,     0x4ea23420,     0x4ef53693,     0x2e233441,
1369     0x6e393717,     0x2e643462,     0x6e623420,     0x2eaa3528,
1370     0x6eb93717,     0x6efb3759,     0x2e313e0f,     0x6e3f3fdd,
1371     0x2e653c83,     0x6e6c3d6a,     0x2eb83ef6,     0x6eac3d6a,
1372     0x6ee63ca4,     0x2eb3e651,     0x6ea3e441,     0x6eede58b,
1373     0x0e293d07,     0x4e2c3d6a,     0x0e713e0f,     0x4e723e30,
1374     0x0ea43c62,     0x4eab3d49,     0x4eed3d8b,     0x2e2ee5ac,
1375     0x6e30e5ee,     0x6e6fe5cd,     0x65d238c1,     0x65902498,
1376     0x65d03226,     0x65d13549,     0x65d13f36,     0x65d32147,
1377     0xba5fd3e3,     0x3a5f03e5,     0xfa411be4,     0x7a42cbe2,
1378     0x93df03ff,     0xc820ffff,     0x8822fc7f,     0xc8247cbf,
1379     0x88267fff,     0x4e010fe0,     0x5e040420,     0x4e081fe1,
1380     0x4e0c1fe1,     0x4e0a1fe1,     0x4e071fe1,     0x4e042c20,
1381     0x4e062c20,     0x4e052c20,     0x4e083c20,     0x0e0c3c20,
1382     0x0e0a3c20,     0x0e073c20,     0x9eae0020,     0x0f03f409,
1383     0x6f03f40e,     0x4cc0ac3f,     0x0ea1b820,     0x4e21c862,
1384     0x4e61b8a4,     0x05a08020,     0x05104fe0,     0x05505001,
1385     0x05906fe2,     0x05d03005,     0x05101fea,     0x05901feb,
1386     0x04b0e3e0,     0x0470e7e1,     0x042f9c20,     0x043f9c35,
1387     0x047f9c20,     0x04ff9c20,     0x04299420,     0x04319160,
1388     0x0461943e,     0x04a19020,     0x04038100,     0x040381a0,
1389     0x040387e1,     0x04438be2,     0x04c38fe3,     0x040181e0,
1390     0x04018100,     0x04018621,     0x04418b22,     0x04418822,
1391     0x04818c23,     0x040081e0,     0x04008120,     0x04008761,
1392     0x04008621,     0x04408822,     0x04808c23,     0x042053ff,
1393     0x047f5401,     0x25208028,     0x2538cfe0,     0x2578d001,
1394     0x25b8efe2,     0x25f8f007,     0x2538dfea,     0x25b8dfeb,
1395     0xa400a3e0,     0xa420a7e0,     0xa4484be0,     0xa467afe0,
1396     0xa4a8a7ea,     0xa547a814,     0xa4084ffe,     0xa55c53e0,
1397     0xa5e1540b,     0xe400fbf6,     0xe408ffff,     0xe420e7e0,
1398     0xe4484be0,     0xe460efe0,     0xe547e400,     0xe4014be0,
1399     0xe4a84fe0,     0xe5f15000,     0x858043e0,     0x85a043ff,
1400     0xe59f5d08,     0x0420e3e9,     0x0460e3ea,     0x04a0e3eb,
1401     0x04e0e3ec,     0x25104042,     0x25104871,     0x25904861,
1402     0x25904c92,     0x05344020,     0x05744041,     0x05b44062,
1403     0x05f44083,     0x252c8840,     0x253c1420,     0x25681572,
1404     0x25a21ce3,     0x25ea1e34,     0x0522c020,     0x05e6c0a4,
1405     0x2401a001,     0x2443a051,     0x24858881,     0x24c78cd1,
1406     0x24850891,     0x24c70cc1,     0x250f9001,     0x25508051,
1407     0x25802491,     0x25df28c1,     0x25850c81,     0x251e10d1,
1408     0x65816001,     0x65c36051,     0x65854891,     0x65c74cc1,
1409     0x05733820,     0x05b238a4,     0x05f138e6,     0x0570396a,
1410     0x65d0a001,     0x65d6a443,     0x65d4a826,     0x6594ac26,
1411     0x6554ac26,     0x6556ac26,     0x6552ac26,     0x65cbac85,
1412     0x65caac01,     0x65dea833,     0x659ca509,     0x65d8a801,
1413     0x65dcac01,     0x655cb241,     0x0520a1e0,     0x0521a601,
1414     0x052281e0,     0x05238601,     0x04a14026,     0x042244a6,
1415     0x046344a6,     0x04a444a6,     0x04e544a7,     0x0568aca7,
1416     0x05b23230,     0x853040af,     0xc5b040af,     0xe57080af,
1417     0xe5b080af,     0x25034440,     0x254054c4,     0x25034640,
1418     0x25415a05,     0x25834440,     0x25c54489,     0x250b5d3a,
1419     0x2550dc20,     0x2518e3e1,     0x2518e021,     0x2518e0a1,
1420     0x2518e121,     0x2518e1a1,     0x2558e3e2,     0x2558e042,
1421     0x2558e0c2,     0x2558e142,     0x2598e3e3,     0x2598e063,
1422     0x2598e0e3,     0x2598e163,     0x25d8e3e4,     0x25d8e084,
1423     0x25d8e104,     0x25d8e184,     0x2518e407,     0x05214800,
1424     0x05614800,     0x05a14800,     0x05e14800,     0x05214c00,
1425     0x05614c00,     0x05a14c00,     0x05e14c00,     0x05304001,
1426     0x05314001,     0x05a18610,     0x05e18610,     0x05271e11,
1427     0x45b0c210,     0x45f1c231,     0x1e601000,     0x1e603000,
1428     0x1e621000,     0x1e623000,     0x1e641000,     0x1e643000,
1429     0x1e661000,     0x1e663000,     0x1e681000,     0x1e683000,
1430     0x1e6a1000,     0x1e6a3000,     0x1e6c1000,     0x1e6c3000,
1431     0x1e6e1000,     0x1e6e3000,     0x1e701000,     0x1e703000,
1432     0x1e721000,     0x1e723000,     0x1e741000,     0x1e743000,
1433     0x1e761000,     0x1e763000,     0x1e781000,     0x1e783000,
1434     0x1e7a1000,     0x1e7a3000,     0x1e7c1000,     0x1e7c3000,
1435     0x1e7e1000,     0x1e7e3000,     0xf82c815f,     0xf8300047,
1436     0xf823126d,     0xf8312070,     0xf82133cb,     0xf82551e8,
1437     0xf83d401e,     0xf8347287,     0xf83762bc,     0xf8bb80b9,
1438     0xf8a10217,     0xf8bf1185,     0xf8a921fc,     0xf8bd33f6,
1439     0xf8b350bf,     0xf8ae43f0,     0xf8b0729b,     0xf8b0616c,
1440     0xf8e983c6,     0xf8f1039b,     0xf8fe1147,     0xf8f4208a,
1441     0xf8f83231,     0xf8f653a3,     0xf8ef4276,     0xf8f37056,
1442     0xf8ef6186,     0xf87081ab,     0xf87703c1,     0xf8731225,
1443     0xf86222d0,     0xf86d32aa,     0xf87d519b,     0xf87b4023,
1444     0xf87f7278,     0xf8716389,     0xb83b80ef,     0xb83503f7,
1445     0xb83913e2,     0xb83b2150,     0xb8373073,     0xb8305320,
1446     0xb83a4057,     0xb830708c,     0xb83c63be,     0xb8b080db,
1447     0xb8a901fd,     0xb8a710e4,     0xb8af22e9,     0xb8a83382,
1448     0xb8b550bf,     0xb8bb4220,     0xb8af7344,     0xb8a862dc,
1449     0xb8fb833b,     0xb8f70080,     0xb8e61010,     0xb8e4202f,
1450     0xb8ea30a7,     0xb8ea50fc,     0xb8f442b7,     0xb8e6710b,
1451     0xb8f160df,     0xb8718182,     0xb87e007d,     0xb87b13b6,
1452     0xb86e238d,     0xb87130b8,     0xb862514e,     0xb870436b,
1453     0xb877708c,     0xb8766091,     0xce304661,     0xce0c09cc,
1454     0xce748c70,     0xce863cb7,     0xce7b8191,     0xce668610,
1455     0xcec08382,     0xce668883,     0x25a0cdd1,     0x25a1c86c,
1456     0x058000b8,     0x054242ca,     0x0500051e,     0x2520cf00,
1457     0x25e1c951,     0x058039ea,     0x05400e1b,     0x05009891,
1458     0x2520c09c,     0x25a1d448,     0x05801e36,     0x05400516,
1459     0x050039fe,     0x2520ce0b,     0x25a1d0c8,     0x058074d9,
1460     0x05404531,     0x05031e84,     0x2560cf1a,     0x2561dda2,
1461     0x058026a3,     0x05404c35,     0x05007851,     0x25a0d293,
1462     0x25a1de96,     0x05808874,     0x05423bb1,     0x050030e4,
1463     0x04680102,     0x04be0638,     0x658103c4,     0x65800993,
1464     0x65910707,     0x04d6a53b,     0x04c00e17,     0x04da1696,
1465     0x049089bc,     0x045b1787,     0x0499ad6b,     0x049ab901,
1466     0x0499122d,     0x04538064,     0x04918dc7,     0x04100fa4,
1467     0x04d7aaa0,     0x049ea123,     0x04180b1c,     0x05e786f3,
1468     0x05e4954d,     0x048813cc,     0x048a03ae,     0x048114f5,
1469     0x04dca342,     0x65c09229,     0x65cd8440,     0x65c6856e,
1470     0x658793ae,     0x658282c3,     0x049dbb63,     0x65c2b4f3,
1471     0x6580acb5,     0x65c1a6b9,     0x658da071,     0x65818cf3,
1472     0x65ab922e,     0x65b113d8,     0x65f62f4f,     0x65e5a916,
1473     0x65eec81b,     0x65e3f415,     0x65fd4739,     0x65ee6191,
1474     0x04c2422d,     0x045d76b4,     0x04203048,     0x04a032d7,
1475     0x04773359,     0x04e132b5,     0x05ab6a6a,     0x05e86ef7,
1476     0x049a3671,     0x04d835a4,     0x04d93fd6,     0x044831d1,
1477     0x040a3e8c,     0x65872da1,     0x65c62967,     0x659839e4,
1478     0x04813c03,
1479   };
1480 // END  Generated code -- do not edit