1 /*
2 * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_LIR.hpp"
29 #include "runtime/sharedRuntime.hpp"
30 #include "vmreg_riscv.inline.hpp"
31
32 LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) {
33 LIR_Opr opr = LIR_OprFact::illegalOpr;
34 VMReg r_1 = reg->first();
35 VMReg r_2 = reg->second();
36 if (r_1->is_stack()) {
37 // Convert stack slot to an SP offset
38 // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value
39 // so we must add it in here.
40 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
41 opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type));
42 } else if (r_1->is_Register()) {
43 Register reg1 = r_1->as_Register();
44 if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) {
45 Register reg2 = r_2->as_Register();
46 assert(reg2 == reg1, "must be same register");
47 opr = as_long_opr(reg1);
48 } else if (is_reference_type(type)) {
49 opr = as_oop_opr(reg1);
50 } else if (type == T_METADATA) {
51 opr = as_metadata_opr(reg1);
52 } else if (type == T_ADDRESS) {
53 opr = as_address_opr(reg1);
54 } else {
55 opr = as_opr(reg1);
56 }
57 } else if (r_1->is_FloatRegister()) {
58 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type");
59 int num = r_1->as_FloatRegister()->encoding();
60 if (type == T_FLOAT) {
61 opr = LIR_OprFact::single_fpu(num);
62 } else {
63 opr = LIR_OprFact::double_fpu(num);
64 }
65 } else {
66 ShouldNotReachHere();
67 }
68 return opr;
69 }
70
71 LIR_Opr FrameMap::zr_opr;
72 LIR_Opr FrameMap::r1_opr;
73 LIR_Opr FrameMap::r2_opr;
74 LIR_Opr FrameMap::r3_opr;
75 LIR_Opr FrameMap::r4_opr;
76 LIR_Opr FrameMap::r5_opr;
77 LIR_Opr FrameMap::r6_opr;
78 LIR_Opr FrameMap::r7_opr;
79 LIR_Opr FrameMap::r8_opr;
80 LIR_Opr FrameMap::r9_opr;
81 LIR_Opr FrameMap::r10_opr;
82 LIR_Opr FrameMap::r11_opr;
83 LIR_Opr FrameMap::r12_opr;
84 LIR_Opr FrameMap::r13_opr;
85 LIR_Opr FrameMap::r14_opr;
86 LIR_Opr FrameMap::r15_opr;
87 LIR_Opr FrameMap::r16_opr;
88 LIR_Opr FrameMap::r17_opr;
89 LIR_Opr FrameMap::r18_opr;
90 LIR_Opr FrameMap::r19_opr;
91 LIR_Opr FrameMap::r20_opr;
92 LIR_Opr FrameMap::r21_opr;
93 LIR_Opr FrameMap::r22_opr;
94 LIR_Opr FrameMap::r23_opr;
95 LIR_Opr FrameMap::r24_opr;
96 LIR_Opr FrameMap::r25_opr;
97 LIR_Opr FrameMap::r26_opr;
98 LIR_Opr FrameMap::r27_opr;
99 LIR_Opr FrameMap::r28_opr;
100 LIR_Opr FrameMap::r29_opr;
101 LIR_Opr FrameMap::r30_opr;
102 LIR_Opr FrameMap::r31_opr;
103
104 LIR_Opr FrameMap::fp_opr;
105 LIR_Opr FrameMap::sp_opr;
106
107 LIR_Opr FrameMap::receiver_opr;
108
109 LIR_Opr FrameMap::zr_oop_opr;
110 LIR_Opr FrameMap::r1_oop_opr;
111 LIR_Opr FrameMap::r2_oop_opr;
112 LIR_Opr FrameMap::r3_oop_opr;
113 LIR_Opr FrameMap::r4_oop_opr;
114 LIR_Opr FrameMap::r5_oop_opr;
115 LIR_Opr FrameMap::r6_oop_opr;
116 LIR_Opr FrameMap::r7_oop_opr;
117 LIR_Opr FrameMap::r8_oop_opr;
118 LIR_Opr FrameMap::r9_oop_opr;
119 LIR_Opr FrameMap::r10_oop_opr;
120 LIR_Opr FrameMap::r11_oop_opr;
121 LIR_Opr FrameMap::r12_oop_opr;
122 LIR_Opr FrameMap::r13_oop_opr;
123 LIR_Opr FrameMap::r14_oop_opr;
124 LIR_Opr FrameMap::r15_oop_opr;
125 LIR_Opr FrameMap::r16_oop_opr;
126 LIR_Opr FrameMap::r17_oop_opr;
127 LIR_Opr FrameMap::r18_oop_opr;
128 LIR_Opr FrameMap::r19_oop_opr;
129 LIR_Opr FrameMap::r20_oop_opr;
130 LIR_Opr FrameMap::r21_oop_opr;
131 LIR_Opr FrameMap::r22_oop_opr;
132 LIR_Opr FrameMap::r23_oop_opr;
133 LIR_Opr FrameMap::r24_oop_opr;
134 LIR_Opr FrameMap::r25_oop_opr;
135 LIR_Opr FrameMap::r26_oop_opr;
136 LIR_Opr FrameMap::r27_oop_opr;
137 LIR_Opr FrameMap::r28_oop_opr;
138 LIR_Opr FrameMap::r29_oop_opr;
139 LIR_Opr FrameMap::r30_oop_opr;
140 LIR_Opr FrameMap::r31_oop_opr;
141
142 LIR_Opr FrameMap::t0_opr;
143 LIR_Opr FrameMap::t1_opr;
144 LIR_Opr FrameMap::t0_long_opr;
145 LIR_Opr FrameMap::t1_long_opr;
146
147 LIR_Opr FrameMap::r10_metadata_opr;
148 LIR_Opr FrameMap::r11_metadata_opr;
149 LIR_Opr FrameMap::r12_metadata_opr;
150 LIR_Opr FrameMap::r13_metadata_opr;
151 LIR_Opr FrameMap::r14_metadata_opr;
152 LIR_Opr FrameMap::r15_metadata_opr;
153
154 LIR_Opr FrameMap::long10_opr;
155 LIR_Opr FrameMap::long11_opr;
156 LIR_Opr FrameMap::fpu10_float_opr;
157 LIR_Opr FrameMap::fpu10_double_opr;
158
159 LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, };
160 LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, };
161
162 //--------------------------------------------------------
163 // FrameMap
164 //--------------------------------------------------------
165 // |---f31--|
166 // |---..---|
167 // |---f28--|
168 // |---f27--|<---pd_last_callee_saved_fpu_reg_2
169 // |---..---|
170 // |---f18--|<---pd_first_callee_saved_fpu_reg_2
171 // |---f17--|
172 // |---..---|
173 // |---f10--|
174 // |---f9---|<---pd_last_callee_saved_fpu_reg_1
175 // |---f8---|<---pd_first_callee_saved_fpu_reg_1
176 // |---f7---|
177 // |---..---|
178 // |---f0---|
179 // |---x27--|
180 // |---x23--|
181 // |---x8---|
182 // |---x4---|
183 // |---x3---|
184 // |---x2---|
185 // |---x1---|
186 // |---x0---|
187 // |---x26--|<---pd_last_callee_saved_reg
188 // |---..---|
189 // |---x18--|
190 // |---x9---|<---pd_first_callee_saved_reg
191 // |---x31--|
192 // |---..---|
193 // |---x28--|
194 // |---x17--|
195 // |---..---|
196 // |---x10--|
197 // |---x7---|
198
199 void FrameMap::initialize() {
200 assert(!_init_done, "once");
201
202 int i = 0;
203
204 // caller save register
205 map_register(i, x7); r7_opr = LIR_OprFact::single_cpu(i); i++;
206 map_register(i, x10); r10_opr = LIR_OprFact::single_cpu(i); i++;
207 map_register(i, x11); r11_opr = LIR_OprFact::single_cpu(i); i++;
208 map_register(i, x12); r12_opr = LIR_OprFact::single_cpu(i); i++;
209 map_register(i, x13); r13_opr = LIR_OprFact::single_cpu(i); i++;
210 map_register(i, x14); r14_opr = LIR_OprFact::single_cpu(i); i++;
211 map_register(i, x15); r15_opr = LIR_OprFact::single_cpu(i); i++;
212 map_register(i, x16); r16_opr = LIR_OprFact::single_cpu(i); i++;
213 map_register(i, x17); r17_opr = LIR_OprFact::single_cpu(i); i++;
214 map_register(i, x28); r28_opr = LIR_OprFact::single_cpu(i); i++;
215 map_register(i, x29); r29_opr = LIR_OprFact::single_cpu(i); i++;
216 map_register(i, x30); r30_opr = LIR_OprFact::single_cpu(i); i++;
217 map_register(i, x31); r31_opr = LIR_OprFact::single_cpu(i); i++;
218
219 // callee save register
220 map_register(i, x9); r9_opr = LIR_OprFact::single_cpu(i); i++;
221 map_register(i, x18); r18_opr = LIR_OprFact::single_cpu(i); i++;
222 map_register(i, x19); r19_opr = LIR_OprFact::single_cpu(i); i++;
223 map_register(i, x20); r20_opr = LIR_OprFact::single_cpu(i); i++;
224 map_register(i, x21); r21_opr = LIR_OprFact::single_cpu(i); i++;
225 map_register(i, x22); r22_opr = LIR_OprFact::single_cpu(i); i++;
226 map_register(i, x24); r24_opr = LIR_OprFact::single_cpu(i); i++;
227 map_register(i, x25); r25_opr = LIR_OprFact::single_cpu(i); i++;
228 map_register(i, x26); r26_opr = LIR_OprFact::single_cpu(i); i++;
229
230 // special register
231 map_register(i, x0); zr_opr = LIR_OprFact::single_cpu(i); i++; // zr
232 map_register(i, x1); r1_opr = LIR_OprFact::single_cpu(i); i++; // ra
233 map_register(i, x2); r2_opr = LIR_OprFact::single_cpu(i); i++; // sp
234 map_register(i, x3); r3_opr = LIR_OprFact::single_cpu(i); i++; // gp
235 map_register(i, x4); r4_opr = LIR_OprFact::single_cpu(i); i++; // thread
236 map_register(i, x8); r8_opr = LIR_OprFact::single_cpu(i); i++; // fp
237 map_register(i, x23); r23_opr = LIR_OprFact::single_cpu(i); i++; // java thread
238 map_register(i, x27); r27_opr = LIR_OprFact::single_cpu(i); i++; // heapbase
239
240 // tmp register
241 map_register(i, x5); r5_opr = LIR_OprFact::single_cpu(i); i++; // t0
242 map_register(i, x6); r6_opr = LIR_OprFact::single_cpu(i); i++; // t1
243
244 t0_opr = r5_opr;
245 t1_opr = r6_opr;
246 t0_long_opr = LIR_OprFact::double_cpu(r5_opr->cpu_regnr(), r5_opr->cpu_regnr());
247 t1_long_opr = LIR_OprFact::double_cpu(r6_opr->cpu_regnr(), r6_opr->cpu_regnr());
248
249 long10_opr = LIR_OprFact::double_cpu(r10_opr->cpu_regnr(), r10_opr->cpu_regnr());
250 long11_opr = LIR_OprFact::double_cpu(r11_opr->cpu_regnr(), r11_opr->cpu_regnr());
251
252 fpu10_float_opr = LIR_OprFact::single_fpu(10);
253 fpu10_double_opr = LIR_OprFact::double_fpu(10);
254
255 i = 0;
256 _caller_save_cpu_regs[i++] = r7_opr;
257 _caller_save_cpu_regs[i++] = r10_opr;
258 _caller_save_cpu_regs[i++] = r11_opr;
259 _caller_save_cpu_regs[i++] = r12_opr;
260 _caller_save_cpu_regs[i++] = r13_opr;
261 _caller_save_cpu_regs[i++] = r14_opr;
262 _caller_save_cpu_regs[i++] = r15_opr;
263 _caller_save_cpu_regs[i++] = r16_opr;
264 _caller_save_cpu_regs[i++] = r17_opr;
265 _caller_save_cpu_regs[i++] = r28_opr;
266 _caller_save_cpu_regs[i++] = r29_opr;
267 _caller_save_cpu_regs[i++] = r30_opr;
268 _caller_save_cpu_regs[i++] = r31_opr;
269
270 _init_done = true;
271
272 zr_oop_opr = as_oop_opr(x0);
273 r1_oop_opr = as_oop_opr(x1);
274 r2_oop_opr = as_oop_opr(x2);
275 r3_oop_opr = as_oop_opr(x3);
276 r4_oop_opr = as_oop_opr(x4);
277 r5_oop_opr = as_oop_opr(x5);
278 r6_oop_opr = as_oop_opr(x6);
279 r7_oop_opr = as_oop_opr(x7);
280 r8_oop_opr = as_oop_opr(x8);
281 r9_oop_opr = as_oop_opr(x9);
282 r10_oop_opr = as_oop_opr(x10);
283 r11_oop_opr = as_oop_opr(x11);
284 r12_oop_opr = as_oop_opr(x12);
285 r13_oop_opr = as_oop_opr(x13);
286 r14_oop_opr = as_oop_opr(x14);
287 r15_oop_opr = as_oop_opr(x15);
288 r16_oop_opr = as_oop_opr(x16);
289 r17_oop_opr = as_oop_opr(x17);
290 r18_oop_opr = as_oop_opr(x18);
291 r19_oop_opr = as_oop_opr(x19);
292 r20_oop_opr = as_oop_opr(x20);
293 r21_oop_opr = as_oop_opr(x21);
294 r22_oop_opr = as_oop_opr(x22);
295 r23_oop_opr = as_oop_opr(x23);
296 r24_oop_opr = as_oop_opr(x24);
297 r25_oop_opr = as_oop_opr(x25);
298 r26_oop_opr = as_oop_opr(x26);
299 r27_oop_opr = as_oop_opr(x27);
300 r28_oop_opr = as_oop_opr(x28);
301 r29_oop_opr = as_oop_opr(x29);
302 r30_oop_opr = as_oop_opr(x30);
303 r31_oop_opr = as_oop_opr(x31);
304
305 r10_metadata_opr = as_metadata_opr(x10);
306 r11_metadata_opr = as_metadata_opr(x11);
307 r12_metadata_opr = as_metadata_opr(x12);
308 r13_metadata_opr = as_metadata_opr(x13);
309 r14_metadata_opr = as_metadata_opr(x14);
310 r15_metadata_opr = as_metadata_opr(x15);
311
312 sp_opr = as_pointer_opr(sp);
313 fp_opr = as_pointer_opr(fp);
314
315 VMRegPair regs;
316 BasicType sig_bt = T_OBJECT;
317 SharedRuntime::java_calling_convention(&sig_bt, ®s, 1);
318 receiver_opr = as_oop_opr(regs.first()->as_Register());
319
320 for (i = 0; i < nof_caller_save_fpu_regs; i++) {
321 _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i);
322 }
323 }
324
325
326 Address FrameMap::make_new_address(ByteSize sp_offset) const {
327 return Address(sp, in_bytes(sp_offset));
328 }
329
330
331 // ----------------mapping-----------------------
332 // all mapping is based on fp addressing, except for simple leaf methods where we access
333 // the locals sp based (and no frame is built)
334
335
336 // Frame for simple leaf methods (quick entries)
337 //
338 // +----------+
339 // | ret addr | <- TOS
340 // +----------+
341 // | args |
342 // | ...... |
343
344 // Frame for standard methods
345 //
346 // | .........| <- TOS
347 // | locals |
348 // +----------+
349 // | old fp, |
350 // +----------+
351 // | ret addr |
352 // +----------+
353 // | args | <- FP
354 // | .........|
355
356
357 // For OopMaps, map a local variable or spill index to an VMRegImpl name.
358 // This is the offset from sp() in the frame of the slot for the index,
359 // skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.)
360 //
361 // framesize +
362 // stack0 stack0 0 <- VMReg
363 // | | <registers> |
364 // ...........|..............|.............|
365 // 0 1 2 3 x x 4 5 6 ... | <- local indices
366 // ^ ^ sp() ( x x indicate link
367 // | | and return addr)
368 // arguments non-argument locals
369
370
371 VMReg FrameMap::fpu_regname (int n) {
372 // Return the OptoReg name for the fpu stack slot "n"
373 // A spilled fpu stack slot comprises to two single-word OptoReg's.
374 return as_FloatRegister(n)->as_VMReg();
375 }
376
377 LIR_Opr FrameMap::stack_pointer() {
378 return FrameMap::sp_opr;
379 }
380
381 // JSR 292
382 LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() {
383 return LIR_OprFact::illegalOpr; // Not needed on riscv
384 }
385
386 bool FrameMap::validate_frame() {
387 return true;
388 }