1 /*
 2  * Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
 3  * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
 4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 5  *
 6  * This code is free software; you can redistribute it and/or modify it
 7  * under the terms of the GNU General Public License version 2 only, as
 8  * published by the Free Software Foundation.
 9  *
10  * This code is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * version 2 for more details (a copy is included in the LICENSE file that
14  * accompanied this code).
15  *
16  * You should have received a copy of the GNU General Public License version
17  * 2 along with this work; if not, write to the Free Software Foundation,
18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21  * or visit www.oracle.com if you need additional information or have any
22  * questions.
23  *
24  */
25 
26 #include "precompiled.hpp"
27 #include "asm/register.hpp"
28 #include "c1/c1_LIR.hpp"
29 
30 FloatRegister LIR_OprDesc::as_float_reg() const {
31   return as_FloatRegister(fpu_regnr());
32 }
33 
34 FloatRegister LIR_OprDesc::as_double_reg() const {
35   return as_FloatRegister(fpu_regnrLo());
36 }
37 
38 // Reg2 unused.
39 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
40   assert(as_FloatRegister(reg2) == fnoreg, "Not used on this platform");
41   return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
42                              (reg1 << LIR_OprDesc::reg2_shift) |
43                              LIR_OprDesc::double_type          |
44                              LIR_OprDesc::fpu_register         |
45                              LIR_OprDesc::double_size);
46 }
47 
48 #ifndef PRODUCT
49 void LIR_Address::verify() const {
50   assert(base()->is_cpu_register(), "wrong base operand");
51   assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand");
52   assert(base()->type() == T_ADDRESS || base()->type() == T_OBJECT || base()->type() == T_LONG ||
53          base()->type() == T_METADATA, "wrong type for addresses");
54 }
55 #endif // PRODUCT