1 /*
  2  * Copyright (c) 1999, 2020, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #include "precompiled.hpp"
 28 #include "c1/c1_LIR.hpp"
 29 #include "c1/c1_MacroAssembler.hpp"
 30 #include "c1/c1_Runtime1.hpp"
 31 #include "classfile/systemDictionary.hpp"
 32 #include "gc/shared/barrierSetAssembler.hpp"
 33 #include "gc/shared/collectedHeap.hpp"
 34 #include "interpreter/interpreter.hpp"
 35 #include "oops/arrayOop.hpp"
 36 #include "oops/markWord.hpp"
 37 #include "runtime/basicLock.hpp"
 38 #include "runtime/os.hpp"
 39 #include "runtime/sharedRuntime.hpp"
 40 #include "runtime/stubRoutines.hpp"
 41 
 42 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
 43                                   FloatRegister freg0, FloatRegister freg1,
 44                                   Register result)
 45 {
 46   if (is_float) {
 47     float_compare(result, freg0, freg1, unordered_result);
 48   } else {
 49     double_compare(result, freg0, freg1, unordered_result);
 50   }
 51 }
 52 
 53 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register tmp, Label& slow_case) {
 54   const int aligned_mask = BytesPerWord - 1;
 55   const int hdr_offset = oopDesc::mark_offset_in_bytes();
 56   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
 57   Label done;
 58   int null_check_offset = -1;
 59 
 60   verify_oop(obj);
 61 
 62   // save object being locked into the BasicObjectLock
 63   sd(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
 64 
 65   null_check_offset = offset();
 66 
 67   if (DiagnoseSyncOnValueBasedClasses != 0) {
 68     load_klass(hdr, obj);
 69     lwu(hdr, Address(hdr, Klass::access_flags_offset()));
 70     andi(t0, hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
 71     bnez(t0, slow_case, true /* is_far */);
 72   }
 73 
 74   if (UseBiasedLocking) {
 75     assert(tmp != noreg, "should have tmp register at this point");
 76     biased_locking_enter(disp_hdr, obj, hdr, tmp, false, done, &slow_case);
 77   }
 78 
 79   // Load object header
 80   ld(hdr, Address(obj, hdr_offset));
 81   // and mark it as unlocked
 82   ori(hdr, hdr, markWord::unlocked_value);
 83   // save unlocked object header into the displaced header location on the stack
 84   sd(hdr, Address(disp_hdr, 0));
 85   // test if object header is still the same (i.e. unlocked), and if so, store the
 86   // displaced header address in the object header - if it is not the same, get the
 87   // object header instead
 88   la(t1, Address(obj, hdr_offset));
 89   cmpxchgptr(hdr, disp_hdr, t1, t0, done, /*fallthough*/NULL);
 90   // if the object header was the same, we're done
 91   // if the object header was not the same, it is now in the hdr register
 92   // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
 93   //
 94   // 1) (hdr & aligned_mask) == 0
 95   // 2) sp <= hdr
 96   // 3) hdr <= sp + page_size
 97   //
 98   // these 3 tests can be done by evaluating the following expression:
 99   //
100   // (hdr -sp) & (aligned_mask - page_size)
101   //
102   // assuming both the stack pointer and page_size have their least
103   // significant 2 bits cleared and page_size is a power of 2
104   sub(hdr, hdr, sp);
105   li(t0, aligned_mask - os::vm_page_size());
106   andr(hdr, hdr, t0);
107   // for recursive locking, the result is zero => save it in the displaced header
108   // location (NULL in the displaced hdr location indicates recursive locking)
109   sd(hdr, Address(disp_hdr, 0));
110   // otherwise we don't care about the result and handle locking via runtime call
111   bnez(hdr, slow_case, /* is_far */ true);
112   bind(done);
113   return null_check_offset;
114 }
115 
116 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
117   const int aligned_mask = BytesPerWord - 1;
118   const int hdr_offset = oopDesc::mark_offset_in_bytes();
119   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
120   Label done;
121 
122   if (UseBiasedLocking) {
123     // load object
124     ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
125     biased_locking_exit(obj, hdr, done);
126   }
127 
128   // load displaced header
129   ld(hdr, Address(disp_hdr, 0));
130   // if the loaded hdr is NULL we had recursive locking
131   // if we had recursive locking, we are done
132   beqz(hdr, done);
133   if (!UseBiasedLocking) {
134     // load object
135     ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
136   }
137   verify_oop(obj);
138   // test if object header is pointing to the displaced header, and if so, restore
139   // the displaced header in the object - if the object header is not pointing to
140   // the displaced header, get the object header instead
141   // if the object header was not pointing to the displaced header,
142   // we do unlocking via runtime call
143   if (hdr_offset) {
144     la(t0, Address(obj, hdr_offset));
145     cmpxchgptr(disp_hdr, hdr, t0, t1, done, &slow_case);
146   } else {
147     cmpxchgptr(disp_hdr, hdr, obj, t1, done, &slow_case);
148   }
149   bind(done);
150 }
151 
152 // Defines obj, preserves var_size_in_bytes
153 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
154   if (UseTLAB) {
155     tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
156   } else {
157     eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, slow_case, /* is_far */ true);
158   }
159 }
160 
161 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
162   assert_different_registers(obj, klass, len);
163   if (UseBiasedLocking & !len->is_valid()) {
164     assert_different_registers(obj, klass, len, tmp1, tmp2);
165     ld(tmp1, Address(klass, Klass::prototype_header_offset()));
166   } else {
167     // This assumes that all prototype bits fitr in an int32_t
168     mv(tmp1, (int32_t)(intptr_t)markWord::prototype().value());
169   }
170   sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
171 
172   if (UseCompressedClassPointers) { // Take care not to kill klass
173     encode_klass_not_null(tmp1, klass, tmp2);
174     sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
175   } else {
176     sd(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
177   }
178 
179   if (len->is_valid()) {
180     sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
181   } else if (UseCompressedClassPointers) {
182     store_klass_gap(obj, zr);
183   }
184 }
185 
186 // preserves obj, destroys len_in_bytes
187 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp) {
188   assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
189   Label done;
190 
191   // len_in_bytes is positive and ptr sized
192   sub(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
193   beqz(len_in_bytes, done);
194 
195   // Preserve obj
196   if (hdr_size_in_bytes) {
197     add(obj, obj, hdr_size_in_bytes);
198   }
199   zero_memory(obj, len_in_bytes, tmp);
200   if (hdr_size_in_bytes) {
201     sub(obj, obj, hdr_size_in_bytes);
202   }
203 
204   bind(done);
205 }
206 
207 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
208   assert_different_registers(obj, tmp1, tmp2);
209   assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
210 
211   try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
212 
213   initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
214 }
215 
216 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
217   assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
218          "con_size_in_bytes is not multiple of alignment");
219   const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
220 
221   initialize_header(obj, klass, noreg, tmp1, tmp2);
222 
223   if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
224     // clear rest of allocated space
225     const Register index = tmp2;
226     // 16: multipler for threshold
227     const int threshold = 16 * BytesPerWord;    // approximate break even point for code size (see comments below)
228     if (var_size_in_bytes != noreg) {
229       mv(index, var_size_in_bytes);
230       initialize_body(obj, index, hdr_size_in_bytes, tmp1);
231     } else if (con_size_in_bytes <= threshold) {
232       // use explicit null stores
233       int i = hdr_size_in_bytes;
234       if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multipler for BytesPerWord
235         sd(zr, Address(obj, i));
236         i += BytesPerWord;
237       }
238       for (; i < con_size_in_bytes; i += BytesPerWord) {
239         sd(zr, Address(obj, i));
240       }
241     } else if (con_size_in_bytes > hdr_size_in_bytes) {
242       block_comment("zero memory");
243       // use loop to null out the fields
244       int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
245       mv(index, words / 8); // 8: byte size
246 
247       const int unroll = 8; // Number of sd(zr) instructions we'll unroll
248       int remainder = words % unroll;
249       la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
250 
251       Label entry_point, loop;
252       j(entry_point);
253 
254       bind(loop);
255       sub(index, index, 1);
256       for (int i = -unroll; i < 0; i++) {
257         if (-i == remainder) {
258           bind(entry_point);
259         }
260         sd(zr, Address(t0, i * wordSize));
261       }
262       if (remainder == 0) {
263         bind(entry_point);
264       }
265       add(t0, t0, unroll * wordSize);
266       bnez(index, loop);
267     }
268   }
269 
270   membar(MacroAssembler::StoreStore);
271 
272   if (CURRENT_ENV->dtrace_alloc_probes()) {
273     assert(obj == x10, "must be");
274     far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
275   }
276 
277   verify_oop(obj);
278 }
279 
280 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int header_size, int f, Register klass, Label& slow_case) {
281   assert_different_registers(obj, len, tmp1, tmp2, klass);
282 
283   // determine alignment mask
284   assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
285 
286   // check for negative or excessive length
287   mv(t0, (int32_t)max_array_allocation_length);
288   bgeu(len, t0, slow_case, /* is_far */ true);
289 
290   const Register arr_size = tmp2; // okay to be the same
291   // align object end
292   mv(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
293   shadd(arr_size, len, arr_size, t0, f);
294   andi(arr_size, arr_size, ~(uint)MinObjAlignmentInBytesMask);
295 
296   try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
297 
298   initialize_header(obj, klass, len, tmp1, tmp2);
299 
300   // clear rest of allocated space
301   const Register len_zero = len;
302   initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
303 
304   membar(MacroAssembler::StoreStore);
305 
306   if (CURRENT_ENV->dtrace_alloc_probes()) {
307     assert(obj == x10, "must be");
308     far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
309   }
310 
311   verify_oop(obj);
312 }
313 
314 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache, Label &L) {
315   verify_oop(receiver);
316   // explicit NULL check not needed since load from [klass_offset] causes a trap
317   // check against inline cache
318   assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
319   assert_different_registers(receiver, iCache, t0, t2);
320   cmp_klass(receiver, iCache, t0, t2 /* call-clobbered t2 as a tmp */, L);
321 }
322 
323 void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes) {
324   assert(bang_size_in_bytes >= framesize, "stack bang size incorrect");
325   // Make sure there is enough stack space for this method's activation.
326   // Note that we do this before creating a frame.
327   generate_stack_overflow_check(bang_size_in_bytes);
328   MacroAssembler::build_frame(framesize);
329 
330   // Insert nmethod entry barrier into frame.
331   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
332   bs->nmethod_entry_barrier(this);
333 }
334 
335 void C1_MacroAssembler::remove_frame(int framesize) {
336   MacroAssembler::remove_frame(framesize);
337 }
338 
339 
340 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
341   // If we have to make this method not-entrant we'll overwrite its
342   // first instruction with a jump. For this action to be legal we
343   // must ensure that this first instruction is a J, JAL or NOP.
344   // Make it a NOP.
345   assert_alignment(pc());
346   nop();
347 }
348 
349 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
350   //  fp + -2: link
351   //     + -1: return address
352   //     +  0: argument with offset 0
353   //     +  1: argument with offset 1
354   //     +  2: ...
355   ld(reg, Address(fp, offset_in_words * BytesPerWord));
356 }
357 
358 #ifndef PRODUCT
359 
360 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
361   if (!VerifyOops) {
362     return;
363   }
364   verify_oop_addr(Address(sp, stack_offset), "oop");
365 }
366 
367 void C1_MacroAssembler::verify_not_null_oop(Register r) {
368   if (!VerifyOops) return;
369   Label not_null;
370   bnez(r, not_null);
371   stop("non-null oop required");
372   bind(not_null);
373   verify_oop(r);
374 }
375 
376 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
377 #ifdef ASSERT
378   static int nn;
379   if (inv_x10) { mv(x10, 0xDEAD); }
380   if (inv_x9)  { mv(x9, 0xDEAD);  }
381   if (inv_x12) { mv(x12, nn++);   }
382   if (inv_x13) { mv(x13, 0xDEAD); }
383   if (inv_x14) { mv(x14, 0xDEAD); }
384   if (inv_x15) { mv(x15, 0xDEAD); }
385 #endif // ASSERT
386 }
387 #endif // ifndef PRODUCT
388 
389 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
390 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
391               Label& label, bool is_far, bool is_unordered);
392 
393 static c1_cond_branch_insn c1_cond_branch[] =
394 {
395   /* SHORT branches */
396   (c1_cond_branch_insn)&Assembler::beq,
397   (c1_cond_branch_insn)&Assembler::bne,
398   (c1_cond_branch_insn)&Assembler::blt,
399   (c1_cond_branch_insn)&Assembler::ble,
400   (c1_cond_branch_insn)&Assembler::bge,
401   (c1_cond_branch_insn)&Assembler::bgt,
402   (c1_cond_branch_insn)&Assembler::bleu, // lir_cond_belowEqual
403   (c1_cond_branch_insn)&Assembler::bgeu  // lir_cond_aboveEqual
404 };
405 
406 static c1_float_cond_branch_insn c1_float_cond_branch[] =
407 {
408   /* FLOAT branches */
409   (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
410   (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
411   (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
412   (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
413   (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
414   (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
415   NULL, // lir_cond_belowEqual
416   NULL, // lir_cond_aboveEqual
417 
418   /* DOUBLE branches */
419   (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
420   (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
421   (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
422   (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
423   (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
424   (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
425   NULL, // lir_cond_belowEqual
426   NULL  // lir_cond_aboveEqual
427 };
428 
429 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
430                                       BasicType type, bool is_far) {
431   if (type == T_OBJECT || type == T_ARRAY) {
432     assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
433     if (cmpFlag == lir_cond_equal) {
434       beq(op1, op2, label, is_far);
435     } else {
436       bne(op1, op2, label, is_far);
437     }
438   } else {
439     assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
440            "invalid c1 conditional branch index");
441     (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
442   }
443 }
444 
445 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
446                                             bool is_far, bool is_unordered) {
447   assert(cmpFlag >= 0 &&
448          cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
449          "invalid c1 float conditional branch index");
450   (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
451 }