1 /*
2 * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_InstructionPrinter.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_MacroAssembler.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciInstance.hpp"
34 #include "compiler/oopMap.hpp"
35 #include "gc/shared/barrierSet.hpp"
36 #include "runtime/os.hpp"
37 #include "runtime/vm_version.hpp"
38
39 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
40 // We must have enough patching space so that call can be inserted.
41 // We cannot use fat nops here, since the concurrent code rewrite may transiently
42 // create the illegal instruction sequence.
43 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
44 _masm->nop();
45 }
46 info->set_force_reexecute();
47 patch->install(_masm, patch_code, obj, info);
48 append_code_stub(patch);
49
50 #ifdef ASSERT
51 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
52 if (patch->id() == PatchingStub::access_field_id) {
53 switch (code) {
54 case Bytecodes::_putstatic:
55 case Bytecodes::_getstatic:
56 case Bytecodes::_putfield:
57 case Bytecodes::_getfield:
58 break;
59 default:
60 ShouldNotReachHere();
61 }
62 } else if (patch->id() == PatchingStub::load_klass_id) {
63 switch (code) {
64 case Bytecodes::_new:
65 case Bytecodes::_anewarray:
66 case Bytecodes::_multianewarray:
67 case Bytecodes::_instanceof:
68 case Bytecodes::_checkcast:
69 break;
70 default:
71 ShouldNotReachHere();
72 }
73 } else if (patch->id() == PatchingStub::load_mirror_id) {
74 switch (code) {
75 case Bytecodes::_putstatic:
76 case Bytecodes::_getstatic:
77 case Bytecodes::_ldc:
78 case Bytecodes::_ldc_w:
79 break;
80 default:
81 ShouldNotReachHere();
82 }
83 } else if (patch->id() == PatchingStub::load_appendix_id) {
84 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
85 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
86 } else {
87 ShouldNotReachHere();
88 }
89 #endif
90 }
91
92 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
93 IRScope* scope = info->scope();
94 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
95 if (Bytecodes::has_optional_appendix(bc_raw)) {
96 return PatchingStub::load_appendix_id;
97 }
98 return PatchingStub::load_mirror_id;
99 }
100
101 //---------------------------------------------------------------
102
103
104 LIR_Assembler::LIR_Assembler(Compilation* c):
105 _masm(c->masm())
106 , _bs(BarrierSet::barrier_set())
107 , _compilation(c)
108 , _frame_map(c->frame_map())
109 , _current_block(NULL)
110 , _pending_non_safepoint(NULL)
111 , _pending_non_safepoint_offset(0)
112 {
113 _slow_case_stubs = new CodeStubList();
114 }
115
116
117 LIR_Assembler::~LIR_Assembler() {
118 // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
119 // Reset it here to avoid an assertion.
120 _unwind_handler_entry.reset();
121 }
122
123
124 void LIR_Assembler::check_codespace() {
125 CodeSection* cs = _masm->code_section();
126 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
127 BAILOUT("CodeBuffer overflow");
128 }
129 }
130
131
132 void LIR_Assembler::append_code_stub(CodeStub* stub) {
133 _slow_case_stubs->append(stub);
134 }
135
136 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
137 for (int m = 0; m < stub_list->length(); m++) {
138 CodeStub* s = stub_list->at(m);
139
140 check_codespace();
141 CHECK_BAILOUT();
142
143 #ifndef PRODUCT
144 if (CommentedAssembly) {
145 stringStream st;
146 s->print_name(&st);
147 st.print(" slow case");
148 _masm->block_comment(st.as_string());
149 }
150 #endif
151 s->emit_code(this);
152 #ifdef ASSERT
153 s->assert_no_unbound_labels();
154 #endif
155 }
156 }
157
158
159 void LIR_Assembler::emit_slow_case_stubs() {
160 emit_stubs(_slow_case_stubs);
161 }
162
163
164 bool LIR_Assembler::needs_icache(ciMethod* method) const {
165 return !method->is_static();
166 }
167
168 bool LIR_Assembler::needs_clinit_barrier_on_entry(ciMethod* method) const {
169 return VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier();
170 }
171
172 int LIR_Assembler::code_offset() const {
173 return _masm->offset();
174 }
175
176
177 address LIR_Assembler::pc() const {
178 return _masm->pc();
179 }
180
181 // To bang the stack of this compiled method we use the stack size
182 // that the interpreter would need in case of a deoptimization. This
183 // removes the need to bang the stack in the deoptimization blob which
184 // in turn simplifies stack overflow handling.
185 int LIR_Assembler::bang_size_in_bytes() const {
186 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
187 }
188
189 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
190 for (int i = 0; i < info_list->length(); i++) {
191 XHandlers* handlers = info_list->at(i)->exception_handlers();
192
193 for (int j = 0; j < handlers->length(); j++) {
194 XHandler* handler = handlers->handler_at(j);
195 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
196 assert(handler->entry_code() == NULL ||
197 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
198 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
199
200 if (handler->entry_pco() == -1) {
201 // entry code not emitted yet
202 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
203 handler->set_entry_pco(code_offset());
204 if (CommentedAssembly) {
205 _masm->block_comment("Exception adapter block");
206 }
207 emit_lir_list(handler->entry_code());
208 } else {
209 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
210 }
211
212 assert(handler->entry_pco() != -1, "must be set now");
213 }
214 }
215 }
216 }
217
218
219 void LIR_Assembler::emit_code(BlockList* hir) {
220 if (PrintLIR) {
221 print_LIR(hir);
222 }
223
224 int n = hir->length();
225 for (int i = 0; i < n; i++) {
226 emit_block(hir->at(i));
227 CHECK_BAILOUT();
228 }
229
230 flush_debug_info(code_offset());
231
232 DEBUG_ONLY(check_no_unbound_labels());
233 }
234
235
236 void LIR_Assembler::emit_block(BlockBegin* block) {
237 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
238 align_backward_branch_target();
239 }
240
241 // if this block is the start of an exception handler, record the
242 // PC offset of the first instruction for later construction of
243 // the ExceptionHandlerTable
244 if (block->is_set(BlockBegin::exception_entry_flag)) {
245 block->set_exception_handler_pco(code_offset());
246 }
247
248 #ifndef PRODUCT
249 if (PrintLIRWithAssembly) {
250 // don't print Phi's
251 InstructionPrinter ip(false);
252 block->print(ip);
253 }
254 #endif /* PRODUCT */
255
256 assert(block->lir() != NULL, "must have LIR");
257 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
258
259 #ifndef PRODUCT
260 if (CommentedAssembly) {
261 stringStream st;
262 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
263 _masm->block_comment(st.as_string());
264 }
265 #endif
266
267 emit_lir_list(block->lir());
268
269 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
270 }
271
272
273 void LIR_Assembler::emit_lir_list(LIR_List* list) {
274 peephole(list);
275
276 int n = list->length();
277 for (int i = 0; i < n; i++) {
278 LIR_Op* op = list->at(i);
279
280 check_codespace();
281 CHECK_BAILOUT();
282
283 #ifndef PRODUCT
284 if (CommentedAssembly) {
285 // Don't record out every op since that's too verbose. Print
286 // branches since they include block and stub names. Also print
287 // patching moves since they generate funny looking code.
288 if (op->code() == lir_branch ||
289 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
290 (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
291 stringStream st;
292 op->print_on(&st);
293 _masm->block_comment(st.as_string());
294 }
295 }
296 if (PrintLIRWithAssembly) {
297 // print out the LIR operation followed by the resulting assembly
298 list->at(i)->print(); tty->cr();
299 }
300 #endif /* PRODUCT */
301
302 op->emit_code(this);
303
304 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
305 process_debug_info(op);
306 }
307
308 #ifndef PRODUCT
309 if (PrintLIRWithAssembly) {
310 _masm->code()->decode();
311 }
312 #endif /* PRODUCT */
313 }
314 }
315
316 #ifdef ASSERT
317 void LIR_Assembler::check_no_unbound_labels() {
318 CHECK_BAILOUT();
319
320 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
321 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
322 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
323 assert(false, "unbound label");
324 }
325 }
326 }
327 #endif
328
329 //----------------------------------debug info--------------------------------
330
331
332 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
333 int pc_offset = code_offset();
334 flush_debug_info(pc_offset);
335 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
336 if (info->exception_handlers() != NULL) {
337 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
338 }
339 }
340
341
342 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
343 flush_debug_info(pc_offset);
344 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
345 if (cinfo->exception_handlers() != NULL) {
346 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
347 }
348 }
349
350 static ValueStack* debug_info(Instruction* ins) {
351 StateSplit* ss = ins->as_StateSplit();
352 if (ss != NULL) return ss->state();
353 return ins->state_before();
354 }
355
356 void LIR_Assembler::process_debug_info(LIR_Op* op) {
357 Instruction* src = op->source();
358 if (src == NULL) return;
359 int pc_offset = code_offset();
360 if (_pending_non_safepoint == src) {
361 _pending_non_safepoint_offset = pc_offset;
362 return;
363 }
364 ValueStack* vstack = debug_info(src);
365 if (vstack == NULL) return;
366 if (_pending_non_safepoint != NULL) {
367 // Got some old debug info. Get rid of it.
368 if (debug_info(_pending_non_safepoint) == vstack) {
369 _pending_non_safepoint_offset = pc_offset;
370 return;
371 }
372 if (_pending_non_safepoint_offset < pc_offset) {
373 record_non_safepoint_debug_info();
374 }
375 _pending_non_safepoint = NULL;
376 }
377 // Remember the debug info.
378 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
379 _pending_non_safepoint = src;
380 _pending_non_safepoint_offset = pc_offset;
381 }
382 }
383
384 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
385 // Return NULL if n is too large.
386 // Returns the caller_bci for the next-younger state, also.
387 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
388 ValueStack* t = s;
389 for (int i = 0; i < n; i++) {
390 if (t == NULL) break;
391 t = t->caller_state();
392 }
393 if (t == NULL) return NULL;
394 for (;;) {
395 ValueStack* tc = t->caller_state();
396 if (tc == NULL) return s;
397 t = tc;
398 bci_result = tc->bci();
399 s = s->caller_state();
400 }
401 }
402
403 void LIR_Assembler::record_non_safepoint_debug_info() {
404 int pc_offset = _pending_non_safepoint_offset;
405 ValueStack* vstack = debug_info(_pending_non_safepoint);
406 int bci = vstack->bci();
407
408 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
409 assert(debug_info->recording_non_safepoints(), "sanity");
410
411 debug_info->add_non_safepoint(pc_offset);
412
413 // Visit scopes from oldest to youngest.
414 for (int n = 0; ; n++) {
415 int s_bci = bci;
416 ValueStack* s = nth_oldest(vstack, n, s_bci);
417 if (s == NULL) break;
418 IRScope* scope = s->scope();
419 //Always pass false for reexecute since these ScopeDescs are never used for deopt
420 methodHandle null_mh;
421 debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
422 }
423
424 debug_info->end_non_safepoint(pc_offset);
425 }
426
427
428 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
429 return add_debug_info_for_null_check(code_offset(), cinfo);
430 }
431
432 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
433 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
434 append_code_stub(stub);
435 return stub;
436 }
437
438 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
439 add_debug_info_for_div0(code_offset(), info);
440 }
441
442 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
443 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
444 append_code_stub(stub);
445 }
446
447 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
448 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
449 }
450
451
452 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
453 verify_oop_map(op->info());
454
455 // must align calls sites, otherwise they can't be updated atomically
456 align_call(op->code());
457
458 // emit the static call stub stuff out of line
459 emit_static_call_stub();
460 CHECK_BAILOUT();
461
462 switch (op->code()) {
463 case lir_static_call:
464 case lir_dynamic_call:
465 call(op, relocInfo::static_call_type);
466 break;
467 case lir_optvirtual_call:
468 call(op, relocInfo::opt_virtual_call_type);
469 break;
470 case lir_icvirtual_call:
471 ic_call(op);
472 break;
473 default:
474 fatal("unexpected op code: %s", op->name());
475 break;
476 }
477
478 // JSR 292
479 // Record if this method has MethodHandle invokes.
480 if (op->is_method_handle_invoke()) {
481 compilation()->set_has_method_handle_invokes(true);
482 }
483
484 #if defined(IA32) && defined(COMPILER2)
485 // C2 leave fpu stack dirty clean it
486 if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
487 int i;
488 for ( i = 1; i <= 7 ; i++ ) {
489 ffree(i);
490 }
491 if (!op->result_opr()->is_float_kind()) {
492 ffree(0);
493 }
494 }
495 #endif // IA32 && COMPILER2
496 }
497
498
499 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
500 _masm->bind (*(op->label()));
501 }
502
503
504 void LIR_Assembler::emit_op1(LIR_Op1* op) {
505 switch (op->code()) {
506 case lir_move:
507 if (op->move_kind() == lir_move_volatile) {
508 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
509 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
510 } else {
511 move_op(op->in_opr(), op->result_opr(), op->type(),
512 op->patch_code(), op->info(), op->pop_fpu_stack(),
513 op->move_kind() == lir_move_unaligned,
514 op->move_kind() == lir_move_wide);
515 }
516 break;
517
518 case lir_roundfp: {
519 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
520 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
521 break;
522 }
523
524 case lir_return: {
525 assert(op->as_OpReturn() != NULL, "sanity");
526 LIR_OpReturn *ret_op = (LIR_OpReturn*)op;
527 return_op(ret_op->in_opr(), ret_op->stub());
528 if (ret_op->stub() != NULL) {
529 append_code_stub(ret_op->stub());
530 }
531 break;
532 }
533
534 case lir_safepoint:
535 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
536 _masm->nop();
537 }
538 safepoint_poll(op->in_opr(), op->info());
539 break;
540
541 #ifdef IA32
542 case lir_fxch:
543 fxch(op->in_opr()->as_jint());
544 break;
545
546 case lir_fld:
547 fld(op->in_opr()->as_jint());
548 break;
549 #endif // IA32
550
551 case lir_branch:
552 break;
553
554 case lir_push:
555 push(op->in_opr());
556 break;
557
558 case lir_pop:
559 pop(op->in_opr());
560 break;
561
562 case lir_leal:
563 leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
564 break;
565
566 case lir_null_check: {
567 ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
568
569 if (op->in_opr()->is_single_cpu()) {
570 _masm->null_check(op->in_opr()->as_register(), stub->entry());
571 } else {
572 Unimplemented();
573 }
574 break;
575 }
576
577 case lir_monaddr:
578 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
579 break;
580
581 case lir_unwind:
582 unwind_op(op->in_opr());
583 break;
584
585 default:
586 Unimplemented();
587 break;
588 }
589 }
590
591
592 void LIR_Assembler::emit_op0(LIR_Op0* op) {
593 switch (op->code()) {
594 case lir_nop:
595 assert(op->info() == NULL, "not supported");
596 _masm->nop();
597 break;
598
599 case lir_label:
600 Unimplemented();
601 break;
602
603 case lir_std_entry:
604 // init offsets
605 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
606 _masm->align(CodeEntryAlignment);
607 if (needs_icache(compilation()->method())) {
608 check_icache();
609 }
610 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
611 _masm->verified_entry(compilation()->directive()->BreakAtExecuteOption);
612 if (needs_clinit_barrier_on_entry(compilation()->method())) {
613 clinit_barrier(compilation()->method());
614 }
615 build_frame();
616 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
617 break;
618
619 case lir_osr_entry:
620 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
621 osr_entry();
622 break;
623
624 #ifdef IA32
625 case lir_fpop_raw:
626 fpop();
627 break;
628 #endif // IA32
629
630 case lir_breakpoint:
631 breakpoint();
632 break;
633
634 case lir_membar:
635 membar();
636 break;
637
638 case lir_membar_acquire:
639 membar_acquire();
640 break;
641
642 case lir_membar_release:
643 membar_release();
644 break;
645
646 case lir_membar_loadload:
647 membar_loadload();
648 break;
649
650 case lir_membar_storestore:
651 membar_storestore();
652 break;
653
654 case lir_membar_loadstore:
655 membar_loadstore();
656 break;
657
658 case lir_membar_storeload:
659 membar_storeload();
660 break;
661
662 case lir_get_thread:
663 get_thread(op->result_opr());
664 break;
665
666 case lir_on_spin_wait:
667 on_spin_wait();
668 break;
669
670 default:
671 ShouldNotReachHere();
672 break;
673 }
674 }
675
676
677 void LIR_Assembler::emit_op2(LIR_Op2* op) {
678 switch (op->code()) {
679 case lir_cmp:
680 if (op->info() != NULL) {
681 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
682 "shouldn't be codeemitinfo for non-address operands");
683 add_debug_info_for_null_check_here(op->info()); // exception possible
684 }
685 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
686 break;
687
688 case lir_cmp_l2i:
689 case lir_cmp_fd2i:
690 case lir_ucmp_fd2i:
691 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
692 break;
693
694 case lir_cmove:
695 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
696 break;
697
698 case lir_shl:
699 case lir_shr:
700 case lir_ushr:
701 if (op->in_opr2()->is_constant()) {
702 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
703 } else {
704 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
705 }
706 break;
707
708 case lir_add:
709 case lir_sub:
710 case lir_mul:
711 case lir_div:
712 case lir_rem:
713 assert(op->fpu_pop_count() < 2, "");
714 arith_op(
715 op->code(),
716 op->in_opr1(),
717 op->in_opr2(),
718 op->result_opr(),
719 op->info(),
720 op->fpu_pop_count() == 1);
721 break;
722
723 case lir_abs:
724 case lir_sqrt:
725 case lir_tan:
726 case lir_log10:
727 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
728 break;
729
730 case lir_neg:
731 negate(op->in_opr1(), op->result_opr(), op->in_opr2());
732 break;
733
734 case lir_logic_and:
735 case lir_logic_or:
736 case lir_logic_xor:
737 logic_op(
738 op->code(),
739 op->in_opr1(),
740 op->in_opr2(),
741 op->result_opr());
742 break;
743
744 case lir_throw:
745 throw_op(op->in_opr1(), op->in_opr2(), op->info());
746 break;
747
748 case lir_xadd:
749 case lir_xchg:
750 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
751 break;
752
753 default:
754 Unimplemented();
755 break;
756 }
757 }
758
759
760 void LIR_Assembler::build_frame() {
761 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
762 }
763
764
765 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
766 assert(strict_fp_requires_explicit_rounding, "not required");
767 assert((src->is_single_fpu() && dest->is_single_stack()) ||
768 (src->is_double_fpu() && dest->is_double_stack()),
769 "round_fp: rounds register -> stack location");
770
771 reg2stack (src, dest, src->type(), pop_fpu_stack);
772 }
773
774
775 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
776 if (src->is_register()) {
777 if (dest->is_register()) {
778 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
779 reg2reg(src, dest);
780 } else if (dest->is_stack()) {
781 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
782 reg2stack(src, dest, type, pop_fpu_stack);
783 } else if (dest->is_address()) {
784 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
785 } else {
786 ShouldNotReachHere();
787 }
788
789 } else if (src->is_stack()) {
790 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
791 if (dest->is_register()) {
792 stack2reg(src, dest, type);
793 } else if (dest->is_stack()) {
794 stack2stack(src, dest, type);
795 } else {
796 ShouldNotReachHere();
797 }
798
799 } else if (src->is_constant()) {
800 if (dest->is_register()) {
801 const2reg(src, dest, patch_code, info); // patching is possible
802 } else if (dest->is_stack()) {
803 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
804 const2stack(src, dest);
805 } else if (dest->is_address()) {
806 assert(patch_code == lir_patch_none, "no patching allowed here");
807 const2mem(src, dest, type, info, wide);
808 } else {
809 ShouldNotReachHere();
810 }
811
812 } else if (src->is_address()) {
813 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
814
815 } else {
816 ShouldNotReachHere();
817 }
818 }
819
820
821 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
822 #ifndef PRODUCT
823 if (VerifyOops) {
824 OopMapStream s(info->oop_map());
825 while (!s.is_done()) {
826 OopMapValue v = s.current();
827 if (v.is_oop()) {
828 VMReg r = v.reg();
829 if (!r->is_stack()) {
830 stringStream st;
831 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
832 _masm->verify_oop(r->as_Register());
833 } else {
834 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
835 }
836 }
837 check_codespace();
838 CHECK_BAILOUT();
839
840 s.next();
841 }
842 }
843 #endif
844 }