1395 Register new_value_hi = op->new_value()->as_register_hi();
1396 Register dest = op->result_opr()->as_register();
1397 Register tmp_lo = op->tmp1()->as_register_lo();
1398 Register tmp_hi = op->tmp1()->as_register_hi();
1399
1400 assert_different_registers(tmp_lo, tmp_hi, cmp_value_lo, cmp_value_hi, dest, new_value_lo, new_value_hi, addr);
1401 assert(tmp_hi->encoding() == tmp_lo->encoding() + 1, "non aligned register pair");
1402 assert(new_value_hi->encoding() == new_value_lo->encoding() + 1, "non aligned register pair");
1403 assert((tmp_lo->encoding() & 0x1) == 0, "misaligned register pair");
1404 assert((new_value_lo->encoding() & 0x1) == 0, "misaligned register pair");
1405 __ atomic_cas64(tmp_lo, tmp_hi, dest, cmp_value_lo, cmp_value_hi,
1406 new_value_lo, new_value_hi, addr, 0);
1407 } else {
1408 Unimplemented();
1409 }
1410 // FIXME: is full membar really needed instead of just membar_acquire?
1411 __ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad | MacroAssembler::StoreStore), Rtemp);
1412 }
1413
1414
1415 void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) {
1416 AsmCondition acond = al;
1417 AsmCondition ncond = nv;
1418 if (opr1 != opr2) {
1419 switch (condition) {
1420 case lir_cond_equal: acond = eq; ncond = ne; break;
1421 case lir_cond_notEqual: acond = ne; ncond = eq; break;
1422 case lir_cond_less: acond = lt; ncond = ge; break;
1423 case lir_cond_lessEqual: acond = le; ncond = gt; break;
1424 case lir_cond_greaterEqual: acond = ge; ncond = lt; break;
1425 case lir_cond_greater: acond = gt; ncond = le; break;
1426 case lir_cond_aboveEqual: acond = hs; ncond = lo; break;
1427 case lir_cond_belowEqual: acond = ls; ncond = hi; break;
1428 default: ShouldNotReachHere();
1429 }
1430 }
1431
1432 for (;;) { // two iterations only
1433 if (opr1 == result) {
1434 // do nothing
1435 } else if (opr1->is_single_cpu()) {
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1395 Register new_value_hi = op->new_value()->as_register_hi();
1396 Register dest = op->result_opr()->as_register();
1397 Register tmp_lo = op->tmp1()->as_register_lo();
1398 Register tmp_hi = op->tmp1()->as_register_hi();
1399
1400 assert_different_registers(tmp_lo, tmp_hi, cmp_value_lo, cmp_value_hi, dest, new_value_lo, new_value_hi, addr);
1401 assert(tmp_hi->encoding() == tmp_lo->encoding() + 1, "non aligned register pair");
1402 assert(new_value_hi->encoding() == new_value_lo->encoding() + 1, "non aligned register pair");
1403 assert((tmp_lo->encoding() & 0x1) == 0, "misaligned register pair");
1404 assert((new_value_lo->encoding() & 0x1) == 0, "misaligned register pair");
1405 __ atomic_cas64(tmp_lo, tmp_hi, dest, cmp_value_lo, cmp_value_hi,
1406 new_value_lo, new_value_hi, addr, 0);
1407 } else {
1408 Unimplemented();
1409 }
1410 // FIXME: is full membar really needed instead of just membar_acquire?
1411 __ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad | MacroAssembler::StoreStore), Rtemp);
1412 }
1413
1414
1415 void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type,
1416 LIR_Opr cmp_opr1, LIR_Opr cmp_opr2) {
1417 assert(cmp_opr1 == LIR_OprFact::illegalOpr && cmp_opr2 == LIR_OprFact::illegalOpr, "unnecessary cmp oprs on arm");
1418
1419 AsmCondition acond = al;
1420 AsmCondition ncond = nv;
1421 if (opr1 != opr2) {
1422 switch (condition) {
1423 case lir_cond_equal: acond = eq; ncond = ne; break;
1424 case lir_cond_notEqual: acond = ne; ncond = eq; break;
1425 case lir_cond_less: acond = lt; ncond = ge; break;
1426 case lir_cond_lessEqual: acond = le; ncond = gt; break;
1427 case lir_cond_greaterEqual: acond = ge; ncond = lt; break;
1428 case lir_cond_greater: acond = gt; ncond = le; break;
1429 case lir_cond_aboveEqual: acond = hs; ncond = lo; break;
1430 case lir_cond_belowEqual: acond = ls; ncond = hi; break;
1431 default: ShouldNotReachHere();
1432 }
1433 }
1434
1435 for (;;) { // two iterations only
1436 if (opr1 == result) {
1437 // do nothing
1438 } else if (opr1->is_single_cpu()) {
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