1 /*
  2  * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #include "precompiled.hpp"
 28 #include "c1/c1_FrameMap.hpp"
 29 #include "c1/c1_LIR.hpp"
 30 #include "runtime/sharedRuntime.hpp"
 31 #include "vmreg_riscv.inline.hpp"
 32 
 33 LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool)
 34 {
 35   LIR_Opr opr = LIR_OprFact::illegalOpr;
 36   VMReg r_1 = reg->first();
 37   VMReg r_2 = reg->second();
 38   if (r_1->is_stack()) {
 39     // Convert stack slot to an SP offset
 40     // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value
 41     // so we must add it in here.
 42     int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 43     opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type));
 44   } else if (r_1->is_Register()) {
 45     Register reg1 = r_1->as_Register();
 46     if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) {
 47       Register reg2 = r_2->as_Register();
 48       assert(reg2 == reg1, "must be same register");
 49       opr = as_long_opr(reg1);
 50     } else if (is_reference_type(type)) {
 51       opr = as_oop_opr(reg1);
 52     } else if (type == T_METADATA) {
 53       opr = as_metadata_opr(reg1);
 54     } else if (type == T_ADDRESS) {
 55       opr = as_address_opr(reg1);
 56     } else {
 57       opr = as_opr(reg1);
 58     }
 59   } else if (r_1->is_FloatRegister()) {
 60     assert(type == T_DOUBLE || type == T_FLOAT, "wrong type");
 61     int num = r_1->as_FloatRegister()->encoding();
 62     if (type == T_FLOAT) {
 63       opr = LIR_OprFact::single_fpu(num);
 64     } else {
 65       opr = LIR_OprFact::double_fpu(num);
 66     }
 67   } else {
 68     ShouldNotReachHere();
 69   }
 70   return opr;
 71 }
 72 
 73 LIR_Opr FrameMap::zr_opr;
 74 LIR_Opr FrameMap::r1_opr;
 75 LIR_Opr FrameMap::r2_opr;
 76 LIR_Opr FrameMap::r3_opr;
 77 LIR_Opr FrameMap::r4_opr;
 78 LIR_Opr FrameMap::r5_opr;
 79 LIR_Opr FrameMap::r6_opr;
 80 LIR_Opr FrameMap::r7_opr;
 81 LIR_Opr FrameMap::r8_opr;
 82 LIR_Opr FrameMap::r9_opr;
 83 LIR_Opr FrameMap::r10_opr;
 84 LIR_Opr FrameMap::r11_opr;
 85 LIR_Opr FrameMap::r12_opr;
 86 LIR_Opr FrameMap::r13_opr;
 87 LIR_Opr FrameMap::r14_opr;
 88 LIR_Opr FrameMap::r15_opr;
 89 LIR_Opr FrameMap::r16_opr;
 90 LIR_Opr FrameMap::r17_opr;
 91 LIR_Opr FrameMap::r18_opr;
 92 LIR_Opr FrameMap::r19_opr;
 93 LIR_Opr FrameMap::r20_opr;
 94 LIR_Opr FrameMap::r21_opr;
 95 LIR_Opr FrameMap::r22_opr;
 96 LIR_Opr FrameMap::r23_opr;
 97 LIR_Opr FrameMap::r24_opr;
 98 LIR_Opr FrameMap::r25_opr;
 99 LIR_Opr FrameMap::r26_opr;
100 LIR_Opr FrameMap::r27_opr;
101 LIR_Opr FrameMap::r28_opr;
102 LIR_Opr FrameMap::r29_opr;
103 LIR_Opr FrameMap::r30_opr;
104 LIR_Opr FrameMap::r31_opr;
105 
106 LIR_Opr FrameMap::fp_opr;
107 LIR_Opr FrameMap::sp_opr;
108 
109 LIR_Opr FrameMap::receiver_opr;
110 
111 LIR_Opr FrameMap::zr_oop_opr;
112 LIR_Opr FrameMap::r1_oop_opr;
113 LIR_Opr FrameMap::r2_oop_opr;
114 LIR_Opr FrameMap::r3_oop_opr;
115 LIR_Opr FrameMap::r4_oop_opr;
116 LIR_Opr FrameMap::r5_oop_opr;
117 LIR_Opr FrameMap::r6_oop_opr;
118 LIR_Opr FrameMap::r7_oop_opr;
119 LIR_Opr FrameMap::r8_oop_opr;
120 LIR_Opr FrameMap::r9_oop_opr;
121 LIR_Opr FrameMap::r10_oop_opr;
122 LIR_Opr FrameMap::r11_oop_opr;
123 LIR_Opr FrameMap::r12_oop_opr;
124 LIR_Opr FrameMap::r13_oop_opr;
125 LIR_Opr FrameMap::r14_oop_opr;
126 LIR_Opr FrameMap::r15_oop_opr;
127 LIR_Opr FrameMap::r16_oop_opr;
128 LIR_Opr FrameMap::r17_oop_opr;
129 LIR_Opr FrameMap::r18_oop_opr;
130 LIR_Opr FrameMap::r19_oop_opr;
131 LIR_Opr FrameMap::r20_oop_opr;
132 LIR_Opr FrameMap::r21_oop_opr;
133 LIR_Opr FrameMap::r22_oop_opr;
134 LIR_Opr FrameMap::r23_oop_opr;
135 LIR_Opr FrameMap::r24_oop_opr;
136 LIR_Opr FrameMap::r25_oop_opr;
137 LIR_Opr FrameMap::r26_oop_opr;
138 LIR_Opr FrameMap::r27_oop_opr;
139 LIR_Opr FrameMap::r28_oop_opr;
140 LIR_Opr FrameMap::r29_oop_opr;
141 LIR_Opr FrameMap::r30_oop_opr;
142 LIR_Opr FrameMap::r31_oop_opr;
143 
144 LIR_Opr FrameMap::t0_opr;
145 LIR_Opr FrameMap::t1_opr;
146 LIR_Opr FrameMap::t0_long_opr;
147 LIR_Opr FrameMap::t1_long_opr;
148 
149 LIR_Opr FrameMap::r10_metadata_opr;
150 LIR_Opr FrameMap::r11_metadata_opr;
151 LIR_Opr FrameMap::r12_metadata_opr;
152 LIR_Opr FrameMap::r13_metadata_opr;
153 LIR_Opr FrameMap::r14_metadata_opr;
154 LIR_Opr FrameMap::r15_metadata_opr;
155 
156 LIR_Opr FrameMap::long10_opr;
157 LIR_Opr FrameMap::long11_opr;
158 LIR_Opr FrameMap::fpu10_float_opr;
159 LIR_Opr FrameMap::fpu10_double_opr;
160 
161 LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, };
162 LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, };
163 
164 //--------------------------------------------------------
165 //               FrameMap
166 //--------------------------------------------------------
167 // |---f31--|
168 // |---..---|
169 // |---f28--|
170 // |---f27--|<---pd_last_callee_saved_fpu_reg_2
171 // |---..---|
172 // |---f18--|<---pd_first_callee_saved_fpu_reg_2
173 // |---f17--|
174 // |---..---|
175 // |---f10--|
176 // |---f9---|<---pd_last_callee_saved_fpu_reg_1
177 // |---f8---|<---pd_first_callee_saved_fpu_reg_1
178 // |---f7---|
179 // |---..---|
180 // |---f0---|
181 // |---x27--|
182 // |---x23--|
183 // |---x8---|
184 // |---x4---|
185 // |---x2---|
186 // |---x1---|
187 // |---x0---|
188 // |---x26--|<---pd_last_callee_saved_reg
189 // |---..---|
190 // |---x18--|
191 // |---x9---|<---pd_first_callee_saved_reg
192 // |---x31--|
193 // |---..---|
194 // |---x28--|
195 // |---x17--|
196 // |---..---|
197 // |---x10--|
198 // |---x7---|
199 // |---x3---|
200 
201 void FrameMap::initialize() {
202   assert(!_init_done, "once");
203 
204   int i = 0;
205 
206   // caller save register
207   map_register(i, x3);  r3_opr  = LIR_OprFact::single_cpu(i); i++;
208   map_register(i, x7);  r7_opr  = LIR_OprFact::single_cpu(i); i++;
209   map_register(i, x10); r10_opr = LIR_OprFact::single_cpu(i); i++;
210   map_register(i, x11); r11_opr = LIR_OprFact::single_cpu(i); i++;
211   map_register(i, x12); r12_opr = LIR_OprFact::single_cpu(i); i++;
212   map_register(i, x13); r13_opr = LIR_OprFact::single_cpu(i); i++;
213   map_register(i, x14); r14_opr = LIR_OprFact::single_cpu(i); i++;
214   map_register(i, x15); r15_opr = LIR_OprFact::single_cpu(i); i++;
215   map_register(i, x16); r16_opr = LIR_OprFact::single_cpu(i); i++;
216   map_register(i, x17); r17_opr = LIR_OprFact::single_cpu(i); i++;
217   map_register(i, x28); r28_opr = LIR_OprFact::single_cpu(i); i++;
218   map_register(i, x29); r29_opr = LIR_OprFact::single_cpu(i); i++;
219   map_register(i, x30); r30_opr = LIR_OprFact::single_cpu(i); i++;
220   map_register(i, x31); r31_opr = LIR_OprFact::single_cpu(i); i++;
221 
222   // callee save register
223   map_register(i, x9);  r9_opr  = LIR_OprFact::single_cpu(i); i++;
224   map_register(i, x18); r18_opr = LIR_OprFact::single_cpu(i); i++;
225   map_register(i, x19); r19_opr = LIR_OprFact::single_cpu(i); i++;
226   map_register(i, x20); r20_opr = LIR_OprFact::single_cpu(i); i++;
227   map_register(i, x21); r21_opr = LIR_OprFact::single_cpu(i); i++;
228   map_register(i, x22); r22_opr = LIR_OprFact::single_cpu(i); i++;
229   map_register(i, x24); r24_opr = LIR_OprFact::single_cpu(i); i++;
230   map_register(i, x25); r25_opr = LIR_OprFact::single_cpu(i); i++;
231   map_register(i, x26); r26_opr = LIR_OprFact::single_cpu(i); i++;
232 
233   // special register
234   map_register(i, x0);  zr_opr  = LIR_OprFact::single_cpu(i); i++;  // zr
235   map_register(i, x1);  r1_opr  = LIR_OprFact::single_cpu(i); i++;  // lr
236   map_register(i, x2);  r2_opr  = LIR_OprFact::single_cpu(i); i++;  // sp
237   map_register(i, x4);  r4_opr  = LIR_OprFact::single_cpu(i); i++;  // thread
238   map_register(i, x8);  r8_opr  = LIR_OprFact::single_cpu(i); i++;  // fp
239   map_register(i, x23); r23_opr = LIR_OprFact::single_cpu(i); i++;  // java thread
240   map_register(i, x27); r27_opr = LIR_OprFact::single_cpu(i); i++;  // heapbase
241 
242   // tmp register
243   map_register(i, x5);  r5_opr  = LIR_OprFact::single_cpu(i); i++;  // t0
244   map_register(i, x6);  r6_opr  = LIR_OprFact::single_cpu(i); i++;  // t1
245 
246   t0_opr = r5_opr;
247   t1_opr = r6_opr;
248   t0_long_opr = LIR_OprFact::double_cpu(r5_opr->cpu_regnr(), r5_opr->cpu_regnr());
249   t1_long_opr = LIR_OprFact::double_cpu(r6_opr->cpu_regnr(), r6_opr->cpu_regnr());
250 
251   long10_opr  = LIR_OprFact::double_cpu(r10_opr->cpu_regnr(), r10_opr->cpu_regnr());
252   long11_opr  = LIR_OprFact::double_cpu(r11_opr->cpu_regnr(), r11_opr->cpu_regnr());
253 
254   fpu10_float_opr   = LIR_OprFact::single_fpu(10);
255   fpu10_double_opr  = LIR_OprFact::double_fpu(10);
256 
257   i = 0;
258   _caller_save_cpu_regs[i++]  = r3_opr;
259   _caller_save_cpu_regs[i++]  = r7_opr;
260   _caller_save_cpu_regs[i++]  = r10_opr;
261   _caller_save_cpu_regs[i++]  = r11_opr;
262   _caller_save_cpu_regs[i++]  = r12_opr;
263   _caller_save_cpu_regs[i++]  = r13_opr;
264   _caller_save_cpu_regs[i++]  = r14_opr;
265   _caller_save_cpu_regs[i++]  = r15_opr;
266   _caller_save_cpu_regs[i++]  = r16_opr;
267   _caller_save_cpu_regs[i++]  = r17_opr;
268   _caller_save_cpu_regs[i++]  = r28_opr;
269   _caller_save_cpu_regs[i++]  = r29_opr;
270   _caller_save_cpu_regs[i++]  = r30_opr;
271   _caller_save_cpu_regs[i++]  = r31_opr;
272 
273   _init_done = true;
274 
275   zr_oop_opr  = as_oop_opr(x0);
276   r1_oop_opr  = as_oop_opr(x1);
277   r2_oop_opr  = as_oop_opr(x2);
278   r3_oop_opr  = as_oop_opr(x3);
279   r4_oop_opr  = as_oop_opr(x4);
280   r5_oop_opr  = as_oop_opr(x5);
281   r6_oop_opr  = as_oop_opr(x6);
282   r7_oop_opr  = as_oop_opr(x7);
283   r8_oop_opr  = as_oop_opr(x8);
284   r9_oop_opr  = as_oop_opr(x9);
285   r10_oop_opr = as_oop_opr(x10);
286   r11_oop_opr = as_oop_opr(x11);
287   r12_oop_opr = as_oop_opr(x12);
288   r13_oop_opr = as_oop_opr(x13);
289   r14_oop_opr = as_oop_opr(x14);
290   r15_oop_opr = as_oop_opr(x15);
291   r16_oop_opr = as_oop_opr(x16);
292   r17_oop_opr = as_oop_opr(x17);
293   r18_oop_opr = as_oop_opr(x18);
294   r19_oop_opr = as_oop_opr(x19);
295   r20_oop_opr = as_oop_opr(x20);
296   r21_oop_opr = as_oop_opr(x21);
297   r22_oop_opr = as_oop_opr(x22);
298   r23_oop_opr = as_oop_opr(x23);
299   r24_oop_opr = as_oop_opr(x24);
300   r25_oop_opr = as_oop_opr(x25);
301   r26_oop_opr = as_oop_opr(x26);
302   r27_oop_opr = as_oop_opr(x27);
303   r28_oop_opr = as_oop_opr(x28);
304   r29_oop_opr = as_oop_opr(x29);
305   r30_oop_opr = as_oop_opr(x30);
306   r31_oop_opr = as_oop_opr(x31);
307 
308   r10_metadata_opr = as_metadata_opr(x10);
309   r11_metadata_opr = as_metadata_opr(x11);
310   r12_metadata_opr = as_metadata_opr(x12);
311   r13_metadata_opr = as_metadata_opr(x13);
312   r14_metadata_opr = as_metadata_opr(x14);
313   r15_metadata_opr = as_metadata_opr(x15);
314 
315   sp_opr = as_pointer_opr(sp);
316   fp_opr = as_pointer_opr(fp);
317 
318   VMRegPair regs;
319   BasicType sig_bt = T_OBJECT;
320   SharedRuntime::java_calling_convention(&sig_bt, &regs, 1);
321   receiver_opr = as_oop_opr(regs.first()->as_Register());
322 
323   for (i = 0; i < nof_caller_save_fpu_regs; i++) {
324     _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i);
325   }
326 }
327 
328 
329 Address FrameMap::make_new_address(ByteSize sp_offset) const {
330   return Address(sp, in_bytes(sp_offset));
331 }
332 
333 
334 // ----------------mapping-----------------------
335 // all mapping is based on rfp addressing, except for simple leaf methods where we access
336 // the locals sp based (and no frame is built)
337 
338 
339 // Frame for simple leaf methods (quick entries)
340 //
341 //   +----------+
342 //   | ret addr |   <- TOS
343 //   +----------+
344 //   | args     |
345 //   | ......   |
346 
347 // Frame for standard methods
348 //
349 //   | .........|  <- TOS
350 //   | locals   |
351 //   +----------+
352 //   |  old fp, |  <- RFP
353 //   +----------+
354 //   | ret addr |
355 //   +----------+
356 //   |  args    |
357 //   | .........|
358 
359 
360 // For OopMaps, map a local variable or spill index to an VMRegImpl name.
361 // This is the offset from sp() in the frame of the slot for the index,
362 // skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.)
363 //
364 //           framesize +
365 //           stack0         stack0          0  <- VMReg
366 //             |              | <registers> |
367 //  ...........|..............|.............|
368 //      0 1 2 3 x x 4 5 6 ... |                <- local indices
369 //      ^           ^        sp()                 ( x x indicate link
370 //      |           |                               and return addr)
371 //  arguments   non-argument locals
372 
373 
374 VMReg FrameMap::fpu_regname (int n) {
375   // Return the OptoReg name for the fpu stack slot "n"
376   // A spilled fpu stack slot comprises to two single-word OptoReg's.
377   return as_FloatRegister(n)->as_VMReg();
378 }
379 
380 LIR_Opr FrameMap::stack_pointer()
381 {
382   return FrameMap::sp_opr;
383 }
384 
385 // JSR 292
386 LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() {
387   return LIR_OprFact::illegalOpr;  // Not needed on riscv64
388 }
389 
390 bool FrameMap::validate_frame() {
391   return true;
392 }