1 /*
2 * Copyright (c) 1999, 2020, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "precompiled.hpp"
28 #include "c1/c1_LIR.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "classfile/systemDictionary.hpp"
32 #include "gc/shared/barrierSetAssembler.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "oops/arrayOop.hpp"
36 #include "oops/markWord.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/os.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/stubRoutines.hpp"
41
42 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
43 FloatRegister freg0, FloatRegister freg1,
44 Register result)
45 {
46 if (is_float) {
47 float_compare(result, freg0, freg1, unordered_result);
48 } else {
49 double_compare(result, freg0, freg1, unordered_result);
50 }
51 }
52
53 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
54 const int aligned_mask = BytesPerWord - 1;
55 const int hdr_offset = oopDesc::mark_offset_in_bytes();
56 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
57 Label done;
58 int null_check_offset = -1;
59
60 verify_oop(obj);
61
62 // save object being locked into the BasicObjectLock
63 sd(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
64
65 null_check_offset = offset();
66
67 if (DiagnoseSyncOnValueBasedClasses != 0) {
68 load_klass(hdr, obj);
69 lwu(hdr, Address(hdr, Klass::access_flags_offset()));
70 andi(t0, hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
71 bnez(t0, slow_case, true /* is_far */);
72 }
73
74 // Load object header
75 ld(hdr, Address(obj, hdr_offset));
76 // and mark it as unlocked
77 ori(hdr, hdr, markWord::unlocked_value);
78 // save unlocked object header into the displaced header location on the stack
79 sd(hdr, Address(disp_hdr, 0));
80 // test if object header is still the same (i.e. unlocked), and if so, store the
81 // displaced header address in the object header - if it is not the same, get the
82 // object header instead
83 la(t1, Address(obj, hdr_offset));
84 cmpxchgptr(hdr, disp_hdr, t1, t0, done, /*fallthough*/NULL);
85 // if the object header was the same, we're done
86 // if the object header was not the same, it is now in the hdr register
87 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
88 //
89 // 1) (hdr & aligned_mask) == 0
90 // 2) sp <= hdr
91 // 3) hdr <= sp + page_size
92 //
93 // these 3 tests can be done by evaluating the following expression:
94 //
95 // (hdr -sp) & (aligned_mask - page_size)
96 //
97 // assuming both the stack pointer and page_size have their least
98 // significant 2 bits cleared and page_size is a power of 2
99 sub(hdr, hdr, sp);
100 li(t0, aligned_mask - os::vm_page_size());
101 andr(hdr, hdr, t0);
102 // for recursive locking, the result is zero => save it in the displaced header
103 // location (NULL in the displaced hdr location indicates recursive locking)
104 sd(hdr, Address(disp_hdr, 0));
105 // otherwise we don't care about the result and handle locking via runtime call
106 bnez(hdr, slow_case, /* is_far */ true);
107 bind(done);
108 return null_check_offset;
109 }
110
111 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
112 const int aligned_mask = BytesPerWord - 1;
113 const int hdr_offset = oopDesc::mark_offset_in_bytes();
114 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
115 Label done;
116
117 // load displaced header
118 ld(hdr, Address(disp_hdr, 0));
119 // if the loaded hdr is NULL we had recursive locking
120 // if we had recursive locking, we are done
121 beqz(hdr, done);
122 // load object
123 ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
124 verify_oop(obj);
125 // test if object header is pointing to the displaced header, and if so, restore
126 // the displaced header in the object - if the object header is not pointing to
127 // the displaced header, get the object header instead
128 // if the object header was not pointing to the displaced header,
129 // we do unlocking via runtime call
130 if (hdr_offset) {
131 la(t0, Address(obj, hdr_offset));
132 cmpxchgptr(disp_hdr, hdr, t0, t1, done, &slow_case);
133 } else {
134 cmpxchgptr(disp_hdr, hdr, obj, t1, done, &slow_case);
135 }
136 bind(done);
137 }
138
139 // Defines obj, preserves var_size_in_bytes
140 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
141 if (UseTLAB) {
142 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
143 } else {
144 eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, slow_case, /* is_far */ true);
145 }
146 }
147
148 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
149 assert_different_registers(obj, klass, len);
150 // This assumes that all prototype bits fitr in an int32_t
151 mv(tmp1, (int32_t)(intptr_t)markWord::prototype().value());
152 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
153
154 if (UseCompressedClassPointers) { // Take care not to kill klass
155 encode_klass_not_null(tmp1, klass);
156 sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
157 } else {
158 sd(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
159 }
160
161 if (len->is_valid()) {
162 sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
163 } else if (UseCompressedClassPointers) {
164 store_klass_gap(obj, zr);
165 }
166 }
167
168 // preserves obj, destroys len_in_bytes
169 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp1) {
170 assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
171 Label done;
172
173 // len_in_bytes is positive and ptr sized
174 sub(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
175 beqz(len_in_bytes, done);
176
177 // Preserve obj
178 if (hdr_size_in_bytes) {
179 add(obj, obj, hdr_size_in_bytes);
180 }
181 zero_memory(obj, len_in_bytes, tmp1);
182 if (hdr_size_in_bytes) {
183 sub(obj, obj, hdr_size_in_bytes);
184 }
185
186 bind(done);
187 }
188
189 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
190 assert_different_registers(obj, tmp1, tmp2);
191 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
192
193 try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
194
195 initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
196 }
197
198 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
199 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
200 "con_size_in_bytes is not multiple of alignment");
201 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
202
203 initialize_header(obj, klass, noreg, tmp1, tmp2);
204
205 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
206 // clear rest of allocated space
207 const Register index = tmp2;
208 // 16: multipler for threshold
209 const int threshold = 16 * BytesPerWord; // approximate break even point for code size (see comments below)
210 if (var_size_in_bytes != noreg) {
211 mv(index, var_size_in_bytes);
212 initialize_body(obj, index, hdr_size_in_bytes, tmp1);
213 } else if (con_size_in_bytes <= threshold) {
214 // use explicit null stores
215 int i = hdr_size_in_bytes;
216 if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multipler for BytesPerWord
217 sd(zr, Address(obj, i));
218 i += BytesPerWord;
219 }
220 for (; i < con_size_in_bytes; i += BytesPerWord) {
221 sd(zr, Address(obj, i));
222 }
223 } else if (con_size_in_bytes > hdr_size_in_bytes) {
224 block_comment("zero memory");
225 // use loop to null out the fields
226 int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
227 mv(index, words / 8); // 8: byte size
228
229 const int unroll = 8; // Number of sd(zr) instructions we'll unroll
230 int remainder = words % unroll;
231 la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
232
233 Label entry_point, loop;
234 j(entry_point);
235
236 bind(loop);
237 sub(index, index, 1);
238 for (int i = -unroll; i < 0; i++) {
239 if (-i == remainder) {
240 bind(entry_point);
241 }
242 sd(zr, Address(t0, i * wordSize));
243 }
244 if (remainder == 0) {
245 bind(entry_point);
246 }
247 add(t0, t0, unroll * wordSize);
248 bnez(index, loop);
249 }
250 }
251
252 membar(MacroAssembler::StoreStore);
253
254 if (CURRENT_ENV->dtrace_alloc_probes()) {
255 assert(obj == x10, "must be");
256 far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
257 }
258
259 verify_oop(obj);
260 }
261
262 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int header_size, int f, Register klass, Label& slow_case) {
263 assert_different_registers(obj, len, tmp1, tmp2, klass);
264
265 // determine alignment mask
266 assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
267
268 // check for negative or excessive length
269 mv(t0, (int32_t)max_array_allocation_length);
270 bgeu(len, t0, slow_case, /* is_far */ true);
271
272 const Register arr_size = tmp2; // okay to be the same
273 // align object end
274 mv(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
275 slli(t0, len, f);
276 add(arr_size, arr_size, t0);
277 andi(arr_size, arr_size, ~(uint)MinObjAlignmentInBytesMask);
278
279 try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
280
281 initialize_header(obj, klass, len, tmp1, tmp2);
282
283 // clear rest of allocated space
284 const Register len_zero = len;
285 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
286
287 membar(MacroAssembler::StoreStore);
288
289 if (CURRENT_ENV->dtrace_alloc_probes()) {
290 assert(obj == x10, "must be");
291 far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
292 }
293
294 verify_oop(obj);
295 }
296
297 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache, Label &L) {
298 verify_oop(receiver);
299 // explicit NULL check not needed since load from [klass_offset] causes a trap
300 // check against inline cache
301 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
302 cmp_klass(receiver, iCache, t0, L);
303 }
304
305 void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes) {
306 assert(bang_size_in_bytes >= framesize, "stack bang size incorrect");
307 // Make sure there is enough stack space for this method's activation.
308 // Note that we do this before creating a frame.
309 generate_stack_overflow_check(bang_size_in_bytes);
310 MacroAssembler::build_frame(framesize);
311
312 // Insert nmethod entry barrier into frame.
313 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
314 bs->nmethod_entry_barrier(this);
315 }
316
317 void C1_MacroAssembler::remove_frame(int framesize) {
318 MacroAssembler::remove_frame(framesize);
319 }
320
321
322 void C1_MacroAssembler::verified_entry() {
323 // If we have to make this method not-entrant we'll overwrite its
324 // first instruction with a jump. For this action to be legal we
325 // must ensure that this first instruction is a J, JAL or NOP.
326 // Make it a NOP.
327
328 nop();
329 }
330
331 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
332 // fp + 0: link
333 // + 1: return address
334 // + 2: argument with offset 0
335 // + 3: argument with offset 1
336 // + 4: ...
337 ld(reg, Address(fp, (offset_in_words + 2) * BytesPerWord));
338 }
339
340 #ifndef PRODUCT
341
342 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
343 if (!VerifyOops) {
344 return;
345 }
346 verify_oop_addr(Address(sp, stack_offset), "oop");
347 }
348
349 void C1_MacroAssembler::verify_not_null_oop(Register r) {
350 if (!VerifyOops) return;
351 Label not_null;
352 bnez(r, not_null);
353 stop("non-null oop required");
354 bind(not_null);
355 verify_oop(r);
356 }
357
358 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
359 #ifdef ASSERT
360 static int nn;
361 if (inv_x10) { mv(x10, 0xDEAD); }
362 if (inv_x9) { mv(x9, 0xDEAD); }
363 if (inv_x12) { mv(x12, nn++); }
364 if (inv_x13) { mv(x13, 0xDEAD); }
365 if (inv_x14) { mv(x14, 0xDEAD); }
366 if (inv_x15) { mv(x15, 0xDEAD); }
367 #endif // ASSERT
368 }
369 #endif // ifndef PRODUCT
370
371 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
372 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
373 Label& label, bool is_far, bool is_unordered);
374
375 static c1_cond_branch_insn c1_cond_branch[] =
376 {
377 /* SHORT branches */
378 (c1_cond_branch_insn)&Assembler::beq,
379 (c1_cond_branch_insn)&Assembler::bne,
380 (c1_cond_branch_insn)&Assembler::blt,
381 (c1_cond_branch_insn)&Assembler::ble,
382 (c1_cond_branch_insn)&Assembler::bge,
383 (c1_cond_branch_insn)&Assembler::bgt,
384 (c1_cond_branch_insn)&Assembler::bleu, // lir_cond_belowEqual
385 (c1_cond_branch_insn)&Assembler::bgeu // lir_cond_aboveEqual
386 };
387
388 static c1_float_cond_branch_insn c1_float_cond_branch[] =
389 {
390 /* FLOAT branches */
391 (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
392 (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
393 (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
394 (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
395 (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
396 (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
397 NULL, // lir_cond_belowEqual
398 NULL, // lir_cond_aboveEqual
399
400 /* DOUBLE branches */
401 (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
402 (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
403 (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
404 (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
405 (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
406 (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
407 NULL, // lir_cond_belowEqual
408 NULL // lir_cond_aboveEqual
409 };
410
411 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
412 BasicType type, bool is_far) {
413 if (type == T_OBJECT || type == T_ARRAY) {
414 assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
415 if (cmpFlag == lir_cond_equal) {
416 beq(op1, op2, label, is_far);
417 } else {
418 bne(op1, op2, label, is_far);
419 }
420 } else {
421 assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
422 "invalid c1 conditional branch index");
423 (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
424 }
425 }
426
427 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
428 bool is_far, bool is_unordered) {
429 assert(cmpFlag >= 0 &&
430 cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
431 "invalid c1 float conditional branch index");
432 (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
433 }