1 /*
 2  * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.
 3  * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
 4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 5  *
 6  * This code is free software; you can redistribute it and/or modify it
 7  * under the terms of the GNU General Public License version 2 only, as
 8  * published by the Free Software Foundation.
 9  *
10  * This code is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * version 2 for more details (a copy is included in the LICENSE file that
14  * accompanied this code).
15  *
16  * You should have received a copy of the GNU General Public License version
17  * 2 along with this work; if not, write to the Free Software Foundation,
18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21  * or visit www.oracle.com if you need additional information or have any
22  * questions.
23  *
24  */
25 
26 #ifndef CPU_RISCV64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
27 #define CPU_RISCV64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
28 
29 #include "asm/macroAssembler.hpp"
30 #include "gc/shared/barrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
32 #ifdef COMPILER1
33 class LIR_Assembler;
34 class ShenandoahPreBarrierStub;
35 class ShenandoahLoadReferenceBarrierStub;
36 class StubAssembler;
37 #endif
38 class StubCodeGenerator;
39 
40 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
41 private:
42 
43   void satb_write_barrier_pre(MacroAssembler* masm,
44                               Register obj,
45                               Register pre_val,
46                               Register thread,
47                               Register tmp,
48                               bool tosca_live,
49                               bool expand_call);
50   void shenandoah_write_barrier_pre(MacroAssembler* masm,
51                                     Register obj,
52                                     Register pre_val,
53                                     Register thread,
54                                     Register tmp,
55                                     bool tosca_live,
56                                     bool expand_call);
57 
58   void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
59   void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
60   void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);
61 
62 public:
63 
64   void iu_barrier(MacroAssembler* masm, Register dst, Register tmp);
65 
66 #ifdef COMPILER1
67   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
68   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
69   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
70   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
71 #endif
72 
73   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
74                                   Register src, Register dst, Register count, RegSet saved_regs);
75 
76   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
77                        Register dst, Address src, Register tmp1, Register tmp_thread);
78   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
79                         Address dst, Register val, Register tmp1, Register tmp2);
80 
81   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
82                                              Register obj, Register tmp, Label& slowpath);
83 
84   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
85                    Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);
86 };
87 
88 #endif // CPU_RISCV64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP