1 /*
   2  * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_CodeStubs.hpp"
  27 #include "c1/c1_InstructionPrinter.hpp"
  28 #include "c1/c1_LIR.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_ValueStack.hpp"
  31 #include "ci/ciInstance.hpp"
  32 #include "runtime/safepointMechanism.inline.hpp"
  33 #include "runtime/sharedRuntime.hpp"
  34 #include "runtime/vm_version.hpp"
  35 
  36 Register LIR_OprDesc::as_register() const {
  37   return FrameMap::cpu_rnr2reg(cpu_regnr());
  38 }
  39 
  40 Register LIR_OprDesc::as_register_lo() const {
  41   return FrameMap::cpu_rnr2reg(cpu_regnrLo());
  42 }
  43 
  44 Register LIR_OprDesc::as_register_hi() const {
  45   return FrameMap::cpu_rnr2reg(cpu_regnrHi());
  46 }
  47 
  48 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
  49 
  50 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
  51   ValueTag tag = type->tag();
  52   switch (tag) {
  53   case metaDataTag : {
  54     ClassConstant* c = type->as_ClassConstant();
  55     if (c != NULL && !c->value()->is_loaded()) {
  56       return LIR_OprFact::metadataConst(NULL);
  57     } else if (c != NULL) {
  58       return LIR_OprFact::metadataConst(c->value()->constant_encoding());
  59     } else {
  60       MethodConstant* m = type->as_MethodConstant();
  61       assert (m != NULL, "not a class or a method?");
  62       return LIR_OprFact::metadataConst(m->value()->constant_encoding());
  63     }
  64   }
  65   case objectTag : {
  66       return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
  67     }
  68   case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
  69   case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
  70   case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
  71   case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
  72   case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
  73   default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
  74   }
  75 }
  76 
  77 
  78 //---------------------------------------------------
  79 
  80 
  81 LIR_Address::Scale LIR_Address::scale(BasicType type) {
  82   int elem_size = type2aelembytes(type);
  83   switch (elem_size) {
  84   case 1: return LIR_Address::times_1;
  85   case 2: return LIR_Address::times_2;
  86   case 4: return LIR_Address::times_4;
  87   case 8: return LIR_Address::times_8;
  88   }
  89   ShouldNotReachHere();
  90   return LIR_Address::times_1;
  91 }
  92 
  93 //---------------------------------------------------
  94 
  95 char LIR_OprDesc::type_char(BasicType t) {
  96   switch (t) {
  97     case T_ARRAY:
  98       t = T_OBJECT;
  99     case T_BOOLEAN:
 100     case T_CHAR:
 101     case T_FLOAT:
 102     case T_DOUBLE:
 103     case T_BYTE:
 104     case T_SHORT:
 105     case T_INT:
 106     case T_LONG:
 107     case T_OBJECT:
 108     case T_ADDRESS:
 109     case T_VOID:
 110       return ::type2char(t);
 111     case T_METADATA:
 112       return 'M';
 113     case T_ILLEGAL:
 114       return '?';
 115 
 116     default:
 117       ShouldNotReachHere();
 118       return '?';
 119   }
 120 }
 121 
 122 #ifndef PRODUCT
 123 void LIR_OprDesc::validate_type() const {
 124 
 125 #ifdef ASSERT
 126   if (!is_pointer() && !is_illegal()) {
 127     OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
 128     switch (as_BasicType(type_field())) {
 129     case T_LONG:
 130       assert((kindfield == cpu_register || kindfield == stack_value) &&
 131              size_field() == double_size, "must match");
 132       break;
 133     case T_FLOAT:
 134       // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
 135       assert((kindfield == fpu_register || kindfield == stack_value
 136              ARM_ONLY(|| kindfield == cpu_register)
 137              PPC32_ONLY(|| kindfield == cpu_register) ) &&
 138              size_field() == single_size, "must match");
 139       break;
 140     case T_DOUBLE:
 141       // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
 142       assert((kindfield == fpu_register || kindfield == stack_value
 143              ARM_ONLY(|| kindfield == cpu_register)
 144              PPC32_ONLY(|| kindfield == cpu_register) ) &&
 145              size_field() == double_size, "must match");
 146       break;
 147     case T_BOOLEAN:
 148     case T_CHAR:
 149     case T_BYTE:
 150     case T_SHORT:
 151     case T_INT:
 152     case T_ADDRESS:
 153     case T_OBJECT:
 154     case T_METADATA:
 155     case T_ARRAY:
 156       assert((kindfield == cpu_register || kindfield == stack_value) &&
 157              size_field() == single_size, "must match");
 158       break;
 159 
 160     case T_ILLEGAL:
 161       // XXX TKR also means unknown right now
 162       // assert(is_illegal(), "must match");
 163       break;
 164 
 165     default:
 166       ShouldNotReachHere();
 167     }
 168   }
 169 #endif
 170 
 171 }
 172 #endif // PRODUCT
 173 
 174 
 175 bool LIR_OprDesc::is_oop() const {
 176   if (is_pointer()) {
 177     return pointer()->is_oop_pointer();
 178   } else {
 179     OprType t= type_field();
 180     assert(t != unknown_type, "not set");
 181     return t == object_type;
 182   }
 183 }
 184 
 185 
 186 
 187 void LIR_Op2::verify() const {
 188 #ifdef ASSERT
 189   switch (code()) {
 190     case lir_cmove:
 191     case lir_xchg:
 192       break;
 193 
 194     default:
 195       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
 196              "can't produce oops from arith");
 197   }
 198 
 199   if (TwoOperandLIRForm) {
 200 
 201 #ifdef ASSERT
 202     bool threeOperandForm = false;
 203 #ifdef S390
 204     // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
 205     threeOperandForm =
 206       code() == lir_shl ||
 207       ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
 208 #endif
 209 #endif
 210 
 211     switch (code()) {
 212     case lir_add:
 213     case lir_sub:
 214     case lir_mul:
 215     case lir_div:
 216     case lir_rem:
 217     case lir_logic_and:
 218     case lir_logic_or:
 219     case lir_logic_xor:
 220     case lir_shl:
 221     case lir_shr:
 222       assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
 223       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 224       break;
 225 
 226     // special handling for lir_ushr because of write barriers
 227     case lir_ushr:
 228       assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
 229       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 230       break;
 231 
 232     default:
 233       break;
 234     }
 235   }
 236 #endif
 237 }
 238 
 239 
 240 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
 241   : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 242   , _cond(cond)
 243   , _label(block->label())
 244   , _block(block)
 245   , _ublock(NULL)
 246   , _stub(NULL) {
 247 }
 248 
 249 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
 250   LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 251   , _cond(cond)
 252   , _label(stub->entry())
 253   , _block(NULL)
 254   , _ublock(NULL)
 255   , _stub(stub) {
 256 }
 257 
 258 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
 259   : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 260   , _cond(cond)
 261   , _label(block->label())
 262   , _block(block)
 263   , _ublock(ublock)
 264   , _stub(NULL)
 265 {
 266 }
 267 
 268 void LIR_OpBranch::change_block(BlockBegin* b) {
 269   assert(_block != NULL, "must have old block");
 270   assert(_block->label() == label(), "must be equal");
 271 
 272   _block = b;
 273   _label = b->label();
 274 }
 275 
 276 void LIR_OpBranch::change_ublock(BlockBegin* b) {
 277   assert(_ublock != NULL, "must have old block");
 278   _ublock = b;
 279 }
 280 
 281 void LIR_OpBranch::negate_cond() {
 282   switch (_cond) {
 283     case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
 284     case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
 285     case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
 286     case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
 287     case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
 288     case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
 289     default: ShouldNotReachHere();
 290   }
 291 }
 292 
 293 
 294 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
 295                                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
 296                                  bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
 297                                  CodeStub* stub)
 298 
 299   : LIR_Op(code, result, NULL)
 300   , _object(object)
 301   , _array(LIR_OprFact::illegalOpr)
 302   , _klass(klass)
 303   , _tmp1(tmp1)
 304   , _tmp2(tmp2)
 305   , _tmp3(tmp3)
 306   , _fast_check(fast_check)
 307   , _info_for_patch(info_for_patch)
 308   , _info_for_exception(info_for_exception)
 309   , _stub(stub)
 310   , _profiled_method(NULL)
 311   , _profiled_bci(-1)
 312   , _should_profile(false)
 313 {
 314   if (code == lir_checkcast) {
 315     assert(info_for_exception != NULL, "checkcast throws exceptions");
 316   } else if (code == lir_instanceof) {
 317     assert(info_for_exception == NULL, "instanceof throws no exceptions");
 318   } else {
 319     ShouldNotReachHere();
 320   }
 321 }
 322 
 323 
 324 
 325 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
 326   : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
 327   , _object(object)
 328   , _array(array)
 329   , _klass(NULL)
 330   , _tmp1(tmp1)
 331   , _tmp2(tmp2)
 332   , _tmp3(tmp3)
 333   , _fast_check(false)
 334   , _info_for_patch(NULL)
 335   , _info_for_exception(info_for_exception)
 336   , _stub(NULL)
 337   , _profiled_method(NULL)
 338   , _profiled_bci(-1)
 339   , _should_profile(false)
 340 {
 341   if (code == lir_store_check) {
 342     _stub = new ArrayStoreExceptionStub(object, info_for_exception);
 343     assert(info_for_exception != NULL, "store_check throws exceptions");
 344   } else {
 345     ShouldNotReachHere();
 346   }
 347 }
 348 
 349 
 350 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
 351                                  LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
 352   : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
 353   , _src(src)
 354   , _src_pos(src_pos)
 355   , _dst(dst)
 356   , _dst_pos(dst_pos)
 357   , _length(length)
 358   , _tmp(tmp)
 359   , _expected_type(expected_type)
 360   , _flags(flags) {
 361   _stub = new ArrayCopyStub(this);
 362 }
 363 
 364 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
 365   : LIR_Op(lir_updatecrc32, res, NULL)
 366   , _crc(crc)
 367   , _val(val) {
 368 }
 369 
 370 //-------------------verify--------------------------
 371 
 372 void LIR_Op1::verify() const {
 373   switch(code()) {
 374   case lir_move:
 375     assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
 376     break;
 377   case lir_null_check:
 378     assert(in_opr()->is_register(), "must be");
 379     break;
 380   case lir_return:
 381     assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
 382     break;
 383   default:
 384     break;
 385   }
 386 }
 387 
 388 void LIR_OpRTCall::verify() const {
 389   assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
 390 }
 391 
 392 //-------------------visits--------------------------
 393 
 394 // complete rework of LIR instruction visitor.
 395 // The virtual call for each instruction type is replaced by a big
 396 // switch that adds the operands for each instruction
 397 
 398 void LIR_OpVisitState::visit(LIR_Op* op) {
 399   // copy information from the LIR_Op
 400   reset();
 401   set_op(op);
 402 
 403   switch (op->code()) {
 404 
 405 // LIR_Op0
 406     case lir_fpop_raw:                 // result and info always invalid
 407     case lir_breakpoint:               // result and info always invalid
 408     case lir_membar:                   // result and info always invalid
 409     case lir_membar_acquire:           // result and info always invalid
 410     case lir_membar_release:           // result and info always invalid
 411     case lir_membar_loadload:          // result and info always invalid
 412     case lir_membar_storestore:        // result and info always invalid
 413     case lir_membar_loadstore:         // result and info always invalid
 414     case lir_membar_storeload:         // result and info always invalid
 415     case lir_on_spin_wait:
 416     {
 417       assert(op->as_Op0() != NULL, "must be");
 418       assert(op->_info == NULL, "info not used by this instruction");
 419       assert(op->_result->is_illegal(), "not used");
 420       break;
 421     }
 422 
 423     case lir_nop:                      // may have info, result always invalid
 424     case lir_std_entry:                // may have result, info always invalid
 425     case lir_osr_entry:                // may have result, info always invalid
 426     case lir_get_thread:               // may have result, info always invalid
 427     {
 428       assert(op->as_Op0() != NULL, "must be");
 429       if (op->_info != NULL)           do_info(op->_info);
 430       if (op->_result->is_valid())     do_output(op->_result);
 431       break;
 432     }
 433 
 434 
 435 // LIR_OpLabel
 436     case lir_label:                    // result and info always invalid
 437     {
 438       assert(op->as_OpLabel() != NULL, "must be");
 439       assert(op->_info == NULL, "info not used by this instruction");
 440       assert(op->_result->is_illegal(), "not used");
 441       break;
 442     }
 443 
 444 
 445 // LIR_Op1
 446     case lir_fxch:           // input always valid, result and info always invalid
 447     case lir_fld:            // input always valid, result and info always invalid
 448     case lir_push:           // input always valid, result and info always invalid
 449     case lir_pop:            // input always valid, result and info always invalid
 450     case lir_leal:           // input and result always valid, info always invalid
 451     case lir_monaddr:        // input and result always valid, info always invalid
 452     case lir_null_check:     // input and info always valid, result always invalid
 453     case lir_move:           // input and result always valid, may have info
 454     {
 455       assert(op->as_Op1() != NULL, "must be");
 456       LIR_Op1* op1 = (LIR_Op1*)op;
 457 
 458       if (op1->_info)                  do_info(op1->_info);
 459       if (op1->_opr->is_valid())       do_input(op1->_opr);
 460       if (op1->_result->is_valid())    do_output(op1->_result);
 461 
 462       break;
 463     }
 464 
 465     case lir_return:
 466     {
 467       assert(op->as_OpReturn() != NULL, "must be");
 468       LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
 469 
 470       if (op_ret->_info)               do_info(op_ret->_info);
 471       if (op_ret->_opr->is_valid())    do_input(op_ret->_opr);
 472       if (op_ret->_result->is_valid()) do_output(op_ret->_result);
 473       if (op_ret->stub() != NULL)      do_stub(op_ret->stub());
 474 
 475       break;
 476     }
 477 
 478     case lir_safepoint:
 479     {
 480       assert(op->as_Op1() != NULL, "must be");
 481       LIR_Op1* op1 = (LIR_Op1*)op;
 482 
 483       assert(op1->_info != NULL, "");  do_info(op1->_info);
 484       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
 485       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 486 
 487       break;
 488     }
 489 
 490 // LIR_OpConvert;
 491     case lir_convert:        // input and result always valid, info always invalid
 492     {
 493       assert(op->as_OpConvert() != NULL, "must be");
 494       LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
 495 
 496       assert(opConvert->_info == NULL, "must be");
 497       if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
 498       if (opConvert->_result->is_valid())    do_output(opConvert->_result);
 499 #ifdef PPC32
 500       if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
 501       if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
 502 #endif
 503       do_stub(opConvert->_stub);
 504 
 505       break;
 506     }
 507 
 508 // LIR_OpBranch;
 509     case lir_branch:                   // may have info, input and result register always invalid
 510     case lir_cond_float_branch:        // may have info, input and result register always invalid
 511     {
 512       assert(op->as_OpBranch() != NULL, "must be");
 513       LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
 514 
 515       if (opBranch->_info != NULL)     do_info(opBranch->_info);
 516       assert(opBranch->_result->is_illegal(), "not used");
 517       if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
 518 
 519       break;
 520     }
 521 
 522 
 523 // LIR_OpAllocObj
 524     case lir_alloc_object:
 525     {
 526       assert(op->as_OpAllocObj() != NULL, "must be");
 527       LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
 528 
 529       if (opAllocObj->_info)                     do_info(opAllocObj->_info);
 530       if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
 531                                                  do_temp(opAllocObj->_opr);
 532                                         }
 533       if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
 534       if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
 535       if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
 536       if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
 537       if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
 538                                                  do_stub(opAllocObj->_stub);
 539       break;
 540     }
 541 
 542 
 543 // LIR_OpRoundFP;
 544     case lir_roundfp: {
 545       assert(op->as_OpRoundFP() != NULL, "must be");
 546       LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
 547 
 548       assert(op->_info == NULL, "info not used by this instruction");
 549       assert(opRoundFP->_tmp->is_illegal(), "not used");
 550       do_input(opRoundFP->_opr);
 551       do_output(opRoundFP->_result);
 552 
 553       break;
 554     }
 555 
 556 
 557 // LIR_Op2
 558     case lir_cmp:
 559     case lir_cmp_l2i:
 560     case lir_ucmp_fd2i:
 561     case lir_cmp_fd2i:
 562     case lir_add:
 563     case lir_sub:
 564     case lir_rem:
 565     case lir_sqrt:
 566     case lir_abs:
 567     case lir_neg:
 568     case lir_logic_and:
 569     case lir_logic_or:
 570     case lir_logic_xor:
 571     case lir_shl:
 572     case lir_shr:
 573     case lir_ushr:
 574     case lir_xadd:
 575     case lir_xchg:
 576     case lir_assert:
 577     {
 578       assert(op->as_Op2() != NULL, "must be");
 579       LIR_Op2* op2 = (LIR_Op2*)op;
 580       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 581              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 582 
 583       if (op2->_info)                     do_info(op2->_info);
 584       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 585       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 586       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 587       if (op2->_result->is_valid())       do_output(op2->_result);
 588       if (op->code() == lir_xchg || op->code() == lir_xadd) {
 589         // on ARM and PPC, return value is loaded first so could
 590         // destroy inputs. On other platforms that implement those
 591         // (x86, sparc), the extra constrainsts are harmless.
 592         if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
 593         if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
 594       }
 595 
 596       break;
 597     }
 598 
 599     // special handling for cmove: right input operand must not be equal
 600     // to the result operand, otherwise the backend fails
 601     case lir_cmove:
 602     {
 603       assert(op->as_Op2() != NULL, "must be");
 604       LIR_Op2* op2 = (LIR_Op2*)op;
 605 
 606       assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
 607              op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 608       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 609 
 610       do_input(op2->_opr1);
 611       do_input(op2->_opr2);
 612       do_temp(op2->_opr2);
 613       do_output(op2->_result);
 614 
 615       break;
 616     }
 617 
 618     // vspecial handling for strict operations: register input operands
 619     // as temp to guarantee that they do not overlap with other
 620     // registers
 621     case lir_mul:
 622     case lir_div:
 623     {
 624       assert(op->as_Op2() != NULL, "must be");
 625       LIR_Op2* op2 = (LIR_Op2*)op;
 626 
 627       assert(op2->_info == NULL, "not used");
 628       assert(op2->_opr1->is_valid(), "used");
 629       assert(op2->_opr2->is_valid(), "used");
 630       assert(op2->_result->is_valid(), "used");
 631       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 632              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 633 
 634       do_input(op2->_opr1); do_temp(op2->_opr1);
 635       do_input(op2->_opr2); do_temp(op2->_opr2);
 636       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 637       do_output(op2->_result);
 638 
 639       break;
 640     }
 641 
 642     case lir_throw: {
 643       assert(op->as_Op2() != NULL, "must be");
 644       LIR_Op2* op2 = (LIR_Op2*)op;
 645 
 646       if (op2->_info)                     do_info(op2->_info);
 647       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 648       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 649       assert(op2->_result->is_illegal(), "no result");
 650       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 651              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 652 
 653       break;
 654     }
 655 
 656     case lir_unwind: {
 657       assert(op->as_Op1() != NULL, "must be");
 658       LIR_Op1* op1 = (LIR_Op1*)op;
 659 
 660       assert(op1->_info == NULL, "no info");
 661       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 662       assert(op1->_result->is_illegal(), "no result");
 663 
 664       break;
 665     }
 666 
 667 // LIR_Op3
 668     case lir_idiv:
 669     case lir_irem: {
 670       assert(op->as_Op3() != NULL, "must be");
 671       LIR_Op3* op3= (LIR_Op3*)op;
 672 
 673       if (op3->_info)                     do_info(op3->_info);
 674       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 675 
 676       // second operand is input and temp, so ensure that second operand
 677       // and third operand get not the same register
 678       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 679       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 680       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 681 
 682       if (op3->_result->is_valid())       do_output(op3->_result);
 683 
 684       break;
 685     }
 686 
 687     case lir_fmad:
 688     case lir_fmaf: {
 689       assert(op->as_Op3() != NULL, "must be");
 690       LIR_Op3* op3= (LIR_Op3*)op;
 691       assert(op3->_info == NULL, "no info");
 692       do_input(op3->_opr1);
 693       do_input(op3->_opr2);
 694       do_input(op3->_opr3);
 695       do_output(op3->_result);
 696       break;
 697     }
 698 
 699 // LIR_OpJavaCall
 700     case lir_static_call:
 701     case lir_optvirtual_call:
 702     case lir_icvirtual_call:
 703     case lir_dynamic_call: {
 704       LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
 705       assert(opJavaCall != NULL, "must be");
 706 
 707       if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
 708 
 709       // only visit register parameters
 710       int n = opJavaCall->_arguments->length();
 711       for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
 712         if (!opJavaCall->_arguments->at(i)->is_pointer()) {
 713           do_input(*opJavaCall->_arguments->adr_at(i));
 714         }
 715       }
 716 
 717       if (opJavaCall->_info)                     do_info(opJavaCall->_info);
 718       if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
 719           opJavaCall->is_method_handle_invoke()) {
 720         opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
 721         do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
 722       }
 723       do_call();
 724       if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
 725 
 726       break;
 727     }
 728 
 729 
 730 // LIR_OpRTCall
 731     case lir_rtcall: {
 732       assert(op->as_OpRTCall() != NULL, "must be");
 733       LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
 734 
 735       // only visit register parameters
 736       int n = opRTCall->_arguments->length();
 737       for (int i = 0; i < n; i++) {
 738         if (!opRTCall->_arguments->at(i)->is_pointer()) {
 739           do_input(*opRTCall->_arguments->adr_at(i));
 740         }
 741       }
 742       if (opRTCall->_info)                     do_info(opRTCall->_info);
 743       if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
 744       do_call();
 745       if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
 746 
 747       break;
 748     }
 749 
 750 
 751 // LIR_OpArrayCopy
 752     case lir_arraycopy: {
 753       assert(op->as_OpArrayCopy() != NULL, "must be");
 754       LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
 755 
 756       assert(opArrayCopy->_result->is_illegal(), "unused");
 757       assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
 758       assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
 759       assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
 760       assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
 761       assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
 762       assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
 763       if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
 764 
 765       // the implementation of arraycopy always has a call into the runtime
 766       do_call();
 767 
 768       break;
 769     }
 770 
 771 
 772 // LIR_OpUpdateCRC32
 773     case lir_updatecrc32: {
 774       assert(op->as_OpUpdateCRC32() != NULL, "must be");
 775       LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
 776 
 777       assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
 778       assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
 779       assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
 780       assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
 781 
 782       break;
 783     }
 784 
 785 
 786 // LIR_OpLock
 787     case lir_lock:
 788     case lir_unlock: {
 789       assert(op->as_OpLock() != NULL, "must be");
 790       LIR_OpLock* opLock = (LIR_OpLock*)op;
 791 
 792       if (opLock->_info)                          do_info(opLock->_info);
 793 
 794       // TODO: check if these operands really have to be temp
 795       // (or if input is sufficient). This may have influence on the oop map!
 796       assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
 797       assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
 798       assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
 799 
 800       if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
 801       assert(opLock->_result->is_illegal(), "unused");
 802 
 803       do_stub(opLock->_stub);
 804 
 805       break;
 806     }
 807 
 808 
 809 // LIR_OpDelay
 810     case lir_delay_slot: {
 811       assert(op->as_OpDelay() != NULL, "must be");
 812       LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
 813 
 814       visit(opDelay->delay_op());
 815       break;
 816     }
 817 
 818 // LIR_OpTypeCheck
 819     case lir_instanceof:
 820     case lir_checkcast:
 821     case lir_store_check: {
 822       assert(op->as_OpTypeCheck() != NULL, "must be");
 823       LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
 824 
 825       if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
 826       if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
 827       if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
 828       if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
 829         do_temp(opTypeCheck->_object);
 830       }
 831       if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
 832       if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
 833       if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
 834       if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
 835       if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
 836                                                   do_stub(opTypeCheck->_stub);
 837       break;
 838     }
 839 
 840 // LIR_OpCompareAndSwap
 841     case lir_cas_long:
 842     case lir_cas_obj:
 843     case lir_cas_int: {
 844       assert(op->as_OpCompareAndSwap() != NULL, "must be");
 845       LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
 846 
 847       assert(opCompareAndSwap->_addr->is_valid(),      "used");
 848       assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
 849       assert(opCompareAndSwap->_new_value->is_valid(), "used");
 850       if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
 851                                                       do_input(opCompareAndSwap->_addr);
 852                                                       do_temp(opCompareAndSwap->_addr);
 853                                                       do_input(opCompareAndSwap->_cmp_value);
 854                                                       do_temp(opCompareAndSwap->_cmp_value);
 855                                                       do_input(opCompareAndSwap->_new_value);
 856                                                       do_temp(opCompareAndSwap->_new_value);
 857       if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
 858       if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
 859       if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
 860 
 861       break;
 862     }
 863 
 864 
 865 // LIR_OpAllocArray;
 866     case lir_alloc_array: {
 867       assert(op->as_OpAllocArray() != NULL, "must be");
 868       LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
 869 
 870       if (opAllocArray->_info)                        do_info(opAllocArray->_info);
 871       if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
 872       if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
 873       if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
 874       if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
 875       if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
 876       if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
 877       if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
 878                                                       do_stub(opAllocArray->_stub);
 879       break;
 880     }
 881 
 882 // LIR_OpProfileCall:
 883     case lir_profile_call: {
 884       assert(op->as_OpProfileCall() != NULL, "must be");
 885       LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
 886 
 887       if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
 888       assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
 889       assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
 890       break;
 891     }
 892 
 893 // LIR_OpProfileType:
 894     case lir_profile_type: {
 895       assert(op->as_OpProfileType() != NULL, "must be");
 896       LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
 897 
 898       do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
 899       do_input(opProfileType->_obj);
 900       do_temp(opProfileType->_tmp);
 901       break;
 902     }
 903   default:
 904     op->visit(this);
 905   }
 906 }
 907 
 908 void LIR_Op::visit(LIR_OpVisitState* state) {
 909   ShouldNotReachHere();
 910 }
 911 
 912 void LIR_OpVisitState::do_stub(CodeStub* stub) {
 913   if (stub != NULL) {
 914     stub->visit(this);
 915   }
 916 }
 917 
 918 XHandlers* LIR_OpVisitState::all_xhandler() {
 919   XHandlers* result = NULL;
 920 
 921   int i;
 922   for (i = 0; i < info_count(); i++) {
 923     if (info_at(i)->exception_handlers() != NULL) {
 924       result = info_at(i)->exception_handlers();
 925       break;
 926     }
 927   }
 928 
 929 #ifdef ASSERT
 930   for (i = 0; i < info_count(); i++) {
 931     assert(info_at(i)->exception_handlers() == NULL ||
 932            info_at(i)->exception_handlers() == result,
 933            "only one xhandler list allowed per LIR-operation");
 934   }
 935 #endif
 936 
 937   if (result != NULL) {
 938     return result;
 939   } else {
 940     return new XHandlers();
 941   }
 942 
 943   return result;
 944 }
 945 
 946 
 947 #ifdef ASSERT
 948 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
 949   visit(op);
 950 
 951   return opr_count(inputMode) == 0 &&
 952          opr_count(outputMode) == 0 &&
 953          opr_count(tempMode) == 0 &&
 954          info_count() == 0 &&
 955          !has_call() &&
 956          !has_slow_case();
 957 }
 958 #endif
 959 
 960 // LIR_OpReturn
 961 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
 962     LIR_Op1(lir_return, opr, (CodeEmitInfo*)NULL /* info */),
 963     _stub(NULL) {
 964   if (VM_Version::supports_stack_watermark_barrier()) {
 965     _stub = new C1SafepointPollStub();
 966   }
 967 }
 968 
 969 //---------------------------------------------------
 970 
 971 
 972 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
 973   masm->emit_call(this);
 974 }
 975 
 976 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
 977   masm->emit_rtcall(this);
 978 }
 979 
 980 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
 981   masm->emit_opLabel(this);
 982 }
 983 
 984 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
 985   masm->emit_arraycopy(this);
 986   masm->append_code_stub(stub());
 987 }
 988 
 989 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
 990   masm->emit_updatecrc32(this);
 991 }
 992 
 993 void LIR_Op0::emit_code(LIR_Assembler* masm) {
 994   masm->emit_op0(this);
 995 }
 996 
 997 void LIR_Op1::emit_code(LIR_Assembler* masm) {
 998   masm->emit_op1(this);
 999 }
1000 
1001 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1002   masm->emit_alloc_obj(this);
1003   masm->append_code_stub(stub());
1004 }
1005 
1006 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1007   masm->emit_opBranch(this);
1008   if (stub()) {
1009     masm->append_code_stub(stub());
1010   }
1011 }
1012 
1013 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1014   masm->emit_opConvert(this);
1015   if (stub() != NULL) {
1016     masm->append_code_stub(stub());
1017   }
1018 }
1019 
1020 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1021   masm->emit_op2(this);
1022 }
1023 
1024 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1025   masm->emit_alloc_array(this);
1026   masm->append_code_stub(stub());
1027 }
1028 
1029 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1030   masm->emit_opTypeCheck(this);
1031   if (stub()) {
1032     masm->append_code_stub(stub());
1033   }
1034 }
1035 
1036 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1037   masm->emit_compare_and_swap(this);
1038 }
1039 
1040 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1041   masm->emit_op3(this);
1042 }
1043 
1044 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1045   masm->emit_lock(this);
1046   if (stub()) {
1047     masm->append_code_stub(stub());
1048   }
1049 }
1050 
1051 #ifdef ASSERT
1052 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1053   masm->emit_assert(this);
1054 }
1055 #endif
1056 
1057 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1058   masm->emit_delay(this);
1059 }
1060 
1061 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1062   masm->emit_profile_call(this);
1063 }
1064 
1065 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1066   masm->emit_profile_type(this);
1067 }
1068 
1069 // LIR_List
1070 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1071   : _operations(8)
1072   , _compilation(compilation)
1073 #ifndef PRODUCT
1074   , _block(block)
1075 #endif
1076 #ifdef ASSERT
1077   , _file(NULL)
1078   , _line(0)
1079 #endif
1080 { }
1081 
1082 
1083 #ifdef ASSERT
1084 void LIR_List::set_file_and_line(const char * file, int line) {
1085   const char * f = strrchr(file, '/');
1086   if (f == NULL) f = strrchr(file, '\\');
1087   if (f == NULL) {
1088     f = file;
1089   } else {
1090     f++;
1091   }
1092   _file = f;
1093   _line = line;
1094 }
1095 #endif
1096 
1097 
1098 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1099   assert(this == buffer->lir_list(), "wrong lir list");
1100   const int n = _operations.length();
1101 
1102   if (buffer->number_of_ops() > 0) {
1103     // increase size of instructions list
1104     _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1105     // insert ops from buffer into instructions list
1106     int op_index = buffer->number_of_ops() - 1;
1107     int ip_index = buffer->number_of_insertion_points() - 1;
1108     int from_index = n - 1;
1109     int to_index = _operations.length() - 1;
1110     for (; ip_index >= 0; ip_index --) {
1111       int index = buffer->index_at(ip_index);
1112       // make room after insertion point
1113       while (index < from_index) {
1114         _operations.at_put(to_index --, _operations.at(from_index --));
1115       }
1116       // insert ops from buffer
1117       for (int i = buffer->count_at(ip_index); i > 0; i --) {
1118         _operations.at_put(to_index --, buffer->op_at(op_index --));
1119       }
1120     }
1121   }
1122 
1123   buffer->finish();
1124 }
1125 
1126 
1127 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1128   assert(reg->type() == T_OBJECT, "bad reg");
1129   append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
1130 }
1131 
1132 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1133   assert(reg->type() == T_METADATA, "bad reg");
1134   append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1135 }
1136 
1137 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1138   append(new LIR_Op1(
1139             lir_move,
1140             LIR_OprFact::address(addr),
1141             src,
1142             addr->type(),
1143             patch_code,
1144             info));
1145 }
1146 
1147 
1148 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1149   append(new LIR_Op1(
1150             lir_move,
1151             LIR_OprFact::address(address),
1152             dst,
1153             address->type(),
1154             patch_code,
1155             info, lir_move_volatile));
1156 }
1157 
1158 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1159   append(new LIR_Op1(
1160             lir_move,
1161             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1162             dst,
1163             type,
1164             patch_code,
1165             info, lir_move_volatile));
1166 }
1167 
1168 
1169 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1170   append(new LIR_Op1(
1171             lir_move,
1172             LIR_OprFact::intConst(v),
1173             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1174             type,
1175             patch_code,
1176             info));
1177 }
1178 
1179 
1180 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1181   append(new LIR_Op1(
1182             lir_move,
1183             LIR_OprFact::oopConst(o),
1184             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1185             type,
1186             patch_code,
1187             info));
1188 }
1189 
1190 
1191 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1192   append(new LIR_Op1(
1193             lir_move,
1194             src,
1195             LIR_OprFact::address(addr),
1196             addr->type(),
1197             patch_code,
1198             info));
1199 }
1200 
1201 
1202 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1203   append(new LIR_Op1(
1204             lir_move,
1205             src,
1206             LIR_OprFact::address(addr),
1207             addr->type(),
1208             patch_code,
1209             info,
1210             lir_move_volatile));
1211 }
1212 
1213 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1214   append(new LIR_Op1(
1215             lir_move,
1216             src,
1217             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1218             type,
1219             patch_code,
1220             info, lir_move_volatile));
1221 }
1222 
1223 
1224 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1225   append(new LIR_Op3(
1226                     lir_idiv,
1227                     left,
1228                     right,
1229                     tmp,
1230                     res,
1231                     info));
1232 }
1233 
1234 
1235 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1236   append(new LIR_Op3(
1237                     lir_idiv,
1238                     left,
1239                     LIR_OprFact::intConst(right),
1240                     tmp,
1241                     res,
1242                     info));
1243 }
1244 
1245 
1246 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1247   append(new LIR_Op3(
1248                     lir_irem,
1249                     left,
1250                     right,
1251                     tmp,
1252                     res,
1253                     info));
1254 }
1255 
1256 
1257 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1258   append(new LIR_Op3(
1259                     lir_irem,
1260                     left,
1261                     LIR_OprFact::intConst(right),
1262                     tmp,
1263                     res,
1264                     info));
1265 }
1266 
1267 
1268 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1269   append(new LIR_Op2(
1270                     lir_cmp,
1271                     condition,
1272                     LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1273                     LIR_OprFact::intConst(c),
1274                     info));
1275 }
1276 
1277 
1278 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1279   append(new LIR_Op2(
1280                     lir_cmp,
1281                     condition,
1282                     reg,
1283                     LIR_OprFact::address(addr),
1284                     info));
1285 }
1286 
1287 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1288                                int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1289   append(new LIR_OpAllocObj(
1290                            klass,
1291                            dst,
1292                            t1,
1293                            t2,
1294                            t3,
1295                            t4,
1296                            header_size,
1297                            object_size,
1298                            init_check,
1299                            stub));
1300 }
1301 
1302 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1303   append(new LIR_OpAllocArray(
1304                            klass,
1305                            len,
1306                            dst,
1307                            t1,
1308                            t2,
1309                            t3,
1310                            t4,
1311                            type,
1312                            stub));
1313 }
1314 
1315 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1316  append(new LIR_Op2(
1317                     lir_shl,
1318                     value,
1319                     count,
1320                     dst,
1321                     tmp));
1322 }
1323 
1324 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1325  append(new LIR_Op2(
1326                     lir_shr,
1327                     value,
1328                     count,
1329                     dst,
1330                     tmp));
1331 }
1332 
1333 
1334 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1335  append(new LIR_Op2(
1336                     lir_ushr,
1337                     value,
1338                     count,
1339                     dst,
1340                     tmp));
1341 }
1342 
1343 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1344   append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1345                      left,
1346                      right,
1347                      dst));
1348 }
1349 
1350 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1351   append(new LIR_OpLock(
1352                     lir_lock,
1353                     hdr,
1354                     obj,
1355                     lock,
1356                     scratch,
1357                     stub,
1358                     info));
1359 }
1360 
1361 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1362   append(new LIR_OpLock(
1363                     lir_unlock,
1364                     hdr,
1365                     obj,
1366                     lock,
1367                     scratch,
1368                     stub,
1369                     NULL));
1370 }
1371 
1372 
1373 void check_LIR() {
1374   // cannot do the proper checking as PRODUCT and other modes return different results
1375   // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1376 }
1377 
1378 
1379 
1380 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1381                           LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1382                           CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1383                           ciMethod* profiled_method, int profiled_bci) {
1384   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1385                                            tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1386   if (profiled_method != NULL) {
1387     c->set_profiled_method(profiled_method);
1388     c->set_profiled_bci(profiled_bci);
1389     c->set_should_profile(true);
1390   }
1391   append(c);
1392 }
1393 
1394 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1395   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1396   if (profiled_method != NULL) {
1397     c->set_profiled_method(profiled_method);
1398     c->set_profiled_bci(profiled_bci);
1399     c->set_should_profile(true);
1400   }
1401   append(c);
1402 }
1403 
1404 
1405 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1406                            CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1407   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1408   if (profiled_method != NULL) {
1409     c->set_profiled_method(profiled_method);
1410     c->set_profiled_bci(profiled_bci);
1411     c->set_should_profile(true);
1412   }
1413   append(c);
1414 }
1415 
1416 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1417   if (deoptimize_on_null) {
1418     // Emit an explicit null check and deoptimize if opr is null
1419     CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1420     cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1421     branch(lir_cond_equal, deopt);
1422   } else {
1423     // Emit an implicit null check
1424     append(new LIR_Op1(lir_null_check, opr, info));
1425   }
1426 }
1427 
1428 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1429                         LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1430   append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1431 }
1432 
1433 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1434                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1435   append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1436 }
1437 
1438 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1439                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1440   append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1441 }
1442 
1443 
1444 #ifdef PRODUCT
1445 
1446 void print_LIR(BlockList* blocks) {
1447 }
1448 
1449 #else
1450 // LIR_OprDesc
1451 void LIR_OprDesc::print() const {
1452   print(tty);
1453 }
1454 
1455 void LIR_OprDesc::print(outputStream* out) const {
1456   if (is_illegal()) {
1457     return;
1458   }
1459 
1460   out->print("[");
1461   if (is_pointer()) {
1462     pointer()->print_value_on(out);
1463   } else if (is_single_stack()) {
1464     out->print("stack:%d", single_stack_ix());
1465   } else if (is_double_stack()) {
1466     out->print("dbl_stack:%d",double_stack_ix());
1467   } else if (is_virtual()) {
1468     out->print("R%d", vreg_number());
1469   } else if (is_single_cpu()) {
1470     out->print("%s", as_register()->name());
1471   } else if (is_double_cpu()) {
1472     out->print("%s", as_register_hi()->name());
1473     out->print("%s", as_register_lo()->name());
1474 #if defined(X86)
1475   } else if (is_single_xmm()) {
1476     out->print("%s", as_xmm_float_reg()->name());
1477   } else if (is_double_xmm()) {
1478     out->print("%s", as_xmm_double_reg()->name());
1479   } else if (is_single_fpu()) {
1480     out->print("fpu%d", fpu_regnr());
1481   } else if (is_double_fpu()) {
1482     out->print("fpu%d", fpu_regnrLo());
1483 #elif defined(AARCH64)
1484   } else if (is_single_fpu()) {
1485     out->print("fpu%d", fpu_regnr());
1486   } else if (is_double_fpu()) {
1487     out->print("fpu%d", fpu_regnrLo());
1488 #elif defined(ARM)
1489   } else if (is_single_fpu()) {
1490     out->print("s%d", fpu_regnr());
1491   } else if (is_double_fpu()) {
1492     out->print("d%d", fpu_regnrLo() >> 1);
1493 #else
1494   } else if (is_single_fpu()) {
1495     out->print("%s", as_float_reg()->name());
1496   } else if (is_double_fpu()) {
1497     out->print("%s", as_double_reg()->name());
1498 #endif
1499 
1500   } else if (is_illegal()) {
1501     out->print("-");
1502   } else {
1503     out->print("Unknown Operand");
1504   }
1505   if (!is_illegal()) {
1506     out->print("|%c", type_char());
1507   }
1508   if (is_register() && is_last_use()) {
1509     out->print("(last_use)");
1510   }
1511   out->print("]");
1512 }
1513 
1514 
1515 // LIR_Address
1516 void LIR_Const::print_value_on(outputStream* out) const {
1517   switch (type()) {
1518     case T_ADDRESS:out->print("address:%d",as_jint());          break;
1519     case T_INT:    out->print("int:%d",   as_jint());           break;
1520     case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1521     case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
1522     case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
1523     case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
1524     case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1525     default:       out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1526   }
1527 }
1528 
1529 // LIR_Address
1530 void LIR_Address::print_value_on(outputStream* out) const {
1531   out->print("Base:"); _base->print(out);
1532   if (!_index->is_illegal()) {
1533     out->print(" Index:"); _index->print(out);
1534     switch (scale()) {
1535     case times_1: break;
1536     case times_2: out->print(" * 2"); break;
1537     case times_4: out->print(" * 4"); break;
1538     case times_8: out->print(" * 8"); break;
1539     }
1540   }
1541   out->print(" Disp: " INTX_FORMAT, _disp);
1542 }
1543 
1544 // debug output of block header without InstructionPrinter
1545 //       (because phi functions are not necessary for LIR)
1546 static void print_block(BlockBegin* x) {
1547   // print block id
1548   BlockEnd* end = x->end();
1549   tty->print("B%d ", x->block_id());
1550 
1551   // print flags
1552   if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
1553   if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
1554   if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
1555   if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
1556   if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
1557   if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1558   if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
1559 
1560   // print block bci range
1561   tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1562 
1563   // print predecessors and successors
1564   if (x->number_of_preds() > 0) {
1565     tty->print("preds: ");
1566     for (int i = 0; i < x->number_of_preds(); i ++) {
1567       tty->print("B%d ", x->pred_at(i)->block_id());
1568     }
1569   }
1570 
1571   if (x->number_of_sux() > 0) {
1572     tty->print("sux: ");
1573     for (int i = 0; i < x->number_of_sux(); i ++) {
1574       tty->print("B%d ", x->sux_at(i)->block_id());
1575     }
1576   }
1577 
1578   // print exception handlers
1579   if (x->number_of_exception_handlers() > 0) {
1580     tty->print("xhandler: ");
1581     for (int i = 0; i < x->number_of_exception_handlers();  i++) {
1582       tty->print("B%d ", x->exception_handler_at(i)->block_id());
1583     }
1584   }
1585 
1586   tty->cr();
1587 }
1588 
1589 void print_LIR(BlockList* blocks) {
1590   tty->print_cr("LIR:");
1591   int i;
1592   for (i = 0; i < blocks->length(); i++) {
1593     BlockBegin* bb = blocks->at(i);
1594     print_block(bb);
1595     tty->print("__id_Instruction___________________________________________"); tty->cr();
1596     bb->lir()->print_instructions();
1597   }
1598 }
1599 
1600 void LIR_List::print_instructions() {
1601   for (int i = 0; i < _operations.length(); i++) {
1602     _operations.at(i)->print(); tty->cr();
1603   }
1604   tty->cr();
1605 }
1606 
1607 // LIR_Ops printing routines
1608 // LIR_Op
1609 void LIR_Op::print_on(outputStream* out) const {
1610   if (id() != -1 || PrintCFGToFile) {
1611     out->print("%4d ", id());
1612   } else {
1613     out->print("     ");
1614   }
1615   out->print("%s ", name());
1616   print_instr(out);
1617   if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1618 #ifdef ASSERT
1619   if (Verbose && _file != NULL) {
1620     out->print(" (%s:%d)", _file, _line);
1621   }
1622 #endif
1623 }
1624 
1625 const char * LIR_Op::name() const {
1626   const char* s = NULL;
1627   switch(code()) {
1628      // LIR_Op0
1629      case lir_membar:                s = "membar";        break;
1630      case lir_membar_acquire:        s = "membar_acquire"; break;
1631      case lir_membar_release:        s = "membar_release"; break;
1632      case lir_membar_loadload:       s = "membar_loadload";   break;
1633      case lir_membar_storestore:     s = "membar_storestore"; break;
1634      case lir_membar_loadstore:      s = "membar_loadstore";  break;
1635      case lir_membar_storeload:      s = "membar_storeload";  break;
1636      case lir_label:                 s = "label";         break;
1637      case lir_nop:                   s = "nop";           break;
1638      case lir_on_spin_wait:          s = "on_spin_wait";  break;
1639      case lir_std_entry:             s = "std_entry";     break;
1640      case lir_osr_entry:             s = "osr_entry";     break;
1641      case lir_fpop_raw:              s = "fpop_raw";      break;
1642      case lir_breakpoint:            s = "breakpoint";    break;
1643      case lir_get_thread:            s = "get_thread";    break;
1644      // LIR_Op1
1645      case lir_fxch:                  s = "fxch";          break;
1646      case lir_fld:                   s = "fld";           break;
1647      case lir_push:                  s = "push";          break;
1648      case lir_pop:                   s = "pop";           break;
1649      case lir_null_check:            s = "null_check";    break;
1650      case lir_return:                s = "return";        break;
1651      case lir_safepoint:             s = "safepoint";     break;
1652      case lir_leal:                  s = "leal";          break;
1653      case lir_branch:                s = "branch";        break;
1654      case lir_cond_float_branch:     s = "flt_cond_br";   break;
1655      case lir_move:                  s = "move";          break;
1656      case lir_roundfp:               s = "roundfp";       break;
1657      case lir_rtcall:                s = "rtcall";        break;
1658      case lir_throw:                 s = "throw";         break;
1659      case lir_unwind:                s = "unwind";        break;
1660      case lir_convert:               s = "convert";       break;
1661      case lir_alloc_object:          s = "alloc_obj";     break;
1662      case lir_monaddr:               s = "mon_addr";      break;
1663      // LIR_Op2
1664      case lir_cmp:                   s = "cmp";           break;
1665      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1666      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1667      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1668      case lir_cmove:                 s = "cmove";         break;
1669      case lir_add:                   s = "add";           break;
1670      case lir_sub:                   s = "sub";           break;
1671      case lir_mul:                   s = "mul";           break;
1672      case lir_div:                   s = "div";           break;
1673      case lir_rem:                   s = "rem";           break;
1674      case lir_abs:                   s = "abs";           break;
1675      case lir_neg:                   s = "neg";           break;
1676      case lir_sqrt:                  s = "sqrt";          break;
1677      case lir_logic_and:             s = "logic_and";     break;
1678      case lir_logic_or:              s = "logic_or";      break;
1679      case lir_logic_xor:             s = "logic_xor";     break;
1680      case lir_shl:                   s = "shift_left";    break;
1681      case lir_shr:                   s = "shift_right";   break;
1682      case lir_ushr:                  s = "ushift_right";  break;
1683      case lir_alloc_array:           s = "alloc_array";   break;
1684      case lir_xadd:                  s = "xadd";          break;
1685      case lir_xchg:                  s = "xchg";          break;
1686      // LIR_Op3
1687      case lir_idiv:                  s = "idiv";          break;
1688      case lir_irem:                  s = "irem";          break;
1689      case lir_fmad:                  s = "fmad";          break;
1690      case lir_fmaf:                  s = "fmaf";          break;
1691      // LIR_OpJavaCall
1692      case lir_static_call:           s = "static";        break;
1693      case lir_optvirtual_call:       s = "optvirtual";    break;
1694      case lir_icvirtual_call:        s = "icvirtual";     break;
1695      case lir_dynamic_call:          s = "dynamic";       break;
1696      // LIR_OpArrayCopy
1697      case lir_arraycopy:             s = "arraycopy";     break;
1698      // LIR_OpUpdateCRC32
1699      case lir_updatecrc32:           s = "updatecrc32";   break;
1700      // LIR_OpLock
1701      case lir_lock:                  s = "lock";          break;
1702      case lir_unlock:                s = "unlock";        break;
1703      // LIR_OpDelay
1704      case lir_delay_slot:            s = "delay";         break;
1705      // LIR_OpTypeCheck
1706      case lir_instanceof:            s = "instanceof";    break;
1707      case lir_checkcast:             s = "checkcast";     break;
1708      case lir_store_check:           s = "store_check";   break;
1709      // LIR_OpCompareAndSwap
1710      case lir_cas_long:              s = "cas_long";      break;
1711      case lir_cas_obj:               s = "cas_obj";      break;
1712      case lir_cas_int:               s = "cas_int";      break;
1713      // LIR_OpProfileCall
1714      case lir_profile_call:          s = "profile_call";  break;
1715      // LIR_OpProfileType
1716      case lir_profile_type:          s = "profile_type";  break;
1717      // LIR_OpAssert
1718 #ifdef ASSERT
1719      case lir_assert:                s = "assert";        break;
1720 #endif
1721      case lir_none:                  ShouldNotReachHere();break;
1722     default:                         s = "illegal_op";    break;
1723   }
1724   return s;
1725 }
1726 
1727 // LIR_OpJavaCall
1728 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1729   out->print("call: ");
1730   out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1731   if (receiver()->is_valid()) {
1732     out->print(" [recv: ");   receiver()->print(out);   out->print("]");
1733   }
1734   if (result_opr()->is_valid()) {
1735     out->print(" [result: "); result_opr()->print(out); out->print("]");
1736   }
1737 }
1738 
1739 // LIR_OpLabel
1740 void LIR_OpLabel::print_instr(outputStream* out) const {
1741   out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1742 }
1743 
1744 // LIR_OpArrayCopy
1745 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1746   src()->print(out);     out->print(" ");
1747   src_pos()->print(out); out->print(" ");
1748   dst()->print(out);     out->print(" ");
1749   dst_pos()->print(out); out->print(" ");
1750   length()->print(out);  out->print(" ");
1751   tmp()->print(out);     out->print(" ");
1752 }
1753 
1754 // LIR_OpUpdateCRC32
1755 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1756   crc()->print(out);     out->print(" ");
1757   val()->print(out);     out->print(" ");
1758   result_opr()->print(out); out->print(" ");
1759 }
1760 
1761 // LIR_OpCompareAndSwap
1762 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1763   addr()->print(out);      out->print(" ");
1764   cmp_value()->print(out); out->print(" ");
1765   new_value()->print(out); out->print(" ");
1766   tmp1()->print(out);      out->print(" ");
1767   tmp2()->print(out);      out->print(" ");
1768 
1769 }
1770 
1771 // LIR_Op0
1772 void LIR_Op0::print_instr(outputStream* out) const {
1773   result_opr()->print(out);
1774 }
1775 
1776 // LIR_Op1
1777 const char * LIR_Op1::name() const {
1778   if (code() == lir_move) {
1779     switch (move_kind()) {
1780     case lir_move_normal:
1781       return "move";
1782     case lir_move_volatile:
1783       return "volatile_move";
1784     case lir_move_wide:
1785       return "wide_move";
1786     default:
1787       ShouldNotReachHere();
1788     return "illegal_op";
1789     }
1790   } else {
1791     return LIR_Op::name();
1792   }
1793 }
1794 
1795 
1796 void LIR_Op1::print_instr(outputStream* out) const {
1797   _opr->print(out);         out->print(" ");
1798   result_opr()->print(out); out->print(" ");
1799   print_patch_code(out, patch_code());
1800 }
1801 
1802 
1803 // LIR_Op1
1804 void LIR_OpRTCall::print_instr(outputStream* out) const {
1805   intx a = (intx)addr();
1806   out->print("%s", Runtime1::name_for_address(addr()));
1807   out->print(" ");
1808   tmp()->print(out);
1809 }
1810 
1811 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1812   switch(code) {
1813     case lir_patch_none:                                 break;
1814     case lir_patch_low:    out->print("[patch_low]");    break;
1815     case lir_patch_high:   out->print("[patch_high]");   break;
1816     case lir_patch_normal: out->print("[patch_normal]"); break;
1817     default: ShouldNotReachHere();
1818   }
1819 }
1820 
1821 // LIR_OpBranch
1822 void LIR_OpBranch::print_instr(outputStream* out) const {
1823   print_condition(out, cond());             out->print(" ");
1824   if (block() != NULL) {
1825     out->print("[B%d] ", block()->block_id());
1826   } else if (stub() != NULL) {
1827     out->print("[");
1828     stub()->print_name(out);
1829     out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1830     if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1831   } else {
1832     out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1833   }
1834   if (ublock() != NULL) {
1835     out->print("unordered: [B%d] ", ublock()->block_id());
1836   }
1837 }
1838 
1839 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1840   switch(cond) {
1841     case lir_cond_equal:           out->print("[EQ]");      break;
1842     case lir_cond_notEqual:        out->print("[NE]");      break;
1843     case lir_cond_less:            out->print("[LT]");      break;
1844     case lir_cond_lessEqual:       out->print("[LE]");      break;
1845     case lir_cond_greaterEqual:    out->print("[GE]");      break;
1846     case lir_cond_greater:         out->print("[GT]");      break;
1847     case lir_cond_belowEqual:      out->print("[BE]");      break;
1848     case lir_cond_aboveEqual:      out->print("[AE]");      break;
1849     case lir_cond_always:          out->print("[AL]");      break;
1850     default:                       out->print("[%d]",cond); break;
1851   }
1852 }
1853 
1854 // LIR_OpConvert
1855 void LIR_OpConvert::print_instr(outputStream* out) const {
1856   print_bytecode(out, bytecode());
1857   in_opr()->print(out);                  out->print(" ");
1858   result_opr()->print(out);              out->print(" ");
1859 #ifdef PPC32
1860   if(tmp1()->is_valid()) {
1861     tmp1()->print(out); out->print(" ");
1862     tmp2()->print(out); out->print(" ");
1863   }
1864 #endif
1865 }
1866 
1867 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1868   switch(code) {
1869     case Bytecodes::_d2f: out->print("[d2f] "); break;
1870     case Bytecodes::_d2i: out->print("[d2i] "); break;
1871     case Bytecodes::_d2l: out->print("[d2l] "); break;
1872     case Bytecodes::_f2d: out->print("[f2d] "); break;
1873     case Bytecodes::_f2i: out->print("[f2i] "); break;
1874     case Bytecodes::_f2l: out->print("[f2l] "); break;
1875     case Bytecodes::_i2b: out->print("[i2b] "); break;
1876     case Bytecodes::_i2c: out->print("[i2c] "); break;
1877     case Bytecodes::_i2d: out->print("[i2d] "); break;
1878     case Bytecodes::_i2f: out->print("[i2f] "); break;
1879     case Bytecodes::_i2l: out->print("[i2l] "); break;
1880     case Bytecodes::_i2s: out->print("[i2s] "); break;
1881     case Bytecodes::_l2i: out->print("[l2i] "); break;
1882     case Bytecodes::_l2f: out->print("[l2f] "); break;
1883     case Bytecodes::_l2d: out->print("[l2d] "); break;
1884     default:
1885       out->print("[?%d]",code);
1886     break;
1887   }
1888 }
1889 
1890 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1891   klass()->print(out);                      out->print(" ");
1892   obj()->print(out);                        out->print(" ");
1893   tmp1()->print(out);                       out->print(" ");
1894   tmp2()->print(out);                       out->print(" ");
1895   tmp3()->print(out);                       out->print(" ");
1896   tmp4()->print(out);                       out->print(" ");
1897   out->print("[hdr:%d]", header_size()); out->print(" ");
1898   out->print("[obj:%d]", object_size()); out->print(" ");
1899   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1900 }
1901 
1902 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1903   _opr->print(out);         out->print(" ");
1904   tmp()->print(out);        out->print(" ");
1905   result_opr()->print(out); out->print(" ");
1906 }
1907 
1908 // LIR_Op2
1909 void LIR_Op2::print_instr(outputStream* out) const {
1910   if (code() == lir_cmove || code() == lir_cmp) {
1911     print_condition(out, condition());         out->print(" ");
1912   }
1913   in_opr1()->print(out);    out->print(" ");
1914   in_opr2()->print(out);    out->print(" ");
1915   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
1916   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
1917   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
1918   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
1919   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1920   result_opr()->print(out);
1921 }
1922 
1923 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1924   klass()->print(out);                   out->print(" ");
1925   len()->print(out);                     out->print(" ");
1926   obj()->print(out);                     out->print(" ");
1927   tmp1()->print(out);                    out->print(" ");
1928   tmp2()->print(out);                    out->print(" ");
1929   tmp3()->print(out);                    out->print(" ");
1930   tmp4()->print(out);                    out->print(" ");
1931   out->print("[type:0x%x]", type());     out->print(" ");
1932   out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1933 }
1934 
1935 
1936 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1937   object()->print(out);                  out->print(" ");
1938   if (code() == lir_store_check) {
1939     array()->print(out);                 out->print(" ");
1940   }
1941   if (code() != lir_store_check) {
1942     klass()->print_name_on(out);         out->print(" ");
1943     if (fast_check())                 out->print("fast_check ");
1944   }
1945   tmp1()->print(out);                    out->print(" ");
1946   tmp2()->print(out);                    out->print(" ");
1947   tmp3()->print(out);                    out->print(" ");
1948   result_opr()->print(out);              out->print(" ");
1949   if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1950 }
1951 
1952 
1953 // LIR_Op3
1954 void LIR_Op3::print_instr(outputStream* out) const {
1955   in_opr1()->print(out);    out->print(" ");
1956   in_opr2()->print(out);    out->print(" ");
1957   in_opr3()->print(out);    out->print(" ");
1958   result_opr()->print(out);
1959 }
1960 
1961 
1962 void LIR_OpLock::print_instr(outputStream* out) const {
1963   hdr_opr()->print(out);   out->print(" ");
1964   obj_opr()->print(out);   out->print(" ");
1965   lock_opr()->print(out);  out->print(" ");
1966   if (_scratch->is_valid()) {
1967     _scratch->print(out);  out->print(" ");
1968   }
1969   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1970 }
1971 
1972 #ifdef ASSERT
1973 void LIR_OpAssert::print_instr(outputStream* out) const {
1974   print_condition(out, condition()); out->print(" ");
1975   in_opr1()->print(out);             out->print(" ");
1976   in_opr2()->print(out);             out->print(", \"");
1977   out->print("%s", msg());          out->print("\"");
1978 }
1979 #endif
1980 
1981 
1982 void LIR_OpDelay::print_instr(outputStream* out) const {
1983   _op->print_on(out);
1984 }
1985 
1986 
1987 // LIR_OpProfileCall
1988 void LIR_OpProfileCall::print_instr(outputStream* out) const {
1989   profiled_method()->name()->print_symbol_on(out);
1990   out->print(".");
1991   profiled_method()->holder()->name()->print_symbol_on(out);
1992   out->print(" @ %d ", profiled_bci());
1993   mdo()->print(out);           out->print(" ");
1994   recv()->print(out);          out->print(" ");
1995   tmp1()->print(out);          out->print(" ");
1996 }
1997 
1998 // LIR_OpProfileType
1999 void LIR_OpProfileType::print_instr(outputStream* out) const {
2000   out->print("exact = ");
2001   if  (exact_klass() == NULL) {
2002     out->print("unknown");
2003   } else {
2004     exact_klass()->print_name_on(out);
2005   }
2006   out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2007   out->print(" ");
2008   mdp()->print(out);          out->print(" ");
2009   obj()->print(out);          out->print(" ");
2010   tmp()->print(out);          out->print(" ");
2011 }
2012 
2013 #endif // PRODUCT
2014 
2015 // Implementation of LIR_InsertionBuffer
2016 
2017 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2018   assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2019 
2020   int i = number_of_insertion_points() - 1;
2021   if (i < 0 || index_at(i) < index) {
2022     append_new(index, 1);
2023   } else {
2024     assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2025     assert(count_at(i) > 0, "check");
2026     set_count_at(i, count_at(i) + 1);
2027   }
2028   _ops.push(op);
2029 
2030   DEBUG_ONLY(verify());
2031 }
2032 
2033 #ifdef ASSERT
2034 void LIR_InsertionBuffer::verify() {
2035   int sum = 0;
2036   int prev_idx = -1;
2037 
2038   for (int i = 0; i < number_of_insertion_points(); i++) {
2039     assert(prev_idx < index_at(i), "index must be ordered ascending");
2040     sum += count_at(i);
2041   }
2042   assert(sum == number_of_ops(), "wrong total sum");
2043 }
2044 #endif