169
170 }
171 #endif // PRODUCT
172
173
174 bool LIR_Opr::is_oop() const {
175 if (is_pointer()) {
176 return pointer()->is_oop_pointer();
177 } else {
178 OprType t= type_field();
179 assert(t != unknown_type, "not set");
180 return t == object_type;
181 }
182 }
183
184
185
186 void LIR_Op2::verify() const {
187 #ifdef ASSERT
188 switch (code()) {
189 case lir_cmove:
190 case lir_xchg:
191 break;
192
193 default:
194 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
195 "can't produce oops from arith");
196 }
197
198 if (TwoOperandLIRForm) {
199
200 #ifdef ASSERT
201 bool threeOperandForm = false;
202 #ifdef S390
203 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
204 threeOperandForm =
205 code() == lir_shl ||
206 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
207 #endif
208 #endif
209
220 case lir_shr:
221 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
222 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
223 break;
224
225 // special handling for lir_ushr because of write barriers
226 case lir_ushr:
227 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
228 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
229 break;
230
231 default:
232 break;
233 }
234 }
235 #endif
236 }
237
238
239 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
240 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
241 , _cond(cond)
242 , _label(block->label())
243 , _block(block)
244 , _ublock(NULL)
245 , _stub(NULL) {
246 }
247
248 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
249 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
250 , _cond(cond)
251 , _label(stub->entry())
252 , _block(NULL)
253 , _ublock(NULL)
254 , _stub(stub) {
255 }
256
257 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
258 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
259 , _cond(cond)
260 , _label(block->label())
261 , _block(block)
262 , _ublock(ublock)
263 , _stub(NULL)
264 {
265 }
266
267 void LIR_OpBranch::change_block(BlockBegin* b) {
268 assert(_block != NULL, "must have old block");
269 assert(_block->label() == label(), "must be equal");
270
271 _block = b;
272 _label = b->label();
273 }
274
275 void LIR_OpBranch::change_ublock(BlockBegin* b) {
276 assert(_ublock != NULL, "must have old block");
277 _ublock = b;
278 }
279
280 void LIR_OpBranch::negate_cond() {
281 switch (_cond) {
282 case lir_cond_equal: _cond = lir_cond_notEqual; break;
283 case lir_cond_notEqual: _cond = lir_cond_equal; break;
284 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
285 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
286 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
287 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
288 default: ShouldNotReachHere();
289 }
290 }
291
292
293 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
294 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
295 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
296 CodeStub* stub)
297
298 : LIR_Op(code, result, NULL)
299 , _object(object)
300 , _array(LIR_OprFact::illegalOpr)
301 , _klass(klass)
302 , _tmp1(tmp1)
303 , _tmp2(tmp2)
304 , _tmp3(tmp3)
305 , _fast_check(fast_check)
306 , _info_for_patch(info_for_patch)
307 , _info_for_exception(info_for_exception)
490 case lir_convert: // input and result always valid, info always invalid
491 {
492 assert(op->as_OpConvert() != NULL, "must be");
493 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
494
495 assert(opConvert->_info == NULL, "must be");
496 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
497 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
498 do_stub(opConvert->_stub);
499
500 break;
501 }
502
503 // LIR_OpBranch;
504 case lir_branch: // may have info, input and result register always invalid
505 case lir_cond_float_branch: // may have info, input and result register always invalid
506 {
507 assert(op->as_OpBranch() != NULL, "must be");
508 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
509
510 if (opBranch->_info != NULL) do_info(opBranch->_info);
511 assert(opBranch->_result->is_illegal(), "not used");
512 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
513
514 break;
515 }
516
517
518 // LIR_OpAllocObj
519 case lir_alloc_object:
520 {
521 assert(op->as_OpAllocObj() != NULL, "must be");
522 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
523
524 if (opAllocObj->_info) do_info(opAllocObj->_info);
525 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
526 do_temp(opAllocObj->_opr);
527 }
528 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
529 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
578 if (op2->_info) do_info(op2->_info);
579 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
580 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
581 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
582 if (op2->_result->is_valid()) do_output(op2->_result);
583 if (op->code() == lir_xchg || op->code() == lir_xadd) {
584 // on ARM and PPC, return value is loaded first so could
585 // destroy inputs. On other platforms that implement those
586 // (x86, sparc), the extra constrainsts are harmless.
587 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
588 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
589 }
590
591 break;
592 }
593
594 // special handling for cmove: right input operand must not be equal
595 // to the result operand, otherwise the backend fails
596 case lir_cmove:
597 {
598 assert(op->as_Op2() != NULL, "must be");
599 LIR_Op2* op2 = (LIR_Op2*)op;
600
601 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
602 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
603 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
604
605 do_input(op2->_opr1);
606 do_input(op2->_opr2);
607 do_temp(op2->_opr2);
608 do_output(op2->_result);
609
610 break;
611 }
612
613 // vspecial handling for strict operations: register input operands
614 // as temp to guarantee that they do not overlap with other
615 // registers
616 case lir_mul:
617 case lir_div:
618 {
619 assert(op->as_Op2() != NULL, "must be");
620 LIR_Op2* op2 = (LIR_Op2*)op;
621
622 assert(op2->_info == NULL, "not used");
623 assert(op2->_opr1->is_valid(), "used");
624 assert(op2->_opr2->is_valid(), "used");
625 assert(op2->_result->is_valid(), "used");
626 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
627 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
628
1032 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1033 masm->emit_alloc_array(this);
1034 masm->append_code_stub(stub());
1035 }
1036
1037 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1038 masm->emit_opTypeCheck(this);
1039 if (stub()) {
1040 masm->append_code_stub(stub());
1041 }
1042 }
1043
1044 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1045 masm->emit_compare_and_swap(this);
1046 }
1047
1048 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1049 masm->emit_op3(this);
1050 }
1051
1052 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1053 masm->emit_lock(this);
1054 if (stub()) {
1055 masm->append_code_stub(stub());
1056 }
1057 }
1058
1059 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1060 masm->emit_load_klass(this);
1061 }
1062
1063 #ifdef ASSERT
1064 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1065 masm->emit_assert(this);
1066 }
1067 #endif
1068
1069 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1070 masm->emit_delay(this);
1071 }
1072
1073 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1074 masm->emit_profile_call(this);
1075 }
1076
1077 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1078 masm->emit_profile_type(this);
1079 }
1080
1081 // LIR_List
1082 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1083 : _operations(8)
1084 , _compilation(compilation)
1085 #ifndef PRODUCT
1086 , _block(block)
1087 #endif
1088 #ifdef ASSERT
1089 , _file(NULL)
1090 , _line(0)
1091 #endif
1092 { }
1093
1094
1095 #ifdef ASSERT
1096 void LIR_List::set_file_and_line(const char * file, int line) {
1097 const char * f = strrchr(file, '/');
1098 if (f == NULL) f = strrchr(file, '\\');
1099 if (f == NULL) {
1100 f = file;
1101 } else {
1102 f++;
1103 }
1104 _file = f;
1105 _line = line;
1106 }
1107 #endif
1108
1109
1110 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1111 assert(this == buffer->lir_list(), "wrong lir list");
1112 const int n = _operations.length();
1113
1114 if (buffer->number_of_ops() > 0) {
1115 // increase size of instructions list
1116 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1117 // insert ops from buffer into instructions list
1118 int op_index = buffer->number_of_ops() - 1;
1119 int ip_index = buffer->number_of_insertion_points() - 1;
1120 int from_index = n - 1;
1121 int to_index = _operations.length() - 1;
1122 for (; ip_index >= 0; ip_index --) {
1123 int index = buffer->index_at(ip_index);
1124 // make room after insertion point
1125 while (index < from_index) {
1126 _operations.at_put(to_index --, _operations.at(from_index --));
1127 }
1128 // insert ops from buffer
1660 case lir_pop: s = "pop"; break;
1661 case lir_null_check: s = "null_check"; break;
1662 case lir_return: s = "return"; break;
1663 case lir_safepoint: s = "safepoint"; break;
1664 case lir_leal: s = "leal"; break;
1665 case lir_branch: s = "branch"; break;
1666 case lir_cond_float_branch: s = "flt_cond_br"; break;
1667 case lir_move: s = "move"; break;
1668 case lir_roundfp: s = "roundfp"; break;
1669 case lir_rtcall: s = "rtcall"; break;
1670 case lir_throw: s = "throw"; break;
1671 case lir_unwind: s = "unwind"; break;
1672 case lir_convert: s = "convert"; break;
1673 case lir_alloc_object: s = "alloc_obj"; break;
1674 case lir_monaddr: s = "mon_addr"; break;
1675 // LIR_Op2
1676 case lir_cmp: s = "cmp"; break;
1677 case lir_cmp_l2i: s = "cmp_l2i"; break;
1678 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1679 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1680 case lir_cmove: s = "cmove"; break;
1681 case lir_add: s = "add"; break;
1682 case lir_sub: s = "sub"; break;
1683 case lir_mul: s = "mul"; break;
1684 case lir_div: s = "div"; break;
1685 case lir_rem: s = "rem"; break;
1686 case lir_abs: s = "abs"; break;
1687 case lir_neg: s = "neg"; break;
1688 case lir_sqrt: s = "sqrt"; break;
1689 case lir_logic_and: s = "logic_and"; break;
1690 case lir_logic_or: s = "logic_or"; break;
1691 case lir_logic_xor: s = "logic_xor"; break;
1692 case lir_shl: s = "shift_left"; break;
1693 case lir_shr: s = "shift_right"; break;
1694 case lir_ushr: s = "ushift_right"; break;
1695 case lir_alloc_array: s = "alloc_array"; break;
1696 case lir_xadd: s = "xadd"; break;
1697 case lir_xchg: s = "xchg"; break;
1698 // LIR_Op3
1699 case lir_idiv: s = "idiv"; break;
1700 case lir_irem: s = "irem"; break;
1701 case lir_fmad: s = "fmad"; break;
1702 case lir_fmaf: s = "fmaf"; break;
1703 // LIR_OpJavaCall
1704 case lir_static_call: s = "static"; break;
1705 case lir_optvirtual_call: s = "optvirtual"; break;
1706 case lir_icvirtual_call: s = "icvirtual"; break;
1707 case lir_dynamic_call: s = "dynamic"; break;
1708 // LIR_OpArrayCopy
1709 case lir_arraycopy: s = "arraycopy"; break;
1710 // LIR_OpUpdateCRC32
1711 case lir_updatecrc32: s = "updatecrc32"; break;
1712 // LIR_OpLock
1713 case lir_lock: s = "lock"; break;
1714 case lir_unlock: s = "unlock"; break;
1715 // LIR_OpDelay
1716 case lir_delay_slot: s = "delay"; break;
1717 // LIR_OpTypeCheck
1718 case lir_instanceof: s = "instanceof"; break;
1719 case lir_checkcast: s = "checkcast"; break;
1720 case lir_store_check: s = "store_check"; break;
1721 // LIR_OpCompareAndSwap
1722 case lir_cas_long: s = "cas_long"; break;
1816 void LIR_OpRTCall::print_instr(outputStream* out) const {
1817 intx a = (intx)addr();
1818 out->print("%s", Runtime1::name_for_address(addr()));
1819 out->print(" ");
1820 tmp()->print(out);
1821 }
1822
1823 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1824 switch(code) {
1825 case lir_patch_none: break;
1826 case lir_patch_low: out->print("[patch_low]"); break;
1827 case lir_patch_high: out->print("[patch_high]"); break;
1828 case lir_patch_normal: out->print("[patch_normal]"); break;
1829 default: ShouldNotReachHere();
1830 }
1831 }
1832
1833 // LIR_OpBranch
1834 void LIR_OpBranch::print_instr(outputStream* out) const {
1835 print_condition(out, cond()); out->print(" ");
1836 if (block() != NULL) {
1837 out->print("[B%d] ", block()->block_id());
1838 } else if (stub() != NULL) {
1839 out->print("[");
1840 stub()->print_name(out);
1841 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1842 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1843 } else {
1844 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1845 }
1846 if (ublock() != NULL) {
1847 out->print("unordered: [B%d] ", ublock()->block_id());
1848 }
1849 }
1850
1851 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1852 switch(cond) {
1853 case lir_cond_equal: out->print("[EQ]"); break;
1854 case lir_cond_notEqual: out->print("[NE]"); break;
1855 case lir_cond_less: out->print("[LT]"); break;
1896 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1897 klass()->print(out); out->print(" ");
1898 obj()->print(out); out->print(" ");
1899 tmp1()->print(out); out->print(" ");
1900 tmp2()->print(out); out->print(" ");
1901 tmp3()->print(out); out->print(" ");
1902 tmp4()->print(out); out->print(" ");
1903 out->print("[hdr:%d]", header_size()); out->print(" ");
1904 out->print("[obj:%d]", object_size()); out->print(" ");
1905 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1906 }
1907
1908 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1909 _opr->print(out); out->print(" ");
1910 tmp()->print(out); out->print(" ");
1911 result_opr()->print(out); out->print(" ");
1912 }
1913
1914 // LIR_Op2
1915 void LIR_Op2::print_instr(outputStream* out) const {
1916 if (code() == lir_cmove || code() == lir_cmp) {
1917 print_condition(out, condition()); out->print(" ");
1918 }
1919 in_opr1()->print(out); out->print(" ");
1920 in_opr2()->print(out); out->print(" ");
1921 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1922 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1923 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1924 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1925 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1926 result_opr()->print(out);
1927 }
1928
1929 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1930 klass()->print(out); out->print(" ");
1931 len()->print(out); out->print(" ");
1932 obj()->print(out); out->print(" ");
1933 tmp1()->print(out); out->print(" ");
1934 tmp2()->print(out); out->print(" ");
1935 tmp3()->print(out); out->print(" ");
1936 tmp4()->print(out); out->print(" ");
1947 if (code() != lir_store_check) {
1948 klass()->print_name_on(out); out->print(" ");
1949 if (fast_check()) out->print("fast_check ");
1950 }
1951 tmp1()->print(out); out->print(" ");
1952 tmp2()->print(out); out->print(" ");
1953 tmp3()->print(out); out->print(" ");
1954 result_opr()->print(out); out->print(" ");
1955 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1956 }
1957
1958
1959 // LIR_Op3
1960 void LIR_Op3::print_instr(outputStream* out) const {
1961 in_opr1()->print(out); out->print(" ");
1962 in_opr2()->print(out); out->print(" ");
1963 in_opr3()->print(out); out->print(" ");
1964 result_opr()->print(out);
1965 }
1966
1967
1968 void LIR_OpLock::print_instr(outputStream* out) const {
1969 hdr_opr()->print(out); out->print(" ");
1970 obj_opr()->print(out); out->print(" ");
1971 lock_opr()->print(out); out->print(" ");
1972 if (_scratch->is_valid()) {
1973 _scratch->print(out); out->print(" ");
1974 }
1975 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1976 }
1977
1978 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
1979 obj()->print(out); out->print(" ");
1980 result_opr()->print(out); out->print(" ");
1981 }
1982
1983 #ifdef ASSERT
1984 void LIR_OpAssert::print_instr(outputStream* out) const {
1985 print_condition(out, condition()); out->print(" ");
1986 in_opr1()->print(out); out->print(" ");
|
169
170 }
171 #endif // PRODUCT
172
173
174 bool LIR_Opr::is_oop() const {
175 if (is_pointer()) {
176 return pointer()->is_oop_pointer();
177 } else {
178 OprType t= type_field();
179 assert(t != unknown_type, "not set");
180 return t == object_type;
181 }
182 }
183
184
185
186 void LIR_Op2::verify() const {
187 #ifdef ASSERT
188 switch (code()) {
189 case lir_xchg:
190 break;
191
192 default:
193 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
194 "can't produce oops from arith");
195 }
196
197 if (TwoOperandLIRForm) {
198
199 #ifdef ASSERT
200 bool threeOperandForm = false;
201 #ifdef S390
202 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
203 threeOperandForm =
204 code() == lir_shl ||
205 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
206 #endif
207 #endif
208
219 case lir_shr:
220 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
221 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
222 break;
223
224 // special handling for lir_ushr because of write barriers
225 case lir_ushr:
226 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
227 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
228 break;
229
230 default:
231 break;
232 }
233 }
234 #endif
235 }
236
237
238 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
239 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
240 , _label(block->label())
241 , _block(block)
242 , _ublock(NULL)
243 , _stub(NULL) {
244 }
245
246 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
247 LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
248 , _label(stub->entry())
249 , _block(NULL)
250 , _ublock(NULL)
251 , _stub(stub) {
252 }
253
254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
255 : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
256 , _label(block->label())
257 , _block(block)
258 , _ublock(ublock)
259 , _stub(NULL)
260 {
261 }
262
263 void LIR_OpBranch::change_block(BlockBegin* b) {
264 assert(_block != NULL, "must have old block");
265 assert(_block->label() == label(), "must be equal");
266
267 _block = b;
268 _label = b->label();
269 }
270
271 void LIR_OpBranch::change_ublock(BlockBegin* b) {
272 assert(_ublock != NULL, "must have old block");
273 _ublock = b;
274 }
275
276 void LIR_OpBranch::negate_cond() {
277 switch (cond()) {
278 case lir_cond_equal: set_cond(lir_cond_notEqual); break;
279 case lir_cond_notEqual: set_cond(lir_cond_equal); break;
280 case lir_cond_less: set_cond(lir_cond_greaterEqual); break;
281 case lir_cond_lessEqual: set_cond(lir_cond_greater); break;
282 case lir_cond_greaterEqual: set_cond(lir_cond_less); break;
283 case lir_cond_greater: set_cond(lir_cond_lessEqual); break;
284 default: ShouldNotReachHere();
285 }
286 }
287
288
289 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
290 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
291 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
292 CodeStub* stub)
293
294 : LIR_Op(code, result, NULL)
295 , _object(object)
296 , _array(LIR_OprFact::illegalOpr)
297 , _klass(klass)
298 , _tmp1(tmp1)
299 , _tmp2(tmp2)
300 , _tmp3(tmp3)
301 , _fast_check(fast_check)
302 , _info_for_patch(info_for_patch)
303 , _info_for_exception(info_for_exception)
486 case lir_convert: // input and result always valid, info always invalid
487 {
488 assert(op->as_OpConvert() != NULL, "must be");
489 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
490
491 assert(opConvert->_info == NULL, "must be");
492 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
493 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
494 do_stub(opConvert->_stub);
495
496 break;
497 }
498
499 // LIR_OpBranch;
500 case lir_branch: // may have info, input and result register always invalid
501 case lir_cond_float_branch: // may have info, input and result register always invalid
502 {
503 assert(op->as_OpBranch() != NULL, "must be");
504 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
505
506 assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() &&
507 opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() &&
508 opBranch->_tmp5->is_illegal(), "not used");
509
510 if (opBranch->_opr1->is_valid()) do_input(opBranch->_opr1);
511 if (opBranch->_opr2->is_valid()) do_input(opBranch->_opr2);
512
513 if (opBranch->_info != NULL) do_info(opBranch->_info);
514 assert(opBranch->_result->is_illegal(), "not used");
515 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
516
517 break;
518 }
519
520
521 // LIR_OpAllocObj
522 case lir_alloc_object:
523 {
524 assert(op->as_OpAllocObj() != NULL, "must be");
525 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
526
527 if (opAllocObj->_info) do_info(opAllocObj->_info);
528 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
529 do_temp(opAllocObj->_opr);
530 }
531 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
532 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
581 if (op2->_info) do_info(op2->_info);
582 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
583 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
584 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
585 if (op2->_result->is_valid()) do_output(op2->_result);
586 if (op->code() == lir_xchg || op->code() == lir_xadd) {
587 // on ARM and PPC, return value is loaded first so could
588 // destroy inputs. On other platforms that implement those
589 // (x86, sparc), the extra constrainsts are harmless.
590 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
591 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
592 }
593
594 break;
595 }
596
597 // special handling for cmove: right input operand must not be equal
598 // to the result operand, otherwise the backend fails
599 case lir_cmove:
600 {
601 assert(op->as_Op4() != NULL, "must be");
602 LIR_Op4* op4 = (LIR_Op4*)op;
603
604 assert(op4->_info == NULL && op4->_tmp1->is_illegal() && op4->_tmp2->is_illegal() &&
605 op4->_tmp3->is_illegal() && op4->_tmp4->is_illegal() && op4->_tmp5->is_illegal(), "not used");
606 assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && op4->_result->is_valid(), "used");
607
608 do_input(op4->_opr1);
609 do_input(op4->_opr2);
610 if (op4->_opr3->is_valid()) do_input(op4->_opr3);
611 if (op4->_opr4->is_valid()) do_input(op4->_opr4);
612 do_temp(op4->_opr2);
613 do_output(op4->_result);
614
615 break;
616 }
617
618 // vspecial handling for strict operations: register input operands
619 // as temp to guarantee that they do not overlap with other
620 // registers
621 case lir_mul:
622 case lir_div:
623 {
624 assert(op->as_Op2() != NULL, "must be");
625 LIR_Op2* op2 = (LIR_Op2*)op;
626
627 assert(op2->_info == NULL, "not used");
628 assert(op2->_opr1->is_valid(), "used");
629 assert(op2->_opr2->is_valid(), "used");
630 assert(op2->_result->is_valid(), "used");
631 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
632 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
633
1037 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1038 masm->emit_alloc_array(this);
1039 masm->append_code_stub(stub());
1040 }
1041
1042 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1043 masm->emit_opTypeCheck(this);
1044 if (stub()) {
1045 masm->append_code_stub(stub());
1046 }
1047 }
1048
1049 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1050 masm->emit_compare_and_swap(this);
1051 }
1052
1053 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1054 masm->emit_op3(this);
1055 }
1056
1057 void LIR_Op4::emit_code(LIR_Assembler* masm) {
1058 masm->emit_op4(this);
1059 }
1060
1061 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1062 masm->emit_lock(this);
1063 if (stub()) {
1064 masm->append_code_stub(stub());
1065 }
1066 }
1067
1068 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1069 masm->emit_load_klass(this);
1070 }
1071
1072 #ifdef ASSERT
1073 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1074 masm->emit_assert(this);
1075 }
1076 #endif
1077
1078 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1079 masm->emit_delay(this);
1080 }
1081
1082 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1083 masm->emit_profile_call(this);
1084 }
1085
1086 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1087 masm->emit_profile_type(this);
1088 }
1089
1090 // LIR_List
1091 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1092 : _operations(8)
1093 , _compilation(compilation)
1094 #ifndef PRODUCT
1095 , _block(block)
1096 #endif
1097 #ifdef ASSERT
1098 , _file(NULL)
1099 , _line(0)
1100 #endif
1101 #ifdef RISCV
1102 , _cmp_opr1(LIR_OprFact::illegalOpr)
1103 , _cmp_opr2(LIR_OprFact::illegalOpr)
1104 #endif
1105 { }
1106
1107
1108 #ifdef ASSERT
1109 void LIR_List::set_file_and_line(const char * file, int line) {
1110 const char * f = strrchr(file, '/');
1111 if (f == NULL) f = strrchr(file, '\\');
1112 if (f == NULL) {
1113 f = file;
1114 } else {
1115 f++;
1116 }
1117 _file = f;
1118 _line = line;
1119 }
1120 #endif
1121
1122 #ifdef RISCV
1123 void LIR_List::set_cmp_oprs(LIR_Op* op) {
1124 switch (op->code()) {
1125 case lir_cmp:
1126 _cmp_opr1 = op->as_Op2()->in_opr1();
1127 _cmp_opr2 = op->as_Op2()->in_opr2();
1128 break;
1129 case lir_branch: // fall through
1130 case lir_cond_float_branch:
1131 assert(op->as_OpBranch()->cond() == lir_cond_always ||
1132 (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr),
1133 "conditional branches must have legal operands");
1134 if (op->as_OpBranch()->cond() != lir_cond_always) {
1135 op->as_Op2()->set_in_opr1(_cmp_opr1);
1136 op->as_Op2()->set_in_opr2(_cmp_opr2);
1137 }
1138 break;
1139 case lir_cmove:
1140 op->as_Op4()->set_in_opr3(_cmp_opr1);
1141 op->as_Op4()->set_in_opr4(_cmp_opr2);
1142 break;
1143 #if INCLUDE_ZGC
1144 case lir_zloadbarrier_test:
1145 _cmp_opr1 = FrameMap::as_opr(t1);
1146 _cmp_opr2 = LIR_OprFact::intConst(0);
1147 break;
1148 #endif
1149 default:
1150 break;
1151 }
1152 }
1153 #endif
1154
1155 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1156 assert(this == buffer->lir_list(), "wrong lir list");
1157 const int n = _operations.length();
1158
1159 if (buffer->number_of_ops() > 0) {
1160 // increase size of instructions list
1161 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1162 // insert ops from buffer into instructions list
1163 int op_index = buffer->number_of_ops() - 1;
1164 int ip_index = buffer->number_of_insertion_points() - 1;
1165 int from_index = n - 1;
1166 int to_index = _operations.length() - 1;
1167 for (; ip_index >= 0; ip_index --) {
1168 int index = buffer->index_at(ip_index);
1169 // make room after insertion point
1170 while (index < from_index) {
1171 _operations.at_put(to_index --, _operations.at(from_index --));
1172 }
1173 // insert ops from buffer
1705 case lir_pop: s = "pop"; break;
1706 case lir_null_check: s = "null_check"; break;
1707 case lir_return: s = "return"; break;
1708 case lir_safepoint: s = "safepoint"; break;
1709 case lir_leal: s = "leal"; break;
1710 case lir_branch: s = "branch"; break;
1711 case lir_cond_float_branch: s = "flt_cond_br"; break;
1712 case lir_move: s = "move"; break;
1713 case lir_roundfp: s = "roundfp"; break;
1714 case lir_rtcall: s = "rtcall"; break;
1715 case lir_throw: s = "throw"; break;
1716 case lir_unwind: s = "unwind"; break;
1717 case lir_convert: s = "convert"; break;
1718 case lir_alloc_object: s = "alloc_obj"; break;
1719 case lir_monaddr: s = "mon_addr"; break;
1720 // LIR_Op2
1721 case lir_cmp: s = "cmp"; break;
1722 case lir_cmp_l2i: s = "cmp_l2i"; break;
1723 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1724 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1725 case lir_add: s = "add"; break;
1726 case lir_sub: s = "sub"; break;
1727 case lir_mul: s = "mul"; break;
1728 case lir_div: s = "div"; break;
1729 case lir_rem: s = "rem"; break;
1730 case lir_abs: s = "abs"; break;
1731 case lir_neg: s = "neg"; break;
1732 case lir_sqrt: s = "sqrt"; break;
1733 case lir_logic_and: s = "logic_and"; break;
1734 case lir_logic_or: s = "logic_or"; break;
1735 case lir_logic_xor: s = "logic_xor"; break;
1736 case lir_shl: s = "shift_left"; break;
1737 case lir_shr: s = "shift_right"; break;
1738 case lir_ushr: s = "ushift_right"; break;
1739 case lir_alloc_array: s = "alloc_array"; break;
1740 case lir_xadd: s = "xadd"; break;
1741 case lir_xchg: s = "xchg"; break;
1742 // LIR_Op3
1743 case lir_idiv: s = "idiv"; break;
1744 case lir_irem: s = "irem"; break;
1745 case lir_fmad: s = "fmad"; break;
1746 case lir_fmaf: s = "fmaf"; break;
1747 // LIR_Op4
1748 case lir_cmove: s = "cmove"; break;
1749 // LIR_OpJavaCall
1750 case lir_static_call: s = "static"; break;
1751 case lir_optvirtual_call: s = "optvirtual"; break;
1752 case lir_icvirtual_call: s = "icvirtual"; break;
1753 case lir_dynamic_call: s = "dynamic"; break;
1754 // LIR_OpArrayCopy
1755 case lir_arraycopy: s = "arraycopy"; break;
1756 // LIR_OpUpdateCRC32
1757 case lir_updatecrc32: s = "updatecrc32"; break;
1758 // LIR_OpLock
1759 case lir_lock: s = "lock"; break;
1760 case lir_unlock: s = "unlock"; break;
1761 // LIR_OpDelay
1762 case lir_delay_slot: s = "delay"; break;
1763 // LIR_OpTypeCheck
1764 case lir_instanceof: s = "instanceof"; break;
1765 case lir_checkcast: s = "checkcast"; break;
1766 case lir_store_check: s = "store_check"; break;
1767 // LIR_OpCompareAndSwap
1768 case lir_cas_long: s = "cas_long"; break;
1862 void LIR_OpRTCall::print_instr(outputStream* out) const {
1863 intx a = (intx)addr();
1864 out->print("%s", Runtime1::name_for_address(addr()));
1865 out->print(" ");
1866 tmp()->print(out);
1867 }
1868
1869 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1870 switch(code) {
1871 case lir_patch_none: break;
1872 case lir_patch_low: out->print("[patch_low]"); break;
1873 case lir_patch_high: out->print("[patch_high]"); break;
1874 case lir_patch_normal: out->print("[patch_normal]"); break;
1875 default: ShouldNotReachHere();
1876 }
1877 }
1878
1879 // LIR_OpBranch
1880 void LIR_OpBranch::print_instr(outputStream* out) const {
1881 print_condition(out, cond()); out->print(" ");
1882 in_opr1()->print(out); out->print(" ");
1883 in_opr2()->print(out); out->print(" ");
1884 if (block() != NULL) {
1885 out->print("[B%d] ", block()->block_id());
1886 } else if (stub() != NULL) {
1887 out->print("[");
1888 stub()->print_name(out);
1889 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1890 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1891 } else {
1892 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1893 }
1894 if (ublock() != NULL) {
1895 out->print("unordered: [B%d] ", ublock()->block_id());
1896 }
1897 }
1898
1899 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1900 switch(cond) {
1901 case lir_cond_equal: out->print("[EQ]"); break;
1902 case lir_cond_notEqual: out->print("[NE]"); break;
1903 case lir_cond_less: out->print("[LT]"); break;
1944 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1945 klass()->print(out); out->print(" ");
1946 obj()->print(out); out->print(" ");
1947 tmp1()->print(out); out->print(" ");
1948 tmp2()->print(out); out->print(" ");
1949 tmp3()->print(out); out->print(" ");
1950 tmp4()->print(out); out->print(" ");
1951 out->print("[hdr:%d]", header_size()); out->print(" ");
1952 out->print("[obj:%d]", object_size()); out->print(" ");
1953 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1954 }
1955
1956 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1957 _opr->print(out); out->print(" ");
1958 tmp()->print(out); out->print(" ");
1959 result_opr()->print(out); out->print(" ");
1960 }
1961
1962 // LIR_Op2
1963 void LIR_Op2::print_instr(outputStream* out) const {
1964 if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) {
1965 print_condition(out, condition()); out->print(" ");
1966 }
1967 in_opr1()->print(out); out->print(" ");
1968 in_opr2()->print(out); out->print(" ");
1969 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1970 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1971 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1972 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1973 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1974 result_opr()->print(out);
1975 }
1976
1977 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1978 klass()->print(out); out->print(" ");
1979 len()->print(out); out->print(" ");
1980 obj()->print(out); out->print(" ");
1981 tmp1()->print(out); out->print(" ");
1982 tmp2()->print(out); out->print(" ");
1983 tmp3()->print(out); out->print(" ");
1984 tmp4()->print(out); out->print(" ");
1995 if (code() != lir_store_check) {
1996 klass()->print_name_on(out); out->print(" ");
1997 if (fast_check()) out->print("fast_check ");
1998 }
1999 tmp1()->print(out); out->print(" ");
2000 tmp2()->print(out); out->print(" ");
2001 tmp3()->print(out); out->print(" ");
2002 result_opr()->print(out); out->print(" ");
2003 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
2004 }
2005
2006
2007 // LIR_Op3
2008 void LIR_Op3::print_instr(outputStream* out) const {
2009 in_opr1()->print(out); out->print(" ");
2010 in_opr2()->print(out); out->print(" ");
2011 in_opr3()->print(out); out->print(" ");
2012 result_opr()->print(out);
2013 }
2014
2015 // LIR_Op4
2016 void LIR_Op4::print_instr(outputStream* out) const {
2017 print_condition(out, condition()); out->print(" ");
2018 in_opr1()->print(out); out->print(" ");
2019 in_opr2()->print(out); out->print(" ");
2020 in_opr3()->print(out); out->print(" ");
2021 in_opr4()->print(out); out->print(" ");
2022 result_opr()->print(out);
2023 }
2024
2025 void LIR_OpLock::print_instr(outputStream* out) const {
2026 hdr_opr()->print(out); out->print(" ");
2027 obj_opr()->print(out); out->print(" ");
2028 lock_opr()->print(out); out->print(" ");
2029 if (_scratch->is_valid()) {
2030 _scratch->print(out); out->print(" ");
2031 }
2032 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2033 }
2034
2035 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
2036 obj()->print(out); out->print(" ");
2037 result_opr()->print(out); out->print(" ");
2038 }
2039
2040 #ifdef ASSERT
2041 void LIR_OpAssert::print_instr(outputStream* out) const {
2042 print_condition(out, condition()); out->print(" ");
2043 in_opr1()->print(out); out->print(" ");
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