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src/hotspot/share/c1/c1_LIR.hpp

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 851 //  - every instruction has a result operand
 852 //  - every instruction has an CodeEmitInfo operand (can be revisited later)
 853 //  - every instruction has a LIR_OpCode operand
 854 //  - LIR_OpN, means an instruction that has N input operands
 855 //
 856 // class hierarchy:
 857 //
 858 class  LIR_Op;
 859 class    LIR_Op0;
 860 class      LIR_OpLabel;
 861 class    LIR_Op1;
 862 class      LIR_OpBranch;
 863 class      LIR_OpConvert;
 864 class      LIR_OpAllocObj;
 865 class      LIR_OpReturn;
 866 class      LIR_OpRoundFP;
 867 class    LIR_Op2;
 868 class    LIR_OpDelay;
 869 class    LIR_Op3;
 870 class      LIR_OpAllocArray;

 871 class    LIR_OpCall;
 872 class      LIR_OpJavaCall;
 873 class      LIR_OpRTCall;
 874 class    LIR_OpArrayCopy;
 875 class    LIR_OpUpdateCRC32;
 876 class    LIR_OpLock;
 877 class    LIR_OpTypeCheck;
 878 class    LIR_OpCompareAndSwap;
 879 class    LIR_OpProfileCall;
 880 class    LIR_OpProfileType;
 881 #ifdef ASSERT
 882 class    LIR_OpAssert;
 883 #endif
 884 
 885 // LIR operation codes
 886 enum LIR_Code {
 887     lir_none
 888   , begin_op0
 889       , lir_label
 890       , lir_nop

 894       , lir_breakpoint
 895       , lir_rtcall
 896       , lir_membar
 897       , lir_membar_acquire
 898       , lir_membar_release
 899       , lir_membar_loadload
 900       , lir_membar_storestore
 901       , lir_membar_loadstore
 902       , lir_membar_storeload
 903       , lir_get_thread
 904       , lir_on_spin_wait
 905   , end_op0
 906   , begin_op1
 907       , lir_fxch
 908       , lir_fld
 909       , lir_push
 910       , lir_pop
 911       , lir_null_check
 912       , lir_return
 913       , lir_leal
 914       , lir_branch
 915       , lir_cond_float_branch
 916       , lir_move
 917       , lir_convert
 918       , lir_alloc_object
 919       , lir_monaddr
 920       , lir_roundfp
 921       , lir_safepoint
 922       , lir_unwind
 923   , end_op1
 924   , begin_op2


 925       , lir_cmp
 926       , lir_cmp_l2i
 927       , lir_ucmp_fd2i
 928       , lir_cmp_fd2i
 929       , lir_cmove
 930       , lir_add
 931       , lir_sub
 932       , lir_mul
 933       , lir_div
 934       , lir_rem
 935       , lir_sqrt
 936       , lir_abs
 937       , lir_neg
 938       , lir_tan
 939       , lir_log10
 940       , lir_logic_and
 941       , lir_logic_or
 942       , lir_logic_xor
 943       , lir_shl
 944       , lir_shr
 945       , lir_ushr
 946       , lir_alloc_array
 947       , lir_throw
 948       , lir_xadd
 949       , lir_xchg
 950   , end_op2
 951   , begin_op3
 952       , lir_idiv
 953       , lir_irem
 954       , lir_fmad
 955       , lir_fmaf
 956   , end_op3



 957   , begin_opJavaCall
 958       , lir_static_call
 959       , lir_optvirtual_call
 960       , lir_icvirtual_call
 961       , lir_dynamic_call
 962   , end_opJavaCall
 963   , begin_opArrayCopy
 964       , lir_arraycopy
 965   , end_opArrayCopy
 966   , begin_opUpdateCRC32
 967       , lir_updatecrc32
 968   , end_opUpdateCRC32
 969   , begin_opLock
 970     , lir_lock
 971     , lir_unlock
 972   , end_opLock
 973   , begin_delay_slot
 974     , lir_delay_slot
 975   , end_delay_slot
 976   , begin_opTypeCheck

1108   virtual void print_instr(outputStream* out) const   = 0;
1109   virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1110 
1111   virtual bool is_patching() { return false; }
1112   virtual LIR_OpCall* as_OpCall() { return NULL; }
1113   virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1114   virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1115   virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1116   virtual LIR_OpLock* as_OpLock() { return NULL; }
1117   virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1118   virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1119   virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1120   virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1121   virtual LIR_OpReturn* as_OpReturn() { return NULL; }
1122   virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1123   virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1124   virtual LIR_Op0* as_Op0() { return NULL; }
1125   virtual LIR_Op1* as_Op1() { return NULL; }
1126   virtual LIR_Op2* as_Op2() { return NULL; }
1127   virtual LIR_Op3* as_Op3() { return NULL; }

1128   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1129   virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1130   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1131   virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1132   virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1133   virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1134 #ifdef ASSERT
1135   virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1136 #endif
1137 
1138   virtual void verify() const {}
1139 };
1140 
1141 // for calls
1142 class LIR_OpCall: public LIR_Op {
1143  friend class LIR_OpVisitState;
1144 
1145  protected:
1146   address      _addr;
1147   LIR_OprList* _arguments;

1380  friend class LIR_OpVisitState;
1381 
1382  private:
1383   LIR_Opr _tmp;
1384  public:
1385   LIR_OpRTCall(address addr, LIR_Opr tmp,
1386                LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1387     : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1388     , _tmp(tmp) {}
1389 
1390   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1391   virtual void emit_code(LIR_Assembler* masm);
1392   virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1393 
1394   LIR_Opr tmp() const                            { return _tmp; }
1395 
1396   virtual void verify() const;
1397 };
1398 
1399 
1400 class LIR_OpBranch: public LIR_Op {
1401  friend class LIR_OpVisitState;
1402 
1403  private:
1404   LIR_Condition _cond;
1405   Label*        _label;
1406   BlockBegin*   _block;  // if this is a branch to a block, this is the block
1407   BlockBegin*   _ublock; // if this is a float-branch, this is the unorderd block
1408   CodeStub*     _stub;   // if this is a branch to a stub, this is the stub
1409 
1410  public:
1411   LIR_OpBranch(LIR_Condition cond, Label* lbl)
1412     : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1413     , _cond(cond)
1414     , _label(lbl)
1415     , _block(NULL)
1416     , _ublock(NULL)
1417     , _stub(NULL) { }
1418 
1419   LIR_OpBranch(LIR_Condition cond, BlockBegin* block);
1420   LIR_OpBranch(LIR_Condition cond, CodeStub* stub);
1421 
1422   // for unordered comparisons
1423   LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock);
1424 
1425   LIR_Condition cond()        const              { return _cond;        }
1426   Label*        label()       const              { return _label;       }
1427   BlockBegin*   block()       const              { return _block;       }
1428   BlockBegin*   ublock()      const              { return _ublock;      }
1429   CodeStub*     stub()        const              { return _stub;       }
1430 
1431   void          change_block(BlockBegin* b);
1432   void          change_ublock(BlockBegin* b);
1433   void          negate_cond();
1434 
1435   virtual void emit_code(LIR_Assembler* masm);
1436   virtual LIR_OpBranch* as_OpBranch() { return this; }
1437   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1438 };
1439 
1440 class LIR_OpReturn: public LIR_Op1 {
1441  friend class LIR_OpVisitState;
1442 
1443  private:
1444   C1SafepointPollStub* _stub;
1445 
1446  public:
1447   LIR_OpReturn(LIR_Opr opr);
1448 
1449   C1SafepointPollStub* stub() const { return _stub; }
1450   virtual LIR_OpReturn* as_OpReturn() { return this; }
1451 };
1452 
1453 class ConversionStub;
1454 
1455 class LIR_OpConvert: public LIR_Op1 {
1456  friend class LIR_OpVisitState;
1457 
1458  private:

1592 // LIR_Op2
1593 class LIR_Op2: public LIR_Op {
1594  friend class LIR_OpVisitState;
1595 
1596   int  _fpu_stack_size; // for sin/cos implementation on Intel
1597 
1598  protected:
1599   LIR_Opr   _opr1;
1600   LIR_Opr   _opr2;
1601   BasicType _type;
1602   LIR_Opr   _tmp1;
1603   LIR_Opr   _tmp2;
1604   LIR_Opr   _tmp3;
1605   LIR_Opr   _tmp4;
1606   LIR_Opr   _tmp5;
1607   LIR_Condition _condition;
1608 
1609   void verify() const;
1610 
1611  public:
1612   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1613     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1614     , _fpu_stack_size(0)
1615     , _opr1(opr1)
1616     , _opr2(opr2)
1617     , _type(T_ILLEGAL)
1618     , _tmp1(LIR_OprFact::illegalOpr)
1619     , _tmp2(LIR_OprFact::illegalOpr)
1620     , _tmp3(LIR_OprFact::illegalOpr)
1621     , _tmp4(LIR_OprFact::illegalOpr)
1622     , _tmp5(LIR_OprFact::illegalOpr)
1623     , _condition(condition) {
1624     assert(code == lir_cmp || code == lir_assert, "code check");
1625   }
1626 
1627   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1628     : LIR_Op(code, result, NULL)
1629     , _fpu_stack_size(0)
1630     , _opr1(opr1)
1631     , _opr2(opr2)
1632     , _type(type)
1633     , _tmp1(LIR_OprFact::illegalOpr)
1634     , _tmp2(LIR_OprFact::illegalOpr)
1635     , _tmp3(LIR_OprFact::illegalOpr)
1636     , _tmp4(LIR_OprFact::illegalOpr)
1637     , _tmp5(LIR_OprFact::illegalOpr)
1638     , _condition(condition) {
1639     assert(code == lir_cmove, "code check");
1640     assert(type != T_ILLEGAL, "cmove should have type");
1641   }
1642 
1643   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1644           CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1645     : LIR_Op(code, result, info)
1646     , _fpu_stack_size(0)
1647     , _opr1(opr1)
1648     , _opr2(opr2)
1649     , _type(type)
1650     , _tmp1(LIR_OprFact::illegalOpr)
1651     , _tmp2(LIR_OprFact::illegalOpr)
1652     , _tmp3(LIR_OprFact::illegalOpr)
1653     , _tmp4(LIR_OprFact::illegalOpr)
1654     , _tmp5(LIR_OprFact::illegalOpr)
1655     , _condition(lir_cond_unknown) {
1656     assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1657   }
1658 
1659   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1660           LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1661     : LIR_Op(code, result, NULL)
1662     , _fpu_stack_size(0)
1663     , _opr1(opr1)
1664     , _opr2(opr2)
1665     , _type(T_ILLEGAL)
1666     , _tmp1(tmp1)
1667     , _tmp2(tmp2)
1668     , _tmp3(tmp3)
1669     , _tmp4(tmp4)
1670     , _tmp5(tmp5)
1671     , _condition(lir_cond_unknown) {
1672     assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1673   }
1674 
1675   LIR_Opr in_opr1() const                        { return _opr1; }
1676   LIR_Opr in_opr2() const                        { return _opr2; }
1677   BasicType type()  const                        { return _type; }
1678   LIR_Opr tmp1_opr() const                       { return _tmp1; }
1679   LIR_Opr tmp2_opr() const                       { return _tmp2; }
1680   LIR_Opr tmp3_opr() const                       { return _tmp3; }
1681   LIR_Opr tmp4_opr() const                       { return _tmp4; }
1682   LIR_Opr tmp5_opr() const                       { return _tmp5; }
1683   LIR_Condition condition() const  {
1684     assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1685   }
1686   void set_condition(LIR_Condition condition) {
1687     assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove");  _condition = condition;
1688   }
1689 
1690   void set_fpu_stack_size(int size)              { _fpu_stack_size = size; }
1691   int  fpu_stack_size() const                    { return _fpu_stack_size; }
1692 
1693   void set_in_opr1(LIR_Opr opr)                  { _opr1 = opr; }
1694   void set_in_opr2(LIR_Opr opr)                  { _opr2 = opr; }
1695 
1696   virtual void emit_code(LIR_Assembler* masm);
1697   virtual LIR_Op2* as_Op2() { return this; }
1698   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1699 };
1700 













































1701 class LIR_OpAllocArray : public LIR_Op {
1702  friend class LIR_OpVisitState;
1703 
1704  private:
1705   LIR_Opr   _klass;
1706   LIR_Opr   _len;
1707   LIR_Opr   _tmp1;
1708   LIR_Opr   _tmp2;
1709   LIR_Opr   _tmp3;
1710   LIR_Opr   _tmp4;
1711   BasicType _type;
1712   CodeStub* _stub;
1713 
1714  public:
1715   LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1716     : LIR_Op(lir_alloc_array, result, NULL)
1717     , _klass(klass)
1718     , _len(len)
1719     , _tmp1(t1)
1720     , _tmp2(t2)

1744 
1745  private:
1746   LIR_Opr _opr1;
1747   LIR_Opr _opr2;
1748   LIR_Opr _opr3;
1749  public:
1750   LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1751     : LIR_Op(code, result, info)
1752     , _opr1(opr1)
1753     , _opr2(opr2)
1754     , _opr3(opr3)                                { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1755   LIR_Opr in_opr1() const                        { return _opr1; }
1756   LIR_Opr in_opr2() const                        { return _opr2; }
1757   LIR_Opr in_opr3() const                        { return _opr3; }
1758 
1759   virtual void emit_code(LIR_Assembler* masm);
1760   virtual LIR_Op3* as_Op3() { return this; }
1761   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1762 };
1763 

























































1764 
1765 //--------------------------------
1766 class LabelObj: public CompilationResourceObj {
1767  private:
1768   Label _label;
1769  public:
1770   LabelObj()                                     {}
1771   Label* label()                                 { return &_label; }
1772 };
1773 
1774 
1775 class LIR_OpLock: public LIR_Op {
1776  friend class LIR_OpVisitState;
1777 
1778  private:
1779   LIR_Opr _hdr;
1780   LIR_Opr _obj;
1781   LIR_Opr _lock;
1782   LIR_Opr _scratch;
1783   CodeStub* _stub;

1966 //--------------------------------LIR_List---------------------------------------------------
1967 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1968 // The LIR instructions are appended by the LIR_List class itself;
1969 //
1970 // Notes:
1971 // - all offsets are(should be) in bytes
1972 // - local positions are specified with an offset, with offset 0 being local 0
1973 
1974 class LIR_List: public CompilationResourceObj {
1975  private:
1976   LIR_OpList  _operations;
1977 
1978   Compilation*  _compilation;
1979 #ifndef PRODUCT
1980   BlockBegin*   _block;
1981 #endif
1982 #ifdef ASSERT
1983   const char *  _file;
1984   int           _line;
1985 #endif




1986 
1987  public:
1988   void append(LIR_Op* op) {
1989     if (op->source() == NULL)
1990       op->set_source(_compilation->current_instruction());
1991 #ifndef PRODUCT
1992     if (PrintIRWithLIR) {
1993       _compilation->maybe_print_current_instruction();
1994       op->print(); tty->cr();
1995     }
1996 #endif // PRODUCT
1997 















1998     _operations.append(op);
1999 
2000 #ifdef ASSERT
2001     op->verify();
2002     op->set_file_and_line(_file, _line);
2003     _file = NULL;
2004     _line = 0;
2005 #endif
2006   }
2007 
2008   LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2009 
2010 #ifdef ASSERT
2011   void set_file_and_line(const char * file, int line);
2012 #endif
2013 







2014   //---------- accessors ---------------
2015   LIR_OpList* instructions_list()                { return &_operations; }
2016   int         length() const                     { return _operations.length(); }
2017   LIR_Op*     at(int i) const                    { return _operations.at(i); }
2018 
2019   NOT_PRODUCT(BlockBegin* block() const          { return _block; });
2020 
2021   // insert LIR_Ops in buffer to right places in LIR_List
2022   void append(LIR_InsertionBuffer* buffer);
2023 
2024   //---------- mutators ---------------
2025   void insert_before(int i, LIR_List* op_list)   { _operations.insert_before(i, op_list->instructions_list()); }
2026   void insert_before(int i, LIR_Op* op)          { _operations.insert_before(i, op); }
2027   void remove_at(int i)                          { _operations.remove_at(i); }
2028 
2029   //---------- printing -------------
2030   void print_instructions() PRODUCT_RETURN;
2031 
2032 
2033   //---------- instructions -------------

2101   void return_op(LIR_Opr result)                   { append(new LIR_OpReturn(result)); }
2102 
2103   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2104 
2105   void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
2106   void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
2107   void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
2108 
2109   void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2110   void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2111     append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2112   }
2113   void unwind_exception(LIR_Opr exceptionOop) {
2114     append(new LIR_Op1(lir_unwind, exceptionOop));
2115   }
2116 
2117   void push(LIR_Opr opr)                                   { append(new LIR_Op1(lir_push, opr)); }
2118   void pop(LIR_Opr reg)                                    { append(new LIR_Op1(lir_pop,  reg)); }
2119 
2120   void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {



2121     append(new LIR_Op2(lir_cmp, condition, left, right, info));

2122   }
2123   void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2124     cmp(condition, left, LIR_OprFact::intConst(right), info);
2125   }
2126 
2127   void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2128   void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2129 
2130   void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2131     append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));

2132   }
2133 
2134   void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2135                 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2136   void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2137                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2138   void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2139                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2140 
2141   void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2142   void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr)              { append(new LIR_Op2(lir_neg, from, tmp, to)); }
2143   void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2144   void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
2145   void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2146   void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)              { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2147   void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2148 
2149   void add (LIR_Opr left, LIR_Opr right, LIR_Opr res)      { append(new LIR_Op2(lir_add, left, right, res)); }
2150   void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2151   void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }

 851 //  - every instruction has a result operand
 852 //  - every instruction has an CodeEmitInfo operand (can be revisited later)
 853 //  - every instruction has a LIR_OpCode operand
 854 //  - LIR_OpN, means an instruction that has N input operands
 855 //
 856 // class hierarchy:
 857 //
 858 class  LIR_Op;
 859 class    LIR_Op0;
 860 class      LIR_OpLabel;
 861 class    LIR_Op1;
 862 class      LIR_OpBranch;
 863 class      LIR_OpConvert;
 864 class      LIR_OpAllocObj;
 865 class      LIR_OpReturn;
 866 class      LIR_OpRoundFP;
 867 class    LIR_Op2;
 868 class    LIR_OpDelay;
 869 class    LIR_Op3;
 870 class      LIR_OpAllocArray;
 871 class    LIR_Op4;
 872 class    LIR_OpCall;
 873 class      LIR_OpJavaCall;
 874 class      LIR_OpRTCall;
 875 class    LIR_OpArrayCopy;
 876 class    LIR_OpUpdateCRC32;
 877 class    LIR_OpLock;
 878 class    LIR_OpTypeCheck;
 879 class    LIR_OpCompareAndSwap;
 880 class    LIR_OpProfileCall;
 881 class    LIR_OpProfileType;
 882 #ifdef ASSERT
 883 class    LIR_OpAssert;
 884 #endif
 885 
 886 // LIR operation codes
 887 enum LIR_Code {
 888     lir_none
 889   , begin_op0
 890       , lir_label
 891       , lir_nop

 895       , lir_breakpoint
 896       , lir_rtcall
 897       , lir_membar
 898       , lir_membar_acquire
 899       , lir_membar_release
 900       , lir_membar_loadload
 901       , lir_membar_storestore
 902       , lir_membar_loadstore
 903       , lir_membar_storeload
 904       , lir_get_thread
 905       , lir_on_spin_wait
 906   , end_op0
 907   , begin_op1
 908       , lir_fxch
 909       , lir_fld
 910       , lir_push
 911       , lir_pop
 912       , lir_null_check
 913       , lir_return
 914       , lir_leal


 915       , lir_move
 916       , lir_convert
 917       , lir_alloc_object
 918       , lir_monaddr
 919       , lir_roundfp
 920       , lir_safepoint
 921       , lir_unwind
 922   , end_op1
 923   , begin_op2
 924       , lir_branch
 925       , lir_cond_float_branch
 926       , lir_cmp
 927       , lir_cmp_l2i
 928       , lir_ucmp_fd2i
 929       , lir_cmp_fd2i

 930       , lir_add
 931       , lir_sub
 932       , lir_mul
 933       , lir_div
 934       , lir_rem
 935       , lir_sqrt
 936       , lir_abs
 937       , lir_neg
 938       , lir_tan
 939       , lir_log10
 940       , lir_logic_and
 941       , lir_logic_or
 942       , lir_logic_xor
 943       , lir_shl
 944       , lir_shr
 945       , lir_ushr
 946       , lir_alloc_array
 947       , lir_throw
 948       , lir_xadd
 949       , lir_xchg
 950   , end_op2
 951   , begin_op3
 952       , lir_idiv
 953       , lir_irem
 954       , lir_fmad
 955       , lir_fmaf
 956   , end_op3
 957   , begin_op4
 958       , lir_cmove
 959   , end_op4
 960   , begin_opJavaCall
 961       , lir_static_call
 962       , lir_optvirtual_call
 963       , lir_icvirtual_call
 964       , lir_dynamic_call
 965   , end_opJavaCall
 966   , begin_opArrayCopy
 967       , lir_arraycopy
 968   , end_opArrayCopy
 969   , begin_opUpdateCRC32
 970       , lir_updatecrc32
 971   , end_opUpdateCRC32
 972   , begin_opLock
 973     , lir_lock
 974     , lir_unlock
 975   , end_opLock
 976   , begin_delay_slot
 977     , lir_delay_slot
 978   , end_delay_slot
 979   , begin_opTypeCheck

1111   virtual void print_instr(outputStream* out) const   = 0;
1112   virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1113 
1114   virtual bool is_patching() { return false; }
1115   virtual LIR_OpCall* as_OpCall() { return NULL; }
1116   virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1117   virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1118   virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1119   virtual LIR_OpLock* as_OpLock() { return NULL; }
1120   virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1121   virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1122   virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1123   virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1124   virtual LIR_OpReturn* as_OpReturn() { return NULL; }
1125   virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1126   virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1127   virtual LIR_Op0* as_Op0() { return NULL; }
1128   virtual LIR_Op1* as_Op1() { return NULL; }
1129   virtual LIR_Op2* as_Op2() { return NULL; }
1130   virtual LIR_Op3* as_Op3() { return NULL; }
1131   virtual LIR_Op4* as_Op4() { return NULL; }
1132   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1133   virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1134   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1135   virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1136   virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1137   virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1138 #ifdef ASSERT
1139   virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1140 #endif
1141 
1142   virtual void verify() const {}
1143 };
1144 
1145 // for calls
1146 class LIR_OpCall: public LIR_Op {
1147  friend class LIR_OpVisitState;
1148 
1149  protected:
1150   address      _addr;
1151   LIR_OprList* _arguments;

1384  friend class LIR_OpVisitState;
1385 
1386  private:
1387   LIR_Opr _tmp;
1388  public:
1389   LIR_OpRTCall(address addr, LIR_Opr tmp,
1390                LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1391     : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1392     , _tmp(tmp) {}
1393 
1394   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1395   virtual void emit_code(LIR_Assembler* masm);
1396   virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1397 
1398   LIR_Opr tmp() const                            { return _tmp; }
1399 
1400   virtual void verify() const;
1401 };
1402 
1403 







































1404 
1405 class LIR_OpReturn: public LIR_Op1 {
1406  friend class LIR_OpVisitState;
1407 
1408  private:
1409   C1SafepointPollStub* _stub;
1410 
1411  public:
1412   LIR_OpReturn(LIR_Opr opr);
1413 
1414   C1SafepointPollStub* stub() const { return _stub; }
1415   virtual LIR_OpReturn* as_OpReturn() { return this; }
1416 };
1417 
1418 class ConversionStub;
1419 
1420 class LIR_OpConvert: public LIR_Op1 {
1421  friend class LIR_OpVisitState;
1422 
1423  private:

1557 // LIR_Op2
1558 class LIR_Op2: public LIR_Op {
1559  friend class LIR_OpVisitState;
1560 
1561   int  _fpu_stack_size; // for sin/cos implementation on Intel
1562 
1563  protected:
1564   LIR_Opr   _opr1;
1565   LIR_Opr   _opr2;
1566   BasicType _type;
1567   LIR_Opr   _tmp1;
1568   LIR_Opr   _tmp2;
1569   LIR_Opr   _tmp3;
1570   LIR_Opr   _tmp4;
1571   LIR_Opr   _tmp5;
1572   LIR_Condition _condition;
1573 
1574   void verify() const;
1575 
1576  public:
1577   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1578     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1579     , _fpu_stack_size(0)
1580     , _opr1(opr1)
1581     , _opr2(opr2)
1582     , _type(type)
1583     , _tmp1(LIR_OprFact::illegalOpr)
1584     , _tmp2(LIR_OprFact::illegalOpr)
1585     , _tmp3(LIR_OprFact::illegalOpr)
1586     , _tmp4(LIR_OprFact::illegalOpr)
1587     , _tmp5(LIR_OprFact::illegalOpr)
1588     , _condition(condition) {
1589     assert(code == lir_cmp || code == lir_branch || code == lir_cond_float_branch || code == lir_assert, "code check");
1590   }
1591 
1592   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1593     : LIR_Op(code, result, NULL)
1594     , _fpu_stack_size(0)
1595     , _opr1(opr1)
1596     , _opr2(opr2)
1597     , _type(type)
1598     , _tmp1(LIR_OprFact::illegalOpr)
1599     , _tmp2(LIR_OprFact::illegalOpr)
1600     , _tmp3(LIR_OprFact::illegalOpr)
1601     , _tmp4(LIR_OprFact::illegalOpr)
1602     , _tmp5(LIR_OprFact::illegalOpr)
1603     , _condition(condition) {
1604     assert(code == lir_cmove, "code check");
1605     assert(type != T_ILLEGAL, "cmove should have type");
1606   }
1607 
1608   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1609           CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1610     : LIR_Op(code, result, info)
1611     , _fpu_stack_size(0)
1612     , _opr1(opr1)
1613     , _opr2(opr2)
1614     , _type(type)
1615     , _tmp1(LIR_OprFact::illegalOpr)
1616     , _tmp2(LIR_OprFact::illegalOpr)
1617     , _tmp3(LIR_OprFact::illegalOpr)
1618     , _tmp4(LIR_OprFact::illegalOpr)
1619     , _tmp5(LIR_OprFact::illegalOpr)
1620     , _condition(lir_cond_unknown) {
1621     assert(code != lir_cmp && code != lir_branch && code != lir_cond_float_branch && is_in_range(code, begin_op2, end_op2), "code check");
1622   }
1623 
1624   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1625           LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1626     : LIR_Op(code, result, NULL)
1627     , _fpu_stack_size(0)
1628     , _opr1(opr1)
1629     , _opr2(opr2)
1630     , _type(T_ILLEGAL)
1631     , _tmp1(tmp1)
1632     , _tmp2(tmp2)
1633     , _tmp3(tmp3)
1634     , _tmp4(tmp4)
1635     , _tmp5(tmp5)
1636     , _condition(lir_cond_unknown) {
1637     assert(code != lir_cmp && code != lir_branch && code != lir_cond_float_branch && is_in_range(code, begin_op2, end_op2), "code check");
1638   }
1639 
1640   LIR_Opr in_opr1() const                        { return _opr1; }
1641   LIR_Opr in_opr2() const                        { return _opr2; }
1642   BasicType type()  const                        { return _type; }
1643   LIR_Opr tmp1_opr() const                       { return _tmp1; }
1644   LIR_Opr tmp2_opr() const                       { return _tmp2; }
1645   LIR_Opr tmp3_opr() const                       { return _tmp3; }
1646   LIR_Opr tmp4_opr() const                       { return _tmp4; }
1647   LIR_Opr tmp5_opr() const                       { return _tmp5; }
1648   LIR_Condition condition() const  {
1649     assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch || code() == lir_assert, "only valid for branch and assert"); return _condition;
1650   }
1651   void set_condition(LIR_Condition condition) {
1652     assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch, "only valid for branch"); _condition = condition;
1653   }
1654 
1655   void set_fpu_stack_size(int size)              { _fpu_stack_size = size; }
1656   int  fpu_stack_size() const                    { return _fpu_stack_size; }
1657 
1658   void set_in_opr1(LIR_Opr opr)                  { _opr1 = opr; }
1659   void set_in_opr2(LIR_Opr opr)                  { _opr2 = opr; }
1660 
1661   virtual void emit_code(LIR_Assembler* masm);
1662   virtual LIR_Op2* as_Op2() { return this; }
1663   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1664 };
1665 
1666 class LIR_OpBranch: public LIR_Op2 {
1667  friend class LIR_OpVisitState;
1668 
1669  private:
1670   Label*        _label;
1671   BlockBegin*   _block;  // if this is a branch to a block, this is the block
1672   BlockBegin*   _ublock; // if this is a float-branch, this is the unorderd block
1673   CodeStub*     _stub;   // if this is a branch to a stub, this is the stub
1674 
1675  public:
1676   LIR_OpBranch(LIR_Condition cond, Label* lbl)
1677     : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1678     , _label(lbl)
1679     , _block(NULL)
1680     , _ublock(NULL)
1681     , _stub(NULL) { }
1682 
1683   LIR_OpBranch(LIR_Condition cond, BlockBegin* block);
1684   LIR_OpBranch(LIR_Condition cond, CodeStub* stub);
1685 
1686   // for unordered comparisons
1687   LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock);
1688 
1689   LIR_Condition cond() const {
1690     return condition();
1691   }
1692 
1693   void set_cond(LIR_Condition cond) {
1694     set_condition(cond);
1695   }
1696 
1697   Label*        label()       const              { return _label;       }
1698   BlockBegin*   block()       const              { return _block;       }
1699   BlockBegin*   ublock()      const              { return _ublock;      }
1700   CodeStub*     stub()        const              { return _stub;        }
1701 
1702   void          change_block(BlockBegin* b);
1703   void          change_ublock(BlockBegin* b);
1704   void          negate_cond();
1705 
1706   virtual void emit_code(LIR_Assembler* masm);
1707   virtual LIR_OpBranch* as_OpBranch() { return this; }
1708   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1709 };
1710 
1711 class LIR_OpAllocArray : public LIR_Op {
1712  friend class LIR_OpVisitState;
1713 
1714  private:
1715   LIR_Opr   _klass;
1716   LIR_Opr   _len;
1717   LIR_Opr   _tmp1;
1718   LIR_Opr   _tmp2;
1719   LIR_Opr   _tmp3;
1720   LIR_Opr   _tmp4;
1721   BasicType _type;
1722   CodeStub* _stub;
1723 
1724  public:
1725   LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1726     : LIR_Op(lir_alloc_array, result, NULL)
1727     , _klass(klass)
1728     , _len(len)
1729     , _tmp1(t1)
1730     , _tmp2(t2)

1754 
1755  private:
1756   LIR_Opr _opr1;
1757   LIR_Opr _opr2;
1758   LIR_Opr _opr3;
1759  public:
1760   LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1761     : LIR_Op(code, result, info)
1762     , _opr1(opr1)
1763     , _opr2(opr2)
1764     , _opr3(opr3)                                { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1765   LIR_Opr in_opr1() const                        { return _opr1; }
1766   LIR_Opr in_opr2() const                        { return _opr2; }
1767   LIR_Opr in_opr3() const                        { return _opr3; }
1768 
1769   virtual void emit_code(LIR_Assembler* masm);
1770   virtual LIR_Op3* as_Op3() { return this; }
1771   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1772 };
1773 
1774 class LIR_Op4: public LIR_Op {
1775   friend class LIR_OpVisitState;
1776  protected:
1777   LIR_Opr   _opr1;
1778   LIR_Opr   _opr2;
1779   LIR_Opr   _opr3;
1780   LIR_Opr   _opr4;
1781   BasicType _type;
1782   LIR_Opr   _tmp1;
1783   LIR_Opr   _tmp2;
1784   LIR_Opr   _tmp3;
1785   LIR_Opr   _tmp4;
1786   LIR_Opr   _tmp5;
1787   LIR_Condition _condition;
1788 
1789  public:
1790   LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4,
1791           LIR_Opr result, BasicType type)
1792     : LIR_Op(code, result, NULL)
1793     , _opr1(opr1)
1794     , _opr2(opr2)
1795     , _opr3(opr3)
1796     , _opr4(opr4)
1797     , _type(type)
1798     , _tmp1(LIR_OprFact::illegalOpr)
1799     , _tmp2(LIR_OprFact::illegalOpr)
1800     , _tmp3(LIR_OprFact::illegalOpr)
1801     , _tmp4(LIR_OprFact::illegalOpr)
1802     , _tmp5(LIR_OprFact::illegalOpr)
1803     , _condition(condition) {
1804     assert(code == lir_cmove, "code check");
1805     assert(type != T_ILLEGAL, "cmove should have type");
1806   }
1807 
1808   LIR_Opr in_opr1() const                        { return _opr1; }
1809   LIR_Opr in_opr2() const                        { return _opr2; }
1810   LIR_Opr in_opr3() const                        { return _opr3; }
1811   LIR_Opr in_opr4() const                        { return _opr4; }
1812   BasicType type()  const                        { return _type; }
1813   LIR_Opr tmp1_opr() const                       { return _tmp1; }
1814   LIR_Opr tmp2_opr() const                       { return _tmp2; }
1815   LIR_Opr tmp3_opr() const                       { return _tmp3; }
1816   LIR_Opr tmp4_opr() const                       { return _tmp4; }
1817   LIR_Opr tmp5_opr() const                       { return _tmp5; }
1818 
1819   LIR_Condition condition() const                { return _condition; }
1820   void set_condition(LIR_Condition condition)    { _condition = condition; }
1821 
1822   void set_in_opr1(LIR_Opr opr)                  { _opr1 = opr; }
1823   void set_in_opr2(LIR_Opr opr)                  { _opr2 = opr; }
1824   void set_in_opr3(LIR_Opr opr)                  { _opr3 = opr; }
1825   void set_in_opr4(LIR_Opr opr)                  { _opr4 = opr; }
1826   virtual void emit_code(LIR_Assembler* masm);
1827   virtual LIR_Op4* as_Op4() { return this; }
1828 
1829   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1830 };
1831 
1832 //--------------------------------
1833 class LabelObj: public CompilationResourceObj {
1834  private:
1835   Label _label;
1836  public:
1837   LabelObj()                                     {}
1838   Label* label()                                 { return &_label; }
1839 };
1840 
1841 
1842 class LIR_OpLock: public LIR_Op {
1843  friend class LIR_OpVisitState;
1844 
1845  private:
1846   LIR_Opr _hdr;
1847   LIR_Opr _obj;
1848   LIR_Opr _lock;
1849   LIR_Opr _scratch;
1850   CodeStub* _stub;

2033 //--------------------------------LIR_List---------------------------------------------------
2034 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2035 // The LIR instructions are appended by the LIR_List class itself;
2036 //
2037 // Notes:
2038 // - all offsets are(should be) in bytes
2039 // - local positions are specified with an offset, with offset 0 being local 0
2040 
2041 class LIR_List: public CompilationResourceObj {
2042  private:
2043   LIR_OpList  _operations;
2044 
2045   Compilation*  _compilation;
2046 #ifndef PRODUCT
2047   BlockBegin*   _block;
2048 #endif
2049 #ifdef ASSERT
2050   const char *  _file;
2051   int           _line;
2052 #endif
2053 #ifdef RISCV
2054   LIR_Opr       _cmp_opr1;
2055   LIR_Opr       _cmp_opr2;
2056 #endif
2057 
2058  public:
2059   void append(LIR_Op* op) {
2060     if (op->source() == NULL)
2061       op->set_source(_compilation->current_instruction());
2062 #ifndef PRODUCT
2063     if (PrintIRWithLIR) {
2064       _compilation->maybe_print_current_instruction();
2065       op->print(); tty->cr();
2066     }
2067 #endif // PRODUCT
2068 
2069 #ifdef RISCV
2070     if (op->code() == lir_branch || op->code() == lir_cond_float_branch) {
2071       assert(op->as_OpBranch()->cond() == lir_cond_always ||
2072             (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr),
2073             "conditional branches must have legal operands");
2074       if (op->as_OpBranch()->cond() != lir_cond_always) {
2075         op->as_Op2()->set_in_opr1(_cmp_opr1);
2076         op->as_Op2()->set_in_opr2(_cmp_opr2);
2077       }
2078     } else if (op->code() == lir_cmove) {
2079       op->as_Op4()->set_in_opr3(_cmp_opr1);
2080       op->as_Op4()->set_in_opr4(_cmp_opr2);
2081     }
2082 #endif
2083 
2084     _operations.append(op);
2085 
2086 #ifdef ASSERT
2087     op->verify();
2088     op->set_file_and_line(_file, _line);
2089     _file = NULL;
2090     _line = 0;
2091 #endif
2092   }
2093 
2094   LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2095 
2096 #ifdef ASSERT
2097   void set_file_and_line(const char * file, int line);
2098 #endif
2099 
2100 #ifdef RISCV
2101   void set_cmp_oprs(LIR_Opr opr1, LIR_Opr opr2) {
2102     _cmp_opr1 = opr1;
2103     _cmp_opr2 = opr2;
2104   }
2105 #endif
2106 
2107   //---------- accessors ---------------
2108   LIR_OpList* instructions_list()                { return &_operations; }
2109   int         length() const                     { return _operations.length(); }
2110   LIR_Op*     at(int i) const                    { return _operations.at(i); }
2111 
2112   NOT_PRODUCT(BlockBegin* block() const          { return _block; });
2113 
2114   // insert LIR_Ops in buffer to right places in LIR_List
2115   void append(LIR_InsertionBuffer* buffer);
2116 
2117   //---------- mutators ---------------
2118   void insert_before(int i, LIR_List* op_list)   { _operations.insert_before(i, op_list->instructions_list()); }
2119   void insert_before(int i, LIR_Op* op)          { _operations.insert_before(i, op); }
2120   void remove_at(int i)                          { _operations.remove_at(i); }
2121 
2122   //---------- printing -------------
2123   void print_instructions() PRODUCT_RETURN;
2124 
2125 
2126   //---------- instructions -------------

2194   void return_op(LIR_Opr result)                   { append(new LIR_OpReturn(result)); }
2195 
2196   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2197 
2198   void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
2199   void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
2200   void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
2201 
2202   void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2203   void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2204     append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2205   }
2206   void unwind_exception(LIR_Opr exceptionOop) {
2207     append(new LIR_Op1(lir_unwind, exceptionOop));
2208   }
2209 
2210   void push(LIR_Opr opr)                                   { append(new LIR_Op1(lir_push, opr)); }
2211   void pop(LIR_Opr reg)                                    { append(new LIR_Op1(lir_pop,  reg)); }
2212 
2213   void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2214 #ifdef RISCV
2215     set_cmp_oprs(left, right);
2216 #else
2217     append(new LIR_Op2(lir_cmp, condition, left, right, info));
2218 #endif
2219   }
2220   void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2221     cmp(condition, left, LIR_OprFact::intConst(right), info);
2222   }
2223 
2224   void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2225   void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2226 
2227   void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type,
2228              LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr) {
2229     append(new LIR_Op4(lir_cmove, condition, src1, src2, cmp_opr1, cmp_opr2, dst, type));
2230   }
2231 
2232   void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2233                 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2234   void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2235                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2236   void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2237                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2238 
2239   void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2240   void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr)              { append(new LIR_Op2(lir_neg, from, tmp, to)); }
2241   void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2242   void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
2243   void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2244   void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)              { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2245   void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2246 
2247   void add (LIR_Opr left, LIR_Opr right, LIR_Opr res)      { append(new LIR_Op2(lir_add, left, right, res)); }
2248   void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2249   void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
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