870 // - every instruction has a result operand
871 // - every instruction has an CodeEmitInfo operand (can be revisited later)
872 // - every instruction has a LIR_OpCode operand
873 // - LIR_OpN, means an instruction that has N input operands
874 //
875 // class hierarchy:
876 //
877 class LIR_Op;
878 class LIR_Op0;
879 class LIR_OpLabel;
880 class LIR_Op1;
881 class LIR_OpBranch;
882 class LIR_OpConvert;
883 class LIR_OpAllocObj;
884 class LIR_OpReturn;
885 class LIR_OpRoundFP;
886 class LIR_Op2;
887 class LIR_OpDelay;
888 class LIR_Op3;
889 class LIR_OpAllocArray;
890 class LIR_OpCall;
891 class LIR_OpJavaCall;
892 class LIR_OpRTCall;
893 class LIR_OpArrayCopy;
894 class LIR_OpUpdateCRC32;
895 class LIR_OpLock;
896 class LIR_OpTypeCheck;
897 class LIR_OpCompareAndSwap;
898 class LIR_OpLoadKlass;
899 class LIR_OpProfileCall;
900 class LIR_OpProfileType;
901 #ifdef ASSERT
902 class LIR_OpAssert;
903 #endif
904
905 // LIR operation codes
906 enum LIR_Code {
907 lir_none
908 , begin_op0
909 , lir_label
914 , lir_breakpoint
915 , lir_rtcall
916 , lir_membar
917 , lir_membar_acquire
918 , lir_membar_release
919 , lir_membar_loadload
920 , lir_membar_storestore
921 , lir_membar_loadstore
922 , lir_membar_storeload
923 , lir_get_thread
924 , lir_on_spin_wait
925 , end_op0
926 , begin_op1
927 , lir_fxch
928 , lir_fld
929 , lir_push
930 , lir_pop
931 , lir_null_check
932 , lir_return
933 , lir_leal
934 , lir_branch
935 , lir_cond_float_branch
936 , lir_move
937 , lir_convert
938 , lir_alloc_object
939 , lir_monaddr
940 , lir_roundfp
941 , lir_safepoint
942 , lir_unwind
943 , lir_load_klass
944 , end_op1
945 , begin_op2
946 , lir_cmp
947 , lir_cmp_l2i
948 , lir_ucmp_fd2i
949 , lir_cmp_fd2i
950 , lir_cmove
951 , lir_add
952 , lir_sub
953 , lir_mul
954 , lir_div
955 , lir_rem
956 , lir_sqrt
957 , lir_abs
958 , lir_neg
959 , lir_tan
960 , lir_log10
961 , lir_logic_and
962 , lir_logic_or
963 , lir_logic_xor
964 , lir_shl
965 , lir_shr
966 , lir_ushr
967 , lir_alloc_array
968 , lir_throw
969 , lir_xadd
970 , lir_xchg
971 , end_op2
972 , begin_op3
973 , lir_idiv
974 , lir_irem
975 , lir_fmad
976 , lir_fmaf
977 , end_op3
978 , begin_opJavaCall
979 , lir_static_call
980 , lir_optvirtual_call
981 , lir_icvirtual_call
982 , lir_dynamic_call
983 , end_opJavaCall
984 , begin_opArrayCopy
985 , lir_arraycopy
986 , end_opArrayCopy
987 , begin_opUpdateCRC32
988 , lir_updatecrc32
989 , end_opUpdateCRC32
990 , begin_opLock
991 , lir_lock
992 , lir_unlock
993 , end_opLock
994 , begin_delay_slot
995 , lir_delay_slot
996 , end_delay_slot
997 , begin_opTypeCheck
998 , lir_instanceof
999 , lir_checkcast
1000 , lir_store_check
1001 , end_opTypeCheck
1002 , begin_opCompareAndSwap
1003 , lir_cas_long
1004 , lir_cas_obj
1005 , lir_cas_int
1006 , end_opCompareAndSwap
1007 , begin_opMDOProfile
1008 , lir_profile_call
1009 , lir_profile_type
1010 , end_opMDOProfile
1011 , begin_opAssert
1012 , lir_assert
1013 , end_opAssert
1014 };
1015
1016
1017 enum LIR_Condition {
1018 lir_cond_equal
1019 , lir_cond_notEqual
1020 , lir_cond_less
1021 , lir_cond_lessEqual
1022 , lir_cond_greaterEqual
1023 , lir_cond_greater
1024 , lir_cond_belowEqual
1025 , lir_cond_aboveEqual
1026 , lir_cond_always
1027 , lir_cond_unknown = -1
1028 };
1029
1030
1031 enum LIR_PatchCode {
1032 lir_patch_none,
1033 lir_patch_low,
1129 virtual void print_instr(outputStream* out) const = 0;
1130 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1131
1132 virtual bool is_patching() { return false; }
1133 virtual LIR_OpCall* as_OpCall() { return NULL; }
1134 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1135 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1136 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1137 virtual LIR_OpLock* as_OpLock() { return NULL; }
1138 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1139 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1140 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1141 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1142 virtual LIR_OpReturn* as_OpReturn() { return NULL; }
1143 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1144 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1145 virtual LIR_Op0* as_Op0() { return NULL; }
1146 virtual LIR_Op1* as_Op1() { return NULL; }
1147 virtual LIR_Op2* as_Op2() { return NULL; }
1148 virtual LIR_Op3* as_Op3() { return NULL; }
1149 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1150 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1151 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1152 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1153 virtual LIR_OpLoadKlass* as_OpLoadKlass() { return NULL; }
1154 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1155 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1156 #ifdef ASSERT
1157 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1158 #endif
1159
1160 virtual void verify() const {}
1161 };
1162
1163 // for calls
1164 class LIR_OpCall: public LIR_Op {
1165 friend class LIR_OpVisitState;
1166
1167 protected:
1168 address _addr;
1402 friend class LIR_OpVisitState;
1403
1404 private:
1405 LIR_Opr _tmp;
1406 public:
1407 LIR_OpRTCall(address addr, LIR_Opr tmp,
1408 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1409 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1410 , _tmp(tmp) {}
1411
1412 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1413 virtual void emit_code(LIR_Assembler* masm);
1414 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1415
1416 LIR_Opr tmp() const { return _tmp; }
1417
1418 virtual void verify() const;
1419 };
1420
1421
1422 class LIR_OpBranch: public LIR_Op {
1423 friend class LIR_OpVisitState;
1424
1425 private:
1426 LIR_Condition _cond;
1427 Label* _label;
1428 BlockBegin* _block; // if this is a branch to a block, this is the block
1429 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1430 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1431
1432 public:
1433 LIR_OpBranch(LIR_Condition cond, Label* lbl)
1434 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1435 , _cond(cond)
1436 , _label(lbl)
1437 , _block(NULL)
1438 , _ublock(NULL)
1439 , _stub(NULL) { }
1440
1441 LIR_OpBranch(LIR_Condition cond, BlockBegin* block);
1442 LIR_OpBranch(LIR_Condition cond, CodeStub* stub);
1443
1444 // for unordered comparisons
1445 LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock);
1446
1447 LIR_Condition cond() const { return _cond; }
1448 Label* label() const { return _label; }
1449 BlockBegin* block() const { return _block; }
1450 BlockBegin* ublock() const { return _ublock; }
1451 CodeStub* stub() const { return _stub; }
1452
1453 void change_block(BlockBegin* b);
1454 void change_ublock(BlockBegin* b);
1455 void negate_cond();
1456
1457 virtual void emit_code(LIR_Assembler* masm);
1458 virtual LIR_OpBranch* as_OpBranch() { return this; }
1459 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1460 };
1461
1462 class LIR_OpReturn: public LIR_Op1 {
1463 friend class LIR_OpVisitState;
1464
1465 private:
1466 C1SafepointPollStub* _stub;
1467
1468 public:
1469 LIR_OpReturn(LIR_Opr opr);
1470
1471 C1SafepointPollStub* stub() const { return _stub; }
1472 virtual LIR_OpReturn* as_OpReturn() { return this; }
1473 };
1474
1475 class ConversionStub;
1476
1477 class LIR_OpConvert: public LIR_Op1 {
1478 friend class LIR_OpVisitState;
1479
1480 private:
1614 // LIR_Op2
1615 class LIR_Op2: public LIR_Op {
1616 friend class LIR_OpVisitState;
1617
1618 int _fpu_stack_size; // for sin/cos implementation on Intel
1619
1620 protected:
1621 LIR_Opr _opr1;
1622 LIR_Opr _opr2;
1623 BasicType _type;
1624 LIR_Opr _tmp1;
1625 LIR_Opr _tmp2;
1626 LIR_Opr _tmp3;
1627 LIR_Opr _tmp4;
1628 LIR_Opr _tmp5;
1629 LIR_Condition _condition;
1630
1631 void verify() const;
1632
1633 public:
1634 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1635 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1636 , _fpu_stack_size(0)
1637 , _opr1(opr1)
1638 , _opr2(opr2)
1639 , _type(T_ILLEGAL)
1640 , _tmp1(LIR_OprFact::illegalOpr)
1641 , _tmp2(LIR_OprFact::illegalOpr)
1642 , _tmp3(LIR_OprFact::illegalOpr)
1643 , _tmp4(LIR_OprFact::illegalOpr)
1644 , _tmp5(LIR_OprFact::illegalOpr)
1645 , _condition(condition) {
1646 assert(code == lir_cmp || code == lir_assert, "code check");
1647 }
1648
1649 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1650 : LIR_Op(code, result, NULL)
1651 , _fpu_stack_size(0)
1652 , _opr1(opr1)
1653 , _opr2(opr2)
1654 , _type(type)
1655 , _tmp1(LIR_OprFact::illegalOpr)
1656 , _tmp2(LIR_OprFact::illegalOpr)
1657 , _tmp3(LIR_OprFact::illegalOpr)
1658 , _tmp4(LIR_OprFact::illegalOpr)
1659 , _tmp5(LIR_OprFact::illegalOpr)
1660 , _condition(condition) {
1661 assert(code == lir_cmove, "code check");
1662 assert(type != T_ILLEGAL, "cmove should have type");
1663 }
1664
1665 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1666 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1667 : LIR_Op(code, result, info)
1668 , _fpu_stack_size(0)
1669 , _opr1(opr1)
1670 , _opr2(opr2)
1671 , _type(type)
1672 , _tmp1(LIR_OprFact::illegalOpr)
1673 , _tmp2(LIR_OprFact::illegalOpr)
1674 , _tmp3(LIR_OprFact::illegalOpr)
1675 , _tmp4(LIR_OprFact::illegalOpr)
1676 , _tmp5(LIR_OprFact::illegalOpr)
1677 , _condition(lir_cond_unknown) {
1678 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1679 }
1680
1681 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1682 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1683 : LIR_Op(code, result, NULL)
1684 , _fpu_stack_size(0)
1685 , _opr1(opr1)
1686 , _opr2(opr2)
1687 , _type(T_ILLEGAL)
1688 , _tmp1(tmp1)
1689 , _tmp2(tmp2)
1690 , _tmp3(tmp3)
1691 , _tmp4(tmp4)
1692 , _tmp5(tmp5)
1693 , _condition(lir_cond_unknown) {
1694 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1695 }
1696
1697 LIR_Opr in_opr1() const { return _opr1; }
1698 LIR_Opr in_opr2() const { return _opr2; }
1699 BasicType type() const { return _type; }
1700 LIR_Opr tmp1_opr() const { return _tmp1; }
1701 LIR_Opr tmp2_opr() const { return _tmp2; }
1702 LIR_Opr tmp3_opr() const { return _tmp3; }
1703 LIR_Opr tmp4_opr() const { return _tmp4; }
1704 LIR_Opr tmp5_opr() const { return _tmp5; }
1705 LIR_Condition condition() const {
1706 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1707 }
1708 void set_condition(LIR_Condition condition) {
1709 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1710 }
1711
1712 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1713 int fpu_stack_size() const { return _fpu_stack_size; }
1714
1715 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1716 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1717
1718 virtual void emit_code(LIR_Assembler* masm);
1719 virtual LIR_Op2* as_Op2() { return this; }
1720 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1721 };
1722
1723 class LIR_OpAllocArray : public LIR_Op {
1724 friend class LIR_OpVisitState;
1725
1726 private:
1727 LIR_Opr _klass;
1728 LIR_Opr _len;
1729 LIR_Opr _tmp1;
1730 LIR_Opr _tmp2;
1731 LIR_Opr _tmp3;
1732 LIR_Opr _tmp4;
1733 BasicType _type;
1734 CodeStub* _stub;
1735
1736 public:
1737 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1738 : LIR_Op(lir_alloc_array, result, NULL)
1739 , _klass(klass)
1740 , _len(len)
1741 , _tmp1(t1)
1742 , _tmp2(t2)
1766
1767 private:
1768 LIR_Opr _opr1;
1769 LIR_Opr _opr2;
1770 LIR_Opr _opr3;
1771 public:
1772 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1773 : LIR_Op(code, result, info)
1774 , _opr1(opr1)
1775 , _opr2(opr2)
1776 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1777 LIR_Opr in_opr1() const { return _opr1; }
1778 LIR_Opr in_opr2() const { return _opr2; }
1779 LIR_Opr in_opr3() const { return _opr3; }
1780
1781 virtual void emit_code(LIR_Assembler* masm);
1782 virtual LIR_Op3* as_Op3() { return this; }
1783 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1784 };
1785
1786
1787 //--------------------------------
1788 class LabelObj: public CompilationResourceObj {
1789 private:
1790 Label _label;
1791 public:
1792 LabelObj() {}
1793 Label* label() { return &_label; }
1794 };
1795
1796
1797 class LIR_OpLock: public LIR_Op {
1798 friend class LIR_OpVisitState;
1799
1800 private:
1801 LIR_Opr _hdr;
1802 LIR_Opr _obj;
1803 LIR_Opr _lock;
1804 LIR_Opr _scratch;
1805 CodeStub* _stub;
2005 //--------------------------------LIR_List---------------------------------------------------
2006 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2007 // The LIR instructions are appended by the LIR_List class itself;
2008 //
2009 // Notes:
2010 // - all offsets are(should be) in bytes
2011 // - local positions are specified with an offset, with offset 0 being local 0
2012
2013 class LIR_List: public CompilationResourceObj {
2014 private:
2015 LIR_OpList _operations;
2016
2017 Compilation* _compilation;
2018 #ifndef PRODUCT
2019 BlockBegin* _block;
2020 #endif
2021 #ifdef ASSERT
2022 const char * _file;
2023 int _line;
2024 #endif
2025
2026 public:
2027 void append(LIR_Op* op) {
2028 if (op->source() == NULL)
2029 op->set_source(_compilation->current_instruction());
2030 #ifndef PRODUCT
2031 if (PrintIRWithLIR) {
2032 _compilation->maybe_print_current_instruction();
2033 op->print(); tty->cr();
2034 }
2035 #endif // PRODUCT
2036
2037 _operations.append(op);
2038
2039 #ifdef ASSERT
2040 op->verify();
2041 op->set_file_and_line(_file, _line);
2042 _file = NULL;
2043 _line = 0;
2044 #endif
2045 }
2046
2047 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2048
2049 #ifdef ASSERT
2050 void set_file_and_line(const char * file, int line);
2051 #endif
2052
2053 //---------- accessors ---------------
2054 LIR_OpList* instructions_list() { return &_operations; }
2055 int length() const { return _operations.length(); }
2056 LIR_Op* at(int i) const { return _operations.at(i); }
2057
2058 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2059
2060 // insert LIR_Ops in buffer to right places in LIR_List
2061 void append(LIR_InsertionBuffer* buffer);
2062
2063 //---------- mutators ---------------
2064 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2065 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2066 void remove_at(int i) { _operations.remove_at(i); }
2067
2068 //---------- printing -------------
2069 void print_instructions() PRODUCT_RETURN;
2070
2071
2072 //---------- instructions -------------
2149 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2150 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2151 }
2152 void unwind_exception(LIR_Opr exceptionOop) {
2153 append(new LIR_Op1(lir_unwind, exceptionOop));
2154 }
2155
2156 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2157 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2158
2159 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2160 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2161 }
2162 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2163 cmp(condition, left, LIR_OprFact::intConst(right), info);
2164 }
2165
2166 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2167 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2168
2169 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2170 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2171 }
2172
2173 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2174 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2175 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2176 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2177 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2178 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2179
2180 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2181 void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }
2182 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2183 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
2184 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2185 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2186 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2187
2188 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2189 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2190 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
|
870 // - every instruction has a result operand
871 // - every instruction has an CodeEmitInfo operand (can be revisited later)
872 // - every instruction has a LIR_OpCode operand
873 // - LIR_OpN, means an instruction that has N input operands
874 //
875 // class hierarchy:
876 //
877 class LIR_Op;
878 class LIR_Op0;
879 class LIR_OpLabel;
880 class LIR_Op1;
881 class LIR_OpBranch;
882 class LIR_OpConvert;
883 class LIR_OpAllocObj;
884 class LIR_OpReturn;
885 class LIR_OpRoundFP;
886 class LIR_Op2;
887 class LIR_OpDelay;
888 class LIR_Op3;
889 class LIR_OpAllocArray;
890 class LIR_Op4;
891 class LIR_OpCall;
892 class LIR_OpJavaCall;
893 class LIR_OpRTCall;
894 class LIR_OpArrayCopy;
895 class LIR_OpUpdateCRC32;
896 class LIR_OpLock;
897 class LIR_OpTypeCheck;
898 class LIR_OpCompareAndSwap;
899 class LIR_OpLoadKlass;
900 class LIR_OpProfileCall;
901 class LIR_OpProfileType;
902 #ifdef ASSERT
903 class LIR_OpAssert;
904 #endif
905
906 // LIR operation codes
907 enum LIR_Code {
908 lir_none
909 , begin_op0
910 , lir_label
915 , lir_breakpoint
916 , lir_rtcall
917 , lir_membar
918 , lir_membar_acquire
919 , lir_membar_release
920 , lir_membar_loadload
921 , lir_membar_storestore
922 , lir_membar_loadstore
923 , lir_membar_storeload
924 , lir_get_thread
925 , lir_on_spin_wait
926 , end_op0
927 , begin_op1
928 , lir_fxch
929 , lir_fld
930 , lir_push
931 , lir_pop
932 , lir_null_check
933 , lir_return
934 , lir_leal
935 , lir_move
936 , lir_convert
937 , lir_alloc_object
938 , lir_monaddr
939 , lir_roundfp
940 , lir_safepoint
941 , lir_unwind
942 , lir_load_klass
943 , end_op1
944 , begin_op2
945 , lir_branch
946 , lir_cond_float_branch
947 , lir_cmp
948 , lir_cmp_l2i
949 , lir_ucmp_fd2i
950 , lir_cmp_fd2i
951 , lir_add
952 , lir_sub
953 , lir_mul
954 , lir_div
955 , lir_rem
956 , lir_sqrt
957 , lir_abs
958 , lir_neg
959 , lir_tan
960 , lir_log10
961 , lir_logic_and
962 , lir_logic_or
963 , lir_logic_xor
964 , lir_shl
965 , lir_shr
966 , lir_ushr
967 , lir_alloc_array
968 , lir_throw
969 , lir_xadd
970 , lir_xchg
971 , end_op2
972 , begin_op3
973 , lir_idiv
974 , lir_irem
975 , lir_fmad
976 , lir_fmaf
977 , end_op3
978 , begin_op4
979 , lir_cmove
980 , end_op4
981 , begin_opJavaCall
982 , lir_static_call
983 , lir_optvirtual_call
984 , lir_icvirtual_call
985 , lir_dynamic_call
986 , end_opJavaCall
987 , begin_opArrayCopy
988 , lir_arraycopy
989 , end_opArrayCopy
990 , begin_opUpdateCRC32
991 , lir_updatecrc32
992 , end_opUpdateCRC32
993 , begin_opLock
994 , lir_lock
995 , lir_unlock
996 , end_opLock
997 , begin_delay_slot
998 , lir_delay_slot
999 , end_delay_slot
1000 , begin_opTypeCheck
1001 , lir_instanceof
1002 , lir_checkcast
1003 , lir_store_check
1004 , end_opTypeCheck
1005 , begin_opCompareAndSwap
1006 , lir_cas_long
1007 , lir_cas_obj
1008 , lir_cas_int
1009 , end_opCompareAndSwap
1010 , begin_opMDOProfile
1011 , lir_profile_call
1012 , lir_profile_type
1013 , end_opMDOProfile
1014 , begin_opAssert
1015 , lir_assert
1016 , end_opAssert
1017 #ifdef INCLUDE_ZGC
1018 , begin_opZLoadBarrierTest
1019 , lir_zloadbarrier_test
1020 , end_opZLoadBarrierTest
1021 #endif
1022 };
1023
1024
1025 enum LIR_Condition {
1026 lir_cond_equal
1027 , lir_cond_notEqual
1028 , lir_cond_less
1029 , lir_cond_lessEqual
1030 , lir_cond_greaterEqual
1031 , lir_cond_greater
1032 , lir_cond_belowEqual
1033 , lir_cond_aboveEqual
1034 , lir_cond_always
1035 , lir_cond_unknown = -1
1036 };
1037
1038
1039 enum LIR_PatchCode {
1040 lir_patch_none,
1041 lir_patch_low,
1137 virtual void print_instr(outputStream* out) const = 0;
1138 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1139
1140 virtual bool is_patching() { return false; }
1141 virtual LIR_OpCall* as_OpCall() { return NULL; }
1142 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1143 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1144 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1145 virtual LIR_OpLock* as_OpLock() { return NULL; }
1146 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1147 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1148 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1149 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1150 virtual LIR_OpReturn* as_OpReturn() { return NULL; }
1151 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1152 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1153 virtual LIR_Op0* as_Op0() { return NULL; }
1154 virtual LIR_Op1* as_Op1() { return NULL; }
1155 virtual LIR_Op2* as_Op2() { return NULL; }
1156 virtual LIR_Op3* as_Op3() { return NULL; }
1157 virtual LIR_Op4* as_Op4() { return NULL; }
1158 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1159 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1160 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1161 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1162 virtual LIR_OpLoadKlass* as_OpLoadKlass() { return NULL; }
1163 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1164 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1165 #ifdef ASSERT
1166 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1167 #endif
1168
1169 virtual void verify() const {}
1170 };
1171
1172 // for calls
1173 class LIR_OpCall: public LIR_Op {
1174 friend class LIR_OpVisitState;
1175
1176 protected:
1177 address _addr;
1411 friend class LIR_OpVisitState;
1412
1413 private:
1414 LIR_Opr _tmp;
1415 public:
1416 LIR_OpRTCall(address addr, LIR_Opr tmp,
1417 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1418 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1419 , _tmp(tmp) {}
1420
1421 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1422 virtual void emit_code(LIR_Assembler* masm);
1423 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1424
1425 LIR_Opr tmp() const { return _tmp; }
1426
1427 virtual void verify() const;
1428 };
1429
1430
1431
1432 class LIR_OpReturn: public LIR_Op1 {
1433 friend class LIR_OpVisitState;
1434
1435 private:
1436 C1SafepointPollStub* _stub;
1437
1438 public:
1439 LIR_OpReturn(LIR_Opr opr);
1440
1441 C1SafepointPollStub* stub() const { return _stub; }
1442 virtual LIR_OpReturn* as_OpReturn() { return this; }
1443 };
1444
1445 class ConversionStub;
1446
1447 class LIR_OpConvert: public LIR_Op1 {
1448 friend class LIR_OpVisitState;
1449
1450 private:
1584 // LIR_Op2
1585 class LIR_Op2: public LIR_Op {
1586 friend class LIR_OpVisitState;
1587
1588 int _fpu_stack_size; // for sin/cos implementation on Intel
1589
1590 protected:
1591 LIR_Opr _opr1;
1592 LIR_Opr _opr2;
1593 BasicType _type;
1594 LIR_Opr _tmp1;
1595 LIR_Opr _tmp2;
1596 LIR_Opr _tmp3;
1597 LIR_Opr _tmp4;
1598 LIR_Opr _tmp5;
1599 LIR_Condition _condition;
1600
1601 void verify() const;
1602
1603 public:
1604 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1605 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1606 , _fpu_stack_size(0)
1607 , _opr1(opr1)
1608 , _opr2(opr2)
1609 , _type(type)
1610 , _tmp1(LIR_OprFact::illegalOpr)
1611 , _tmp2(LIR_OprFact::illegalOpr)
1612 , _tmp3(LIR_OprFact::illegalOpr)
1613 , _tmp4(LIR_OprFact::illegalOpr)
1614 , _tmp5(LIR_OprFact::illegalOpr)
1615 , _condition(condition) {
1616 assert(code == lir_cmp || code == lir_branch || code == lir_cond_float_branch || code == lir_assert, "code check");
1617 }
1618
1619 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1620 : LIR_Op(code, result, NULL)
1621 , _fpu_stack_size(0)
1622 , _opr1(opr1)
1623 , _opr2(opr2)
1624 , _type(type)
1625 , _tmp1(LIR_OprFact::illegalOpr)
1626 , _tmp2(LIR_OprFact::illegalOpr)
1627 , _tmp3(LIR_OprFact::illegalOpr)
1628 , _tmp4(LIR_OprFact::illegalOpr)
1629 , _tmp5(LIR_OprFact::illegalOpr)
1630 , _condition(condition) {
1631 assert(code == lir_cmove, "code check");
1632 assert(type != T_ILLEGAL, "cmove should have type");
1633 }
1634
1635 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1636 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1637 : LIR_Op(code, result, info)
1638 , _fpu_stack_size(0)
1639 , _opr1(opr1)
1640 , _opr2(opr2)
1641 , _type(type)
1642 , _tmp1(LIR_OprFact::illegalOpr)
1643 , _tmp2(LIR_OprFact::illegalOpr)
1644 , _tmp3(LIR_OprFact::illegalOpr)
1645 , _tmp4(LIR_OprFact::illegalOpr)
1646 , _tmp5(LIR_OprFact::illegalOpr)
1647 , _condition(lir_cond_unknown) {
1648 assert(code != lir_cmp && code != lir_branch && code != lir_cond_float_branch && is_in_range(code, begin_op2, end_op2), "code check");
1649 }
1650
1651 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1652 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1653 : LIR_Op(code, result, NULL)
1654 , _fpu_stack_size(0)
1655 , _opr1(opr1)
1656 , _opr2(opr2)
1657 , _type(T_ILLEGAL)
1658 , _tmp1(tmp1)
1659 , _tmp2(tmp2)
1660 , _tmp3(tmp3)
1661 , _tmp4(tmp4)
1662 , _tmp5(tmp5)
1663 , _condition(lir_cond_unknown) {
1664 assert(code != lir_cmp && code != lir_branch && code != lir_cond_float_branch && is_in_range(code, begin_op2, end_op2), "code check");
1665 }
1666
1667 LIR_Opr in_opr1() const { return _opr1; }
1668 LIR_Opr in_opr2() const { return _opr2; }
1669 BasicType type() const { return _type; }
1670 LIR_Opr tmp1_opr() const { return _tmp1; }
1671 LIR_Opr tmp2_opr() const { return _tmp2; }
1672 LIR_Opr tmp3_opr() const { return _tmp3; }
1673 LIR_Opr tmp4_opr() const { return _tmp4; }
1674 LIR_Opr tmp5_opr() const { return _tmp5; }
1675 LIR_Condition condition() const {
1676 assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch || code() == lir_assert, "only valid for branch and assert"); return _condition;
1677 }
1678 void set_condition(LIR_Condition condition) {
1679 assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch, "only valid for branch"); _condition = condition;
1680 }
1681
1682 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1683 int fpu_stack_size() const { return _fpu_stack_size; }
1684
1685 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1686 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1687
1688 virtual void emit_code(LIR_Assembler* masm);
1689 virtual LIR_Op2* as_Op2() { return this; }
1690 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1691 };
1692
1693 class LIR_OpBranch: public LIR_Op2 {
1694 friend class LIR_OpVisitState;
1695
1696 private:
1697 Label* _label;
1698 BlockBegin* _block; // if this is a branch to a block, this is the block
1699 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1700 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1701
1702 public:
1703 LIR_OpBranch(LIR_Condition cond, Label* lbl)
1704 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1705 , _label(lbl)
1706 , _block(NULL)
1707 , _ublock(NULL)
1708 , _stub(NULL) { }
1709
1710 LIR_OpBranch(LIR_Condition cond, BlockBegin* block);
1711 LIR_OpBranch(LIR_Condition cond, CodeStub* stub);
1712
1713 // for unordered comparisons
1714 LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock);
1715
1716 LIR_Condition cond() const {
1717 return condition();
1718 }
1719
1720 void set_cond(LIR_Condition cond) {
1721 set_condition(cond);
1722 }
1723
1724 Label* label() const { return _label; }
1725 BlockBegin* block() const { return _block; }
1726 BlockBegin* ublock() const { return _ublock; }
1727 CodeStub* stub() const { return _stub; }
1728
1729 void change_block(BlockBegin* b);
1730 void change_ublock(BlockBegin* b);
1731 void negate_cond();
1732
1733 virtual void emit_code(LIR_Assembler* masm);
1734 virtual LIR_OpBranch* as_OpBranch() { return this; }
1735 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1736 };
1737
1738 class LIR_OpAllocArray : public LIR_Op {
1739 friend class LIR_OpVisitState;
1740
1741 private:
1742 LIR_Opr _klass;
1743 LIR_Opr _len;
1744 LIR_Opr _tmp1;
1745 LIR_Opr _tmp2;
1746 LIR_Opr _tmp3;
1747 LIR_Opr _tmp4;
1748 BasicType _type;
1749 CodeStub* _stub;
1750
1751 public:
1752 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1753 : LIR_Op(lir_alloc_array, result, NULL)
1754 , _klass(klass)
1755 , _len(len)
1756 , _tmp1(t1)
1757 , _tmp2(t2)
1781
1782 private:
1783 LIR_Opr _opr1;
1784 LIR_Opr _opr2;
1785 LIR_Opr _opr3;
1786 public:
1787 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1788 : LIR_Op(code, result, info)
1789 , _opr1(opr1)
1790 , _opr2(opr2)
1791 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1792 LIR_Opr in_opr1() const { return _opr1; }
1793 LIR_Opr in_opr2() const { return _opr2; }
1794 LIR_Opr in_opr3() const { return _opr3; }
1795
1796 virtual void emit_code(LIR_Assembler* masm);
1797 virtual LIR_Op3* as_Op3() { return this; }
1798 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1799 };
1800
1801 class LIR_Op4: public LIR_Op {
1802 friend class LIR_OpVisitState;
1803 protected:
1804 LIR_Opr _opr1;
1805 LIR_Opr _opr2;
1806 LIR_Opr _opr3;
1807 LIR_Opr _opr4;
1808 BasicType _type;
1809 LIR_Opr _tmp1;
1810 LIR_Opr _tmp2;
1811 LIR_Opr _tmp3;
1812 LIR_Opr _tmp4;
1813 LIR_Opr _tmp5;
1814 LIR_Condition _condition;
1815
1816 public:
1817 LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4,
1818 LIR_Opr result, BasicType type)
1819 : LIR_Op(code, result, NULL)
1820 , _opr1(opr1)
1821 , _opr2(opr2)
1822 , _opr3(opr3)
1823 , _opr4(opr4)
1824 , _type(type)
1825 , _tmp1(LIR_OprFact::illegalOpr)
1826 , _tmp2(LIR_OprFact::illegalOpr)
1827 , _tmp3(LIR_OprFact::illegalOpr)
1828 , _tmp4(LIR_OprFact::illegalOpr)
1829 , _tmp5(LIR_OprFact::illegalOpr)
1830 , _condition(condition) {
1831 assert(code == lir_cmove, "code check");
1832 assert(type != T_ILLEGAL, "cmove should have type");
1833 }
1834
1835 LIR_Opr in_opr1() const { return _opr1; }
1836 LIR_Opr in_opr2() const { return _opr2; }
1837 LIR_Opr in_opr3() const { return _opr3; }
1838 LIR_Opr in_opr4() const { return _opr4; }
1839 BasicType type() const { return _type; }
1840 LIR_Opr tmp1_opr() const { return _tmp1; }
1841 LIR_Opr tmp2_opr() const { return _tmp2; }
1842 LIR_Opr tmp3_opr() const { return _tmp3; }
1843 LIR_Opr tmp4_opr() const { return _tmp4; }
1844 LIR_Opr tmp5_opr() const { return _tmp5; }
1845
1846 LIR_Condition condition() const { return _condition; }
1847 void set_condition(LIR_Condition condition) { _condition = condition; }
1848
1849 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1850 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1851 void set_in_opr3(LIR_Opr opr) { _opr3 = opr; }
1852 void set_in_opr4(LIR_Opr opr) { _opr4 = opr; }
1853 virtual void emit_code(LIR_Assembler* masm);
1854 virtual LIR_Op4* as_Op4() { return this; }
1855
1856 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1857 };
1858
1859 //--------------------------------
1860 class LabelObj: public CompilationResourceObj {
1861 private:
1862 Label _label;
1863 public:
1864 LabelObj() {}
1865 Label* label() { return &_label; }
1866 };
1867
1868
1869 class LIR_OpLock: public LIR_Op {
1870 friend class LIR_OpVisitState;
1871
1872 private:
1873 LIR_Opr _hdr;
1874 LIR_Opr _obj;
1875 LIR_Opr _lock;
1876 LIR_Opr _scratch;
1877 CodeStub* _stub;
2077 //--------------------------------LIR_List---------------------------------------------------
2078 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2079 // The LIR instructions are appended by the LIR_List class itself;
2080 //
2081 // Notes:
2082 // - all offsets are(should be) in bytes
2083 // - local positions are specified with an offset, with offset 0 being local 0
2084
2085 class LIR_List: public CompilationResourceObj {
2086 private:
2087 LIR_OpList _operations;
2088
2089 Compilation* _compilation;
2090 #ifndef PRODUCT
2091 BlockBegin* _block;
2092 #endif
2093 #ifdef ASSERT
2094 const char * _file;
2095 int _line;
2096 #endif
2097 #ifdef RISCV
2098 LIR_Opr _cmp_opr1;
2099 LIR_Opr _cmp_opr2;
2100 #endif
2101
2102 public:
2103 void append(LIR_Op* op) {
2104 if (op->source() == NULL)
2105 op->set_source(_compilation->current_instruction());
2106 #ifndef PRODUCT
2107 if (PrintIRWithLIR) {
2108 _compilation->maybe_print_current_instruction();
2109 op->print(); tty->cr();
2110 }
2111 #endif // PRODUCT
2112
2113 #ifdef RISCV
2114 set_cmp_oprs(op);
2115 // lir_cmp set cmp oprs only on riscv
2116 if (op->code() == lir_cmp) return;
2117 #endif
2118
2119 _operations.append(op);
2120
2121 #ifdef ASSERT
2122 op->verify();
2123 op->set_file_and_line(_file, _line);
2124 _file = NULL;
2125 _line = 0;
2126 #endif
2127 }
2128
2129 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2130
2131 #ifdef ASSERT
2132 void set_file_and_line(const char * file, int line);
2133 #endif
2134
2135 #ifdef RISCV
2136 void set_cmp_oprs(LIR_Op* op);
2137 #endif
2138
2139 //---------- accessors ---------------
2140 LIR_OpList* instructions_list() { return &_operations; }
2141 int length() const { return _operations.length(); }
2142 LIR_Op* at(int i) const { return _operations.at(i); }
2143
2144 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2145
2146 // insert LIR_Ops in buffer to right places in LIR_List
2147 void append(LIR_InsertionBuffer* buffer);
2148
2149 //---------- mutators ---------------
2150 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2151 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2152 void remove_at(int i) { _operations.remove_at(i); }
2153
2154 //---------- printing -------------
2155 void print_instructions() PRODUCT_RETURN;
2156
2157
2158 //---------- instructions -------------
2235 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2236 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2237 }
2238 void unwind_exception(LIR_Opr exceptionOop) {
2239 append(new LIR_Op1(lir_unwind, exceptionOop));
2240 }
2241
2242 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2243 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2244
2245 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2246 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2247 }
2248 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2249 cmp(condition, left, LIR_OprFact::intConst(right), info);
2250 }
2251
2252 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2253 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2254
2255 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type,
2256 LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr) {
2257 append(new LIR_Op4(lir_cmove, condition, src1, src2, cmp_opr1, cmp_opr2, dst, type));
2258 }
2259
2260 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2261 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2262 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2263 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2264 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2265 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2266
2267 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2268 void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }
2269 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2270 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
2271 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2272 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2273 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2274
2275 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2276 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2277 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
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