1 /*
  2  * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "asm/assembler.inline.hpp"
 27 #include "c1/c1_Compilation.hpp"
 28 #include "c1/c1_Instruction.hpp"
 29 #include "c1/c1_InstructionPrinter.hpp"
 30 #include "c1/c1_LIRAssembler.hpp"
 31 #include "c1/c1_MacroAssembler.hpp"
 32 #include "c1/c1_ValueStack.hpp"
 33 #include "ci/ciInstance.hpp"
 34 #include "compiler/oopMap.hpp"
 35 #include "gc/shared/barrierSet.hpp"
 36 #include "runtime/os.hpp"
 37 #include "runtime/vm_version.hpp"
 38 
 39 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
 40   // We must have enough patching space so that call can be inserted.
 41   // We cannot use fat nops here, since the concurrent code rewrite may transiently
 42   // create the illegal instruction sequence.
 43   while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
 44     _masm->nop();
 45   }
 46   patch->install(_masm, patch_code, obj, info);
 47   append_code_stub(patch);
 48 
 49 #ifdef ASSERT
 50   Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
 51   if (patch->id() == PatchingStub::access_field_id) {
 52     switch (code) {
 53       case Bytecodes::_putstatic:
 54       case Bytecodes::_getstatic:
 55       case Bytecodes::_putfield:
 56       case Bytecodes::_getfield:
 57         break;
 58       default:
 59         ShouldNotReachHere();
 60     }
 61   } else if (patch->id() == PatchingStub::load_klass_id) {
 62     switch (code) {
 63       case Bytecodes::_new:
 64       case Bytecodes::_anewarray:
 65       case Bytecodes::_multianewarray:
 66       case Bytecodes::_instanceof:
 67       case Bytecodes::_checkcast:
 68         break;
 69       default:
 70         ShouldNotReachHere();
 71     }
 72   } else if (patch->id() == PatchingStub::load_mirror_id) {
 73     switch (code) {
 74       case Bytecodes::_putstatic:
 75       case Bytecodes::_getstatic:
 76       case Bytecodes::_ldc:
 77       case Bytecodes::_ldc_w:
 78         break;
 79       default:
 80         ShouldNotReachHere();
 81     }
 82   } else if (patch->id() == PatchingStub::load_appendix_id) {
 83     Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
 84     assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
 85   } else {
 86     ShouldNotReachHere();
 87   }
 88 #endif
 89 }
 90 
 91 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
 92   IRScope* scope = info->scope();
 93   Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
 94   if (Bytecodes::has_optional_appendix(bc_raw)) {
 95     return PatchingStub::load_appendix_id;
 96   }
 97   return PatchingStub::load_mirror_id;
 98 }
 99 
100 //---------------------------------------------------------------
101 
102 
103 LIR_Assembler::LIR_Assembler(Compilation* c):
104    _masm(c->masm())
105  , _bs(BarrierSet::barrier_set())
106  , _compilation(c)
107  , _frame_map(c->frame_map())
108  , _current_block(NULL)
109  , _pending_non_safepoint(NULL)
110  , _pending_non_safepoint_offset(0)
111 {
112   _slow_case_stubs = new CodeStubList();
113 }
114 
115 
116 LIR_Assembler::~LIR_Assembler() {
117   // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
118   // Reset it here to avoid an assertion.
119   _unwind_handler_entry.reset();
120 }
121 
122 
123 void LIR_Assembler::check_codespace() {
124   CodeSection* cs = _masm->code_section();
125   if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
126     BAILOUT("CodeBuffer overflow");
127   }
128 }
129 
130 
131 void LIR_Assembler::append_code_stub(CodeStub* stub) {
132   _slow_case_stubs->append(stub);
133 }
134 
135 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
136   for (int m = 0; m < stub_list->length(); m++) {
137     CodeStub* s = stub_list->at(m);
138 
139     check_codespace();
140     CHECK_BAILOUT();
141 
142 #ifndef PRODUCT
143     if (CommentedAssembly) {
144       stringStream st;
145       s->print_name(&st);
146       st.print(" slow case");
147       _masm->block_comment(st.as_string());
148     }
149 #endif
150     s->emit_code(this);
151 #ifdef ASSERT
152     s->assert_no_unbound_labels();
153 #endif
154   }
155 }
156 
157 
158 void LIR_Assembler::emit_slow_case_stubs() {
159   emit_stubs(_slow_case_stubs);
160 }
161 
162 
163 bool LIR_Assembler::needs_icache(ciMethod* method) const {
164   return !method->is_static();
165 }
166 
167 bool LIR_Assembler::needs_clinit_barrier_on_entry(ciMethod* method) const {
168   return VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier();
169 }
170 
171 int LIR_Assembler::code_offset() const {
172   return _masm->offset();
173 }
174 
175 
176 address LIR_Assembler::pc() const {
177   return _masm->pc();
178 }
179 
180 // To bang the stack of this compiled method we use the stack size
181 // that the interpreter would need in case of a deoptimization. This
182 // removes the need to bang the stack in the deoptimization blob which
183 // in turn simplifies stack overflow handling.
184 int LIR_Assembler::bang_size_in_bytes() const {
185   return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
186 }
187 
188 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
189   for (int i = 0; i < info_list->length(); i++) {
190     XHandlers* handlers = info_list->at(i)->exception_handlers();
191 
192     for (int j = 0; j < handlers->length(); j++) {
193       XHandler* handler = handlers->handler_at(j);
194       assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
195       assert(handler->entry_code() == NULL ||
196              handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
197              handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
198 
199       if (handler->entry_pco() == -1) {
200         // entry code not emitted yet
201         if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
202           handler->set_entry_pco(code_offset());
203           if (CommentedAssembly) {
204             _masm->block_comment("Exception adapter block");
205           }
206           emit_lir_list(handler->entry_code());
207         } else {
208           handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
209         }
210 
211         assert(handler->entry_pco() != -1, "must be set now");
212       }
213     }
214   }
215 }
216 
217 
218 void LIR_Assembler::emit_code(BlockList* hir) {
219   if (PrintLIR) {
220     print_LIR(hir);
221   }
222 
223   int n = hir->length();
224   for (int i = 0; i < n; i++) {
225     emit_block(hir->at(i));
226     CHECK_BAILOUT();
227   }
228 
229   flush_debug_info(code_offset());
230 
231   DEBUG_ONLY(check_no_unbound_labels());
232 }
233 
234 
235 void LIR_Assembler::emit_block(BlockBegin* block) {
236   if (block->is_set(BlockBegin::backward_branch_target_flag)) {
237     align_backward_branch_target();
238   }
239 
240   // if this block is the start of an exception handler, record the
241   // PC offset of the first instruction for later construction of
242   // the ExceptionHandlerTable
243   if (block->is_set(BlockBegin::exception_entry_flag)) {
244     block->set_exception_handler_pco(code_offset());
245   }
246 
247 #ifndef PRODUCT
248   if (PrintLIRWithAssembly) {
249     // don't print Phi's
250     InstructionPrinter ip(false);
251     block->print(ip);
252   }
253 #endif /* PRODUCT */
254 
255   assert(block->lir() != NULL, "must have LIR");
256   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
257 
258 #ifndef PRODUCT
259   if (CommentedAssembly) {
260     stringStream st;
261     st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
262     _masm->block_comment(st.as_string());
263   }
264 #endif
265 
266   emit_lir_list(block->lir());
267 
268   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
269 }
270 
271 
272 void LIR_Assembler::emit_lir_list(LIR_List* list) {
273   peephole(list);
274 
275   int n = list->length();
276   for (int i = 0; i < n; i++) {
277     LIR_Op* op = list->at(i);
278 
279     check_codespace();
280     CHECK_BAILOUT();
281 
282 #ifndef PRODUCT
283     if (CommentedAssembly) {
284       // Don't record out every op since that's too verbose.  Print
285       // branches since they include block and stub names.  Also print
286       // patching moves since they generate funny looking code.
287       if (op->code() == lir_branch ||
288           (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
289           (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
290         stringStream st;
291         op->print_on(&st);
292         _masm->block_comment(st.as_string());
293       }
294     }
295     if (PrintLIRWithAssembly) {
296       // print out the LIR operation followed by the resulting assembly
297       list->at(i)->print(); tty->cr();
298     }
299 #endif /* PRODUCT */
300 
301     op->emit_code(this);
302 
303     if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
304       process_debug_info(op);
305     }
306 
307 #ifndef PRODUCT
308     if (PrintLIRWithAssembly) {
309       _masm->code()->decode();
310     }
311 #endif /* PRODUCT */
312   }
313 }
314 
315 #ifdef ASSERT
316 void LIR_Assembler::check_no_unbound_labels() {
317   CHECK_BAILOUT();
318 
319   for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
320     if (!_branch_target_blocks.at(i)->label()->is_bound()) {
321       tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
322       assert(false, "unbound label");
323     }
324   }
325 }
326 #endif
327 
328 //----------------------------------debug info--------------------------------
329 
330 
331 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
332   int pc_offset = code_offset();
333   flush_debug_info(pc_offset);
334   info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
335   if (info->exception_handlers() != NULL) {
336     compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
337   }
338 }
339 
340 
341 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
342   flush_debug_info(pc_offset);
343   cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
344   if (cinfo->exception_handlers() != NULL) {
345     compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
346   }
347 }
348 
349 static ValueStack* debug_info(Instruction* ins) {
350   StateSplit* ss = ins->as_StateSplit();
351   if (ss != NULL) return ss->state();
352   return ins->state_before();
353 }
354 
355 void LIR_Assembler::process_debug_info(LIR_Op* op) {
356   Instruction* src = op->source();
357   if (src == NULL)  return;
358   int pc_offset = code_offset();
359   if (_pending_non_safepoint == src) {
360     _pending_non_safepoint_offset = pc_offset;
361     return;
362   }
363   ValueStack* vstack = debug_info(src);
364   if (vstack == NULL)  return;
365   if (_pending_non_safepoint != NULL) {
366     // Got some old debug info.  Get rid of it.
367     if (debug_info(_pending_non_safepoint) == vstack) {
368       _pending_non_safepoint_offset = pc_offset;
369       return;
370     }
371     if (_pending_non_safepoint_offset < pc_offset) {
372       record_non_safepoint_debug_info();
373     }
374     _pending_non_safepoint = NULL;
375   }
376   // Remember the debug info.
377   if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
378     _pending_non_safepoint = src;
379     _pending_non_safepoint_offset = pc_offset;
380   }
381 }
382 
383 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
384 // Return NULL if n is too large.
385 // Returns the caller_bci for the next-younger state, also.
386 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
387   ValueStack* t = s;
388   for (int i = 0; i < n; i++) {
389     if (t == NULL)  break;
390     t = t->caller_state();
391   }
392   if (t == NULL)  return NULL;
393   for (;;) {
394     ValueStack* tc = t->caller_state();
395     if (tc == NULL)  return s;
396     t = tc;
397     bci_result = tc->bci();
398     s = s->caller_state();
399   }
400 }
401 
402 void LIR_Assembler::record_non_safepoint_debug_info() {
403   int         pc_offset = _pending_non_safepoint_offset;
404   ValueStack* vstack    = debug_info(_pending_non_safepoint);
405   int         bci       = vstack->bci();
406 
407   DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
408   assert(debug_info->recording_non_safepoints(), "sanity");
409 
410   debug_info->add_non_safepoint(pc_offset);
411 
412   // Visit scopes from oldest to youngest.
413   for (int n = 0; ; n++) {
414     int s_bci = bci;
415     ValueStack* s = nth_oldest(vstack, n, s_bci);
416     if (s == NULL)  break;
417     IRScope* scope = s->scope();
418     //Always pass false for reexecute since these ScopeDescs are never used for deopt
419     methodHandle null_mh;
420     debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
421   }
422 
423   debug_info->end_non_safepoint(pc_offset);
424 }
425 
426 
427 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
428   return add_debug_info_for_null_check(code_offset(), cinfo);
429 }
430 
431 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
432   ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
433   append_code_stub(stub);
434   return stub;
435 }
436 
437 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
438   add_debug_info_for_div0(code_offset(), info);
439 }
440 
441 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
442   DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
443   append_code_stub(stub);
444 }
445 
446 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
447   rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
448 }
449 
450 
451 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
452   verify_oop_map(op->info());
453 
454   // must align calls sites, otherwise they can't be updated atomically
455   align_call(op->code());
456 
457   // emit the static call stub stuff out of line
458   emit_static_call_stub();
459   CHECK_BAILOUT();
460 
461   switch (op->code()) {
462   case lir_static_call:
463   case lir_dynamic_call:
464     call(op, relocInfo::static_call_type);
465     break;
466   case lir_optvirtual_call:
467     call(op, relocInfo::opt_virtual_call_type);
468     break;
469   case lir_icvirtual_call:
470     ic_call(op);
471     break;
472   default:
473     fatal("unexpected op code: %s", op->name());
474     break;
475   }
476 
477   // JSR 292
478   // Record if this method has MethodHandle invokes.
479   if (op->is_method_handle_invoke()) {
480     compilation()->set_has_method_handle_invokes(true);
481   }
482 
483 #if defined(IA32) && defined(COMPILER2)
484   // C2 leave fpu stack dirty clean it
485   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
486     int i;
487     for ( i = 1; i <= 7 ; i++ ) {
488       ffree(i);
489     }
490     if (!op->result_opr()->is_float_kind()) {
491       ffree(0);
492     }
493   }
494 #endif // IA32 && COMPILER2
495 }
496 
497 
498 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
499   _masm->bind (*(op->label()));
500 }
501 
502 
503 void LIR_Assembler::emit_op1(LIR_Op1* op) {
504   switch (op->code()) {
505     case lir_move:
506       if (op->move_kind() == lir_move_volatile) {
507         assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
508         volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
509       } else {
510         move_op(op->in_opr(), op->result_opr(), op->type(),
511                 op->patch_code(), op->info(), op->pop_fpu_stack(),
512                 op->move_kind() == lir_move_wide);
513       }
514       break;
515 
516     case lir_roundfp: {
517       LIR_OpRoundFP* round_op = op->as_OpRoundFP();
518       roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
519       break;
520     }
521 
522     case lir_return: {
523       assert(op->as_OpReturn() != NULL, "sanity");
524       LIR_OpReturn *ret_op = (LIR_OpReturn*)op;
525       return_op(ret_op->in_opr(), ret_op->stub());
526       if (ret_op->stub() != NULL) {
527         append_code_stub(ret_op->stub());
528       }
529       break;
530     }
531 
532     case lir_safepoint:
533       if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
534         _masm->nop();
535       }
536       safepoint_poll(op->in_opr(), op->info());
537       break;
538 
539 #ifdef IA32
540     case lir_fxch:
541       fxch(op->in_opr()->as_jint());
542       break;
543 
544     case lir_fld:
545       fld(op->in_opr()->as_jint());
546       break;
547 #endif // IA32
548 
549     case lir_branch:
550       break;
551 
552     case lir_push:
553       push(op->in_opr());
554       break;
555 
556     case lir_pop:
557       pop(op->in_opr());
558       break;
559 
560     case lir_leal:
561       leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
562       break;
563 
564     case lir_null_check: {
565       ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
566 
567       if (op->in_opr()->is_single_cpu()) {
568         _masm->null_check(op->in_opr()->as_register(), stub->entry());
569       } else {
570         Unimplemented();
571       }
572       break;
573     }
574 
575     case lir_monaddr:
576       monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
577       break;
578 
579     case lir_unwind:
580       unwind_op(op->in_opr());
581       break;
582 
583     default:
584       Unimplemented();
585       break;
586   }
587 }
588 
589 
590 void LIR_Assembler::emit_op0(LIR_Op0* op) {
591   switch (op->code()) {
592     case lir_nop:
593       assert(op->info() == NULL, "not supported");
594       _masm->nop();
595       break;
596 
597     case lir_label:
598       Unimplemented();
599       break;
600 
601     case lir_std_entry:
602       // init offsets
603       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
604       _masm->align(CodeEntryAlignment);
605       if (needs_icache(compilation()->method())) {
606         check_icache();
607       }
608       offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
609       _masm->verified_entry();
610       if (needs_clinit_barrier_on_entry(compilation()->method())) {
611         clinit_barrier(compilation()->method());
612       }
613       build_frame();
614       offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
615       break;
616 
617     case lir_osr_entry:
618       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
619       osr_entry();
620       break;
621 
622 #ifdef IA32
623     case lir_fpop_raw:
624       fpop();
625       break;
626 #endif // IA32
627 
628     case lir_breakpoint:
629       breakpoint();
630       break;
631 
632     case lir_membar:
633       membar();
634       break;
635 
636     case lir_membar_acquire:
637       membar_acquire();
638       break;
639 
640     case lir_membar_release:
641       membar_release();
642       break;
643 
644     case lir_membar_loadload:
645       membar_loadload();
646       break;
647 
648     case lir_membar_storestore:
649       membar_storestore();
650       break;
651 
652     case lir_membar_loadstore:
653       membar_loadstore();
654       break;
655 
656     case lir_membar_storeload:
657       membar_storeload();
658       break;
659 
660     case lir_get_thread:
661       get_thread(op->result_opr());
662       break;
663 
664     case lir_on_spin_wait:
665       on_spin_wait();
666       break;
667 
668     default:
669       ShouldNotReachHere();
670       break;
671   }
672 }
673 
674 
675 void LIR_Assembler::emit_op2(LIR_Op2* op) {
676   switch (op->code()) {
677     case lir_cmp:
678       if (op->info() != NULL) {
679         assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
680                "shouldn't be codeemitinfo for non-address operands");
681         add_debug_info_for_null_check_here(op->info()); // exception possible
682       }
683       comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
684       break;
685 
686     case lir_cmp_l2i:
687     case lir_cmp_fd2i:
688     case lir_ucmp_fd2i:
689       comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
690       break;
691 
692     case lir_cmove:
693       cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
694       break;
695 
696     case lir_shl:
697     case lir_shr:
698     case lir_ushr:
699       if (op->in_opr2()->is_constant()) {
700         shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
701       } else {
702         shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
703       }
704       break;
705 
706     case lir_add:
707     case lir_sub:
708     case lir_mul:
709     case lir_div:
710     case lir_rem:
711       assert(op->fpu_pop_count() < 2, "");
712       arith_op(
713         op->code(),
714         op->in_opr1(),
715         op->in_opr2(),
716         op->result_opr(),
717         op->info(),
718         op->fpu_pop_count() == 1);
719       break;
720 
721     case lir_abs:
722     case lir_sqrt:
723     case lir_tan:
724     case lir_log10:
725       intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
726       break;
727 
728     case lir_neg:
729       negate(op->in_opr1(), op->result_opr(), op->in_opr2());
730       break;
731 
732     case lir_logic_and:
733     case lir_logic_or:
734     case lir_logic_xor:
735       logic_op(
736         op->code(),
737         op->in_opr1(),
738         op->in_opr2(),
739         op->result_opr());
740       break;
741 
742     case lir_throw:
743       throw_op(op->in_opr1(), op->in_opr2(), op->info());
744       break;
745 
746     case lir_xadd:
747     case lir_xchg:
748       atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
749       break;
750 
751     default:
752       Unimplemented();
753       break;
754   }
755 }
756 











757 
758 void LIR_Assembler::build_frame() {
759   _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
760 }
761 
762 
763 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
764   assert(strict_fp_requires_explicit_rounding, "not required");
765   assert((src->is_single_fpu() && dest->is_single_stack()) ||
766          (src->is_double_fpu() && dest->is_double_stack()),
767          "round_fp: rounds register -> stack location");
768 
769   reg2stack (src, dest, src->type(), pop_fpu_stack);
770 }
771 
772 
773 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
774   if (src->is_register()) {
775     if (dest->is_register()) {
776       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
777       reg2reg(src,  dest);
778     } else if (dest->is_stack()) {
779       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
780       reg2stack(src, dest, type, pop_fpu_stack);
781     } else if (dest->is_address()) {
782       reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide);
783     } else {
784       ShouldNotReachHere();
785     }
786 
787   } else if (src->is_stack()) {
788     assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
789     if (dest->is_register()) {
790       stack2reg(src, dest, type);
791     } else if (dest->is_stack()) {
792       stack2stack(src, dest, type);
793     } else {
794       ShouldNotReachHere();
795     }
796 
797   } else if (src->is_constant()) {
798     if (dest->is_register()) {
799       const2reg(src, dest, patch_code, info); // patching is possible
800     } else if (dest->is_stack()) {
801       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
802       const2stack(src, dest);
803     } else if (dest->is_address()) {
804       assert(patch_code == lir_patch_none, "no patching allowed here");
805       const2mem(src, dest, type, info, wide);
806     } else {
807       ShouldNotReachHere();
808     }
809 
810   } else if (src->is_address()) {
811     mem2reg(src, dest, type, patch_code, info, wide);
812   } else {
813     ShouldNotReachHere();
814   }
815 }
816 
817 
818 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
819 #ifndef PRODUCT
820   if (VerifyOops) {
821     OopMapStream s(info->oop_map());
822     while (!s.is_done()) {
823       OopMapValue v = s.current();
824       if (v.is_oop()) {
825         VMReg r = v.reg();
826         if (!r->is_stack()) {
827           stringStream st;
828           st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
829           _masm->verify_oop(r->as_Register());
830         } else {
831           _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
832         }
833       }
834       check_codespace();
835       CHECK_BAILOUT();
836 
837       s.next();
838     }
839   }
840 #endif
841 }
--- EOF ---