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src/hotspot/share/opto/regmask.hpp

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 82   // and between the two marks can still be 0.
 83   unsigned int _lwm;
 84   unsigned int _hwm;
 85 
 86  public:
 87   enum { CHUNK_SIZE = _RM_SIZE * BitsPerWord };
 88 
 89   // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
 90   // Also, consider the maximum alignment size for a normally allocated
 91   // value.  Since we allocate register pairs but not register quads (at
 92   // present), this alignment is SlotsPerLong (== 2).  A normally
 93   // aligned allocated register is either a single register, or a pair
 94   // of adjacent registers, the lower-numbered being even.
 95   // See also is_aligned_Pairs() below, and the padding added before
 96   // Matcher::_new_SP to keep allocated pairs aligned properly.
 97   // If we ever go to quad-word allocations, SlotsPerQuad will become
 98   // the controlling alignment constraint.  Note that this alignment
 99   // requirement is internal to the allocator, and independent of any
100   // particular platform.
101   enum { SlotsPerLong = 2,
102          SlotsPerVecA = 8,
103          SlotsPerVecS = 1,
104          SlotsPerVecD = 2,
105          SlotsPerVecX = 4,
106          SlotsPerVecY = 8,
107          SlotsPerVecZ = 16,
108          SlotsPerRegVectMask = X86_ONLY(2) NOT_X86(1)
109          };
110 
111   // A constructor only used by the ADLC output.  All mask fields are filled
112   // in directly.  Calls to this look something like RM(1,2,3,4);
113   RegMask(
114 #   define BODY(I) int a##I,
115     FORALL_BODY
116 #   undef BODY
117     int dummy = 0) {
118 #if defined(VM_LITTLE_ENDIAN) || !defined(_LP64)
119 #   define BODY(I) _RM_I[I] = a##I;
120 #else
121     // We need to swap ints.
122 #   define BODY(I) _RM_I[I ^ 1] = a##I;

 82   // and between the two marks can still be 0.
 83   unsigned int _lwm;
 84   unsigned int _hwm;
 85 
 86  public:
 87   enum { CHUNK_SIZE = _RM_SIZE * BitsPerWord };
 88 
 89   // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
 90   // Also, consider the maximum alignment size for a normally allocated
 91   // value.  Since we allocate register pairs but not register quads (at
 92   // present), this alignment is SlotsPerLong (== 2).  A normally
 93   // aligned allocated register is either a single register, or a pair
 94   // of adjacent registers, the lower-numbered being even.
 95   // See also is_aligned_Pairs() below, and the padding added before
 96   // Matcher::_new_SP to keep allocated pairs aligned properly.
 97   // If we ever go to quad-word allocations, SlotsPerQuad will become
 98   // the controlling alignment constraint.  Note that this alignment
 99   // requirement is internal to the allocator, and independent of any
100   // particular platform.
101   enum { SlotsPerLong = 2,
102          SlotsPerVecA = RISCV_ONLY(4) NOT_RISCV(8),
103          SlotsPerVecS = 1,
104          SlotsPerVecD = 2,
105          SlotsPerVecX = 4,
106          SlotsPerVecY = 8,
107          SlotsPerVecZ = 16,
108          SlotsPerRegVectMask = X86_ONLY(2) NOT_X86(1)
109          };
110 
111   // A constructor only used by the ADLC output.  All mask fields are filled
112   // in directly.  Calls to this look something like RM(1,2,3,4);
113   RegMask(
114 #   define BODY(I) int a##I,
115     FORALL_BODY
116 #   undef BODY
117     int dummy = 0) {
118 #if defined(VM_LITTLE_ENDIAN) || !defined(_LP64)
119 #   define BODY(I) _RM_I[I] = a##I;
120 #else
121     // We need to swap ints.
122 #   define BODY(I) _RM_I[I ^ 1] = a##I;
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