1 /*
2 * Copyright (c) 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
4 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
28 #include "gc/shenandoah/mode/shenandoahMode.hpp"
29 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
32 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
33 #include "gc/shenandoah/shenandoahRuntime.hpp"
34 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
35 #include "interpreter/interp_masm.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "runtime/javaThread.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #ifdef COMPILER1
40 #include "c1/c1_LIRAssembler.hpp"
41 #include "c1/c1_MacroAssembler.hpp"
42 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
43 #endif
44 #ifdef COMPILER2
45 #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
46 #include "opto/output.hpp"
47 #endif
48
49 #define __ masm->
50
51 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
52 Register src, Register dst, Register count, RegSet saved_regs) {
53 if (is_oop) {
54 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
55 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
56
57 Label done;
58
59 // Avoid calling runtime if count == 0
60 __ cbz(count, done);
61
62 // Is GC active?
63 assert(!saved_regs.contains(rscratch1), "Sanity: about to clobber rscratch1");
64 assert(!saved_regs.contains(rscratch2), "Sanity: about to clobber rscratch2");
65 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
66 __ ldrb(rscratch1, gc_state);
67 if (ShenandoahSATBBarrier && dest_uninitialized) {
68 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
69 } else {
70 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
71 __ tst(rscratch1, rscratch2);
72 __ br(Assembler::EQ, done);
73 }
74
75 __ push_call_clobbered_registers();
76 // If arguments are not in proper places, shuffle them.
77 // Doing this via the stack is the most straight-forward way to avoid
78 // accidentally smashing any register.
79 if (c_rarg0 != src || c_rarg1 != dst || c_rarg2 != count) {
80 __ push(RegSet::of(src), sp);
81 __ push(RegSet::of(dst), sp);
82 __ push(RegSet::of(count), sp);
83 __ pop(RegSet::of(c_rarg2), sp);
84 __ pop(RegSet::of(c_rarg1), sp);
85 __ pop(RegSet::of(c_rarg0), sp);
86 }
87 address target = nullptr;
88 if (UseCompressedOops) {
89 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop);
90 } else {
91 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop);
92 }
93 __ call_VM_leaf(target, 3);
94 __ pop_call_clobbered_registers();
95 __ bind(done);
96 }
97 }
98 }
99
100 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
101 Register start, Register count, Register tmp) {
102 if (ShenandoahCardBarrier && is_oop) {
103 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp);
104 }
105 }
106
107 void ShenandoahBarrierSetAssembler::satb_barrier(MacroAssembler* masm,
108 Register obj,
109 Register pre_val,
110 Register thread,
111 Register tmp1,
112 Register tmp2) {
113 assert(ShenandoahSATBBarrier, "Should be checked by caller");
114 assert(thread == rthread, "must be");
115
116 Label done;
117 Label runtime;
118
119 assert_different_registers(obj, pre_val, tmp1, tmp2);
120 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
121
122 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
123 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
124
125 // Is marking active?
126 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
127 __ ldrb(tmp1, gc_state);
128 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
129
130 // Do we need to load the previous value?
131 if (obj != noreg) {
132 if (UseCompressedOops) {
133 __ ldrw(pre_val, Address(obj, 0));
134 __ decode_heap_oop(pre_val);
135 } else {
136 __ ldr(pre_val, Address(obj, 0));
137 }
138 }
139
140 // Is the previous value null?
141 __ cbz(pre_val, done);
142
143 // Can we store original value in the thread's buffer?
144 // Is index == 0?
145 // (The index field is typed as size_t.)
146
147 __ ldr(tmp1, index); // tmp := *index_adr
148 __ cbz(tmp1, runtime); // tmp == 0?
149 // If yes, goto runtime
150
151 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
152 __ str(tmp1, index); // *index_adr := tmp
153 __ ldr(tmp2, buffer);
154 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
155
156 // Record the previous value
157 __ str(pre_val, Address(tmp1, 0));
158 __ b(done);
159
160 __ bind(runtime);
161
162 // Slow-path call
163 __ enter(/* strip_ret_addr = */ true);
164 __ push_call_clobbered_registers();
165 if (c_rarg0 != pre_val) {
166 __ mov(c_rarg0, pre_val);
167 }
168 // Calling with super_call_VM_leaf with c_rarg0 bypasses interpreter checks and avoids any moves.
169 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), c_rarg0);
170 __ pop_call_clobbered_registers();
171 __ leave();
172
173 __ bind(done);
174 }
175
176 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
177 assert(ShenandoahLoadRefBarrier, "Should be enabled");
178 assert(dst != rscratch2, "need rscratch2");
179 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
180
181 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
182 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
183 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
184 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
185 bool is_narrow = UseCompressedOops && !is_native;
186
187 Label heap_stable, not_cset;
188 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
189 __ ldrb(rscratch2, gc_state);
190
191 // Check for heap stability
192 if (is_strong) {
193 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
194 } else {
195 Label lrb;
196 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
197 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
198 __ bind(lrb);
199 }
200
201 // use r1 for load address
202 Register result_dst = dst;
203 if (dst == r1) {
204 __ mov(rscratch1, dst);
205 dst = rscratch1;
206 }
207
208 // Save r0 and r1, unless it is an output register
209 RegSet to_save = RegSet::of(r0, r1) - result_dst;
210 __ push(to_save, sp);
211 __ lea(r1, load_addr);
212 __ mov(r0, dst);
213
214 // Test for in-cset
215 if (is_strong) {
216 if (AOTCodeCache::is_on_for_dump()) {
217 __ lea(rscratch2, ExternalAddress(AOTRuntimeConstants::cset_base_address()));
218 __ ldr(rscratch2, Address(rscratch2));
219 __ lea(rscratch1, ExternalAddress(AOTRuntimeConstants::grain_shift_address()));
220 __ ldrw(rscratch1, Address(rscratch1));
221 __ lsrv(rscratch1, r0, rscratch1);
222 } else {
223 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
224 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
225 }
226 __ ldrb(rscratch2, Address(rscratch2, rscratch1));
227 __ tbz(rscratch2, 0, not_cset);
228 }
229
230 // Slow-path call
231 __ enter(/* strip_ret_addr = */ true);
232 __ push_call_clobbered_registers();
233 address target = nullptr;
234 if (is_strong) {
235 if (is_narrow) {
236 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow);
237 } else {
238 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong);
239 }
240 } else if (is_weak) {
241 if (is_narrow) {
242 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow);
243 } else {
244 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak);
245 }
246 } else {
247 assert(is_phantom, "only remaining strength");
248 assert(!is_narrow, "phantom access cannot be narrow");
249 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom);
250 }
251 // Calling with super_call_VM_leaf with c_rarg0/1 bypasses interpreter checks and avoids any moves.
252 __ super_call_VM_leaf(target, c_rarg0, c_rarg1);
253 __ mov(rscratch1, r0);
254 __ pop_call_clobbered_registers();
255 __ mov(r0, rscratch1);
256 __ leave();
257
258 __ bind(not_cset);
259
260 __ mov(result_dst, r0);
261 __ pop(to_save, sp);
262
263 __ bind(heap_stable);
264 }
265
266 //
267 // Arguments:
268 //
269 // Inputs:
270 // src: oop location to load from, might be clobbered
271 //
272 // Output:
273 // dst: oop loaded from src location
274 //
275 // Kill:
276 // rscratch1 (scratch reg)
277 //
278 // Alias:
279 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
280 //
281 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
282 Register dst, Address src, Register tmp1, Register tmp2) {
283 // 1: non-reference load, no additional barrier is needed
284 if (!is_reference_type(type)) {
285 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
286 return;
287 }
288
289 // 2: load a reference from src location and apply LRB if needed
290 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
291 Register result_dst = dst;
292
293 // Preserve src location for LRB
294 if (dst == src.base() || dst == src.index()) {
295 dst = rscratch1;
296 }
297 assert_different_registers(dst, src.base(), src.index());
298
299 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
300
301 load_reference_barrier(masm, dst, src, decorators);
302
303 if (dst != result_dst) {
304 __ mov(result_dst, dst);
305 dst = result_dst;
306 }
307 } else {
308 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
309 }
310
311 // 3: apply keep-alive barrier if needed
312 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
313 satb_barrier(masm /* masm */,
314 noreg /* obj */,
315 dst /* pre_val */,
316 rthread /* thread */,
317 tmp1 /* tmp1 */,
318 tmp2 /* tmp2 */);
319 }
320 }
321
322 void ShenandoahBarrierSetAssembler::card_barrier(MacroAssembler* masm, Register obj) {
323 assert(ShenandoahCardBarrier, "Should have been checked by caller");
324
325 __ lsr(obj, obj, CardTable::card_shift());
326
327 assert(CardTable::dirty_card_val() == 0, "must be");
328
329 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
330 __ ldr(rscratch1, curr_ct_holder_addr);
331
332 if (UseCondCardMark) {
333 Label L_already_dirty;
334 __ ldrb(rscratch2, Address(obj, rscratch1));
335 __ cbz(rscratch2, L_already_dirty);
336 __ strb(zr, Address(obj, rscratch1));
337 __ bind(L_already_dirty);
338 } else {
339 __ strb(zr, Address(obj, rscratch1));
340 }
341 }
342
343 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
344 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
345 // 1: non-reference types require no barriers
346 if (!is_reference_type(type)) {
347 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
348 return;
349 }
350
351 // Flatten object address right away for simplicity: likely needed by barriers
352 if (dst.index() == noreg && dst.offset() == 0) {
353 if (dst.base() != tmp3) {
354 __ mov(tmp3, dst.base());
355 }
356 } else {
357 __ lea(tmp3, dst);
358 }
359
360 // 2: pre-barrier: SATB needs the previous value
361 if (ShenandoahBarrierSet::need_satb_barrier(decorators, type)) {
362 satb_barrier(masm,
363 tmp3 /* obj */,
364 tmp2 /* pre_val */,
365 rthread /* thread */,
366 tmp1 /* tmp */,
367 rscratch1 /* tmp2 */);
368 }
369
370 // Store!
371 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
372
373 // 3: post-barrier: card barrier needs store address
374 bool storing_non_null = (val != noreg);
375 if (ShenandoahBarrierSet::need_card_barrier(decorators, type) && storing_non_null) {
376 card_barrier(masm, tmp3);
377 }
378 }
379
380 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
381 Register obj, Register tmp, Label& slowpath) {
382 Label done;
383 // Resolve jobject
384 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
385
386 // Check for null.
387 __ cbz(obj, done);
388
389 assert(obj != rscratch2, "need rscratch2");
390 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
391 __ lea(rscratch2, gc_state);
392 __ ldrb(rscratch2, Address(rscratch2));
393
394 // Check for heap in evacuation phase
395 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
396
397 __ bind(done);
398 }
399
400 void ShenandoahBarrierSetAssembler::try_peek_weak_handle_in_nmethod(MacroAssembler* masm, Register weak_handle, Register obj,
401 Register tmp, Label& slow_path) {
402 assert_different_registers(weak_handle, tmp, noreg);
403 assert_different_registers(obj, tmp, noreg);
404
405 Label done;
406
407 // Peek weak handle using the standard implementation.
408 BarrierSetAssembler::try_peek_weak_handle_in_nmethod(masm, weak_handle, obj, tmp, slow_path);
409
410 // Check if the reference is null, and if it is, take the fast path.
411 __ cbz(obj, done);
412
413 Address gc_state(rthread, ShenandoahThreadLocalData::gc_state_offset());
414 __ lea(tmp, gc_state);
415 __ ldrb(tmp, __ legitimize_address(gc_state, 1, tmp));
416
417 // Check if the heap is under weak-reference/roots processing, in
418 // which case we need to take the slow path.
419 __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, slow_path);
420 __ bind(done);
421 }
422
423 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
424 Register start, Register count, Register scratch) {
425 assert(ShenandoahCardBarrier, "Should have been checked by caller");
426
427 Label L_loop, L_done;
428 const Register end = count;
429
430 // Zero count? Nothing to do.
431 __ cbz(count, L_done);
432
433 // end = start + count << LogBytesPerHeapOop
434 // last element address to make inclusive
435 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
436 __ sub(end, end, BytesPerHeapOop);
437 __ lsr(start, start, CardTable::card_shift());
438 __ lsr(end, end, CardTable::card_shift());
439
440 // number of bytes to copy
441 __ sub(count, end, start);
442
443 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
444 __ ldr(scratch, curr_ct_holder_addr);
445 __ add(start, start, scratch);
446 __ bind(L_loop);
447 __ strb(zr, Address(start, count));
448 __ subs(count, count, 1);
449 __ br(Assembler::GE, L_loop);
450 __ bind(L_done);
451 }
452
453 #undef __
454
455 #ifdef COMPILER1
456
457 #define __ ce->masm()->
458
459 void ShenandoahBarrierSetAssembler::keepalive_barrier_c1_stub(LIR_Assembler* ce, ShenandoahKeepaliveBarrierStub* stub) {
460 __ bind(*stub->entry());
461
462 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
463
464 Register obj = stub->obj()->as_register();
465
466 if (stub->do_load()) {
467 ce->mem2reg(stub->addr(), stub->obj(), T_OBJECT, lir_patch_none, nullptr, /* wide = */ false);
468 }
469 __ cbz(obj, *stub->continuation());
470 ce->store_parameter(obj, 0);
471 __ far_call(RuntimeAddress(bs->keepalive_barrier_stub()));
472 __ b(*stub->continuation());
473 }
474
475 void ShenandoahBarrierSetAssembler::load_reference_barrier_c1_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
476 __ bind(*stub->entry());
477
478 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
479
480 Register obj = stub->obj()->as_register();
481 Register addr = stub->addr()->as_pointer_register();
482 Register slow_result = stub->slow_result()->as_register();
483 assert_different_registers(obj, addr, slow_result);
484 assert(slow_result == r0, "C1 must know about our slow call result register");
485
486 ce->store_parameter(obj, 0);
487 ce->store_parameter(addr, 1);
488 __ far_call(RuntimeAddress(bs->load_reference_barrier_stub(stub->decorators())));
489 if (obj != slow_result) {
490 __ mov(obj, slow_result);
491 }
492
493 __ b(*stub->continuation());
494 }
495
496 #undef __
497
498 #define __ sasm->
499
500 void ShenandoahBarrierSetAssembler::keepalive_barrier_c1_runtime_stub(StubAssembler* sasm) {
501 __ prologue("shenandoah_keepalive_barrier", false);
502 const Register tmp_obj = r0;
503 const Register tmp1 = r1;
504 const Register tmp2 = r2;
505 __ push(RegSet::of(tmp1, tmp2, tmp_obj), sp);
506 __ load_parameter(0, tmp_obj);
507 satb_barrier(sasm, noreg, tmp_obj, rthread, tmp1, tmp2);
508 __ pop(RegSet::of(tmp1, tmp2, tmp_obj), sp);
509 __ epilogue();
510 }
511
512 void ShenandoahBarrierSetAssembler::load_reference_barrier_c1_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
513 __ prologue("shenandoah_load_reference_barrier", false);
514 const Register tmp_obj = r0;
515 const Register tmp_addr = r1;
516 __ push(RegSet::of(tmp_addr), sp);
517 __ load_parameter(0, tmp_obj);
518 __ load_parameter(1, tmp_addr);
519 load_reference_barrier(sasm, tmp_obj, Address(tmp_addr, 0), decorators);
520 __ pop(RegSet::of(tmp_addr), sp);
521 __ epilogue();
522 }
523
524 #undef __
525
526 #endif // COMPILER1
527
528 #ifdef COMPILER2
529
530 #undef __
531 #define __ masm->
532
533
534 void ShenandoahBarrierSetAssembler::load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address src, Register tmp1, Register tmp2, bool is_narrow, bool is_acquire) {
535 // Do the actual load. This load is the candidate for implicit null check, and MUST come first.
536 if (is_narrow) {
537 if (is_acquire) {
538 assert(src.getMode() == Address::base_plus_offset && src.offset() == 0,
539 "is_acquire path requires address to be base-only");
540 __ ldarw(dst, src.base());
541 } else {
542 __ ldrw(dst, src);
543 }
544 } else {
545 if (is_acquire) {
546 assert(src.getMode() == Address::base_plus_offset && src.offset() == 0,
547 "is_acquire path requires address to be base-only");
548 __ ldar(dst, src.base());
549 } else {
550 __ ldr(dst, src);
551 }
552 }
553
554 ShenandoahBarrierStubC2::load_post(masm, node, dst, src, tmp1, tmp2, is_narrow);
555 }
556
557 void ShenandoahBarrierSetAssembler::store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow,
558 Register src, bool src_narrow, Register tmp1, Register tmp2, Register tmp3, bool is_volatile) {
559
560 ShenandoahBarrierStubC2::store_pre(masm, node, dst, tmp1, tmp2, tmp3, dst_narrow);
561
562 // Do the actual store
563 if (dst_narrow) {
564 if (!src_narrow) {
565 // Need to encode into rscratch, because we cannot clobber src.
566 if ((node->barrier_data() & ShenandoahBitNotNull) == 0) {
567 __ encode_heap_oop(tmp2, src);
568 } else {
569 __ encode_heap_oop_not_null(tmp2, src);
570 }
571 src = tmp2;
572 }
573
574 if (is_volatile) {
575 assert(dst.getMode() == Address::base_plus_offset && dst.offset() == 0,
576 "is_acquire path requires address to be base-only");
577 __ stlrw(src, dst.base());
578 } else {
579 __ strw(src, dst);
580 }
581 } else {
582 if (is_volatile) {
583 assert(dst.getMode() == Address::base_plus_offset && dst.offset() == 0,
584 "is_acquire path requires address to be base-only");
585 __ stlr(src, dst.base());
586 } else {
587 __ str(src, dst);
588 }
589 }
590
591 ShenandoahBarrierStubC2::store_post(masm, node, dst, tmp2, tmp3);
592 }
593
594 void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr,
595 Register oldval, Register newval, Register tmp1, Register tmp2, Register tmp3, bool exchange, bool narrow, bool weak, bool acquire) {
596 Assembler::operand_size op_size = narrow ? Assembler::word : Assembler::xword;
597
598 ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp1, tmp2, tmp3, narrow);
599
600 atomic_memory_order order = acquire ? memory_order_seq_cst : memory_order_release;
601
602 // CAS!
603 if (weak) {
604 __ cmpxchg_weak(addr, oldval, newval, op_size, order, exchange ? res : noreg);
605 } else {
606 __ cmpxchg(addr, oldval, newval, op_size, order, exchange ? res : noreg);
607 }
608
609 // If we need a boolean result out of CAS, set the flag appropriately and promote the result.
610 if (!exchange) {
611 assert(res != noreg, "need result register");
612 __ cset(res, Assembler::EQ);
613 }
614
615 ShenandoahBarrierStubC2::load_store_post(masm, node, Address(addr, 0), tmp2, tmp3);
616 }
617
618 void ShenandoahBarrierSetAssembler::get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval,
619 Register newval, Register addr, Register tmp1, Register tmp2, Register tmp3, bool is_acquire) {
620 bool is_narrow = node->bottom_type()->isa_narrowoop();
621
622 ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp1, tmp2, tmp3, is_narrow);
623
624 if (is_narrow) {
625 if (is_acquire) {
626 __ atomic_xchgalw(preval, newval, addr);
627 } else {
628 __ atomic_xchgw(preval, newval, addr);
629 }
630 } else {
631 if (is_acquire) {
632 __ atomic_xchgal(preval, newval, addr);
633 } else {
634 __ atomic_xchg(preval, newval, addr);
635 }
636 }
637
638 ShenandoahBarrierStubC2::load_store_post(masm, node, Address(addr, 0), tmp2, tmp3);
639 }
640
641 #undef __
642 #define __ masm.
643
644 void ShenandoahBarrierStubC2::cardtable(MacroAssembler& masm, Address address, Register tmp1, Register tmp2) {
645 assert(CardTable::dirty_card_val() == 0, "must be");
646 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
647
648 // tmp1 = card table base (holder)
649 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
650 __ ldr(tmp1, curr_ct_holder_addr);
651
652 // tmp2 = effective address
653 __ lea(tmp2, address);
654
655 // tmp2 = &card_table[ addr >> CardTable::card_shift() ] ; card index
656 __ add(tmp2, tmp1, tmp2, Assembler::LSR, CardTable::card_shift());
657
658 if (UseCondCardMark) {
659 Label L_already_dirty;
660 __ ldrb(tmp1, Address(tmp2));
661 __ cbz(tmp1, L_already_dirty);
662 __ strb(zr, Address(tmp2));
663 __ bind(L_already_dirty);
664 } else {
665 __ strb(zr, Address(tmp2));
666 }
667 }
668
669 void ShenandoahBarrierStubC2::enter_if_gc_state(MacroAssembler& masm, const char test_state, Register tmp) {
670 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
671 PhaseOutput* const output = Compile::current()->output();
672 Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_array_offset(test_state)));
673
674 // We piggyback on scratch_emit_size mode to compute the slowpath stub size.
675 // We'll use that information to decide whether we need a far jump to the
676 // stub entry point or not. In scratch_emit_size mode we don't bind entry()
677 // because otherwise it will be rebound when we later emit the instructions
678 // for real.
679 if (_needs_far_jump) {
680 __ ldrb(tmp, gc_state_fast);
681 __ cbz(tmp, *continuation());
682 __ b(output->in_scratch_emit_size() ? *continuation() : *entry());
683 } else {
684 __ ldrb(tmp, gc_state_fast);
685 __ cbnz(tmp, output->in_scratch_emit_size() ? *continuation() : *entry());
686 }
687
688 // This is were the slowpath stub will return to or the code above will
689 // jump to if the checks are false
690 __ bind(*continuation());
691 }
692
693 void ShenandoahBarrierStubC2::emit_code(MacroAssembler& masm) {
694 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
695 assert(_needs_keep_alive_barrier || _needs_load_ref_barrier, "Why are you here?");
696 PhaseOutput* const output = Compile::current()->output();
697
698 // We piggyback on scratch_emit_size mode to compute the slowpath stub size.
699 // We'll use that information to decide whether we need a far jump to the
700 // stub entry point or not. In scratch_emit_size mode we don't bind entry()
701 // because otherwise it will be rebound when we later emit the instructions
702 // for real.
703 if (!output->in_scratch_emit_size()) {
704 __ bind(*entry());
705 }
706
707 // If we need to load ourselves, do it here.
708 if (_do_load) {
709 if (_narrow) {
710 __ ldrw(_obj, _addr);
711 } else {
712 __ ldr(_obj, _addr);
713 }
714 }
715
716 // If the object is null, there is no point in applying barriers.
717 maybe_far_jump_if_zero(masm, _obj);
718
719 // We need to make sure that loads done by callers survive across slow-path calls.
720 // For self-loads, we need to care about the case when both KA and LRB are enabled (rare).
721 bool needs_both_barriers = _needs_keep_alive_barrier && _needs_load_ref_barrier;
722 if (!_do_load || needs_both_barriers) {
723 preserve(_obj);
724 }
725
726 // Go for barriers. Barriers can return straight to continuation, as long
727 // as another barrier is not needed and we can reach the fastpath.
728 if (needs_both_barriers) {
729 // The Load match rule in the .ad file may have legitimized the load
730 // address using a TEMP register and in that case we need to explicitly
731 // preserve them here, because the RA does not consider TEMP as live-in,
732 // and the KA runtime call may clobber them and cause a crash on the
733 // subsequent LRB stub.
734 if (_addr.base() != noreg) {
735 preserve(_addr.base());
736 }
737 if (_addr.index() != noreg) {
738 preserve(_addr.index());
739 }
740 keepalive(masm, nullptr);
741 lrb(masm);
742 } else if (_needs_keep_alive_barrier) {
743 keepalive(masm, continuation());
744 } else if (_needs_load_ref_barrier) {
745 lrb(masm);
746 } else {
747 ShouldNotReachHere();
748 }
749 }
750
751 void ShenandoahBarrierStubC2::maybe_far_jump_if_zero(MacroAssembler& masm, Register reg) {
752 if (_needs_far_jump) {
753 Label L_short_jump;
754 __ cbnz(reg, L_short_jump);
755 __ b(*continuation());
756 __ bind(L_short_jump);
757 } else {
758 __ cbz(reg, *continuation());
759 }
760 }
761
762 void ShenandoahBarrierStubC2::keepalive(MacroAssembler& masm, Label* L_done) {
763 Address gcstate(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_array_offset(ShenandoahHeap::MARKING)));
764 Address index(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
765 Address buffer(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
766 Label L_through, L_slowpath;
767
768 // If another barrier is enabled as well, do a runtime check for a specific barrier.
769 if (_needs_load_ref_barrier) {
770 assert(L_done == nullptr, "L_done is always null when _needs_load_ref_barrier is true");
771 __ ldrb(_tmp1, gcstate);
772 __ cbz(_tmp1, L_through);
773 }
774
775 // Fast-path: put object into buffer.
776 // If buffer is already full, go slow.
777 __ ldr(_tmp1, index);
778 __ cbz(_tmp1, L_slowpath);
779 __ sub(_tmp1, _tmp1, wordSize);
780 __ str(_tmp1, index);
781 __ ldr(_tmp2, buffer);
782
783 // Store the object in queue.
784 // If object is narrow, we need to decode it before inserting.
785 if (_narrow) {
786 __ add(_tmp2, _tmp2, _tmp1);
787 __ decode_heap_oop_not_null(_tmp1, _obj);
788 __ str(_tmp1, Address(_tmp2));
789 } else {
790 // Buffer is 64-bit address, must be in base register.
791 __ str(_obj, Address(_tmp2, _tmp1));
792 }
793
794 // Fast-path exits here.
795 if (L_done != nullptr) {
796 __ b(*L_done);
797 } else {
798 __ b(L_through);
799 }
800
801 // Slow-path: call runtime to handle.
802 __ bind(L_slowpath);
803
804 {
805 SaveLiveRegisters slr(&masm, this);
806
807 // Go to runtime and handle the rest there.
808 __ mov(c_rarg0, _obj);
809 __ lea(lr, RuntimeAddress(keepalive_runtime_entry_addr()));
810 __ blr(lr);
811 }
812 if (L_done != nullptr) {
813 __ b(*L_done);
814 } else {
815 __ bind(L_through);
816 }
817 }
818
819 void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm) {
820 Label L_slow;
821
822 // If another barrier is enabled as well, do a runtime check for a specific barrier.
823 if (_needs_keep_alive_barrier) {
824 char state_to_check = ShenandoahHeap::HAS_FORWARDED | (_needs_load_ref_weak_barrier ? ShenandoahHeap::WEAK_ROOTS : 0);
825 Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_array_offset(state_to_check)));
826 __ ldrb(_tmp1, gc_state_fast);
827 maybe_far_jump_if_zero(masm, _tmp1);
828 }
829
830 // If weak references are being processed, weak/phantom loads need to go slow,
831 // regardless of their cset status.
832 if (_needs_load_ref_weak_barrier) {
833 Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_array_offset(ShenandoahHeap::WEAK_ROOTS)));
834 __ ldrb(_tmp1, gc_state_fast);
835 __ cbnz(_tmp1, L_slow);
836 }
837
838 // Cset-check. Fall-through to slow if in collection set.
839 bool is_aot = AOTCodeCache::is_on_for_dump();
840 if (!is_aot) {
841 __ mov(_tmp1, ShenandoahHeap::in_cset_fast_test_addr());
842 if (_narrow) {
843 __ decode_heap_oop_not_null(_tmp2, _obj);
844 __ add(_tmp1, _tmp1, _tmp2, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
845 } else {
846 __ add(_tmp1, _tmp1, _obj, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
847 }
848 } else {
849 // Generating AOT code, pull the cset bitmap and region shift from AOT table.
850 if (_narrow) {
851 __ decode_heap_oop_not_null(_tmp1, _obj);
852 } else {
853 __ mov(_tmp1, _obj);
854 }
855 __ lea(_tmp2, ExternalAddress(AOTRuntimeConstants::grain_shift_address()));
856 __ ldrw(_tmp2, Address(_tmp2));
857 __ lsrv(_tmp2, _tmp1, _tmp2);
858 __ lea(_tmp1, ExternalAddress(AOTRuntimeConstants::cset_base_address()));
859 __ ldr(_tmp1, Address(_tmp1));
860 __ add(_tmp1, _tmp1, _tmp2);
861 }
862 __ ldrb(_tmp1, Address(_tmp1, 0));
863 maybe_far_jump_if_zero(masm, _tmp1);
864
865 // Slow path
866 __ bind(L_slow);
867
868 // Obj is the result, need to temporarily stop preserving it.
869 bool is_obj_preserved = is_preserved(_obj);
870 if (is_obj_preserved) {
871 dont_preserve(_obj);
872 }
873 {
874 SaveLiveRegisters slr(&masm, this);
875
876 // Shuffle in the arguments. The end result should be:
877 // c_rarg0 <-- obj
878 // c_rarg1 <-- lea(addr)
879 if (c_rarg0 == _obj) {
880 __ lea(c_rarg1, _addr);
881 } else if (c_rarg1 == _obj) {
882 __ mov(_tmp1, c_rarg1);
883 __ lea(c_rarg1, _addr);
884 __ mov(c_rarg0, _tmp1);
885 } else {
886 assert_different_registers(c_rarg1, _obj);
887 __ lea(c_rarg1, _addr);
888 __ mov(c_rarg0, _obj);
889 }
890
891 // Go to runtime and handle the rest there.
892 __ lea(lr, RuntimeAddress(lrb_runtime_entry_addr()));
893 __ blr(lr);
894
895 // Save the result where needed. Narrow entries return narrowOop (32 bits)
896 // and AAPCS does not guarantee the upper 32 bits of x0 are zero.
897 if (_narrow) {
898 __ movw(_obj, r0);
899 } else if (_obj != r0) {
900 __ mov(_obj, r0);
901 }
902 }
903 if (is_obj_preserved) {
904 preserve(_obj);
905 }
906
907 __ b(*continuation());
908 }
909
910 int ShenandoahBarrierStubC2::available_gp_registers() {
911 Unimplemented(); // Not used
912 return 0;
913 }
914
915 bool ShenandoahBarrierStubC2::is_special_register(Register r) {
916 Unimplemented(); // Not used
917 return true;
918 }
919
920 static ShenandoahBarrierSetC2State* barrier_set_state() {
921 return reinterpret_cast<ShenandoahBarrierSetC2State*>(Compile::current()->barrier_set_state());
922 }
923
924 static int get_stub_size(ShenandoahBarrierStubC2* stub) {
925 PhaseOutput* const output = Compile::current()->output();
926 assert(output->in_scratch_emit_size(), "only used when in scratch_emit_size.");
927 BufferBlob* const blob = output->scratch_buffer_blob();
928 CodeBuffer cb(blob->content_begin(), (address)output->scratch_locs_memory() - blob->content_begin());
929 MacroAssembler masm(&cb);
930 stub->emit_code(masm);
931 return cb.insts_size();
932 }
933
934 void ShenandoahBarrierStubC2::post_init() {
935 // If we are in scratch emit mode we assume worst case, and force the use of
936 // far branches.
937 PhaseOutput* const output = Compile::current()->output();
938 ShenandoahBarrierSetC2State* state = barrier_set_state();
939 if (output->in_scratch_emit_size()) {
940 state->inc_stubs_current_total_size(get_stub_size(this));
941 _needs_far_jump = true;
942 return;
943 }
944
945 // The logic implemented in this stub only uses short jumps (cbz, cbnz) if
946 // the aggregation of all relevant code sections of a method is less than 1MB
947 // - 2KB. We could be more aggressive and try and compute the distance
948 // between the fastpath branch and the stub entry but in practice not many
949 // methods reach the 1MB size.
950 const BufferSizingData* sizing = output->buffer_sizing_data();
951 const int code_size = sizing->_code + state->stubs_current_total_size();
952
953 // Maximum backward range is 1M. Maximum forward reach is 1M - 4bytes.
954 // Subtract 2K to be ultra conservative.
955 const int cond_branch_max_reach = (int)(1*M - 2*K);
956 _needs_far_jump = code_size >= cond_branch_max_reach;
957 }
958
959 #endif // COMPILER2